Voltage regulation method, device, computer equipment and storage medium

Abstract

The present application relates to a voltage regulation method, apparatus, computer device, and storage medium. The method comprises: within any voltage cycle of the output voltage, at a target falling edge of a system clock, comparing the output voltage with a reference voltage; determining, based on the comparison result of the output voltage and the reference voltage, a compensation value corresponding to the target rising edge in the next voltage cycle, wherein the target rising edge is the previous rising edge adjacent to the target falling edge; and adjusting the output voltage at the target rising edge in the next voltage cycle based on the compensation value. This method can improve voltage regulation efficiency.

Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and in particular to a voltage regulation method, apparatus, computer equipment, and storage medium. Background Art

[0002] In integrated circuits, DC / DC converters are used to step up or down the input voltage to provide different voltage levels to internal circuits. However, the output voltage regulated by the DC / DC converter often has significant noise and ripple interference, making it impossible to directly supply the output voltage to sensitive internal circuits. A low-dropout linear regulator (LDO) is needed to convert the voltage into a low-noise, stable DC voltage before inputting it into the internal circuits. LDOs include digital LDOs and analog LDOs. Digital LDOs have lower voltage drop and higher voltage regulation efficiency than analog LDOs, making them a widely used voltage regulation method.

[0003] In traditional digital LDO technology, a voltage comparator compares the output voltage with a reference voltage. Based on the comparison result, a compensation value is added by +1 or -1. The switching state of the MOS tube is determined based on the compensation value, and the output voltage is adjusted accordingly. A compensation value of +1 will reduce the output voltage, while a compensation value of -1 will increase the output voltage.

[0004] However, in traditional digital LDOs, the voltage at the rising edge of the current system clock is adjusted based on the voltage comparison result at the falling edge of the previous system clock. Then, the voltage at the rising edge of the next system clock is adjusted based on the voltage comparison result at the falling edge of the current system clock, and so on to complete the adjustment of the output voltage. The adjusted voltage is different from the compared voltage, resulting in inaccurate and slow output voltage regulation, resulting in low voltage regulation efficiency of the digital LDO. Summary of the Invention

[0005] Based on this, it is necessary to provide a voltage regulation method, apparatus, computer equipment, computer-readable storage medium and computer program product that can improve regulation efficiency in order to address the above technical problems.

[0006] In a first aspect, the present application provides a voltage regulation method. The method comprises:

[0007] In any voltage cycle of the output voltage, at a target falling edge of the system clock, the output voltage is compared with a reference voltage, and a compensation value corresponding to a target rising edge in a next voltage cycle is determined based on the comparison result of the output voltage and the reference voltage, wherein the target rising edge is a previous rising edge adjacent to the target falling edge;

[0008] At the target rising edge in the next voltage cycle, the output voltage is adjusted according to the compensation value.

[0009] In one embodiment, the digital LDO further includes a first voltage comparator, and determining the compensation value corresponding to the target rising edge in the next voltage cycle based on a comparison result between the output voltage and the reference voltage includes:

[0010] Comparing the output voltage and the reference voltage by the first voltage comparator to obtain a voltage comparison result, wherein the voltage comparison result includes a first comparison result or a second comparison result, the first comparison result is used to indicate that the output voltage is greater than the reference voltage, and the second comparison result is used to indicate that the output voltage is less than the reference voltage;

[0011] The compensation value corresponding to the target rising edge in the next voltage cycle is determined according to the voltage comparison result and the compensation value corresponding to the target rising edge in the voltage cycle.

[0012] In one embodiment, determining the compensation value corresponding to the target rising edge in the next voltage cycle according to the voltage comparison result and the compensation value corresponding to the target rising edge in the voltage cycle includes:

[0013] determining, according to the voltage comparison result, a compensation adjustment value corresponding to the target rising edge in the next voltage cycle, wherein, if the voltage comparison result is the first comparison result, the compensation adjustment value is +1, and if the voltage comparison result is the second comparison result, the compensation adjustment value is -1;

[0014] The compensation adjustment value and the compensation value corresponding to the target rising edge in the voltage cycle are accumulated to obtain the compensation value corresponding to the target rising edge in the next voltage cycle.

[0015] In one embodiment, the method further comprises:

[0016] The number of the system clocks included in the voltage cycle is determined according to the system clock, the input voltage and the reference voltage.

[0017] In one embodiment, the digital LDO further includes a second voltage comparator, and determining the number of the system clocks included in the voltage cycle according to the system clock, the input voltage, and the reference voltage includes:

[0018] Perform voltage division on the input voltage to obtain the target voltage;

[0019] At the falling edge of each of the system clocks, the target voltage and the reference voltage are compared by the second voltage comparator to obtain a voltage comparison result corresponding to the falling edge of each of the system clocks;

[0020] The number of the system clocks included in the voltage cycle is determined according to the voltage comparison result corresponding to the falling edge of each system clock.

[0021] In one embodiment, the voltage comparison result changes periodically over time, and determining the number of the system clocks included in the voltage cycle according to the voltage comparison result corresponding to the falling edge of each of the system clocks includes:

[0022] For any change period of the voltage comparison result, the voltage comparison results within the change period are counted to obtain the number of the system clocks included in the voltage period.

[0023] In a second aspect, the present application further provides a voltage regulating device. The device comprises:

[0024] a first determining module, configured to compare the output voltage with a reference voltage at a target falling edge of a system clock within any voltage cycle of the output voltage, and determine a compensation value corresponding to a target rising edge in a next voltage cycle based on the comparison result of the output voltage and the reference voltage, wherein the target rising edge is a previous rising edge adjacent to the target falling edge;

[0025] An adjustment module is configured to adjust the output voltage according to the compensation value at the target rising edge in the next voltage cycle.

[0026] In one embodiment, the digital LDO further includes a first voltage comparator, and the first determination module is further configured to:

[0027] Comparing the output voltage and the reference voltage by the first voltage comparator to obtain a voltage comparison result, wherein the voltage comparison result includes a first comparison result or a second comparison result, the first comparison result is used to indicate that the output voltage is greater than the reference voltage, and the second comparison result is used to indicate that the output voltage is less than the reference voltage;

[0028] The compensation value corresponding to the target rising edge in the next voltage cycle is determined according to the voltage comparison result and the compensation value corresponding to the target rising edge in the voltage cycle.

[0029] In one embodiment, the first determining module is further configured to:

[0030] determining, according to the voltage comparison result, a compensation adjustment value corresponding to the target rising edge in the next voltage cycle, wherein, if the voltage comparison result is the first comparison result, the compensation adjustment value is +1, and if the voltage comparison result is the second comparison result, the compensation adjustment value is -1;

[0031] The compensation adjustment value and the compensation value corresponding to the target rising edge in the voltage cycle are accumulated to obtain the compensation value corresponding to the target rising edge in the next voltage cycle.

[0032] In one embodiment, the apparatus further comprises:

[0033] The second determining module is configured to determine the number of the system clocks included in the voltage cycle according to the system clock, the input voltage and the reference voltage.

[0034] In one embodiment, the digital LDO further includes a second voltage comparator, and the second determination module is further configured to:

[0035] Perform voltage division on the input voltage to obtain the target voltage;

[0036] At the falling edge of each of the system clocks, the target voltage and the reference voltage are compared by the second voltage comparator to obtain a voltage comparison result corresponding to the falling edge of each of the system clocks;

[0037] The number of the system clocks included in the voltage cycle is determined according to the voltage comparison result corresponding to the falling edge of each system clock.

[0038] In one embodiment, the voltage comparison result changes periodically over time, and the second determining module is further configured to:

[0039] For any change period of the voltage comparison result, the voltage comparison results within the change period are counted to obtain the number of the system clocks included in the voltage period.

[0040] In a third aspect, the present application further provides a computer device. The computer device includes a memory and a processor, wherein the memory stores a computer program, and when the processor executes the computer program, the following steps are performed:

[0041] In any voltage cycle of the output voltage, at a target falling edge of the system clock, the output voltage is compared with a reference voltage, and a compensation value corresponding to a target rising edge in a next voltage cycle is determined based on the comparison result of the output voltage and the reference voltage, wherein the target rising edge is a previous rising edge adjacent to the target falling edge;

[0042] At the target rising edge in the next voltage cycle, the output voltage is adjusted according to the compensation value.

[0043] In a fourth aspect, the present application further provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the following steps:

[0044] In any voltage cycle of the output voltage, at a target falling edge of the system clock, the output voltage is compared with a reference voltage, and a compensation value corresponding to a target rising edge in a next voltage cycle is determined based on the comparison result of the output voltage and the reference voltage, wherein the target rising edge is a previous rising edge adjacent to the target falling edge;

[0045] At the target rising edge in the next voltage cycle, the output voltage is adjusted according to the compensation value.

[0046] In a fifth aspect, the present application further provides a computer program product. The computer program product includes a computer program that, when executed by a processor, implements the following steps:

[0047] In any voltage cycle of the output voltage, at a target falling edge of the system clock, the output voltage is compared with a reference voltage, and a compensation value corresponding to a target rising edge in a next voltage cycle is determined based on the comparison result of the output voltage and the reference voltage, wherein the target rising edge is a previous rising edge adjacent to the target falling edge;

[0048] At the target rising edge in the next voltage cycle, the output voltage is adjusted according to the compensation value.

[0049] The voltage regulation method, apparatus, computer device, storage medium, and computer program product described above compare the output voltage with a reference voltage at a target falling edge of a system clock within any voltage cycle of the output voltage, and determine a compensation value corresponding to the target rising edge in the next voltage cycle based on the comparison result between the output voltage and the reference voltage, wherein the target rising edge is the previous rising edge adjacent to the target falling edge, and the output voltage is adjusted based on the compensation value at the target rising edge in the next voltage cycle. Based on the voltage regulation method, apparatus, computer device, storage medium, and computer program product described above, the target rising edge is adjacent to the target falling edge, and the output voltage varies periodically over time. In different voltage cycles, the system clock cycle formed by the target rising edge and the target falling edge corresponds to the same portion of voltage. Therefore, based on the voltage comparison result at the target falling edge within the voltage cycle, the output voltage at the target rising edge in the next voltage cycle is adjusted. That is, based on the comparison result of the voltage in the portion of the voltage within the voltage cycle, the voltage in the portion of the next voltage cycle is adjusted, thereby achieving accurate regulation of the output voltage and improving the efficiency of voltage regulation. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Figure 1 1 is a flow chart of a voltage regulation method according to an embodiment;

[0051] Figure 2 is a waveform diagram in one embodiment;

[0052] Figure 3 Schematic diagram of voltage regulation steps at a target rising edge and a target falling edge in one embodiment;

[0053] Figure 4 is a flow chart of a voltage regulation method according to another embodiment;

[0054] Figure 5 is a flow chart of a voltage regulation method according to another embodiment;

[0055] Figure 6 is a flow chart of a voltage regulation method according to another embodiment;

[0056] Figure 7 1 is a schematic diagram of the overall flow of a voltage regulation method according to an embodiment;

[0057] Figure 8 FIG1 is a schematic diagram of voltage regulation at each system clock in one embodiment;

[0058] Figure 9 is a structural block diagram of a voltage regulating device in one embodiment;

[0059] Figure 10FIG. 1 is a diagram showing the internal structure of a computer device in one embodiment. DETAILED DESCRIPTION

[0060] In order to make the purpose, technical solutions and advantages of this application more clear, the following further describes this application in detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain this application and are not intended to limit this application.

[0061] In one embodiment, Figure 1 As shown, a voltage regulation method is provided. This embodiment uses the method applied to a terminal as an example for illustration. It is understandable that the method can also be applied to a server, or to a system including a terminal and a server, and implemented through interaction between the terminal and the server. In this embodiment, the method includes the following steps:

[0062] Step 102: In any voltage cycle of the output voltage, at the target falling edge of the system clock, the output voltage is compared with the reference voltage, and based on the comparison result of the output voltage and the reference voltage, a compensation value corresponding to the target rising edge in the next voltage cycle is determined, wherein the target rising edge is the previous rising edge adjacent to the target falling edge.

[0063] Among them, reference Figure 2 As shown, the output voltage varies periodically over time. For example, the output voltage can be a sinusoidal voltage or a cosine voltage. The reference voltage is the voltage value of the output voltage after voltage regulation. The system clock cycle is much smaller than the output voltage cycle. A voltage cycle includes multiple system clocks, and each system clock in a voltage cycle corresponds to a compensation value.

[0064] For example, Figure 2 As shown, one voltage cycle includes 8 clock cycles, wherein the 8 clock cycles correspond to compensation value 0, compensation value 1, compensation value 2, ..., compensation value 7, respectively.

[0065] In an embodiment of the present application, within any voltage cycle of the output voltage, the output voltage corresponding to the target falling edge of the system clock is obtained, and the output voltage is compared with the reference voltage to obtain the magnitude relationship between the output voltage and the reference voltage (i.e., the comparison result). Then, based on the comparison result, the compensation value corresponding to the target rising edge in the next voltage cycle is determined.

[0066] In a digital LDO, the switching state of each switching MOS tube in the circuit is determined according to the compensation value. Each time a switching MOS tube is turned on, the output voltage at that moment can be reduced accordingly; each time a switching MOS tube is turned off, the output voltage at that moment can be increased.

[0067] Therefore, when the output voltage corresponding to the target falling edge is greater than the reference level, the compensation value corresponding to the target rising edge in the next voltage cycle is increased; when the output voltage corresponding to the target falling edge is less than the reference level, the compensation value corresponding to the target rising edge in the next voltage cycle is reduced.

[0068] Step 104 : At the target rising edge in the next voltage cycle, the output voltage is adjusted according to the compensation value.

[0069] In the present application, refer to Figure 3 As shown, after determining the compensation value corresponding to the target rising edge in the next voltage cycle, the switching state of each switching MOS tube can be determined according to the compensation value at the target rising edge in the next voltage cycle, thereby adjusting the output voltage.

[0070] In the above voltage regulation method, the target rising edge is adjacent to the target falling edge, and the output voltage changes periodically with time. In different voltage cycles, the system clock cycle composed of the target rising edge and the target falling edge corresponds to the same part of the voltage. Therefore, based on the voltage comparison result at the target falling edge in the voltage cycle, the output voltage at the target rising edge in the next voltage cycle is adjusted. That is, based on the comparison result of this part of the voltage in the voltage cycle, this part of the voltage in the next voltage cycle is adjusted, thereby achieving accurate regulation of the output voltage and improving the efficiency of voltage regulation.

[0071] In one embodiment, Figure 4 As shown, the digital LDO further includes a first voltage comparator. In step 102, determining the compensation value corresponding to the target rising edge in the next voltage cycle according to the comparison result between the output voltage and the reference voltage includes:

[0072] In step 402, the output voltage and the reference voltage are compared by a first voltage comparator to obtain a voltage comparison result, wherein the voltage comparison result includes a first comparison result or a second comparison result, the first comparison result is used to indicate that the output voltage is greater than the reference voltage, and the second comparison result is used to indicate that the output voltage is less than the reference voltage.

[0073] In an embodiment of the present application, the magnitude relationship between the output voltage and the reference voltage can be compared based on a first voltage comparator, and the output voltage and the reference voltage are respectively input into the first voltage comparator. The first voltage comparator compares the output voltage with the reference voltage and outputs a voltage comparison result, wherein the voltage comparison result includes a first comparison result or a second comparison result, the first comparison result is used to characterize that the output voltage is greater than the reference voltage, and the second comparison result is used to characterize that the output voltage is less than the reference voltage.

[0074] For example, refer to Figure 2As shown, waveform 2 can represent the voltage comparison between the output voltage and the reference voltage at each moment through the first voltage comparator, and the voltage comparison result output by the first voltage comparator. When the output voltage is greater than the reference voltage, the first voltage comparator outputs a high level (first comparison result); when the output voltage is less than the reference voltage, the first voltage comparator outputs a low level (second comparison result).

[0075] Step 404 : Determine the compensation value corresponding to the target rising edge in the next voltage cycle according to the voltage comparison result and the compensation value corresponding to the target rising edge in the voltage cycle.

[0076] In an embodiment of the present application, the compensation value corresponding to the target rising edge in the next voltage cycle can be determined based on the voltage comparison result and the compensation value corresponding to the target rising edge in the voltage cycle, wherein, within a system clock in the voltage cycle, first, according to the compensation value corresponding to the target rising edge in the voltage cycle, the output voltage at the target rising edge in the voltage cycle is adjusted. After the adjustment is completed, the output voltage at the target falling edge will also increase or decrease accordingly. Thereafter, the output voltage at the target falling edge is compared with the reference voltage. The voltage comparison result obtained at this time can characterize the size relationship between the output voltage after voltage adjustment and the reference voltage.

[0077] Therefore, based on the voltage comparison result, the compensation value corresponding to the target rising edge in the voltage cycle can be adjusted to obtain the compensation value corresponding to the target rising edge in the next voltage cycle. In one voltage cycle, each target rising edge of the system clock corresponds to a different compensation value, while the same target rising edge in different voltage cycles corresponds to the same compensation value. For example, if the voltage cycle contains three target rising edges, then target rising edge 1 corresponds to compensation value a, target rising edge 2 corresponds to compensation value b, and target rising edge 3 corresponds to compensation value c. The next voltage cycle also contains target rising edge 1, target rising edge 2, and target rising edge 3, and target rising edge 1 corresponds to compensation value a, target rising edge 2 corresponds to compensation value b, and target rising edge 3 corresponds to compensation value c. The compensation value corresponding to the target rising edge in the voltage cycle is the compensation value corresponding to the target rising edge in the current voltage cycle. Based on this compensation value, the output voltage at the target rising edge in the current voltage cycle can be adjusted.

[0078] In this embodiment, the compensation value corresponding to the target rising edge in the next voltage cycle is determined by the voltage comparison result within the voltage cycle and the compensation value corresponding to the target rising edge in the voltage cycle. That is, based on the adjustment of the output voltage in the current voltage cycle, the adjustment to be made to the output voltage in the next voltage cycle is determined, thereby achieving accurate adjustment of the output voltage and improving the efficiency of voltage regulation.

[0079] In one embodiment, Figure 5As shown, step 404, determining the compensation value corresponding to the target rising edge in the next voltage cycle according to the voltage comparison result and the compensation value corresponding to the target rising edge in the voltage cycle, includes:

[0080] Step 502: Determine the compensation adjustment value corresponding to the target rising edge in the next voltage cycle based on the voltage comparison result, wherein when the voltage comparison result is the first comparison result, the compensation adjustment value is +1, and when the voltage comparison result is the second comparison result, the compensation adjustment value is -1.

[0081] In an embodiment of the present application, the compensation adjustment value corresponding to the target rising edge in the next voltage cycle can be determined based on the voltage comparison result. When the voltage comparison result is a first comparison result, the output voltage is greater than the reference voltage and the output voltage needs to be reduced to make the output voltage closer to the reference voltage. In this case, the compensation adjustment value can be set to +1 (i.e., a switch MOS tube is turned on); when the voltage comparison result is a second comparison result, the output voltage is less than the reference voltage and the output voltage needs to be increased. In this case, the compensation adjustment value can be set to -1 (i.e., a switch MOS tube is turned off).

[0082] Step 504 : Accumulate the compensation adjustment value and the compensation value corresponding to the target rising edge in the voltage cycle to obtain the compensation value corresponding to the target rising edge in the next voltage cycle.

[0083] In the embodiment of the present application, the compensation adjustment value and the compensation value corresponding to the target rising edge in the voltage cycle can be cumulatively summed to obtain the compensation value corresponding to the target rising edge in the next voltage cycle. For example, if the compensation adjustment value is -1 and the compensation value corresponding to the target rising edge in the voltage cycle is 5, the compensation value corresponding to the target rising edge in the next voltage cycle can be obtained as 4; alternatively, if the compensation adjustment value is -1 and the compensation value corresponding to the target rising edge in the voltage cycle is -5, the compensation value corresponding to the target rising edge in the next voltage cycle can be obtained as -6.

[0084] In an embodiment of the present application, the target rising edge is adjacent to the target falling edge, and the output voltage changes periodically with time. In different voltage cycles, the system clock cycle constituted by the target rising edge and the target falling edge corresponds to the same part of the voltage. Therefore, based on the voltage comparison result at the target falling edge within the voltage cycle, the output voltage at the target rising edge in the next voltage cycle is adjusted. That is, based on the comparison result of this part of the voltage within the voltage cycle, this part of the voltage in the next voltage cycle is adjusted, thereby achieving accurate regulation of the output voltage and improving the efficiency of voltage regulation.

[0085] Secondly, compared with traditional digital LDOs, the voltage regulation method described in the embodiments of the present application accumulates the compensation values ​​in sequence after multiple voltage cycles, thereby gradually increasing the regulation strength of the output voltage, achieving rapid regulation of the output voltage, and improving the efficiency of voltage regulation.

[0086] In one embodiment, the method further comprises:

[0087] The number of system clocks included in the voltage cycle is determined based on the system clock, input voltage, and reference voltage.

[0088] In the embodiments of the present application, the number of compensation values ​​in the digital LDO must be pre-set. Once the number of compensation values ​​is set, the compensation value in the digital LDO will no longer automatically increase or decrease. Therefore, when performing voltage regulation, the number of compensation values ​​must be determined first. Each system clock in a voltage cycle corresponds to a compensation value, that is, the number of compensation values ​​is the number of system clocks contained in the voltage cycle.

[0089] In the embodiment of the present application, the clock period of the system clock is fixed and can be preset by the staff. Every time a system clock passes, a voltage comparison is performed between the input voltage and the reference voltage to obtain a voltage comparison result. If the voltage period of the input voltage and the output voltage is the same, then by counting the total number of voltage comparison results within a voltage period, the number of system clocks included in the voltage period (i.e., the number of compensation values) can be obtained.

[0090] Before voltage regulation begins, the number of compensation values ​​can be set based on the number of system clocks included in the voltage cycle. Each target rising edge within a voltage cycle corresponds to a compensation value. For example, using the above example, if the number of compensation values ​​is 3, compensation values ​​a, b, and c can be set, and their initial values ​​are all set to 0. Then, target rising edge 1 corresponds to compensation value a: 0, target rising edge 2 corresponds to compensation value b: 0, and target rising edge 3 corresponds to compensation value c: 0.

[0091] In an embodiment of the present application, the number of system clocks contained in a voltage cycle is determined based on the system clock, input voltage and reference voltage, and the number of compensation values ​​is then set so that each system clock in the same voltage cycle corresponds to a compensation value. This allows the voltage of a portion of the next voltage cycle to be adjusted based on the comparison result of the output voltage corresponding to a system clock in the voltage cycle, thereby achieving accurate regulation of the output voltage and improving the efficiency of voltage regulation.

[0092] In one embodiment, the voltage cycle of the input voltage may also be directly measured by an instrument, and the number of system clocks included in the voltage cycle may be determined according to the voltage cycle and the clock cycle of the system clock.

[0093] In one embodiment, Figure 6 As shown, the digital LDO further includes a second voltage comparator, which determines the number of system clocks included in the voltage cycle according to the system clock, the input voltage, and the reference voltage, including:

[0094] Step 602: Divide the input voltage to obtain a target voltage.

[0095] In an embodiment of the present application, the maximum value of the input voltage may be smaller than the reference voltage, or the minimum value of the input voltage may be greater than the reference voltage. In the above case, the comparison result between the input voltage and the reference voltage will not change. At this time, it is impossible to determine how many voltage comparisons are performed in a voltage cycle.

[0096] Therefore, the input voltage is divided to obtain the target voltage, so that the target voltage is greater than the minimum value of the input voltage and the reference voltage is less than the maximum value of the target voltage.

[0097] Step 604 : At the falling edge of each system clock, the target voltage is compared with the reference voltage by a second voltage comparator to obtain a voltage comparison result corresponding to the falling edge of each system clock.

[0098] In an embodiment of the present application, at the falling edge of each system clock, a second voltage comparator compares the target voltage with the reference voltage to obtain a voltage comparison result corresponding to the falling edge of each system clock, wherein the voltage comparison result includes a third comparison result or a fourth comparison result, the third comparison result indicating that the target voltage is greater than the reference voltage, and the fourth comparison result indicating that the target voltage is less than the reference voltage. The second voltage comparator outputs a high level or a low level to indicate the voltage comparison result. For example, the third comparison result is indicated by a high level "1", and the fourth comparison result is indicated by a low level "0".

[0099] Step 606 : Determine the number of system clocks included in the voltage cycle according to the voltage comparison result corresponding to the falling edge of each system clock.

[0100] In the embodiment of the present application, the number of system clocks included in the voltage cycle can be determined based on the voltage comparison results corresponding to the falling edges of each system clock. For example, the voltage comparison results corresponding to the falling edges of each system clock are: 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0... It can be seen that the target voltage changes periodically over time. Therefore, the obtained voltage comparison results should also change periodically. Then, within a change cycle of the voltage comparison results, the number of voltage comparison results is the number of system clocks included in the voltage cycle 8.

[0101] The embodiment of the present application divides the input voltage to ensure that the voltage comparison results corresponding to the falling edges of each system clock change regularly, and then determines how many system clocks are included in the voltage cycle based on the changing pattern of the voltage comparison results. The above method is simpler to operate than directly measuring the voltage cycle.

[0102] In one embodiment, the voltage comparison result varies periodically over time, and the number of system clocks included in the voltage cycle is determined based on the voltage comparison result corresponding to the falling edge of each system clock, including:

[0103] For any change period of the voltage comparison result, the voltage comparison results within the change period are counted to obtain the number of system clocks included in the voltage period.

[0104] In an embodiment of the present application, the voltage comparison result will change periodically with time. The changing rule of the voltage comparison result can be determined based on the voltage comparison result corresponding to the falling edge of each system clock, and the changing period of the voltage comparison result can be obtained. After that, based on the changing rule, it can be first determined whether the voltage period is an integer multiple of the clock period of the system clock. When the voltage comparison results contained in the changing period are the same value N for multiple consecutive times, the voltage period is an integer multiple of the clock period. By counting the voltage comparison results in the changing period, the number of system clocks contained in the voltage period (the number of compensation values) can be obtained as N; when the number of voltage comparison results corresponding to the changing period is N and N+1 appearing alternately, it means that the voltage period is not an integer multiple of the clock period. At this time, a variable-length cycle mode can be introduced to make the number of compensation values ​​alternate between N and N+1.

[0105] Exemplarily, the voltage comparison results corresponding to the falling edges of each system clock are: 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0…, thus, it can be obtained that the changing cycle of the voltage comparison results includes: 1, 1, 1, 1, 0, 0, then the number of system clocks contained in the voltage cycle is 6, and the number of compensation values ​​is set to 6; taking the voltage comparison results corresponding to the falling edges of each system clock as: 1, 1, 0, 1, 1, 0, 0, 1, 1, 1, 0, 0… as an example, it can be seen that in the changing cycle, the number of voltage comparison results alternates between 3 and 4, at this time, let the number of compensation values ​​alternate between 3 and 4.

[0106] In this embodiment, the voltage comparison results within the variation period are counted to obtain the number of system clocks contained in the voltage period. In addition, a variable-length cycle mode is introduced, which can make the compensation value an alternating adjacent positive integer, thereby meeting the situation when the voltage period is not an integer multiple of the clock period of the system clock, thereby expanding the scope of application of the voltage regulation method.

[0107] In a specific embodiment, Figure 7 As shown, the input voltage is input into the digital LDO from the power input terminal. In the ripple period extraction stage, the input voltage is divided to obtain the target voltage. At the falling edge of each system clock, the target voltage is compared with the reference voltage by the second voltage comparator, and the voltage comparison result is output. Afterwards, in the ripple period quantization stage, the variation pattern of the voltage comparison result is determined based on multiple voltage comparison results, and the variation period of the voltage comparison result is obtained. Based on the variation pattern of the voltage comparison result, it is determined whether the voltage period is an integer multiple of the clock period, so as to complete the ripple period mode determination and determine the number of compensation values.

[0108] Taking the voltage comparison results corresponding to the falling edges of each system clock as: 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0... as an example, it can be obtained that the changing cycle of the voltage comparison result includes: 1, 1, 1, 1, 0, 0, then the number of system clocks included in the voltage cycle is 6, and the number of compensation values ​​is determined to be 6.

[0109] According to the number of compensation values: 6, it can be determined that each system clock in a voltage cycle corresponds to compensation value 0, compensation value 1, compensation value 2, compensation value 3, compensation value 4, and compensation value 5 respectively, and the initial value of each compensation value is preset to be 0.

[0110] During the voltage regulation process, in the first voltage cycle, the compensation values ​​are 0, 0, 0, 0, 0, 0, respectively. For the first system clock 0, the output voltage at the target falling edge of the system clock 0 is obtained, and the output voltage is compared with the reference voltage through the first voltage comparator to obtain a first comparison result. According to the first comparison result, it can be determined that the compensation adjustment value corresponding to the target rising edge of the system clock 0 in the second voltage cycle is +1. In the second voltage cycle, the compensation value 0 becomes 1. When entering the second voltage cycle, first, at the target rising edge of the system clock 0, a switch MOS tube is turned on according to the compensation value 0:1, so that the output voltage corresponding to the system clock 0 is reduced.

[0111] Afterwards, the output voltage at the target falling edge of the system clock 0 is obtained, and the output voltage is compared with the reference voltage through the first voltage comparator to obtain a first comparison result. According to the first comparison result, it can be determined that the compensation adjustment value corresponding to the target rising edge of the system clock 0 in the second voltage cycle is +1, and the compensation value 0 in the second voltage cycle becomes 2. When entering the second voltage cycle, first, at the target rising edge of the system clock 0, the two switch MOS tubes are turned on according to the compensation value 0:2, so that the output voltage corresponding to the system clock 0 is reduced.

[0112] By analogy, in each voltage cycle, the output voltage corresponding to each system clock is adjusted to quickly bring the output voltage close to the reference voltage.

[0113] From the above process, we can see that the change of compensation value is: first voltage cycle: 0, 0, 0, 0, 0, 0; second voltage cycle: 1, 1, 1, -1, -1, -1; third voltage cycle: 2, 2, 2, -2, -2, -2; in traditional digital LDO, because it only contains one compensation value, the change of compensation value is: first voltage cycle: 1, 2, 3, 2, 1, 0; second voltage cycle: 1, 2, 3, 2, 1, 0.

[0114] Compared with traditional digital LDOs, the voltage regulation method described in the embodiments of the present application accumulates compensation values ​​in sequence after multiple voltage cycles, thereby gradually increasing the regulation strength of the output voltage, achieving rapid regulation of the output voltage, and improving the efficiency of voltage regulation.

[0115] Reference Figure 8 As shown, the traditional shift is used to characterize the regulation of the output voltage by the traditional digital LDO, and the ideal shift is used to represent the regulation of the output voltage by the voltage regulation method described in this application. Figure 8 It can be seen that the voltage regulation method described in this application can quickly adjust the output voltage to the reference voltage compared to the traditional digital LDO, and has higher voltage regulation efficiency.

[0116] It should be understood that, although the various steps in the flowcharts involved in the various embodiments described above are displayed in sequence according to the instructions of the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and these steps can be executed in other orders. Moreover, at least a portion of the steps in the flowcharts involved in the various embodiments described above can include multiple steps or multiple stages, and these steps or stages are not necessarily executed and completed at the same time, but can be executed at different times, and the execution order of these steps or stages is not necessarily to be carried out in sequence, but can be executed in turn or alternately with other steps or at least a portion of steps or stages in other steps.

[0117] Based on the same inventive concept, embodiments of the present application further provide a voltage regulating device for implementing the aforementioned voltage regulating method. The solution provided by this device is similar to the solution described in the aforementioned method. Therefore, the specific limitations of one or more voltage regulating device embodiments provided below can be found in the above-described limitations of the voltage regulating method and are not further elaborated here.

[0118] In one embodiment, Figure 9 As shown, a voltage regulating device 900 is provided, comprising: a first determining module 902 and an adjusting module 904, wherein:

[0119] The first determination module 902 is used to compare the output voltage with the reference voltage at the target falling edge of the system clock within any voltage cycle of the output voltage, and determine the compensation value corresponding to the target rising edge in the next voltage cycle based on the comparison result of the output voltage and the reference voltage, wherein the target rising edge is the previous rising edge adjacent to the target falling edge.

[0120] The adjustment module 904 is configured to adjust the output voltage according to the compensation value at the target rising edge in the next voltage cycle.

[0121] In this embodiment, the target rising edge is adjacent to the target falling edge, and the output voltage changes periodically with time. In different voltage cycles, the system clock cycle composed of the target rising edge and the target falling edge corresponds to the same part of the voltage. Therefore, based on the voltage comparison result at the target falling edge in the voltage cycle, the output voltage at the target rising edge in the next voltage cycle is adjusted. That is, based on the comparison result of this part of the voltage in the voltage cycle, this part of the voltage in the next voltage cycle is adjusted, thereby achieving accurate regulation of the output voltage and improving the efficiency of voltage regulation.

[0122] In one embodiment, the digital LDO further includes a first voltage comparator, and the first determining module 902 is further configured to:

[0123] Comparing the output voltage with the reference voltage by a first voltage comparator to obtain a voltage comparison result, wherein the voltage comparison result includes a first comparison result or a second comparison result, the first comparison result is used to indicate that the output voltage is greater than the reference voltage, and the second comparison result is used to indicate that the output voltage is less than the reference voltage;

[0124] The compensation value corresponding to the target rising edge in the next voltage cycle is determined according to the voltage comparison result and the compensation value corresponding to the target rising edge in the voltage cycle.

[0125] In one embodiment, the first determining module 902 is further configured to:

[0126] Determine, according to the voltage comparison result, a compensation adjustment value corresponding to the target rising edge in the next voltage cycle, wherein, if the voltage comparison result is a first comparison result, the compensation adjustment value is +1, and if the voltage comparison result is a second comparison result, the compensation adjustment value is -1;

[0127] The compensation adjustment value and the compensation value corresponding to the target rising edge in the voltage cycle are accumulated to obtain the compensation value corresponding to the target rising edge in the next voltage cycle.

[0128] In one embodiment, the apparatus further comprises:

[0129] The second determining module is configured to determine the number of system clocks included in the voltage cycle according to the system clock, the input voltage and the reference voltage.

[0130] In one embodiment, the digital LDO further includes a second voltage comparator, and the second determination module is further configured to:

[0131] Perform voltage division on the input voltage to obtain the target voltage;

[0132] At the falling edge of each system clock, the target voltage and the reference voltage are compared by a second voltage comparator to obtain a voltage comparison result corresponding to the falling edge of each system clock;

[0133] The number of system clocks included in the voltage cycle is determined according to the voltage comparison result corresponding to the falling edge of each system clock.

[0134] In one embodiment, the voltage comparison result changes periodically over time, and the second determining module is further configured to:

[0135] For any change period of the voltage comparison result, the voltage comparison results within the change period are counted to obtain the number of system clocks included in the voltage period.

[0136] Each module in the voltage regulation device described above may be implemented in whole or in part through software, hardware, or a combination thereof. Each module may be embedded in or independent of a processor in a computer device in hardware form, or may be stored in a memory in the computer device in software form, so that the processor can call and execute the corresponding operations of each module.

[0137] In one embodiment, a computer device is provided. The computer device may be a terminal, and its internal structure diagram may be as follows: Figure 10 As shown. The computer device includes a processor, a memory, and a communication interface connected via a system bus. The processor of the computer device is used to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system and a computer program. The internal memory provides an environment for the operation of the operating system and the computer program in the non-volatile storage medium. The communication interface of the computer device is used to communicate with an external terminal in a wired or wireless manner, and the wireless manner can be implemented through WIFI, a mobile cellular network, NFC (near field communication) or other technologies. When the computer program is executed by the processor, a voltage regulation method is implemented.

[0138] Those skilled in the art will understand that Figure 10 The structure shown in the figure is only a block diagram of a part of the structure related to the solution of the present application, and does not constitute a limitation on the computer device to which the solution of the present application is applied. The specific computer device may include more or fewer components than shown in the figure, or combine certain components, or have a different component arrangement.

[0139] In one embodiment, a computer device is provided, including a memory and a processor, wherein a computer program is stored in the memory, and when the processor executes the computer program, the following steps are implemented:

[0140] In any voltage cycle of the output voltage, at a target falling edge of the system clock, the output voltage is compared with a reference voltage, and a compensation value corresponding to a target rising edge in a next voltage cycle is determined based on the comparison result of the output voltage and the reference voltage, wherein the target rising edge is a previous rising edge adjacent to the target falling edge;

[0141] At the target rising edge in the next voltage cycle, the output voltage is adjusted according to the compensation value.

[0142] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the following steps are implemented:

[0143] In any voltage cycle of the output voltage, at a target falling edge of the system clock, the output voltage is compared with a reference voltage, and a compensation value corresponding to a target rising edge in a next voltage cycle is determined based on the comparison result of the output voltage and the reference voltage, wherein the target rising edge is a previous rising edge adjacent to the target falling edge;

[0144] At the target rising edge in the next voltage cycle, the output voltage is adjusted according to the compensation value.

[0145] In one embodiment, a computer program product is provided, comprising a computer program, which, when executed by a processor, implements the following steps:

[0146] In any voltage cycle of the output voltage, at a target falling edge of the system clock, the output voltage is compared with a reference voltage, and a compensation value corresponding to a target rising edge in a next voltage cycle is determined based on the comparison result of the output voltage and the reference voltage, wherein the target rising edge is a previous rising edge adjacent to the target falling edge;

[0147] At the target rising edge in the next voltage cycle, the output voltage is adjusted according to the compensation value.

[0148] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties.

[0149] Those skilled in the art will appreciate that all or part of the processes in the above-mentioned embodiment methods can be implemented by instructing the relevant hardware through a computer program, and the computer program can be stored in a non-volatile computer-readable storage medium. When the computer program is executed, it can include the processes of the embodiments of the above-mentioned methods. Among them, any reference to memory, database or other media used in the embodiments provided in this application may include at least one of non-volatile and volatile memory. Non-volatile memory may include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory may include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can be in various forms, such as static random access memory (SRAM) or dynamic random access memory (DRAM). The database involved in the various embodiments provided herein may include at least one of a relational database and a non-relational database. Non-relational databases may include, but are not limited to, distributed databases based on blockchains. The processor involved in the various embodiments provided herein may be, but are not limited to, a general-purpose processor, a central processing unit, a graphics processing unit, a digital signal processor, a programmable logic unit, a data processing logic unit based on quantum computing, and the like.

[0150] The technical features of the above embodiments can be combined arbitrarily. To make the description concise, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0151] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the present application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present application shall be determined by the appended claims.

Claims

1. A voltage regulation method, applied to a digital low dropout linear regulator (LDO), characterized in that: The method comprises: In any voltage cycle of the output voltage, at a target falling edge of a system clock, the output voltage is compared with a reference voltage, and a compensation value corresponding to a target rising edge in a next voltage cycle is determined based on a comparison result between the output voltage and the reference voltage, wherein the target rising edge is a previous rising edge adjacent to the target falling edge, the voltage cycle includes a plurality of system clocks, and the number of the system clocks is determined based on the system clock, the input voltage, and the reference voltage; At the target rising edge in the next voltage cycle, the output voltage is adjusted according to the compensation value.

2. The method according to claim 1, characterized in that The digital low dropout linear regulator LDO further includes a first voltage comparator, and determining a compensation value corresponding to a target rising edge in a next voltage cycle according to a comparison result between the output voltage and the reference voltage includes: Comparing the output voltage and the reference voltage by the first voltage comparator to obtain a voltage comparison result, wherein the voltage comparison result includes a first comparison result or a second comparison result, the first comparison result is used to indicate that the output voltage is greater than the reference voltage, and the second comparison result is used to indicate that the output voltage is less than the reference voltage; The compensation value corresponding to the target rising edge in the next voltage cycle is determined according to the voltage comparison result and the compensation value corresponding to the target rising edge in the voltage cycle.

3. The method according to claim 2, characterized in that The determining, based on the voltage comparison result and the compensation value corresponding to the target rising edge in the voltage cycle, a compensation value corresponding to the target rising edge in the next voltage cycle includes: determining, according to the voltage comparison result, a compensation adjustment value corresponding to the target rising edge in the next voltage cycle, wherein, if the voltage comparison result is the first comparison result, the compensation adjustment value is +1, and if the voltage comparison result is the second comparison result, the compensation adjustment value is -1; The compensation adjustment value and the compensation value corresponding to the target rising edge in the voltage cycle are accumulated to obtain the compensation value corresponding to the target rising edge in the next voltage cycle.

4. The method according to claim 1, wherein The digital low dropout linear regulator LDO further includes a second voltage comparator, and determining the number of the system clocks included in the voltage cycle according to the system clock, the input voltage, and the reference voltage includes: Perform voltage division on the input voltage to obtain the target voltage; At the falling edge of each of the system clocks, the target voltage and the reference voltage are compared by the second voltage comparator to obtain a voltage comparison result corresponding to the falling edge of each of the system clocks; The number of the system clocks included in the voltage cycle is determined according to the voltage comparison result corresponding to the falling edge of each system clock.

5. The method according to claim 4, characterized in that The voltage comparison result changes periodically over time, and determining the number of the system clocks included in the voltage cycle according to the voltage comparison result corresponding to the falling edge of each of the system clocks includes: For any change period of the voltage comparison result, the voltage comparison results within the change period are counted to obtain the number of the system clocks included in the voltage period.

6. A voltage regulating device, characterized in that: Applicable to a digital low dropout linear regulator LDO, the device comprises: a first determining module, configured to compare the output voltage with a reference voltage at a target falling edge of a system clock within any voltage cycle of the output voltage, and determine, based on the comparison result of the output voltage and the reference voltage, a compensation value corresponding to a target rising edge in a next voltage cycle, wherein the target rising edge is a previous rising edge adjacent to the target falling edge, the voltage cycle includes a plurality of system clocks, and the number of the system clocks is determined based on the system clock, the input voltage, and the reference voltage; An adjustment module is configured to adjust the output voltage according to the compensation value at the target rising edge in the next voltage cycle.

7. The device according to claim 6, characterized in that The digital low dropout linear regulator LDO further includes a first voltage comparator, and the first determining module is further configured to: Comparing the output voltage and the reference voltage by the first voltage comparator to obtain a voltage comparison result, wherein the voltage comparison result includes a first comparison result or a second comparison result, the first comparison result is used to indicate that the output voltage is greater than the reference voltage, and the second comparison result is used to indicate that the output voltage is less than the reference voltage; The compensation value corresponding to the target rising edge in the next voltage cycle is determined according to the voltage comparison result and the compensation value corresponding to the target rising edge in the voltage cycle.

8. A computer device comprising a memory and a processor, wherein the memory stores a computer program, wherein: When the processor executes the computer program, the steps of the method according to any one of claims 1 to 5 are implemented.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 5 are implemented.

10. A computer program product comprising a computer program, characterized in that When the computer program is executed by a processor, the steps of the method according to any one of claims 1 to 5 are implemented.

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