Method, device and medium for graphics generation

By adding and adjusting connected sub-graphic combination graphics into the layout, the problem that traditional random graphics generation methods cannot meet the design rules is solved, and high degree of freedom and diversity of graphics generation is achieved, which improves the manufacturability of chip manufacturing.

CN116205194BActive Publication Date: 2025-08-26QUANXIN INTELLIGENT MFG TECH CO LTD
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Patent Information

Application Number
CN202211722855.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-12-30
Publication Date
2025-08-26
Estimated Expiration
2042-12-30

AI Technical Summary

Technical Problem

As the technical nodes of semiconductor chip manufacturing processes decrease, higher requirements are put forward in the production and design links of integrated circuits. The traditional random graphics generation method cannot meet the design rules and the generated graphics degree of freedom and randomness are insufficient.

Method used

A first combined figure consisting of a plurality of connected sub-graphics is added in the area to be updated in the layout, and these sub-graphics are generated according to the first constraint condition, and then the position of the combined figure is adjusted according to the second constraint condition to satisfy the plurality of constraint conditions.

Benefits of technology

The generated combined graphics can meet multiple design rules and process requirements for chip manufacturing, improve the diversity and manufacturability of layout graphics, and can simulate the actual layout more realistically.

✦ Generated by Eureka AI based on patent content.

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Abstract

According to example embodiments of the present disclosure, a method, device, and medium for graph generation are provided. In this method, a first composite graph is added to a region to be updated in a layout based at least on a first constraint on the layout. The first composite graph includes multiple connected sub-graphs. The first constraint is associated with the layout between different sub-graphs in the composite graph. The method also includes adjusting the position of the first composite graph in the region to be updated based at least on a second constraint on the layout. The second constraint is associated with the layout between different composite graphs in the layout. In this way, a composite graph that satisfies multiple constraints can be generated in the layout.
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Description

Technical Field

[0001] Embodiments of the present disclosure generally relate to the field of integrated circuits, and more particularly, to methods, apparatus, and media for graphic generation. Background Art

[0002] A circuit layout (also known as a layout) is a series of geometric figures generated from a designed and simulated optimized circuit. It contains device-related physical information data, such as the dimensions of the integrated circuit and the topology of each layer. IC manufacturers use this data to create masks. The layout pattern on the mask determines the dimensions of the physical layers of devices or connections on the chip.

[0003] As semiconductor chip manufacturing processes decrease in technology nodes, transistor density and performance on chips have significantly increased. However, with these advancements, development complexity has also increased, placing higher demands on the production and design of integrated circuits. To address this, the idea of ​​adding random patterns to the layout has been proposed to increase its diversity, thereby improving chip manufacturing capabilities and layout manufacturability. Summary of the Invention

[0004] In a first aspect of the present disclosure, a method for graph generation is provided. In this method, a first composite graph is added to a region to be updated in a layout based at least on a first constraint on the layout. The first composite graph includes multiple connected sub-graphs. The first constraint is associated with the layout between different sub-graphs in the composite graph. The method also includes adjusting the position of the first composite graph in the region to be updated based at least on a second constraint on the layout. The second constraint is associated with the layout between different composite graphs in the layout. In this way, a composite graph that satisfies multiple constraints can be generated in the layout.

[0005] In a second aspect of the present disclosure, an electronic device is provided. The electronic device includes a processor and a memory coupled to the processor. The memory has instructions stored therein, which, when executed by the processor, cause the electronic device to perform the method for graphics generation according to the first aspect of the present disclosure.

[0006] In a third aspect of the present disclosure, a computer-readable storage medium is provided. The computer-readable storage medium stores a computer program. When executed by a processor, the computer program implements the method for graphics generation according to the first aspect of the present disclosure.

[0007] According to an embodiment of the present disclosure, based on a first constraint condition for the layout, a first combined graphic consisting of a plurality of connected sub-graphics is added to the area to be updated of the layout. For example, the first combined graphic may include a plurality of connected rectangles. The first constraint condition is associated with the layout between different sub-graphics in the combined graphic. Based on a second constraint condition for the layout, the position of the first combined graphic in the area to be updated is adjusted. The second constraint condition is associated with the layout between different combined graphics in the layout. In this way, the embodiment of the present disclosure can enable the combined graphics in the generated layout to satisfy multiple constraints, thereby forming a satisfactory graphic on the wafer. This layout including multiple combined graphics can more realistically simulate the actual layout.

[0008] It should be understood that the contents described in the summary of the present invention are not intended to limit the key features or important features of the embodiments of the present disclosure, nor are they intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The above and other features, advantages and aspects of the embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. In the accompanying drawings, the same or similar reference numerals represent the same or similar elements, wherein:

[0010] Figure 1 A schematic diagram illustrating an example environment in which various embodiments of the present disclosure can be implemented;

[0011] Figure 2 A flowchart of a method for graph generation according to some embodiments of the present disclosure is shown;

[0012] Figures 3A to 3C According to some embodiments of the present disclosure, at least one DT2210003 is shown.

[0013] Schematic diagram of the constraint generation graph;

[0014] Figure 4 A schematic diagram showing a layout obtained according to the graphics generation method disclosed herein; and

[0015] Figure 5 A block diagram of an electronic device is shown in which one or more embodiments of the present disclosure may be implemented. DETAILED DESCRIPTION

[0016] The following describes embodiments of the present disclosure in more detail with reference to the accompanying drawings. Although certain embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as limited to the embodiments described herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are for illustrative purposes only and are not intended to limit the scope of protection of the present disclosure.

[0017] In the description of the embodiments of the present disclosure, the term "including" and similar terms should be understood as open inclusion, that is, "including but not limited to." The term "based on" should be understood as "based at least in part on." The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment." The terms "first," "second," etc. may refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0018] As mentioned above, the decreasing technology nodes of semiconductor chip manufacturing processes place higher demands on the production and design of integrated circuits. Currently, proposals have been made to add random patterns to the layout to increase the diversity of the layout patterns, thereby improving chip manufacturing capabilities and layout manufacturability. However, determining the placement of random patterns within the layout is a significant issue. On the one hand, traditional random pattern generation methods lack the degree of freedom and randomness required to generate patterns. On the other hand, traditional random pattern generation schemes cannot meet certain design rule requirements.

[0019] To this end, an embodiment of the present disclosure proposes a method for graphic generation. According to an embodiment of the present disclosure, based on a first constraint condition for the layout, a first combined graphic consisting of a plurality of connected sub-graphics is added to the area to be updated of the layout. For example, the first combined graphic may include a plurality of connected rectangles. The first constraint condition is associated with the layout between different sub-graphics in the combined graphic. Based on a second constraint condition for the layout, the position of the first combined graphic in the area to be updated is adjusted. The second constraint condition is associated with the layout between different combined graphics in the layout. In this way, the embodiment of the present disclosure can enable the combined graphics in the generated layout to satisfy multiple constraints, thereby forming a satisfactory graphic on the wafer. This layout including multiple combined graphics can more realistically simulate the actual layout.

[0020] Various example implementations of the solution will be described in detail below with reference to the accompanying drawings.

[0021] See first Figure 1, which illustrates a schematic diagram of an example environment 100 in which various embodiments of the present disclosure can be implemented. Example environment 100 may generally include an electronic device 110. In some embodiments, electronic device 110 may be a device with computing capabilities, such as a personal computer, workstation, server, etc. The scope of the present disclosure is not limited in this respect.

[0022] The electronic device 110 obtains a layout 120 to be processed as input. In some embodiments, the layout 120 to be processed may be a blank layout, without any existing graphics thereon. Additionally or alternatively, in some embodiments, the layout 120 to be processed may also have one or more existing graphics (not shown) thereon. In embodiments where the layout 120 to be processed has existing graphics thereon, the layout 120 to be processed may have one or more blank areas thereon.

[0023] The electronic device 110 processes the layout 120 to be processed to obtain a processed layout 130. The processed layout 130 includes one or more combined graphics (also referred to as two-dimensional graphics), such as a combined graphic 132, a combined graphic 134, and a combined graphic 136. The position and size of these combined graphics 132, 134, and 136 in the processed layout 130 can be determined by the electronic device 110. This will be described below in conjunction with Figures 2 to 3C Described in further detail.

[0024] It should be understood that Figure 1 The shapes and sizes of the various layouts, masks, and combination patterns shown in the figures are merely exemplary and not restrictive. The number and layout of the combination patterns in the layouts are merely exemplary and not restrictive. The scope of the present disclosure is not limited in this respect.

[0025] Figure 2 FIG. 2 is a flow chart showing a method 200 for generating graphics according to some embodiments of the present disclosure. In some embodiments, the method 200 may be performed by: Figure 1 The electronic device 110 shown executes the method 200. It should be understood that the method 200 may further include additional blocks not shown and / or may omit one (or some) of the blocks shown, and the scope of the present disclosure is not limited in this respect.

[0026] At block 210, electronic device 110 adds a first composite graphic to the area to be updated of the layout based at least on a first constraint on the layout. The first composite graphic includes a plurality of connected sub-graphics. For example, the plurality of sub-graphics may be rectangles or other suitable polygons. The first constraint is associated with the layout of the different sub-graphics in the composite graphic.

[0027] In some embodiments, the area to be updated of the layout may be the entire area of ​​the layout. For example, if there is no existing graphics on the layout, the area to be updated may be the entire area of ​​the layout. Figure 1 Taking the to-be-processed layout 120 in the example, the electronic device 110 may determine the to-be-processed area of ​​the to-be-processed layout 120 to be the entire area of ​​the to-be-processed layout 120 as an example.

[0028] Additionally or alternatively, in some embodiments, the electronic device 110 may determine the area to be updated in the layout based on existing graphics in the layout. As an example, the electronic device 110 may determine a first boundary of the area to be updated based on the boundary of the existing graphics in the layout. The electronic device 110 may determine a second boundary based on the boundary of the layout. The electronic device 110 may further determine the area to be updated based on at least the first boundary and the second boundary. The area to be updated is separated from the area occupied by the existing graphics by the first boundary.

[0029] Based on the first constraint condition, the electronic device 110 adds a first combined graphic to the to-be-updated area of ​​the layout determined through the above process. Figure 3A An example of adding a first combined graphic to the area to be updated in the layout is shown. Figure 3A China-Israel Figure 1 The layout 120 of FIG. 1 is used as the initial layout, and the first combined graphic is added thereto. In this example, the area to be updated of the layout 120 is the entire area of ​​the layout 120.

[0030] In some embodiments, the electronic device 110 may add a first sub-graphic to the area to be updated. Figure 3A As shown in the layout 310 of FIG, the electronic device 110 adds a first sub-graph 312 to the area to be updated. In some embodiments, the first sub-graph 312 is randomly generated. As an example, the electronic device 110 may randomly generate a point in the area to be updated as the starting point of the first sub-graph 312. The electronic device 110 then randomly generates a growth direction of the first sub-graph 312, for example, a horizontal direction or a vertical direction. The electronic device 110 randomly generates the width and height of the first sub-graph 312 based on the starting point of the first sub-graph 312 and the growth direction of the first sub-graph 312. The first sub-graph 312 may be a rectangle defined by the randomly generated width and height. Additionally or alternatively, in some embodiments, the vertex coordinate information of the first sub-graph 312 will be stored.

[0031] In some embodiments, the generated first sub-graph 312 needs to satisfy a first constraint. For example, the first constraint can be associated with a predetermined range of the graph on the layout. The predetermined range of the graph can be a range to be updated or a sub-region of a predetermined size within the range to be updated. The first sub-graph 312 needs to be within this predetermined range. For example, in some embodiments, a range of values ​​for the horizontal and vertical lengths of the first combined graph can be set. The first sub-graph 312 can be located within the range defined by the range of values ​​for the horizontal and vertical lengths of the first combined graph.

[0032] In some embodiments, the first constraint may also be associated with the size of the sub-graph. For example, the first constraint may indicate a predetermined range of values ​​for the width and height of the sub-graph. The first sub-graph 312 needs to meet this range of values.

[0033] Additionally or alternatively, in some embodiments, if other sub-graphs already exist in the layout before the first sub-graph 312 is added, the first sub-graph 312 needs to satisfy other constraints, which will be described below.

[0034] In some embodiments, the electronic device 110 may add a second sub-graph connected to the first sub-graph in the area to be updated based at least on the first constraint condition. The first combined graph may include at least the first sub-graph and the second sub-graph. Figure 3A As shown in the layout 320 in FIG, a second sub-graph 322 connected to the first sub-graph 312 is added to the layout 320.

[0035] In some embodiments, the second sub-graph 322 can be randomly generated. For example, the electronic device 110 can randomly generate the growth direction of the second sub-graph 322. As an example, the generation direction can be represented by an upward direction, a downward direction, a left direction, and a right direction. The upward direction means that based on the top line of the first sub-graph 312, a vertical second sub-graph 322 is generated upward. The downward direction means that based on the bottom line of the first sub-graph 312, a vertical second sub-graph 322 is generated downward. The left direction means that based on the left line of the first sub-graph 312, a horizontal second sub-graph 322 is generated toward the left. The right direction means that based on the right line of the first sub-graph 312, a horizontal second sub-graph 322 is generated toward the right.

[0036] In some embodiments, the electronic device 110 randomly generates the width and height of the second sub-graph 322 based on the randomly generated direction. The electronic device 110 randomly generates the connection point between the second sub-graph 322 and the first sub-graph 312 based on the width and height of the second sub-graph 322 and the connecting line of the first sub-graph 312. Additionally or alternatively, in some embodiments, the electronic device 110 may also store the vertex information (e.g., coordinates of one or more vertices) of the second sub-graph 322 randomly generated as described above, as well as the optional width and height of the second sub-graph 322.

[0037] The second sub-graph 322 randomly generated by the electronic device 110 must satisfy the first constraint. As previously described, the first constraint can be associated with a predetermined range of the graph on the layout. The predetermined range of the graph can be a range to be updated or a sub-region of a predetermined size within the range to be updated. The second sub-graph 314 must be within this predetermined range.

[0038] In some embodiments, the first constraint is associated with a first distance between different sub-graphs along a first direction. The first direction may be a horizontal direction. Additionally or alternatively, in some embodiments, the second constraint is associated with a second distance between different sub-graphs along a second direction. The second direction is perpendicular to the first direction. In the example where the first direction is a horizontal direction, the second direction is a vertical direction. As an example, the first constraint may limit the range of values ​​of the first distance and / or the second distance. The second sub-graph 322 and the first sub-graph 312 randomly generated by the electronic device 110 need to meet the above-mentioned range of values ​​of the first distance and / or the second distance.

[0039] Additionally or alternatively, in some embodiments, the first constraint is associated with the corner-to-corner distance between different sub-graphs. That is, the first constraint may limit the range of values ​​for the corner-to-corner distance between sub-graphs. Corner-to-corner distance refers to the distance between two opposing corners of two sub-graphs. The corner-to-corner distance between the second sub-graph 322 and the first sub-graph 312 randomly generated by the electronic device 110 must satisfy the range of values ​​for the corner-to-corner distance limited by the first constraint.

[0040] Additionally or alternatively, in some embodiments, the first constraint is associated with the parallel length (prl) between different sub-graphs. That is, the first constraint may limit the range of values ​​for the parallel length between sub-graphs. The parallel length may be the length of the parallel portions between sub-graphs along the first direction, or the length of the parallel portions between sub-graphs along the second direction. The parallel length between the second sub-graph 322 randomly generated by the electronic device 110 and the first sub-graph 312 must satisfy the range of values ​​for the parallel length limited by the first constraint.

[0041] In some embodiments, when randomly generating the first sub-graphic 312 and the second sub-graphic 322 , the electronic device 110 needs to generate random values ​​of attributes such as width and height of each sub-graphic according to the first constraint condition.

[0042] Additionally or alternatively, in some embodiments, the electronic device 110 generates a candidate sub-graph for the first combined graph. For example, the electronic device 110 randomly generates attribute values, such as width and height, for the candidate sub-graph without considering the first constraint. The electronic device 110 then determines whether the generated candidate sub-graph satisfies the first constraint. If the electronic device 110 determines that the candidate sub-graph satisfies the first constraint, the candidate sub-graph is determined to be one of the multiple sub-graphs. For example, the candidate sub-graph may be determined to be the second sub-graph 322. Conversely, if the electronic device 110 determines that the candidate sub-graph does not satisfy the first constraint, the electronic device 110 generates a new candidate sub-graph for the first combined graph. The above determination process is also performed for the newly generated candidate sub-graph.

[0043] In some embodiments, electronic device 110 determines the number of candidate sub-graphs generated for the first combined graph. That is, the number of times electronic device 110 randomly generated candidate sub-graphs during the process of generating the first combined graph. If electronic device 110 determines that the number of times candidate sub-graphs generated for the first combined graph reaches a threshold, electronic device 110 stops generating candidate sub-graphs for the first combined graph. The threshold can be pre-set. For example, the threshold can be randomly generated by electronic device 110 for the first combined graph. The threshold can also be set by the user. By setting the threshold, the generation process of each sub-graph of the combined graph can be simplified.

[0044] As an example, if the number of candidate sub-graphs generated reaches a threshold after generating first sub-graph 312 and second sub-graph 322 as shown in the figure, generation of candidate sub-graphs for the first combined graph ceases. In other words, the first combined graph consists of first sub-graph 312 and second sub-graph 322. As another example, if only first sub-graph 312 is generated after the number of candidate sub-graphs generated reaches a threshold, the first combined graph may also consist of only first sub-graph 312.

[0045] Additionally or alternatively, in some embodiments, the first constraint further indicates a threshold number of sub-graphs in the combined graph. The threshold number may be pre-set, for example, randomly generated by the electronic device 110 or pre-set by the user. The number of sub-graphs included in the first combined graph does not exceed the threshold number. As an example, the threshold number may be 3. When generating the first group of graphs 312 and the second sub-graph 322, the electronic device 110 may generate the third sub-graph 332 using a method similar to the several examples described above, such as Figure 3A In this example, a graphic formed by combining the connected first sub-graphic 312, second sub-graphic 322, and third sub-graphic 332 is used as a first combined graphic 334. By setting a threshold number, the process of generating a combined graphic can be simplified.

[0046] It should be understood that the threshold values ​​listed above are merely exemplary and not restrictive, and the threshold values ​​may be set to any appropriate value greater than 1. Figure 3A The shapes, sizes, and numbers of the sub-graphics shown in the figure are merely exemplary and not restrictive.

[0047] By adding the first combined pattern according to the first constraint condition, the sub-patterns in the added first combined pattern can meet the design rules. In this way, the patterns in the layout can meet the process requirements or restrictions of chip manufacturing.

[0048] In some embodiments, a perimeter area ratio constraint (also referred to as an outer perimeter area ratio constraint) is further provided for the first combined graphic. The perimeter area ratio constraint indicates a range of values ​​for the perimeter area ratio of the combined graphic. The electronic device 110 may determine a first ratio between the outer perimeter and the effective area of ​​the first combined graphic 334. If the electronic device 110 determines that the first ratio does not satisfy the perimeter area ratio constraint, the electronic device 110 regenerates the first combined graphic. If the electronic device 110 determines that the first ratio satisfies the perimeter area ratio constraint, the electronic device 110 may continue to generate the next combined graphic.

[0049] The purpose of setting a perimeter-to-area ratio constraint is to ensure that the graphics in the layout meet the process requirements or restrictions of chip manufacturing, such as ensuring that the graphics in the layout meet the chemical mechanical polishing (CMP) specifications. Specifically, the perimeter-to-area ratios of each combined graphic that meets the perimeter-to-area ratio constraint are all within the specified value range. The perimeter-to-area ratio values ​​of such combined graphics are relatively similar. Graphics with similar perimeter-to-area ratios experience similar levels of wear during the production process. Therefore, by introducing a perimeter-to-area ratio constraint, a CMP-friendly layout can be generated.

[0050] Combination of the above Figure 3ASeveral examples of adding a first combined graphic according to a first constraint are described. It should be understood that the examples of constraints listed above are merely illustrative and not restrictive. Fewer or more constraints may be used to add the first combined graphic. Examples of other constraints may include sub-graphic area constraints, sub-graphic dimensions along the first direction or the second direction, and other design rule constraints. The scope of the present disclosure is not limited in this respect. It should be understood that the various value ranges indicated by the above-mentioned various constraints may be continuous value ranges or discrete value ranges, and the scope of the present disclosure is not limited in this respect.

[0051] By adding the first combination graphics according to the first constraint condition, a combination graphics with richer shapes can be added to the layout. Such combination graphics with richer shapes can more realistically simulate the actual layout.

[0052] Continue to refer Figure 2 At block 220 , the electronic device 110 adjusts the position of the first combined graphic in the to-be-updated region based at least on a second constraint on the layout. The second constraint is associated with the layout of different combined graphics in the layout.

[0053] In some embodiments, the second constraint is associated with at least one of the following: the distance between different combination figures along the first direction, the distance between different combination figures along the second direction perpendicular to the first direction, the corner-to-corner distance between different combination figures, the parallel length between different combination figures, and the like.

[0054] Specifically, the second constraint can indicate at least one of the following: a range of distances between different combinations of graphics along a first direction, a range of distances between different combinations of graphics along a second direction perpendicular to the first direction, a range of corner-to-corner distances between different combinations of graphics, a range of parallel lengths between different combinations of graphics, and so on. Corner-to-corner distance can be the distance between two opposing corners of two combinations of graphics at different locations on the layout. Parallel length can be the length of the parallel portion between different combinations of graphics along the first direction, or the length of the parallel portion between different combinations of graphics along the second direction.

[0055] In some embodiments, if first combined graphic 334 is the first combined graphic added to layout 330, that is, if there are no other graphics in layout 330, electronic device 110 may not adjust the position of first combined graphic 334. In other words, for a combined graphic added for the first time to the layout, electronic device 110 may not determine whether it satisfies the second constraint. Electronic device 110 may adjust combined graphics added after first combined graphic 334 based on the second constraint. The process of adjusting combined graphics based on the second constraint will be described in detail below.

[0056] As previously described, after adding the first combined graphic 334, the electronic device 110 can add more combined graphics to the layout, such as a third combined graphic. In some embodiments, the electronic device 110 can add a third combined graphic in the area to be updated based on at least the first constraint and the second constraint. The third combined graphic is also composed of multiple sub-graphics, which can be generated based on the first constraint. The generation method of these sub-graphics is similar to the first sub-graphic 312, the second group of graphics 322, and the third sub-graphic 332 mentioned above and will not be described in detail here. The third combined graphic can be adjusted based on the second constraint.

[0057] In some embodiments, electronic device 110 can redefine the area to be updated in layout 330 by using first combined graphic 334 as an existing graphic. Electronic device 110 then adds a combined graphic, such as a fourth combined graphic, to the redetermined area to be updated based on at least the first constraint and the second constraint. For example, electronic device 110 adds the fourth combined graphic to the redetermined area to be updated based on the first constraint. Electronic device 110 then adjusts the position of the fourth combined graphic in the layout based on the second constraint.

[0058] As an example, electronic device 110 may determine the first boundary of the re-determined area to be updated based on the boundary of first combined graphic 334. For example, electronic device 110 may determine the first boundary as a line segment extending from the upper side edge of first combined graphic 334 to the left and right sides of layout 330. Electronic device 110 may use the area above the first boundary, formed by the first boundary and the boundary of layout 330, as the re-determined area to be updated.

[0059] Additionally or alternatively, in some embodiments, the electronic device 110 may divide the re-determined area to be updated into multiple sub-areas. Figure 3B As shown in the layout 340, the re-determined area to be updated is divided into sub-area 342 and sub-area 344. The sub-areas can be divided according to the height of the upper side of the first combined graphic 334. The electronic device 110 can first add the fourth combined graphic in the sub-area 342 with a lower lower side. Figure 3B As shown, the electronic device 110 adds a fourth combined graphic 346 in the sub-area 342. The fourth combined graphic 346 is added based on the first constraint condition. The process of adding the fourth combined graphic 346 is similar to that of the first combined graphic 334 and will not be described in detail here.

[0060] In some embodiments, when the sub-area 342 is determined, the electronic device 110 also compares the width of the sub-area 342 in the horizontal direction with the threshold width. If the width of the sub-area 342 is less than the threshold width, the fourth combined graphic is not added in the sub-area 342. By limiting the width of the sub-area 342, it is possible to prevent the addition of combined graphics in narrower sub-areas. In some embodiments, the threshold width can be pre-set. For example, the threshold width can be set to the sum of twice the minimum value of the width range of the sub-graphics (e.g., a rectangle) and twice the minimum value of the range of the horizontal distance between the sub-graphics. It should be understood that the threshold width can also be determined in other ways, and the scope of this disclosure is not limited in this respect.

[0061] In some embodiments, electronic device 110 adjusts the position of added fourth combined graphic 346 based on the second constraint. Specifically, electronic device 110 may determine whether fourth combined graphic 346 and first combined graphic 334 satisfy the second constraint based on the current position of fourth combined graphic 346 in layout 340 and the known position of first combined graphic 334 already in layout 340.

[0062] If the electronic device 110 determines that the fourth combined graphic 346 and the first combined graphic 334 do not satisfy the second constraint, the electronic device 110 determines a target direction in the layout that satisfies the second constraint and then moves the fourth combined graphic 346 in the target direction.

[0063] In some embodiments, if the distance along the first direction between the fourth combined graphic 346 and the first combined graphic 334 does not satisfy the range of values ​​for the distance along the first direction between different combined graphics indicated by the second constraint, the electronic device 110 may determine the target direction as horizontally rightward or vertically upward. Similarly, if the distance along the second direction between the fourth combined graphic 346 and the first combined graphic 334 does not satisfy the range of values ​​for the distance along the second direction between different combined graphics indicated by the second constraint, the electronic device 110 may determine the target direction as horizontally rightward or vertically upward. The electronic device 110 may determine the displacement size of the fourth combined graphic 346 to the right or upward based on the range of values ​​for the distance in the first direction or the second direction. By setting the distance constraint in the first direction or the second direction, the distances between the combined graphics can be prevented from being too close, thereby enabling the graphics to meet the process requirements of chip manufacturing.

[0064] In some embodiments, if the angle-to-angle distance between the fourth combined graphic 346 and the first combined graphic 334 does not satisfy the range of angle-to-angle distances between different combined graphics indicated by the second constraint, the electronic device 110 may determine the target direction to be vertically upward. Additionally or alternatively, the electronic device 110 may use trigonometric relationships to calculate the required vertical spacing between the two combined graphics, thereby determining the displacement of the fourth combined graphic 346 upward according to the required spacing. By setting the angle-to-angle distance constraint, the angle-to-angle distances between the combined graphics can be prevented from being too close, thereby ensuring that the graphics meet the process requirements of chip manufacturing.

[0065] In some embodiments, if the vertical direction space of the parallel length between the fourth combined graphic 346 and the first combined graphic 334 does not satisfy the value range of the parallel length between different combined graphics indicated by the second constraint condition, the electronic device 110 may determine the target direction to be vertically upward. Additionally or alternatively, the electronic device 110 may determine the displacement size of the upward movement of the fourth combined graphic 346 based on the value range of the parallel length indicated by the second constraint condition.

[0066] Similarly, if the horizontal parallel length between fourth combined graphic 346 and first combined graphic 334 does not satisfy the range of parallel lengths between different combined graphics indicated by the second constraint, electronic device 110 may determine the target direction to be vertically upward. Additionally or alternatively, electronic device 110 may determine the displacement magnitude for moving fourth combined graphic 346 upward. Electronic device 110 may change the range of parallel lengths by moving fourth combined graphic 346 upward to meet the requirements. By setting the parallel length constraint, the graphic can be made to meet the process requirements of chip manufacturing.

[0067] Figure 3C FIG4 shows a process of adjusting the position of the fourth combined graphic. If the electronic device 110 determines that the target direction of the fourth combined graphic 346 is vertically upward according to the second constraint condition listed above, as shown in FIG4 , Figure 3C As shown by the arrow in the layout 350, the electronic device 110 can further determine the displacement size of the fourth combination graphic 346. The electronic device 110 can move the fourth combination graphic 346 upward according to the determined displacement size to obtain an adjusted fourth combination graphic 356.

[0068] The above takes the first combined graphic 334 and the adjusted fourth combined graphic 356 as examples to illustrate several examples of adding combined graphics on the layout. After adding and adjusting the first combined graphic 334 and the adjusted fourth combined graphic 356, the electronic device 110 can continue to add more combined graphics in the remaining areas to be updated in the layout 350. For example, the electronic device 110 can gradually add more combined graphics in a bottom-up order until all areas of the layout are filled (that is, new combined graphics that meet the first and second constraints cannot be added). This bottom-up approach to generating combined graphics region by region ensures that each position area of ​​the layout is filled with combined graphics.

[0069] It should be understood that although the random graphics in the layout are generated in a bottom-up order herein, in some embodiments, any other arbitrary order may be used. For example, the combined graphics may be generated from top to bottom. Furthermore, the combined graphics may be generated from left to right, or from right to left. The scope of this disclosure is not limited in this respect.

[0070] The first or second constraints mentioned herein are related to process requirements or limitations of integrated circuit or chip manufacturing. It should be understood that the examples of first or second constraints listed herein are merely illustrative and not restrictive. More or fewer constraints may be used to add or adjust the combined graphics in the layout. These constraints can enable the combined graphics in the layout to comply with the process requirements or limitations of integrated circuit or chip manufacturing. The scope of this disclosure is not limited in this respect.

[0071] By randomly generating each combination graphic that meets multiple constraints by the electronic device 110, the generated combination graphic can not only meet multiple design rules or constraints, but also be automatically randomly generated. Such a combination graphic has a high degree of randomness and diversity, avoiding the influence of subjective factors in the graphic generation process. This layout including multiple combination graphics can more realistically simulate the actual layout. In particular, when the sample space is large enough, it is possible to provide a sufficient number of layouts consisting of combination graphics generated according to the embodiments of the present disclosure, thereby more effectively covering various scenarios.

[0072] Figure 4 A schematic diagram of a layout 400 obtained using the pattern generation method disclosed herein is shown. Multiple combined patterns fill various areas of layout 400. These combined patterns are added and repositioned according to the disclosed scheme. Each combined pattern in layout 400 can satisfy various design rules or constraints and exhibit a high degree of randomness and diversity.

[0073] By using this solution to generate combined patterns in a layout, we can, on the one hand, increase the diversity of the layout patterns, thereby exploring and testing the manufacturing capabilities of existing production lines. On the other hand, we can also use the disclosed pattern generation method to fill blank areas in the layout, making the pattern distribution in the filled layout more uniform, thereby improving the manufacturability of the layout.

[0074] Figure 5 1 is a block diagram of an electronic device 500 in which one or more embodiments of the present disclosure may be implemented. The electronic device 500 may be used to implement, for example, Figure 1 The electronic device 110 is shown. It should be understood that Figure 5 The illustrated electronic device 500 is merely exemplary and should not be construed as limiting the functionality and scope of the embodiments described herein.

[0075] like Figure 5 As shown, electronic device 500 is in the form of a general electronic device. Components of electronic device 500 may include, but are not limited to, one or more processors or processing units 510, memory 520, storage device 530, one or more communication units 540, one or more input devices 550, and one or more output devices 560. Processing unit 510 may be a real or virtual processor and is capable of performing various processes according to programs stored in memory 520. In a multi-processor system, multiple processing units execute computer-executable instructions in parallel to increase the parallel processing capabilities of electronic device 500.

[0076] The electronic device 500 typically includes a plurality of computer storage media. Such media can be any available media accessible to the electronic device 500, including but not limited to volatile and non-volatile media, removable and non-removable media. The memory 520 can be a volatile memory (e.g., registers, cache, random access memory (RAM)), a non-volatile memory (e.g., read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory), or some combination thereof. The storage device 530 can be a removable or non-removable medium and can include a machine-readable medium, such as a flash drive, a disk, or any other medium that can be used to store information and / or data (e.g., training data for training) and can be accessed within the electronic device 500.

[0077] The electronic device 500 may further include additional removable / non-removable, volatile / non-volatile storage media. Figure 5As shown in FIG, a magnetic disk drive for reading from or writing to a removable, non-volatile magnetic disk (e.g., a "floppy disk") and an optical disk drive for reading from or writing to a removable, non-volatile optical disk may be provided. In these cases, each drive may be connected to a bus (not shown) by one or more data media interfaces. Memory 520 may include a computer program product 525 having one or more program modules configured to perform various methods or actions of various embodiments of the present disclosure.

[0078] The communication unit 540 enables communication with other electronic devices via a communication medium. Additionally, the functions of the components of the electronic device 500 can be implemented in a single computing cluster or multiple computing machines that can communicate via a communication connection. Thus, the electronic device 500 can operate in a networked environment using a logical connection with one or more other servers, a network personal computer (PC), or another network node.

[0079] Input device 550 may be one or more input devices, such as a mouse, keyboard, or trackball. Output device 560 may be one or more output devices, such as a display, a speaker, or a printer. Electronic device 500 may also communicate with one or more external devices (not shown) via communication unit 540 as needed, such as a storage device, a display device, or the like, with one or more devices that allow a user to interact with electronic device 500, or with any device that allows electronic device 500 to communicate with one or more other electronic devices (e.g., a network card, a modem, etc.). Such communication may be performed via an input / output (I / O) interface (not shown).

[0080] According to an exemplary implementation of the present disclosure, a computer-readable storage medium is provided, on which one or more computer instructions are stored, wherein the one or more computer instructions are executed by a processor to implement the method described above.

[0081] Various aspects of the present disclosure are described herein with reference to flowcharts and / or block diagrams of methods, devices (systems), and computer program products implemented according to the present disclosure. It should be understood that each block of the flowcharts and / or block diagrams, and combinations of blocks in the flowcharts and / or block diagrams, can be implemented by computer-readable program instructions.

[0082] These computer-readable program instructions can be provided to a processing unit of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, such that when these instructions are executed by the processing unit of the computer or other programmable data processing device, a device is generated that implements the functions / actions specified in one or more blocks in the flowchart and / or block diagram. These computer-readable program instructions can also be stored in a computer-readable storage medium, where these instructions cause the computer, programmable data processing device, and / or other device to operate in a specific manner. Thus, the computer-readable medium storing the instructions comprises an article of manufacture that includes instructions for implementing various aspects of the functions / actions specified in one or more blocks in the flowchart and / or block diagram.

[0083] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device, so that a series of operational steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0084] The flow charts and block diagrams in the accompanying drawings show the possible architecture, functions and operations of the systems, methods and computer program products according to multiple implementations of the present disclosure. In this regard, each box in the flow chart or block diagram can represent a part for a module, program segment or instruction, and a part for a module, program segment or instruction comprises one or more executable instructions for realizing the logical function of the specification. In some alternative implementations, the functions marked in the box can also occur in a sequence different from that marked in the accompanying drawings. For example, two continuous boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, depending on the functions involved. It should also be noted that each box in the block diagram and / or flow chart, and the combination of the boxes in the block diagram and / or flow chart can be realized by a special hardware-based system that performs the function or action of the specification, or can be realized by a combination of special hardware and computer instructions.

[0085] While various implementations of the present disclosure have been described above, the foregoing description is intended to be illustrative, non-exhaustive, and not limited to the disclosed implementations. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described implementations. The terminology used herein is selected to best explain the principles of the implementations, their practical applications, or improvements to existing technologies, or to enable others skilled in the art to understand the implementations disclosed herein.

Claims

1. A graphics generation method, characterized in that: include: Based at least on a first constraint condition for a layout, adding a first combined graphic in a to-be-updated region of the layout, the first combined graphic comprising a plurality of connected sub-graphics, the first constraint condition being associated with a layout between different sub-graphics in the combined graphic; as well as The position of the first combination graphic in the area to be updated is adjusted based on at least a second constraint condition for the layout, wherein the second constraint condition is associated with the layout between different combination graphics in the layout.

2. The graphics generation method according to claim 1, wherein: Adding the first combined graphic in the area to be updated includes: Adding a first sub-graph in the area to be updated; and Based at least on the first constraint condition, a second sub-graph connected to the first sub-graph is added to the area to be updated, and the first combined graph includes at least the first sub-graph and the second sub-graph.

3. The graphics generation method according to claim 2, characterized in that: The first constraint is associated with at least one of the following: a first distance between different sub-graphs along a first direction, a second distance between different sub-patterns along a second direction, wherein the second direction is perpendicular to the first direction, The corner-to-corner distance between different sub-graphs, The parallel lengths between different sub-graphs, The predetermined range of the graphics on the layout.

4. The graphics generation method according to claim 1, wherein: The first constraint condition indicates a threshold number of sub-graphs in a combined graph, and the number of sub-graphs included in the first combined graph does not exceed the threshold number.

5. The graphics generation method according to claim 1, wherein: Adding a first combined graphic in the area to be updated of the layout includes: generating a candidate sub-graph for the first combined graph; If it is determined that the candidate sub-graph satisfies the first constraint condition, determining the candidate sub-graph as one of the plurality of sub-graphs; If it is determined that the candidate sub-graph does not satisfy the first constraint condition, generating a new candidate sub-graph for the first combined graph; and If it is determined that the number of times candidate sub-graphs are generated for the first combined graph reaches a number threshold, generation of candidate sub-graphs for the first combined graph is stopped.

6. The graphics generation method according to claim 1, characterized in that: The method further comprises: determining a first ratio between an outer perimeter and an effective area of ​​the first combined figure; and If it is determined that the first ratio does not satisfy the perimeter-to-area ratio constraint, the first combined graph is regenerated.

7. The graphics generation method according to claim 1, wherein: The second constraint is associated with at least one of the following: The distances between different combined graphics along the first direction, The distances between different combination patterns along the second direction, the second direction being perpendicular to the first direction, The angle-to-angle distance between different combinations of figures, The parallel lengths between different combined figures.

8. The graphics generation method according to claim 1, characterized in that: Adjusting the position of the first combined graphic in the area to be updated includes: Determining whether the first combined graphic and the second combined graphic satisfy the second constraint condition based on the current position of the first combined graphic in the layout and the known position of the second combined graphic already in the layout; In response to the second constraint not being satisfied, determining a target direction in the layout such that the second constraint is satisfied; and The first combined graphic is moved in the target direction.

9. The graphics generation method according to claim 1, wherein: Also includes: Based on at least the first constraint condition and the second constraint condition, a third combined graphic is added to the area to be updated.

10. The graphics generation method according to claim 1, wherein: Also includes: Determining a first boundary of the area to be updated based on a boundary of an existing graphic in the layout; Determining a second boundary based on the boundary of the layout; as well as The area to be updated is determined based at least on the first boundary and the second boundary.

11. The graphics generation method according to claim 1, wherein: Also includes: Re-determining the area to be updated of the layout by taking the first combined graphic as the existing graphic; as well as Based on at least the first constraint condition and the second constraint condition, a fourth combined graphic is added to the re-determined area to be updated.

12. An electronic device, characterized in that: include: at least one processing unit; as well as At least one memory coupled to the at least one processing unit and storing instructions for execution by the at least one processing unit, the instructions causing the electronic device to perform the method according to any one of claims 1 to 11 when executed by the at least one processing unit.

13. A computer-readable storage medium having a computer program stored thereon, characterized in that: The computer program is executable by a processor to implement the method according to any one of claims 1 to 11.

Citation Information

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