Semiconductor devices

By setting the first and second terminals parallel and opposite each other in the semiconductor device and using a busbar to cover their connection gap, the problem of high inductance is solved, and the inductance is reduced and the circuit efficiency is improved.

CN116207064BActive Publication Date: 2026-06-30MITSUBISHI ELECTRIC CORP

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
MITSUBISHI ELECTRIC CORP
Filing Date
2022-11-25
Publication Date
2026-06-30

AI Technical Summary

Technical Problem

In existing semiconductor devices, the inductance of the portion through which current flows perpendicular to the stacked substrate is relatively large, resulting in low circuit efficiency.

Method used

The first and second terminals are arranged to be parallel and opposite each other, and the first and second busbars cover the gap of their connection parts when viewed from above, thereby reducing inductance.

Benefits of technology

This structural design effectively reduces the inductance of semiconductor devices and improves circuit efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

The objective is to provide a technique for reducing the inductance of a semiconductor device. The semiconductor device has a first busbar, a second busbar, a first terminal, and a second terminal. The first terminal has one or more planar portions, and the second terminal has one or more planar portions. The planar portions of the first and second terminals are arranged parallel to each other and opposite to each other. When viewed from above, one of the first and second busbars covers the gap between the connection portion of the first terminal to the first busbar and the connection portion of the second terminal to the second busbar.
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Description

Technical Field

[0001] This invention relates to semiconductor devices. Background Technology

[0002] In recent years, as a semiconductor device, a 3-level inverter circuit consisting of multiple semiconductor elements connected in a T-shape has been proposed (for example, Patent Document 1).

[0003] Patent Document 1: Japanese Patent Application Publication No. 2019-162032

[0004] In the technology of Patent Document 1, the inductance can be reduced only in the circuit portion where current flows in a direction parallel to the laminated substrate. However, since the circuit portion where current flows in a direction perpendicular to the laminated substrate consists of independently arranged column-shaped terminals, there is a problem that the inductance in this portion is relatively large. Summary of the Invention

[0005] Therefore, the present invention was made in view of the above-mentioned problems, and its object is to provide a technique that can reduce the inductance of semiconductor devices.

[0006] The semiconductor device of the present invention comprises: a first power module and a second power module; and a first busbar and a second busbar connected to the second power module. The first power module includes: a first switching element and a second switching element; and a first diode and a second diode, which are respectively connected in antiparallel to the first switching element and the second switching element. The second power module includes: a third switching element and a fourth switching element; a third diode and a fourth diode, which are respectively connected in antiparallel to the third switching element and the fourth switching element; a first terminal electrically connected to the third switching element, the first terminal being electrically connected via the first busbar to the connection point of the first switching element and the second switching element, the first terminal having a plate portion of one or more; and

[0007] The second terminal, which is electrically connected to the fourth switching element, is electrically connected to the intermediate potential point of the power supply via the second busbar. The second terminal has one or more flat plate portions. The one or more flat plate portions of the first terminal and the one or more flat plate portions of the second terminal are arranged to be parallel to each other and opposite to each other. When viewed from above, one of the first busbar and the second busbar covers the gap between the connection portion of the first terminal and the connection portion of the second terminal and the second busbar.

[0008] The effects of the invention

[0009] According to the present invention, the plate portion of the first terminal and the plate portion of the second terminal are arranged to be parallel to each other and opposite to each other, and one of the first busbar and the second busbar, when viewed from above, covers the gap between the connection portion of the first terminal and the first busbar and the connection portion of the second terminal and the second busbar. With this structure, the inductance of the semiconductor device can be reduced. Attached Figure Description

[0010] Figure 1 This is a circuit diagram illustrating the structure of the semiconductor device involved in Embodiment 1.

[0011] Figure 2 This is a cross-sectional view showing the structure of the semiconductor device involved in Embodiment 1.

[0012] Figure 3 This is a top view showing the structure of the semiconductor device involved in Embodiment 4. Detailed Implementation

[0013] The following is a reference to the appendix. Figure 1 The implementation methods will be described below. The features described in the following embodiments are illustrative, and not all features are necessary. In addition, in the descriptions below, the same structural elements are labeled with the same or similar reference numerals in multiple embodiments, and the different structural elements are mainly described. Furthermore, in the descriptions below, specific positions and directions such as "upper," "lower," "left," "right," "front," or "back" do not necessarily have to be consistent with the actual positions and directions in the implementation.

[0014] <Implementation Method 1>

[0015] Figure 1 This is a circuit diagram illustrating the structure of the semiconductor device according to Embodiment 1. Figure 2 This is a cross-sectional view representing the structure. For example... Figure 1 As shown, the semiconductor device involved in this embodiment 1 constitutes a 3-level power conversion device such as a 3-level inverter circuit.

[0016] Figure 2 The semiconductor device includes a first power module 100, a second power module 200, a first bus bar 300a, a second bus bar 300b, a third bus bar 300c, and a fourth bus bar 300d.

[0017] Busbar 300a and busbar 300b are connected to the second power module 200, and busbar 300c and busbar 300d are connected to the first power module 100. Busbar 300a to busbar 300d are, for example, flat metal plates made of copper (Cu) or aluminum (Al).

[0018] <Power Module 1>

[0019] like Figure 2 As shown, the first power module 100 includes a first switching element 111, a second switching element 112, a first diode 121, a second diode 122, a third terminal 131, a fourth terminal 132, and a sixth terminal 133. Additionally, the first power module 100 includes a third metal layer 141, an insulating layer 142, a fourth metal layer 143, and a housing 151.

[0020] exist Figure 1 In the example, the first switching element 111 is an IGBT (Insulated Gate Bipolar Transistor), but it can also be a semiconductor switching element such as a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).

[0021] The first diode 121 is connected in anti-parallel to the first switching element 111. That is, the forward direction of the first diode 121 is opposite to the direction of the normal current flowing in the first switching element 111. The first diode 121 can be an SBD (Schottky barrier diode) or a PND (PN junction diode).

[0022] The materials of the first switching element 111 and the first diode 121 can be ordinary silicon (Si), or wide-bandgap semiconductors such as silicon carbide (SiC), gallium nitride (GaN), and diamond. When the materials of the first switching element 111 and the first diode 121 are wide-bandgap semiconductors, stable operation at high temperatures and high voltages and high switching speeds can be achieved.

[0023] The second switching element 112 and the second diode 122 are the same as the first switching element 111 and the first diode 121, and the second diode 122 is connected in anti-parallel to the second switching element 112.

[0024] like Figure 2 As shown, a stacked structure is formed by sequentially stacking the third metal layer 141, the insulating layer 142, and the fourth metal layer 143 in the first power module 100. The materials of the third metal layer 141 and the fourth metal layer 143 are, for example, Cu, and the material of the insulating layer 142 is, for example, AlN or Al2O3. A structure is formed by connecting the first switching element 111, the second switching element 112, the first diode 121, and the second diode 122 to the patterned fourth metal layer 143. Figure 1 The circuit of the first power module 100.

[0025] like Figure 1As shown, the first switching element 111 and the second switching element 112 are connected at connection point 116, and are connected in series between the third busbar 300c and the fourth busbar 300d. The third busbar 300c and the fourth busbar 300d are connected to the high potential and low potential of the power supply 351, respectively. The first switching element 111 and the second switching element 112 constitute the upper and lower bridge arms of the 3-level power conversion device. Furthermore, in Figure 1 The 351 power supply is a capacitor, but it is not limited to this.

[0026] Figure 2 The housing 151 has an internal space for accommodating the first switching element 111, the second switching element 112, the first diode 121, and the second diode 122. On the other hand, the third metal layer 141 is exposed from the housing 151.

[0027] One end of each of the third terminal 131, the fourth terminal 132, and the sixth terminal 133 is disposed within the interior space of the housing 151. The other end of each of the third terminal 131, the fourth terminal 132, and the sixth terminal 133 is disposed on the outside of the housing 151. Each of the third terminal 131, the fourth terminal 132, and the sixth terminal 133 is constituted by a curved plate-like component, having one or more flat plate portions.

[0028] like Figure 1 and Figure 2 As shown, one end of terminal 31 is electrically connected to the first switching element 111, and the other end of terminal 31 is electrically connected to the third busbar 300c. One end of terminal 4132 is electrically connected to the second switching element 112, and the other end of terminal 4132 is electrically connected to the fourth busbar 300d. One end of terminal 6133 is electrically connected to the connection point 116 of the first switching element 111 and the second switching element 112, and the other end of terminal 6133 is electrically connected to the first busbar 300a.

[0029] <Second Power Module>

[0030] like Figure 2 As shown, the second power module 200 includes a third switching element 211, a fourth switching element 212, a third diode 221, a fourth diode 222, a first terminal 231, a second terminal 232, and a fifth terminal 233. Additionally, the second power module 200 includes a first metal layer 241, an insulating layer 242, a second metal layer 243, and a housing 251. The second power module 200 is configured close to the first power module 100.

[0031] The third switching element 211 and the third diode 221 are the same as the first switching element 111 and the first diode 121, and the third diode 221 is connected in anti-parallel with the third switching element 211.

[0032] The fourth switching element 212 and the fourth diode 222 are the same as the first switching element 111 and the first diode 121, and the fourth diode 222 is connected in anti-parallel to the fourth switching element 212. Furthermore, in Figure 1 In the example, the forward direction of the third diode 221 is opposite to that of the fourth diode 222.

[0033] like Figure 2 As shown, a stacked structure is provided by sequentially stacking the first metal layer 241, the insulating layer 242, and the second metal layer 243 in the second power module 200. The materials of the first metal layer 241, the insulating layer 242, and the second metal layer 243 are the same as the materials of the third metal layer 141, the insulating layer 142, and the fourth metal layer 143. A third switching element 211, a fourth switching element 212, a third diode 221, and a fourth diode 222 are connected to the patterned second metal layer 243 to form a stacked structure. Figure 1 The circuit of the second power module 200.

[0034] like Figure 1 As shown, the third switching element 211 and the fourth switching element 212 are connected in series between the first busbar 300a and the second busbar 300b. The first busbar 300a is connected to... Figure 2 The 6th terminal 133 is electrically connected, thereby connecting with Figure 1 The connection point 116 of the first switching element 111 and the second switching element 112 is electrically connected. The second busbar 300b is electrically connected to the intermediate potential point 352 of the power supply 351. For example, a terminal for applying the intermediate potential of the power supply 351 is provided at the intermediate potential point 352.

[0035] Through the above connections, the third switching element 211 and the fourth switching element 212 constitute the intermediate bridge arm of the 3-level power conversion device. Furthermore, as... Figure 1 As shown, by connecting the first switching element 111 and the second switching element 112 with the third switching element 211 and the fourth switching element 212 in a T-shape, a single-phase circuit of a 3-level power conversion device is formed.

[0036] Figure 2 The housing 251 has an internal space for accommodating the third switching element 211, the fourth switching element 212, the third diode 221, and the fourth diode 222. On the other hand, the first metal layer 241 is exposed from the housing 251.

[0037] One end of each of the first terminal 231, the second terminal 232, and the fifth terminal 233 is disposed within the interior space of the housing 251. The other end of each of the first terminal 231, the second terminal 232, and the fifth terminal 233 is disposed on the outside of the housing 251. Each of the first terminal 231, the second terminal 232, and the fifth terminal 233 is composed of a curved plate-like member, having one or more flat plate portions.

[0038] like Figure 1 and Figure 2 As shown, one end of the first terminal 231 is electrically connected to the back electrode of the third switching element 211, and the other end of the first terminal 231 is connected to the first busbar 300a and the sixth terminal 133. Figure 1 The connection point 116 is electrically connected. One end of the second terminal 232 is electrically connected to the back electrode of the fourth switching element 212, and the other end of the second terminal 232 is connected to the second busbar 300b. Figure 1 The intermediate potential point 352 is electrically connected.

[0039] In the second power module 200, the emitter electrode of the third switching element 211, the anode electrode of the third diode 221, the anode electrode of the fourth diode 222, the emitter electrode of the fourth switching element 212, and the fifth terminal 233 are electrically connected, for example, via wires made of copper (Cu) or aluminum (Al). However, the electrical connections in the second power module 200 are not limited to this. Figure 2 The connection relationships are as follows. On the other hand, in the first power module 100, the emitter electrode of the first switching element 111, the anode electrode of the first diode 121, the cathode electrode of the second diode 122, and the collector electrode of the second switching element 112 are electrically connected, for example, via wires and the pattern of the fourth metal layer 143. The emitter electrode of the second switching element 112, the anode electrode of the second diode 122, and the fourth terminal 132 are electrically connected, for example, via wires, etc. However, the electrical connection relationships in the first power module 100 are not limited to these, and are not limited to... Figure 2 The connection relationship.

[0040] The potential of the fifth terminal 233 can also be connected between the surface electrodes of the third switching element 211 and the fourth switching element 212. Preferably, the potential of the fifth terminal 233 can be the same as or substantially the same as the potential of the first terminal 231, that is, the fifth terminal 233 can also have the same function as the first terminal 231. The fifth terminal 233 is used, for example, as an AC terminal. Furthermore, multiple second power modules 200 may be provided with the above-described structural elements in one second power module 200. Similarly, multiple first power modules 100 may be provided with the above-described structural elements in one first power module 100.

[0041] <Regarding terminals 1 through 5>

[0042] like Figure 2 As shown, in this embodiment 1, one or more flat plate portions of the first terminal 231 and one or more flat plate portions of the second terminal 232 are arranged to be parallel to each other and opposite to each other. When the 3-level power conversion device is operating, since the current flowing through the first terminal 231 and the second terminal 232 flows in opposite directions, the mutual inductance when current flows through the second power module 200 can be reduced according to the above-described structure where the flat plate portions are close to each other. Furthermore, the term "parallel" here includes approximately parallel.

[0043] Furthermore, in this embodiment 1, when viewed from above, the second busbar 300b covers the gap between the connection portion of the first terminal 231 to the first busbar 300a and the connection portion of the second terminal 232 to the second busbar 300b. As a result, the other ends of the first terminal 231 and the second terminal 232 are covered by the second busbar 300b when viewed from above, thus improving the magnetic shielding effect and consequently reducing the inductance of the second power module 200. Alternatively, instead of the second busbar 300b, the first busbar 300a may be configured to cover the gap between the connection portion of the first terminal 231 to the first busbar 300a and the connection portion of the second terminal 232 to the second busbar 300b when viewed from above.

[0044] Furthermore, in this embodiment 1, since the third terminal 131 with one or more flat plate portions and the fourth terminal 132 with one or more flat plate portions are set to be parallel to each other and opposite to each other, the mutual inductance when current flows through the first power module 100 can be reduced, just as described above.

[0045] Furthermore, in this embodiment 1, when viewed from above, the fourth bus 300d covers the gap between the connection portion of the third terminal 131 to the third bus 300c and the connection portion of the fourth terminal 132 to the fourth bus 300d. Thus, the other ends of the third terminal 131 and the fourth terminal 132 are covered by the fourth bus 300d when viewed from above, thereby improving the magnetic shielding effect and reducing the inductance of the first power module 100. Alternatively, instead of the fourth bus 300d, the third bus 300c may be configured to cover the gap between the connection portion of the third terminal 131 to the third bus 300c and the connection portion of the fourth terminal 132 to the fourth bus 300d when viewed from above.

[0046] Furthermore, in this embodiment 1, when viewed from above, the second busbar 300b covers the gap between the connection portion of the third terminal 131 to the third busbar 300c and the connection portion of the fourth terminal 132 to the fourth busbar 300d. With this structure, the inductance of the first power module 100 can be further reduced.

[0047] Furthermore, in this embodiment 1, the fifth terminal 233, which has the same function as the first terminal 231 of the second power module 200, is exposed from the first busbar 300a and the second busbar 300b when viewed from above. With this structure, the fifth terminal 233, which functions as an output terminal of the second power module 200, can be connected to other circuits without mechanically interfering with the first busbar 300a and the second busbar 300b, thus facilitating the assembly of the semiconductor device.

[0048] <Implementation Method 2>

[0049] In this second embodiment, based on the structure of the first embodiment, at least one of the third diode 221 and the fourth diode 222 has a lower forward breakdown voltage than at least one of the first diode 121 and the second diode 122. For example, the forward breakdown voltage of the third diode 221 and the fourth diode 222 is 1200V, and the forward breakdown voltage of the first diode 121 and the second diode 122 is 1700V.

[0050] Since the voltage used by the second power module 200 is approximately half that used by the first power module 100, components with lower voltage ratings than those in the first power module 100 can be used in the second power module 200. Furthermore, a switching element with a diode connected in reverse to a low forward voltage rating typically experiences less conduction loss during switching operations compared to a switching element with a diode connected in reverse to a high forward voltage rating. Therefore, according to this embodiment 2 configured as described above, the conduction loss of the second power module 200 during switching operations can be reduced.

[0051] <Implementation Method 3>

[0052] In this third embodiment, based on the structures of embodiments 1 and 2, the voltage drop of at least one of the third switching element 211 and the fourth switching element 212 is lower than the voltage drop of at least one of the first switching element 111 and the second switching element 112. With this structure, the conduction loss of the semiconductor device can be reduced.

[0053] Furthermore, in this embodiment 3, based on the structures of embodiments 1 and 2, the voltage drop of at least one of the third diode 221 and the fourth diode 222 is lower than the voltage drop of at least one of the first diode 121 and the second diode 122. With this structure, the conduction loss of the semiconductor device can be reduced.

[0054] <Implementation Method 4>

[0055] Figure 3 This is a top view showing the structure of the semiconductor device according to Embodiment 4. The first power module 100 also includes signal terminals 130a to 130h that are exposed from the first busbar 300a and the second busbar 300b of the second power module 200 when viewed from above. The signal terminals 130a to 130h are, for example, gate terminals. The structure is otherwise the same as in Embodiments 1 to 3. According to Embodiment 4 configured as described above, the signal terminals 130a to 130h of the first power module 100 can be connected to other circuits without mechanically interfering with the first busbar 300a and the second busbar 300b, thus facilitating the assembly of the semiconductor device.

[0056] <Implementation Method 5>

[0057] In this embodiment 5, at least one of the third switching element 211 and the fourth switching element 212 is an RC-IGBT (reverse-conduction IGBT). An RC-IGBT is a device in which an IGBT and a freewheeling diode are disposed on a single chip, i.e., a single semiconductor substrate. Otherwise, the structure is the same as in embodiments 1 to 4. According to this embodiment 5 configured as described above, the heat dissipation area can be increased, temperature fluctuations of the switching elements can be suppressed, and therefore, a longer lifespan for the second power module 200 can be expected.

[0058] <Implementation Method 6>

[0059] In this embodiment 6, the thickness of the insulating layer 242 of the second power module 200 is less than or equal to 0.3 mm. Otherwise, the structure is the same as in embodiments 1-5. With this structure, when current flows through the second metal layer 243, which is in mechanical contact with the third switching element 211 and the fourth switching element 212, eddy currents are generated in the first metal layer 241 beneath the insulating layer 242 because the insulating layer 242 is relatively thin. Due to the magnetic shielding effect obtained through these eddy currents, the circuit inductance of the second power module 200 can be reduced. Furthermore, the thickness of the insulating layer 142 of the first power module 100 can also be less than or equal to 0.3 mm. With this structure, the circuit inductance of the first power module 100 can be reduced.

[0060] Furthermore, the various embodiments and variations can be freely combined, and the various embodiments and variations can be appropriately modified or omitted.

[0061] Explanation of the label

[0062] 100 Power Module 1, 111 Switching Element 1, 112 Switching Element 2, 116 Connection Point, 121 Diode 1, 122 Diode 2, 131 Terminal 3, 132 Terminal 4, 200 Power Module 2, 211 Switching Element 3, 212 Switching Element 4, 221 Diode 3, 222 Diode 4, 231 Terminal 1, 232 Terminal 2, 233 Terminal 5, 241 Metal Layer 1, 242 Insulating Layer, 243 Metal Layer 2, 300a Busbar 1, 300b Busbar 2, 300c Busbar 3, 300d Busbar 4, 351 Power Supply, 352 Intermediate Potential Point.

Claims

1. A semiconductor device comprising: The first power module and the second power module; and The first busbar and the second busbar are connected to the second power module. The first power module includes: The first switching element and the second switching element; and The first diode and the second diode are connected in anti-parallel to the first switching element and the second switching element, respectively. The second power module includes: The third and fourth switching elements; The third diode and the fourth diode are connected in anti-parallel to the third switching element and the fourth switching element, respectively; A first terminal, electrically connected to the third switching element, is electrically connected via the first busbar to the connection point of the first and second switching elements. The first terminal has one or more flat plate portions. The second terminal, which is electrically connected to the fourth switching element, is electrically connected to the intermediate potential point of the power supply via the second busbar. The second terminal has one or more flat plate portions. The first terminal having one or more flat plate portions and the second terminal having one or more flat plate portions are configured to be parallel to each other and opposite to each other. When viewed from above, one of the first busbars and the second busbar covers the gap between the connection portion of the first terminal to the first busbar and the connection portion of the second terminal to the second busbar.

2. The semiconductor device according to claim 1, wherein, The semiconductor device also includes a third bus and a fourth bus connected to the first power module. The first power module further includes: The third terminal, electrically connected to the first switching element and the third busbar, has a flat portion greater than or equal to one; and The fourth terminal, which is electrically connected to the second switching element and the fourth busbar, has a flat portion of one or more. The third terminal having one or more flat plate portions and the fourth terminal having one or more flat plate portions are configured to be parallel to each other and opposite to each other. When viewed from above, one of the third and fourth busbars covers the gap between the connection portion of the third terminal to the third busbar and the connection portion of the fourth terminal to the fourth busbar.

3. The semiconductor device according to claim 1 or 2, wherein, The forward breakdown voltage of at least one of the third and fourth diodes is lower than that of at least one of the first and second diodes.

4. The semiconductor device according to any one of claims 1 to 3, wherein, The voltage drop of at least one of the third and fourth switching elements is lower than the voltage drop of at least one of the first and second switching elements, or... The voltage drop of at least one of the third diode and the fourth diode is lower than the voltage drop of at least one of the first diode and the second diode.

5. The semiconductor device according to any one of claims 1 to 4, wherein, The first power module also includes a signal terminal that is exposed from the first busbar and the second busbar when viewed from above.

6. The semiconductor device according to any one of claims 1 to 5, wherein, At least one of the third and fourth switching elements is an RC-IGBT.

7. The semiconductor device according to any one of claims 1 to 6, wherein, The second power module further comprises a stacked structure in which a first metal layer, an insulating layer, and a second metal layer are sequentially stacked. The third and fourth switching elements are connected to the second metal layer. The thickness of the insulating layer is less than or equal to 0.3 mm.

8. The semiconductor device according to any one of claims 1 to 7, wherein, The second power module also includes a fifth terminal, which is exposed from the first and second busbars when viewed from above, and has the same function as the first terminal.