A light emitting diode chip

Abstract

The application relates to a light-emitting diode chip, which comprises a substrate, a semiconductor light-emitting sequence layer, a first electrode and a second electrode, the first electrode is electrically connected with a first conductive type semiconductor layer; the first electrode comprises a reflective layer, the reflective layer comprises multiple pairs of repeated laminated layers composed of Al metal and Ti metal layers, and the thickness of the Al metal layer / Ti metal layer in the reflective layer is sequentially reduced from the light-emitting diode chip light-emitting side to the electrode side direction. The application can increase the light-emitting efficiency of the light-emitting diode chip.

Description

[0001] This invention patent application is a divisional application. The original application number is 202110820138.6, the filing date is July 20, 2021, and the invention title is: A light-emitting diode chip. Technical Field

[0002] The present invention relates to the field of semiconductor devices, and in particular to a light emitting diode chip. Background Art

[0003] A light emitting diode (LED) is a semiconductor device that emits light by releasing energy when charge carriers recombine. Flip-chip LEDs, in particular, are increasingly being used due to their low energy consumption, long lifespan, and environmental friendliness.

[0004] In the prior art, to increase the light extraction efficiency of LED chips and reduce light absorption by the electrode structure, a reflective layer is added to the electrode structure to reflect light from the light-emitting layer. In practical applications, materials commonly used for reflective layers, such as metals like Al, have strong metallic activity and are prone to migration under conditions such as high temperature, high humidity, and applied voltage, leading to failures such as short circuits. Summary of the Invention

[0005] In order to solve the above problems, the present invention provides a light emitting diode chip.

[0006] The specific plan is as follows:

[0007] A light-emitting diode chip comprises a semiconductor light-emitting sequence layer, and a first electrode and a second electrode disposed on the semiconductor light-emitting sequence layer, wherein the semiconductor light-emitting sequence layer comprises at least a first conductive semiconductor layer, a second conductive semiconductor layer, and a light-emitting layer located between the first conductive semiconductor layer and the second conductive semiconductor layer, and the first electrode is electrically connected to the first conductive semiconductor layer. The chip is characterized in that: the first electrode comprises a reflective layer, an intermediate layer, and a conductive layer, the reflective layer being configured to reflect light from the light-emitting layer; the intermediate layer comprises a barrier layer, the barrier layer comprising at least a first layer and a second layer, the first layer being closer to the conductive layer than the second layer, the first layer and the second layer both comprising a Pt metal layer, and the thickness of the Pt metal layer in the first layer being greater than the thickness of the Pt metal layer in the second layer.

[0008] In one embodiment, the barrier layer includes a plurality of pairs of repeating stacks, each of which includes a Pt metal layer and a buffer metal layer.

[0009] In one embodiment, the buffer metal layer is a Ni metal layer and / or a Ti metal layer.

[0010] In one embodiment, the number of pairs of the repeated stacking layers is 2-5 pairs.

[0011] In one embodiment, the thickness of the Pt metal layer in each repeated stack is 20-150 nm, and the thickness of the buffer metal layer is 40-200 nm.

[0012] In one embodiment, the repeating layer closest to the conductive layer is the first layer, and the thickness of the Pt metal layer in the first layer is greater than the thickness of the Pt metal layer in other single repeating layers.

[0013] In one embodiment, the reflective layer is an aluminum reflective layer, and the conductive layer is a gold conductive layer or a gold-tin alloy conductive layer.

[0014] In one embodiment, the light-emitting diode chip is a light-emitting diode chip with a positive structure, and the first electrode includes a pad electrode and an extended electrode. The pad electrode is used to connect to an external circuit through a bonding wire, and is in a block shape. The extended electrode extends from the edge of the block-shaped pad electrode and is in a strip shape. The pad electrode and the extended electrode both include a reflective layer, an intermediate layer and a conductive layer.

[0015] In one embodiment, the width of the extended electrode is generally 1-20 microns.

[0016] In one embodiment, an ohmic contact layer may be further included between the reflective layer on the pad electrode and the semiconductor light emitting sequence stacked layer, and the ohmic contact layer forms an ohmic contact with the first conductive type semiconductor layer.

[0017] In one embodiment, the thickness of the ohmic contact layer is less than 10 nm.

[0018] In one embodiment, the light-emitting diode chip is a flip-chip light-emitting diode chip, and the semiconductor light-emitting sequence layer is further provided with an insulating layer, the insulating layer covers the top surface and side walls of the semiconductor light-emitting sequence, the first and second electrodes are formed on the top surface of the insulating layer, and are electrically connected to the first conductive semiconductor layer and the second conductive semiconductor layer, respectively, and the first and second electrodes both include a reflective layer, an intermediate layer and a conductive layer.

[0019] In one embodiment, both the first and second electrodes include a pad electrode and a contact electrode. The pad electrode is formed on the top surface of the insulating layer. The contact electrode contacts the first or second conductive semiconductor layer to form an electrical connection. The insulating layer has an opening that exposes at least a portion of the contact electrode. The pad electrode fills the opening and contacts the contact electrode to form an electrical connection.

[0020] In one embodiment, the contact electrode includes the reflective layer, an intermediate layer and a conductive layer.

[0021] In one embodiment, the pad electrode also includes the reflective layer, the intermediate layer and the conductive layer.

[0022] In one embodiment, the barrier layer in the pad electrode includes a plurality of pairs of repeated stacked layers, and each repeated stacked layer includes a Pt metal layer and a buffer metal layer.

[0023] In one embodiment, the buffer metal layer is a Ni metal layer and / or a Ti metal layer.

[0024] In one embodiment, the barrier layer in the pad electrode is a single-layer Pt metal layer.

[0025] The light-emitting diode chip provided by the present invention has the following advantages compared with the prior art: the light-emitting diode chip provided by the present invention has an intermediate layer inserted between the reflective layer and the conductive layer of the electrode structure, the intermediate layer includes a barrier layer that prevents the conductive layer and the reflective layer from contacting and dissolving each other, the barrier layer includes at least a first layer and a second layer, the first layer is closer to the conductive layer than the second layer, the first layer and the second layer both include a Pt metal layer, and the thickness of the Pt metal layer in the first layer is greater than the thickness of the Pt metal layer in the second layer, and the barrier layer can prevent the conductive layer and the reflective layer from contacting and dissolving each other. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 A schematic cross-sectional structure diagram of the light emitting diode chip in Example 1 is shown.

[0027] Figure 2 A schematic diagram of the planar structure of the light emitting diode chip in Example 1 is shown.

[0028] Figure 3 A schematic diagram of the electrode structure of the light-emitting diode chip in Example 1 is shown.

[0029] Figure 4 A schematic diagram showing the barrier layer of the electrode structure in Example 1.

[0030] Figure 5 A TEM image of the barrier layer of the electrode structure in Example 1 is shown.

[0031] Figure 6 A schematic cross-sectional structure diagram of the light emitting diode chip in Example 2 is shown.

[0032] Figure 7 A schematic diagram of the planar structure of the light emitting diode chip in Example 2 is shown.

[0033] Figure 8 A schematic diagram of the electrode structure of the light-emitting diode chip in Example 2 is shown.

[0034] Figure 9 A schematic diagram showing the barrier layer of the electrode structure in Example 2.

[0035] Figure 10A TEM image of the barrier layer of the electrode structure in Example 2 is shown. DETAILED DESCRIPTION

[0036] To further illustrate various embodiments, the present invention is provided with accompanying drawings. These drawings form part of the present disclosure and are primarily used to illustrate the embodiments and, in conjunction with the relevant description in the specification, to explain the operating principles of the embodiments. By referring to these drawings, one of ordinary skill in the art will understand other possible embodiments and the advantages of the present invention. The components in the figures are not drawn to scale, and similar reference numerals are generally used to represent similar components.

[0037] The present invention will now be further described with reference to the accompanying drawings and specific embodiments.

[0038] Example 1

[0039] The electrodes of LED chips serve as current injection points, and the material selection and structure play a crucial role in the performance of the electrodes themselves and the entire chip. Currently, commonly used electrode materials include Cr, Al, Au, etc. In practical applications, since Al has strong metallic activity, it is very easy to undergo electromigration, resulting in failures such as short circuits. In order to reduce the probability of migration of active metals such as Al, it is usually required that the upper metal of the electrode has a good coating effect on the underlying Al metal. However, Au and Al, which are commonly used metals in the upper layer of the electrode, are very easy to dissolve into each other, resulting in a decrease in the reflectivity of Al and a weakening of the chip's light-emitting effect. After research, it was found that the mutual dissolution of Au and Al is usually manifested as Au migrating downward and dissolving together with Al. Therefore, in order to play a role in preventing the mutual dissolution of Au and Al while reducing the stress of Pt, the LED chip disclosed in this embodiment is designed with a barrier layer composed of multiple layers between the reflective layer and the conductive layer, and the top barrier layer has the largest thickness, that is, it blocks Au from migrating downward to the greatest extent, thereby preventing Au and Al from dissolving into each other. The LED chip described in this embodiment is described below with reference to the accompanying drawings.

[0040] This embodiment is described by taking a light emitting diode chip with a front-mounted structure as an example.

[0041] like Figure 1-Figure 2 As shown, the face-up structured light emitting diode chip includes a substrate 10 , a semiconductor light emitting sequence layer 11 located on the substrate 10 , and a first electrode 12 and a second electrode 13 disposed on the semiconductor light emitting sequence layer 11 .

[0042] The substrate 10 can be an insulating substrate or a conductive substrate. The substrate 10 can be a growth substrate for growing the semiconductor light-emitting array 11, such as a sapphire substrate, a silicon substrate, or a silicon carbide substrate. Alternatively, the semiconductor light-emitting array 11 can be bonded to the substrate 10 via a transparent bonding layer. The substrate 10 has a first surface, a second surface, and sidewalls, wherein the first and second surfaces are opposite each other. The substrate 10 can also include a plurality of protrusions formed on at least a portion of the first surface. For example, the substrate 10 can be a patterned sapphire substrate.

[0043] A semiconductor light-emitting array 11 is stacked on the first surface of substrate 10. The semiconductor light-emitting array 11 includes at least a first-conductivity-type semiconductor layer 111, a second-conductivity-type semiconductor layer 113, and a light-emitting layer 112 positioned between the first and second conductivity-type semiconductor layers. The light-emitting layer 112 comprises a quantum well (QW) structure or a multiple quantum well (MQW) structure. The semiconductor light-emitting array can be composed of materials such as gallium nitride and gallium arsenide, and the elemental composition ratio of the semiconductors can be adjusted to emit desired wavelengths, such as ultraviolet, blue, red, or infrared radiation. In this embodiment, the first-conductivity-type semiconductor layer 111 is a P-type semiconductor layer, and the second-conductivity-type semiconductor layer 113 is an N-type semiconductor layer.

[0044] After the semiconductor light-emitting sequence layer is formed on the substrate, the first electrode 12 and the second electrode 13 are formed on the semiconductor light-emitting sequence layer, wherein the first electrode 12 covers the first conductive semiconductor layer 111 and forms an electrical connection therewith, and the second electrode 13 covers the second conductive semiconductor layer 113 and forms an electrical connection therewith. In this embodiment, the first electrode 12 is a P electrode and the second electrode 13 is an N electrode. The first electrode 12 includes a pad electrode 12a and an extension electrode 12b, wherein the pad electrode 12a is used for connecting to an external circuit via a bonding wire and is in a block shape, such as a circular block or a square block. The extension electrode 12b extends from the edge of the block-shaped pad electrode 12a and is in the shape of a strip. The pad electrode 12a can be optionally designed as one or more strips based on the expansion efficiency, and the width of the extension electrode 12b is generally between 1 and 20 microns.

[0045] In addition, a local current blocking layer (formed between the transparent conductive layer and the semiconductor light-emitting sequence layer, not shown in the figure) can be formed on the semiconductor light-emitting sequence layer, and the transparent conductive layer 14 (such as ITO) covers most of the entire surface of the first conductive semiconductor layer 111. Part of the pad electrode 12a (for example, the edge portion) and the extended electrode 12b of the first electrode 12 are formed on the transparent conductive layer 14. The transparent conductive layer 14 has a horizontal lateral expansion effect on the current.

[0046] The semiconductor light-emitting array layer may also include a protective layer 15. This protective layer 15 covers the top surface and sidewalls of the semiconductor light-emitting array 11. Preferably, the protective layer further covers portions of the first electrode 12 and the second electrode 13 to isolate moisture. The protective layer 15 covers the top surface of the pad electrode 12a, where at least a portion of the top surface needs to be exposed, for bonding to an external circuit. The protective layer 15 may be made of an insulating material such as silicon oxide or silicon nitride.

[0047] refer to Figure 3 The first electrode 12 (pad electrode 12a and extended electrode 12b) includes a reflective layer 121, a blocking layer 122 and a conductive layer 123. The reflective layer 121 is arranged close to the first conductive semiconductor layer 111 and has the ability to reflect light emitted by the light-emitting layer 112. The conductive layer 123 is located on the surface side of the first electrode 12, and the blocking layer 122 is located between the reflective layer 121 and the conductive layer 123.

[0048] An ohmic contact layer 124 may also be included between the reflective layer 121 on the pad electrode 12a and the stacked layers of the semiconductor light-emitting array. This layer can form an ohmic contact with the first-conductivity-type semiconductor layer 111. The ohmic contact layer 124 is very thin, preferably less than 10 nm, for example, 1-8 nm, to minimize its impact on the reflectivity of the reflective layer 121. Preferably, the ohmic contact layer is made of Ni or Cr. Optionally, an ohmic contact layer 124 may also be included between the reflective layer 121 on the extended electrode 12b and the stacked layers of the semiconductor light-emitting array 11.

[0049] refer to Figure 3 The blocking layer 122 is inserted between the conductive layer 123 and the reflective layer 121 to prevent the conductive layer 123 and the reflective layer 121 from contacting and dissolving each other; the blocking layer 122 includes at least a first layer 1221 and a second layer 1222, the first layer 1221 is closer to the conductive layer 123 than the second layer 1222, and the first layer 1221 is thicker than the second layer 1222.

[0050] Preferably, the barrier layer 122 is a repeated stack of Ti metal layers and Pt metal layers, with the number of pairs preferably being 2-5 pairs. The thickness of a single Pt metal layer is 20-150 nm, and the thickness of a single titanium metal layer is 40-200 nm.

[0051] Preferably, the reflective layer 121 is an aluminum reflective layer, and the conductive layer 123 is a gold conductive layer. Figure 4 , Figure 4The barrier layer is composed of three pairs of Ti / Pt metal layers forming a repeated stack, wherein the Pt metal layer is formed on the buffer metal layer (Ti metal layer or Ni metal layer), forming a Ti / Pt / Ti / Pt / Ti / Pt structure, that is, each layer of the barrier layer is a stack formed by Ti / Pt metal layers, the top Ti / Pt metal layer is used as the first layer 1221, the middle Ti / Pt metal layer is used as the second layer 1222, and the bottom Ti / Pt metal layer is used as the third layer 1223. The main purpose of Pt is to prevent the mutual dissolution of Au and Al, so a certain thickness is required. Studies have found that due to the relatively large stress of Pt itself, if the metal layer is too thick at one time, it is easy to split, or curling occurs during plating, so a Ti layer needs to be inserted as a buffer layer to reduce the stress, so that the Pt metal layer can have better quality, thereby achieving the purpose of better blocking the mutual dissolution of Au and Al. At the same time, the study found that the mutual solubility of Au and Al is manifested by the downward migration of Au. Therefore, the Pt metal layer closest to Au is the thickest, that is, the thickness of the first Pt metal layer is thicker than that of the second and third Pt metal layers, in order to have a better barrier effect on Au. Figure 5 , Figure 5 The TEM image of the barrier layer is shown. The thickness of each layer can be referred to Figure 5 As shown in the figure, the thickness of the first Pt metal layer is about 70 nm, the thickness of the second and third Pt metal layers are about 50 nm, and the thickness of the first Pt metal layer is the largest.

[0052] In this embodiment, the barrier layer may also be a repeated stack of multiple pairs of Ni metal layers and Pt metal layers, preferably 2-5 pairs. The thickness of a single Pt metal layer is 50-150 nm, and the thickness of a single titanium metal layer is 40-200 nm. For example, in one embodiment, the barrier layer is a repeated stack of two pairs of Ni / Pt metal layers, forming a Ni / Pt / Ni / Pt / structure. The upper Ni / Pt metal layer serves as the first layer, and the lower Ti / Pt metal layer serves as the second layer. The thickness of the Pt metal layer in the first layer is approximately 120 nm, and the thickness of the Pt metal layer in the second layer is approximately 95 nm.

[0053] In this embodiment, the barrier layer can also be composed of multiple pairs of repeated stacked layers consisting of Ti / Pt metal layers and Ni / Pt metal layers. Figure 6 The barrier layer is a repeating stack of Ti / Pt / Ni / Pt / Ti / Pt metal layers, with the top Ti / Pt metal layer serving as the first layer, the middle Ni / Pt metal layer serving as the second layer, and the bottom Ti / Pt metal layer serving as the third layer. The thickness of the Pt metal layer in the first layer is approximately 120nm, while the thickness of the Pt metal layers in the second and third layers is approximately 95nm.

[0054] Example 2

[0055] This embodiment is described by taking a flip-chip LED chip as an example.

[0056] like Figure 6-Figure 7 As shown, the flip-chip structure light emitting diode chip includes a substrate 20 , a semiconductor light emitting sequence layer 21 located on the substrate 20 , and a first electrode 22 and a second electrode 23 disposed on the semiconductor light emitting sequence layer 21 .

[0057] The substrate 20 may be an insulating substrate or a conductive substrate. The substrate 20 may be a growth substrate for growing the semiconductor light-emitting sequence 21. Sapphire (Al2O3), SiC, GaAs, GaN, ZnO, GaP, InP, and Ge may be selected, but the examples listed here are not limited thereto. The semiconductor light-emitting sequence 21 may also be bonded to a transparent substrate 20 with a transparent bonding layer. The substrate 20 has a first surface, a second surface, and sidewalls, wherein the first surface and the second surface are opposite to each other. The substrate 20 may further include a plurality of protrusions formed on at least a portion of the first surface. For example, the substrate 20 may be a patterned sapphire substrate.

[0058] A semiconductor light-emitting array 21 is stacked on the first surface of the substrate 20. The semiconductor light-emitting array 21 includes at least a first-conductivity-type semiconductor layer 211, a second-conductivity-type semiconductor layer 213, and a light-emitting layer 212 positioned between the first and second conductivity-type semiconductor layers. The light-emitting layer 212 comprises a quantum well (QW) structure or a multiple quantum well (MQW) structure. The semiconductor light-emitting array can be composed of materials such as gallium nitride and gallium arsenide. The elemental composition ratio of the semiconductors can be adjusted to emit desired wavelengths, such as ultraviolet, blue, red, or infrared radiation. In this embodiment, the first-conductivity-type semiconductor layer 211 is a P-type semiconductor layer, and the second-conductivity-type semiconductor layer 213 is an N-type semiconductor layer.

[0059] After the semiconductor light emitting sequence layer is formed on the substrate, an insulating layer 25 is further formed on the semiconductor light emitting sequence layer. The insulating layer 25 covers the top surface and sidewalls of the semiconductor light emitting sequence 21. The insulating layer 25 can be an insulating material such as silicon oxide or silicon nitride.

[0060] The first electrode 22 includes a first pad electrode 22a and a first contact electrode 22b. The first pad electrode 22a is formed on the top surface of the insulating layer 25. The first contact electrode 22b contacts the first conductive semiconductor layer 211 to form an electrical connection. The insulating layer 25 has a first opening that exposes at least a portion of the first contact electrode 22b. The first pad electrode 22a fills the first opening and contacts the first contact electrode 22b to form an electrical connection.

[0061] The second electrode 23 includes a second pad electrode 23a and a second contact electrode 23b. The second pad electrode 23a is formed on the top surface of the insulating layer 25. The second contact electrode 23b is in electrical contact with the second conductive semiconductor layer 213. The insulating layer 25 has a second opening that exposes at least a portion of the second contact electrode 23b. The second pad electrode 23a fills the second opening and is in electrical contact with the second contact electrode 23b. In this embodiment, the first electrode 22 is a P-electrode, and the second electrode 23 is an N-electrode.

[0062] In addition, a local current blocking layer (formed between the transparent conductive layer and the semiconductor light-emitting sequence layer, not shown in the figure) can be formed on the semiconductor light-emitting sequence layer, and the transparent conductive layer 24 (such as ITO, GTO, GZO, ZnO or a combination of several thereof) covers most of the entire surface of the first conductive semiconductor layer 211 (at least 90% of the coverage area) and forms an ohmic contact with the first conductive semiconductor layer 211. The transparent conductive layer 24 simultaneously realizes lateral transmission of current in the horizontal direction and allows radiation from at least part of the light-emitting layer to pass through.

[0063] The first pad electrode 22 a of the first electrode 22 and the second pad electrode 23 a of the second electrode 23 both include a reflective layer, a barrier layer, and a conductive layer.

[0064] refer to Figure 8 Taking the first electrode 22 as an example, the reflective layer is arranged close to the first conductive semiconductor layer 211, and has the ability to reflect the light emitted by the light-emitting layer 212. The conductive layer 223 is located on the surface side of the first electrode 22, and the blocking layer 222 is located between the reflective layer 221 and the conductive layer 223.

[0065] refer to Figure 8 The blocking layer 222 is inserted between the conductive layer 223 and the reflective layer 221 to prevent the conductive layer 223 and the reflective layer 221 from contacting and dissolving each other; the blocking layer 222 includes at least a first layer 2221 and a second layer 2222, the first layer 2221 is closer to the conductive layer 223 than the second layer 2222, and the first layer 2221 is thicker than the second layer 2222.

[0066] Preferably, the barrier layer 222 is a repeated stack of Ti metal layers and Pt metal layers, with the number of pairs preferably being 2-5 pairs. The thickness of a single Pt metal layer is 20-100 nm, and the thickness of a single titanium metal layer is 40-200 nm.

[0067] Preferably, the reflective layer 221 is an aluminum reflective layer, and the conductive layer 223 is a gold conductive layer or a gold-tin alloy. Figure 9 , Figure 9 The barrier layer is composed of three pairs of Ti / Pt metal layers forming a repeated stack, forming a Ti / Pt / Ti / Pt / Ti / Pt structure, that is, each layer of the barrier layer is a stack formed by Ti / Pt metal layers, the top Ti / Pt metal layer is the first layer 2221, the middle Ti / Pt metal layer is the second layer 2222, and the bottom Ti / Pt metal layer is the third layer 2223. The main purpose of Pt is to prevent the mutual dissolution of Au and Al, so a certain thickness is required. Studies have found that due to the relatively large stress of Pt itself, if the metal layer is too thick at one time, it is easy to split, or curling occurs during plating, so the insertion of a Ti layer is required to reduce the stress. At the same time, studies have found that the manifestation of mutual dissolution of Au and Al is that Au migrates downward, so the Pt metal layer close to Au is the thickest, that is, the thickness of the first Pt metal layer is thicker than the thickness of the second and third Pt metal layers, in order to have a better barrier effect on Au. Reference Figure 10 , Figure 10 The TEM image of the barrier layer is shown. The thickness of each layer can be referred to Figure 10 As shown in the figure, the thickness of the first Pt metal layer is 609 angstroms, the thickness of the second Pt metal layer is 450 angstroms, and the thickness of the third Pt metal layer is 372 angstroms. The thickness of the first Pt metal layer is the largest.

[0068] In this embodiment, the contact electrodes of the first and second electrodes may also adopt a structure roughly the same as that of the pad electrodes, that is, they also include a reflective layer, an intermediate layer and a conductive layer, the intermediate layer has a barrier layer, and the barrier layer may be a plurality of pairs of repeated stacks composed of Ti / Pt metal layers and / or Ni / Pt metal layers.

[0069] For example, in one embodiment, the barrier layer comprises a repeating stack of Ti / Pt / Ni / Pt metal layers, wherein the upper Ti / Pt metal layer serves as the first layer, and the lower Ni / Pt metal layer serves as the second layer. The thickness of the Pt metal layer in the first layer is approximately 150 nm, and the thickness of the Pt metal layer in the second layer is approximately 120 nm.

[0070] In this embodiment, the barrier layer of the contact electrodes of the first and second electrodes can also be a separate Pt metal layer. For example, in one embodiment, the barrier layer is a single Pt metal layer with a thickness of approximately 90 nm. A Ni metal layer is inserted between the Pt metal layer and the reflective layer as a buffer layer, and a Ti metal layer is inserted between the Pt metal layer and the conductive layer as a buffer layer.

[0071] In this embodiment, the reflective layer can be a plurality of pairs of repeated stacks composed of Al metal and Ti metal layers. Preferably, the thickness of the metal stack in the reflective layer decreases sequentially from the light-emitting side of the light-emitting diode chip to the electrode side. For example, in one embodiment, the reflective layer is composed of three pairs of repeated stacks of Al / Ti metal layers, forming an Al / Ti / Al / Ti / Al / Ti structure. The thickness of the Al metal layer in the third metal stack closest to the light-emitting side is about 490nm, and the thickness of the Ti metal layer is about 190nm; the thickness of the Al metal layer in the second metal stack located in the middle is about 410nm, and the thickness of the Ti metal layer is about 185nm; the thickness of the Al metal layer in the first metal stack closest to the electrode side is about 405nm, and the thickness of the Ti metal layer is about 175nm.

[0072] Although the present invention has been particularly shown and described in conjunction with preferred embodiments, it will be understood by those skilled in the art that various changes in form and details may be made to the present invention without departing from the spirit and scope of the invention as defined in the appended claims, and all such changes are within the scope of protection of the present invention.

Claims

1. A light-emitting diode chip, comprising a semiconductor light-emitting sequence layer, and a first electrode and a second electrode disposed on the semiconductor light-emitting sequence layer, wherein the semiconductor light-emitting sequence layer comprises at least a first conductive semiconductor layer, a second conductive semiconductor layer, and a light-emitting layer located between the first conductive semiconductor layer and the second conductive semiconductor layer, wherein the first electrode is electrically connected to the first conductive semiconductor layer; characterized in that: The first electrode includes a reflective layer, an intermediate layer and a conductive layer. The reflective layer includes multiple pairs of repeated stacks of Al metal and Ti metal layers. The thickness of the Al metal layer / Ti metal layer in the reflective layer decreases sequentially from the light-emitting side of the light-emitting diode chip to the electrode side. The intermediate layer includes a barrier layer. The barrier layer includes at least a first layer and a second layer. The first layer is closer to the conductive layer than the second layer. The first layer and the second layer both include a Pt metal layer, and the thickness of the Pt metal layer in the first layer is greater than the thickness of the Pt metal layer in the second layer.

2. The light-emitting diode chip according to claim 1, wherein: The thickness of the metal stack in the reflective layer decreases in sequence from the light emitting side of the LED chip to the electrode side.

3. The light-emitting diode chip according to claim 1, wherein: The repeating layer closest to the light emitting layer is the first layer, and the thickness of the Al metal layer in the first layer is greater than the thickness of the Al metal layer in other single repeating layers.

4. The light-emitting diode chip according to claim 1, wherein: The repeating layer closest to the light emitting layer is the first layer, and the thickness of the Ti metal layer in the first layer is greater than the thickness of the Ti metal layer in other single repeating layers.

5. The light-emitting diode chip according to claim 1, wherein: The conductive layer is a gold conductive layer or a gold-tin alloy conductive layer.

6. The light-emitting diode chip according to claim 1, wherein: The barrier layer includes a plurality of pairs of repeated stacks, and each repeated stack includes a Pt metal layer and a buffer metal layer.

7. The light-emitting diode chip according to claim 6, wherein: The buffer metal layer is a Ni metal layer and / or a Ti metal layer.

8. The light-emitting diode chip according to claim 6, wherein: The number of pairs of the repeated stacking layers is 2-5 pairs.

9. The light-emitting diode chip according to claim 6, wherein: The thickness of the Pt metal layer in each repeated stack is 20-150 nm, and the thickness of the buffer metal layer is 40-200 nm.

10. The light-emitting diode chip according to claim 6, wherein: The repeating layer closest to the conductive layer is the first layer, and the thickness of the Pt metal layer in the first layer is greater than the thickness of the Pt metal layer in other single repeating layers.

11. The light emitting diode chip according to claim 1, wherein: The light-emitting diode chip is a light-emitting diode chip with a positive structure. The first electrode includes a pad electrode and an extended electrode. The pad electrode is used to connect to an external circuit through a bonding wire. It is in a block shape. The extended electrode extends from the edge of the block pad electrode and is in a strip shape. The pad electrode and the extended electrode both include a reflective layer, an intermediate layer and a conductive layer.

12. The light-emitting diode chip according to claim 11, characterized in that: The width of the extended electrode is 1-20 microns.

13. The light-emitting diode chip according to claim 11, wherein: An ohmic contact layer is further provided between the reflective layer on the pad electrode and the semiconductor light emitting sequence layer, and the ohmic contact layer forms an ohmic contact with the first conductive type semiconductor layer.

14. The light-emitting diode chip according to claim 13, wherein: The thickness of the ohmic contact layer is less than 10 nm.

15. The light emitting diode chip according to claim 1, wherein: The light-emitting diode chip is a flip-chip structured light-emitting diode chip, and an insulating layer is also provided on the semiconductor light-emitting sequence layer, which covers the top surface and side walls of the semiconductor light-emitting sequence layer. The first and second electrodes are formed on the top surface of the insulating layer and are electrically connected to the first conductive semiconductor layer and the second conductive semiconductor layer, respectively. The first and second electrodes both include a reflective layer, an intermediate layer, and a conductive layer.

16. The light-emitting diode chip according to claim 15, characterized in that: Both the first and second electrodes include a pad electrode and a contact electrode. The pad electrode is formed on the top surface of the insulating layer. The contact electrode contacts the first or second conductive semiconductor layer to form an electrical connection. The insulating layer has an opening that exposes at least part of the contact electrode. The pad electrode fills the opening and contacts the contact electrode to form an electrical connection.

17. The light-emitting diode chip according to claim 16, wherein: The contact electrode includes the reflective layer, an intermediate layer and a conductive layer.

18. The light-emitting diode chip according to claim 16, wherein: The pad electrode also includes the reflective layer, the intermediate layer and the conductive layer.

19. The light-emitting diode chip according to claim 16, wherein: The barrier layer in the pad electrode includes a plurality of pairs of repeated stacked layers, and each repeated stacked layer includes a Pt metal layer and a buffer metal layer.

20. The light-emitting diode chip according to claim 18, wherein: The barrier layer in the contact electrode includes a plurality of pairs of repeated stacked layers, and each repeated stacked layer includes a Pt metal layer and a buffer metal layer.

21. The light-emitting diode chip according to claim 19, wherein: The buffer metal layer is a Ni metal layer and / or a Ti metal layer.

22. The light-emitting diode chip according to claim 18, wherein: The barrier layer in the pad electrode is only a single-layer Pt metal layer.

23. The light-emitting diode chip according to claim 17, wherein: The barrier layer in the contact electrode is only a single-layer Pt metal layer.

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