A capacitive chip structure

Abstract

A capacitive chip structure belongs to the technical field of micro-electromechanical systems (MEMS), and particularly relates to a capacitive chip structure. The present invention provides an improved capacitive chip structure. The present invention comprises a lower electrode plate (3), an intermediate electrode plate (4), and an upper electrode plate (6). A lower cavity is formed between the lower electrode plate (3) and the intermediate electrode plate (4), and an upper cavity is formed between the upper electrode plate (6) and the intermediate electrode plate (4).

Description

Technical Field

[0001] The present invention belongs to the technical field of micro-electromechanical systems (MEMS), and in particular relates to a capacitive chip structure. Background Art

[0002] With the development of MEMS technology, pressure sensors have become indispensable key components in various industries and are widely used in automotive electronics, petrochemicals, biomedicine, and defense. Compared to piezoresistive pressure sensors, capacitive pressure sensors offer advantages such as high sensitivity, low power consumption, and excellent temperature characteristics, making them more suitable for the development of high-precision pressure sensors. Given the increasing demands for pressure measurement accuracy and reliability in modern aerospace technology and defense equipment, research on MEMS capacitive pressure sensors has garnered significant attention both domestically and internationally.

[0003] Conventional capacitive pressure sensors typically employ a parallel plate capacitor structure, consisting primarily of a movable plate and a fixed plate. When pressure is applied to the movable plate, the distance between the two plates changes, causing a change in capacitance. Pressure is measured by detecting the capacitance value, but this approach suffers from significant nonlinearity between input and output and low overload capacity. In the 1990s, Wen H. Ko et al. proposed a contact capacitive pressure-sensitive structure (U.S. Patent No. 5,528,452). The key feature of this structure is that as external pressure increases during operation, the upper pressure-sensing plate contacts the dielectric layer on the lower plate. At this point, the output capacitance exhibits a nearly linear relationship with pressure changes, thereby improving the linearity of conventional capacitive pressure sensors to a certain extent. However, this structure suffers from low sensitivity and a narrow linear range, making it unsuitable for differential pressure measurement. Summary of the Invention

[0004] The present invention aims to solve the above problems and provides an improved capacitive chip structure.

[0005] To achieve the above-mentioned purpose, the present invention adopts the following technical solution. The present invention includes a lower electrode plate (3), an intermediate electrode plate (4) and an upper electrode plate (6). A lower cavity is formed between the lower electrode plate (3) and the intermediate electrode plate (4), and an upper cavity is formed between the upper electrode plate (6) and the intermediate electrode plate (4).

[0006] As a preferred embodiment, the upper cavity and the lower cavity described in the present invention are sealed cavities.

[0007] As another preferred embodiment, the upper plate (6) and the lower plate (3) of the present invention are connected to an electrical signal of a first polarity, and the middle plate (4) is connected to an electrical signal of a second polarity, wherein the first polarity is opposite to the second polarity; the upper plate (6) is a pressure-sensitive plate;

[0008] Or the upper plate (6) is connected to an electrical signal of a first polarity, and the lower plate (3) is connected to an electrical signal of a second polarity, the first polarity being opposite to the second polarity; the middle plate (4) is not connected to an electrical signal; and both the upper plate (6) and the lower plate (3) are pressure-sensitive plates.

[0009] As another preferred embodiment, the intermediate plate (4) and the lower plate (3) of the present invention are stationary plates.

[0010] As another preferred embodiment, the combination of the lower electrode plate (3), the middle electrode plate (4) and the upper electrode plate (6) of the present invention is multiple groups, which are arranged vertically; the lower electrode plate (3) of the upper group is the upper electrode plate (6) of the adjacent lower group; the upper electrode plate (6) of the uppermost group and the lower electrode plate (3) of the lowermost group are pressure-sensitive electrodes; the upper electrode plate (6) of the upper group, the lower electrode plate (3) of the upper group and the lower electrode plate (3) of the adjacent lower group are connected to an electrical signal of a first polarity, and the middle electrode plate (4) of the upper group and the middle electrode plate (4) of the adjacent lower group are connected to an electrical signal of a second polarity, and the first polarity is opposite to the second polarity;

[0011] Or the combination of the lower electrode plate (3), the middle electrode plate (4) and the upper electrode plate (6) is multiple groups, which are arranged vertically; the middle electrode plate (4) of the upper group is the upper electrode plate (6) of the adjacent lower group; the lower electrode plate (3) of the upper group is the middle electrode plate (4) of the adjacent lower group; the upper electrode plate (6) of the uppermost group and the lower electrode plate (3) of the lowermost group are pressure-sensitive electrodes; the upper electrode plate (6) of the upper group and the lower electrode plate (3) of the upper group are connected to an electrical signal of a first polarity, and the middle electrode plate (4) of the upper group and the lower electrode plate (3) of the adjacent lower group are connected to an electrical signal of a second polarity, and the first polarity is opposite to the second polarity.

[0012] As another preferred embodiment, the combination of the lower electrode plate (3), the middle electrode plate (4) and the upper electrode plate (6) of the present invention is formed into two groups and arranged vertically; the lower electrode plate (3) of the upper group is the upper electrode plate (6) of the lower group; the upper electrode plate (6) of the upper group and the lower electrode plate (3) of the lower group are pressure-sensitive electrodes; the upper electrode plate (6) of the upper group, the lower electrode plate (3) of the upper group and the lower electrode plate (3) of the lower group are connected to an electrical signal of a first polarity, and the middle electrode plate (4) of the upper group and the middle electrode plate (4) of the lower group are connected to an electrical signal of a second polarity, wherein the first polarity is opposite to the second polarity.

[0013] As another preferred solution, a dielectric layer (5) is provided on the intermediate plate (4) of the present invention.

[0014] As another preferred solution, the lower electrode plate (3) of the present invention is arranged on the substrate (2).

[0015] As another preferred solution, a pad is provided at the lower end of the substrate (2) of the present invention.

[0016] As another preferred embodiment, the outer end of the lower electrode plate (3) of the present invention extends outward, the outer end of the outward extension portion is arranged on the substrate (2), and a through hole is provided on the outward extension portion to form a pressure chamber to enable the lower electrode plate to sense pressure;

[0017] As another preferred solution, the present invention provides a through hole on the substrate to form a pressure cavity to enable the lower plate to sense pressure.

[0018] As another preferred solution, the height of the upper sealed cavity of the present invention is greater than the height of the lower sealed cavity.

[0019] As another preferred solution, the length of the upper sealed cavity of the present invention is greater than the length of the lower sealed cavity.

[0020] As another preferred embodiment, the thickness of the upper electrode plate (6) of the present invention is smaller than the thickness of the middle electrode plate (4) and the lower electrode plate (3).

[0021] As another preferred embodiment, the substrate (2) of the present invention is a single crystal silicon substrate.

[0022] Secondly, the lower portion of the lower electrode plate (3) of the present invention is a pressure inlet chamber (1), the lower electrode plate (3) is a pressure-sensitive electrode plate, the middle electrode plate (4) is a movable electrode plate, and the upper electrode plate (6) is a pressure-sensitive electrode plate.

[0023] In addition, the upper, middle and lower plates of the present invention are connected to an external circuit via pressure welding points and metal leads (8) or pressure welding points.

[0024] The present invention has beneficial effects.

[0025] When the structure of the present invention is used, the upper plate can be used as a pressure-sensitive plate, the upper plate (6) and the middle plate (4) form a pressure-sensitive variable capacitor, and the middle plate (4) and the lower plate (3) form a pressure-sensitive constant capacitor. The two capacitors are connected to form a differential capacitor structure, which is resistant to common-mode interference signals and has better output characteristics. Compared with the currently commonly used planar arrangement differential capacitor structure chip, the present invention saves more chip area and can reduce the chip area by about one-half.

[0026] When the structure of the present invention is used, the upper, middle and lower plates can all be used as movable pressure-sensing plates to form a dual-contact capacitive pressure-sensitive chip with a movable middle plate, which can be assembled into a differential pressure sensor or an absolute pressure sensor. A suspended movable middle plate is provided in the structure, and external pressure can directly act on the lower plate. In this way, both the upper and lower plates can directly sense external pressure. During operation, the two plates will contact the dielectric layer on the middle plate and output two capacitance signals. When connected in parallel, the output capacitance value is larger, increasing the capacitance value change, thereby improving the sensitivity of the chip and improving the output characteristics. Both the upper and lower plates can directly sense external pressure and can be used in application scenarios where two different pressures need to be measured simultaneously, thereby improving chip integration, reducing the number of required chips, and reducing costs.

[0027] When the structure of the present invention is used, a substance whose dielectric constant changes with temperature can be set in the upper cavity and the lower cavity. The substance is connected to the outside world and can be used as a detection component of a thermometer. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The present invention is further described below with reference to the accompanying drawings and specific embodiments. The scope of protection of the present invention is not limited to the following description.

[0029] Figure 1 It is a structural schematic diagram of the present invention.

[0030] Figure 2 It is a schematic diagram of the differential capacitor structure formed by the present invention.

[0031] Figure 3 It is a schematic diagram of the differential bridge structure formed by the present invention.

[0032] Figure 4 It is a schematic diagram of the structure of the pressure chamber formed by setting a pad block in the present invention.

[0033] Figure 5 It is a schematic diagram of the structure of the pressure inlet cavity formed by arranging a through hole in the present invention.

[0034] Figure 6 This is a schematic structural diagram of the present invention in which the height of the upper sealed cavity is greater than the height of the lower sealed cavity.

[0035] Figure 7 This is a schematic structural diagram of the present invention in which the length of the upper sealed cavity is greater than the length of the lower sealed cavity.

[0036] Figure 8 This is a structural schematic diagram of the present invention in which the height of the upper sealed cavity is greater than the height of the lower sealed cavity; at the same time, the length of the upper sealed cavity is greater than the length of the lower sealed cavity.

[0037] Figure 9 This is a structural schematic diagram of the present invention in which the thickness of the upper electrode plate is less than that of the middle electrode plate and the lower electrode plate.

[0038] Figure 10 It is a top view of the present invention.

[0039] Figure 11 yes Figure 10 AA' cross-section diagram.

[0040] Figure 12 It is a top view of the chip after the pressure cavity is etched into the single crystal silicon substrate of the present invention.

[0041] Figure 13 It is a cross-sectional view of a chip array formed by combining multiple chips of the present invention in parallel.

[0042] Figure 14 The output characteristic curve of the double-contact capacitive pressure sensitive chip with a movable intermediate plate and a measuring range of 100 kPa in the embodiment of the present invention is shown in FIG. Figure 11 output characteristic curve of the structure).

[0043] Figure 15 The present invention adopts Figure 7 Output characteristic curve of the structure.

[0044] Figure 16 The present invention adopts Figure 6 Output characteristic curve of the structure.

[0045] Figure 17 The present invention adopts Figure 8 Output characteristic curve of the structure.

[0046] Figure 18 The present invention forms a differential capacitor structure (ie Figure 2 Response characteristic curve of the relationship between capacitance and pressure.

[0047] Figure 19 The present invention forms a differential bridge structure (ie Figure 3 Response characteristic curve of the relationship between capacitance and pressure.

[0048] Description of reference numerals:

[0049] 1. Pressure inlet cavity, 2. Silicon substrate, 3. Lower plate, 4. Middle plate, 5. Dielectric layer, 6. Upper plate, 7. Upper cavity, 8. Metal lead, 9. Lower cavity, 10. Pad, 11. Through hole.

[0050] The blocks in the lower part of the picture indicate the materials represented by different grayscale patterns. DETAILED DESCRIPTION

[0051] like Figure 1As shown, the present invention includes a lower plate (3), an intermediate plate (4), and an upper plate (6). A lower cavity (9) is formed between the lower plate (3) and the intermediate plate (4), and an upper cavity is formed between the upper plate (6) and the intermediate plate (4). The structure of the present invention can be constructed without a substrate. A support can be placed under the lower plate to directly erect the structure of the present invention so that the upper plate (6) and the lower plate (3) can simultaneously sense pressure. Alternatively, the structure chip can be erected and fixed so that the upper plate (6) and the lower plate (3) can directly sense pressure.

[0052] The upper cavity and the lower cavity are sealed cavities.

[0053] like Figure 2 As shown, the upper plate (6) and the lower plate (3) are connected to the leads of the first polarity, and the middle plate (4) is connected to the leads of the second polarity, and the first polarity is opposite to the second polarity; the middle plate (4) and the lower plate (3) are fixed plates, and the upper plate (6) is a pressure-sensitive plate. This structure forms a differential capacitor, improves measurement accuracy, shields common-mode signal interference, and reduces chip area. The upper, middle, and lower plates can be circular diaphragms, each with an effective radius of 200 μm, wherein the thickness of the upper plate (6) is 3 μm, the thickness of the middle plate (4) is 25 μm, and the thickness of the lower plate (3) is 25 μm. The height of the upper and lower cavities is 0.3 μm (the distance between the upper plate (6) and the dielectric layer on the middle plate (4) and the distance between the lower plate (3) and the dielectric layer on the middle plate (4)), and the thickness of the dielectric layer is 50 nm. For the pressure-sensitive chip with the above-mentioned size parameters, the response characteristic curve of the relationship between capacitance and pressure is obtained as shown below. Figure 18 As shown, the capacitance variation is 0-5pF.

[0054] like Figure 3As shown, the combination of the lower electrode plate (3), the middle electrode plate (4) and the upper electrode plate (6) is formed into two groups and arranged vertically; the lower electrode plate (3) of the upper group is the upper electrode plate (6) of the lower group; the upper electrode plate (6) of the upper group and the lower electrode plate (3) of the lower group are pressure-sensitive electrodes; the upper electrode plate (6) of the upper group, the lower electrode plate (3) of the upper group and the lower electrode plate (3) of the lower group are connected to a lead of a first polarity, and the middle electrode plate (4) of the upper group and the middle electrode plate (4) of the lower group are connected to a lead of a second polarity, the first polarity being opposite to the second polarity. This structure forms two differential capacitors connected to form a differential bridge; the performance of shielding common-mode signal interference is further improved, while the capacitance variation is increased, further improving the measurement accuracy, sensitivity and linearity; and further reducing the chip area. The upper plate group (6) and the lower plate group (3) are pressure-sensitive and movable, forming two differential capacitor structures, which are simultaneously connected into a bridge structure, resisting common-mode interference signals, having better output characteristics, and increasing the capacitance change, which is twice the capacitance change of a single differential capacitor structure. Under any equivalent manufacturing process conditions, compared with the currently commonly used planar arrangement differential capacitor structure chip, the present invention saves more chip area, and the chip area can be reduced by about three-quarters, which is about one-quarter of the area of ​​a differential capacitor bridge formed by four planar unfolded capacitors. The upper, middle and lower plates can be circular diaphragms, each with an effective diameter of 400 μm. The thickness of the upper plate (6) is 3 μm, the thickness of the middle plate (4) is 25 μm, the thickness of the lower plate (3) is 25 μm, the thickness of the middle plate (4) of the lower group is 25 μm, the thickness of the lower plate (3) of the lower group is 3 μm, and the height of the upper and lower group cavities is 0.3 μm (the distance between the upper plate (6) and the dielectric layer on the middle plate (4) and the distance between the lower plate (3) and the dielectric layer on the middle plate (4)). The thickness of the dielectric layer is 50 nm. For the pressure sensitive chip with the above size parameters, the response characteristic curve of the relationship between capacitance and pressure is obtained as follows: Figure 19 As shown, the capacitance variation is 0-10pF.

[0055] The upper plate (6) receives an electrical signal of a first polarity, and the lower plate (3) receives an electrical signal of a second polarity, the first polarity being opposite to the second polarity; the middle plate (4) receives no electrical signal; and both the upper plate (6) and the lower plate (3) are pressure-sensitive plates. The upper plate (6) and the lower plate (3) are pressure-sensitive plates, which can significantly improve sensitivity.

[0056] like Figure 4 As shown, a pad (10) is provided at the lower end of the substrate (2). The pad (10) is provided so that the atmosphere is connected to the opening in the middle of the substrate (2) (i.e., the pressure inlet chamber 1), so that the lower plate (3) senses pressure.

[0057] like Figure 5As shown, the outer end of the lower electrode plate (3) extends outward, and the outer end of the outward extension portion is arranged on the substrate (2). The outward extension portion is provided with a through hole (11). The through hole (11) is provided to connect the atmosphere with the opening in the middle of the substrate (2) (i.e., the pressure inlet chamber 1), so that the lower electrode plate (3) senses pressure. The height of the upper sealed cavity and the lower sealed cavity (9) can both be 0.6 μm.

[0058] like Figure 6 As shown, the height of the upper sealed cavity is greater than the height of the lower sealed cavity (9). The height of the upper sealed cavity can be 0.7 μm, and the height of the lower sealed cavity (9) can be 0.4 μm. This structure allows the lower plate and the middle plate to contact earlier, has a strong overload capacity, good linearity, high sensitivity, and better linearity of the output characteristic curve.

[0059] like Figure 7 As shown, the length of the upper sealed cavity is greater than the length of the lower sealed cavity (9). The length of the upper sealed cavity can be 115 μm, and the length of the lower sealed cavity (9) can be 60 μm. In this structure, the cross-sectional area of ​​the lower sealed cavity (9) is small, the upper plate and the middle plate contact earlier, and the linearity of the output characteristic curve is better.

[0060] like Figure 8 As shown, the height of the upper sealed cavity is greater than the height of the lower sealed cavity (9); at the same time, the length of the upper sealed cavity is greater than the length of the lower sealed cavity (9).

[0061] like Figure 9 As shown, the thickness of the upper plate (6) is less than the thickness of the intermediate plate (4) and the lower plate (3). The thickness of the upper plate (6) can be 2 μm, and the thickness of the intermediate plate (4) and the lower plate (3) can be 30 μm. The thickness of the intermediate plate (4) and the lower plate (3) is relatively large, and they sense pressure within the range but do not undergo obvious deformation. The capacitance C2 formed between the intermediate plate (4) and the lower plate (3) remains basically unchanged. At the same time, the upper plate (6) bends downward under pressure, and the capacitance C1 between the upper plate (6) and the intermediate plate (4) changes. C1 and C2 form a differential output, which has higher accuracy.

[0062] The substrate (2) is a single crystal silicon substrate.

[0063] like Figure 11 As shown, a dielectric layer (5) is provided on the intermediate plate (4) (the dielectric layer may be made of silicon dioxide, silicon nitride, etc. to achieve an insulating function). The lower plate (3) is provided on the substrate (2).

[0064] like Figure 11As shown, below the lower plate (3) is a pressure inlet chamber (1), the lower plate (3) is a pressure-sensitive plate, the middle plate (4) is a movable plate, and the upper plate (6) is a pressure-sensitive plate. External pressure can act on the lower plate (3) through the pressure inlet chamber (1). The lower plate (3) and the upper plate (6) arranged on the silicon substrate (2) can both directly sense external pressure. When external pressure exists, the upper plate (6) and the lower plate (3) will be deformed by the pressure at the same time and contact the dielectric layer on the middle plate (4), so that the capacitance value between the two plates and the middle plate (4) changes, thereby converting the pressure signal into a capacitance signal output. The upper plate (6) and the middle plate (4) constitute a pressure-sensitive variable capacitor, and the lower plate (3) and the middle plate (4) constitute a second pressure-sensitive variable capacitor. When external pressure acts on the upper and lower plates (3), the chip can output two capacitance signals.

[0065] like Figure 11 As shown, the upper, middle and lower plates are connected to an external circuit via pressure welding points and metal leads (8). The upper, middle and lower plates can be connected to an external circuit via pressure welding points and metal leads to form a pressure detection circuit, which converts the pressure signal into an electrical signal for output. The chip can be assembled into a differential pressure sensor. When the upper plate (6) and the lower plate (3) are in different pressure environments, the plate in the higher pressure environment will first contact the middle plate (4), causing the middle plate (4) to deform as the plate deforms. The two plates form a linkage effect, forming a first capacitance signal. Thereafter, the other plate in the lower pressure environment contacts the middle plate (4), forming a second capacitance signal.

[0066] The chip can be assembled into a differential pressure sensor. When the upper plate (6) and the lower plate (3) are in different pressure environments, the contact areas between the two plates and the middle plate (4) are different, and the sensitive chip outputs two capacitance signals of different sizes.

[0067] The chip can be assembled into an absolute pressure sensor. When the upper plate (6) and the lower plate (3) are in the same pressure environment, the two plates will contact the middle plate (4) at the same time, and the contact areas are the same, and the sensitive chip outputs two capacitance signals of the same size.

[0068] The double-contact capacitive pressure-sensitive chip with a movable middle plate (4) of the present invention can be designed to have any desired shape, such as square, rectangular, circular, annular, etc., and can also be designed to form a chip array with two or more basic structural units connected in parallel.

[0069] like Figure 11As shown, the upper, middle, and lower plates in the structure of the present invention can all be pressure-sensitive movable structures. A pressure inlet chamber is provided below the lower plate (3), and external pressure can act on the lower plate (3) through the pressure inlet chamber, so that the lower plate (3) and the upper plate (6) can directly sense the external pressure. When external pressure exists, the upper plate (6) and the lower plate (3) will be deformed by the pressure at the same time, and come into contact with the dielectric layer on the middle plate (4), so that the capacitance value between the two plates and the middle plate (4) changes. The upper, middle, and lower plates are connected to the external circuit through pressure welding points and metal leads, and the pressure signal is converted into an electrical signal output.

[0070] When external pressure is present, the upper and lower plates (3) will simultaneously bend and deform under the pressure, and the distance between the two plates and the middle plate (4) will change, thereby changing the capacitance value. When the pressure is greater than a certain pressure value, that is, the contact pressure, the upper plate (6) and the lower plate (3) begin to contact the dielectric layer on the middle plate (4). During this process, the contact area increases at a nearly constant growth rate, making the contact capacitance value quickly much greater than the non-contact capacitance value, and the measured capacitance is mainly the contact capacitance. Therefore, within this pressure range, the sensor exhibits superior linearity and higher output capacitance value, improving the performance of the sensor.

[0071] like Figure 11 As shown, the double-contact capacitive pressure sensitive structure with a movable intermediate plate (4) proposed by the present invention is used to design an absolute pressure sensor with a measuring range of 100 kPa. Its main structural parameters are as follows:

[0072] The upper, middle and lower plates can be circular diaphragms, and their effective radius is 115 μm. Among them, the thickness of the upper plate (6) is 2 μm, the thickness of the middle plate (4) is 5 μm, and the thickness of the lower plate (3) is 2 μm. The height of the upper and lower cavities is 0.6 μm (the distance between the upper plate (6) and the dielectric layer on the middle plate (4) and the distance between the lower plate (3) and the dielectric layer on the middle plate (4)), and the thickness of the dielectric layer is 50 nm.

[0073] For the pressure sensitive chip with the above size parameters, the finite element software is used to perform simulation analysis and obtain the response characteristic curve of the relationship between capacitance and pressure as shown below: Figure 14As shown. The output characteristic curve of the sensor can be divided into four working areas: non-contact area, transition area, linear area and nonlinear contact area: when the pressure acting on the upper and lower plates (3) is very small, the upper and lower plates (3) do not contact the middle plate (4), and the pressure sensitive structure works in the non-contact area, i.e., area I, with a pressure range of about 0 to 25 kPa; as the pressure increases, the upper and lower plates (3) begin to contact the dielectric layer on the middle plate (4), and the working area enters the transition area, i.e., area II, with a pressure range of about 25 kPa to 35 kPa, and the output capacitance is still nonlinear; when the pressure continues to increase, the output capacitance quickly increases linearly, and the pressure sensitive structure also enters the linear working area, i.e., area III, with a pressure range of about 35 kPa to 100 kPa; finally, as the pressure continues to increase, the increase in contact area will be limited by the size, the growth rate of capacitance gradually slows down, and the working area enters the nonlinear contact area, i.e., area IV.

[0074] The designed sensor has a linear pressure range of approximately 35 kPa to 100 kPa, a nonlinearity of approximately 1.5% FS, a sensitivity of approximately 0.12 pF / kPa, and a maximum capacitance output value of approximately 12 pF.

[0075] The dual-contact capacitive pressure sensitive chip with a movable intermediate plate (4) proposed in the present invention can be used for measuring absolute pressure and differential pressure in a variety of fields such as consumer electronics, automotive electronics, industrial measurement and control, medical electronics, aerospace, and national defense and military industries.

[0076] like Figure 11 As shown, the present invention discloses a dual-contact capacitive pressure-sensitive chip with a movable intermediate plate (4). The chip includes a silicon substrate engraved with a pressure-intake cavity, a pressure-sensitive upper plate (6), a movable intermediate plate (4), a pressure-sensitive lower plate (3), a dielectric layer, and a sealed cavity. The upper, middle, and lower plates of the sensitive chip are all pressure-sensitive and movable. By setting a pressure-intake cavity in the structure, external pressure can act on the lower plate (3) through the pressure-intake cavity. When external pressure exists, the upper and lower plates (3) will be deformed by the pressure at the same time, contacting the dielectric layer on the intermediate plate (4), causing the capacitance value between the two plates and the intermediate plate (4) to change. The three plates are connected to an external circuit through a pressure welding point to form a pressure detection circuit, which converts the pressure signal into an electrical signal for output. The pressure-sensitive chip has the advantages of high sensitivity, good linearity, a large linear range, small temperature drift, strong overload capacity, and a manufacturing process compatible with integrated circuit technology.

[0077] The present invention discloses a dual-contact capacitive pressure-sensitive chip with a movable intermediate plate, which can be assembled into a differential pressure sensor or an absolute pressure sensor. The structure includes a suspended, movable intermediate plate and a pressure inlet chamber. External pressure can act on the lower plate through the pressure inlet chamber, allowing both the upper and lower plates to directly sense external pressure. During operation, the two plates contact the dielectric layer on the intermediate plate, outputting two capacitance signals, thereby increasing the chip's sensitivity and improving its output characteristics. When the chip is assembled into a differential pressure sensor, the upper and lower plates are placed in different pressure environments. The plate in the higher pressure environment first contacts the intermediate plate. As pressure increases, the intermediate plate deforms in response to the deformation of the plate, regulating its motion. The two plates form a linked effect, generating a first capacitance signal. Subsequently, the other plate in the lower pressure environment contacts the intermediate plate, generating a second capacitance signal. At this point, the contact areas between the two plates and the intermediate plate are different, and the sensitive chip outputs two capacitance signals of different magnitudes. By analyzing and processing these two capacitance signals, the pressure difference between the two plates' environments can be obtained. When the chip is assembled into an absolute pressure sensor, with the upper and lower plates in the same pressure environment, both plates simultaneously contact the middle plate over the same contact area. The sensitive chip outputs two capacitance signals of equal magnitude. Compared to conventional contact-type pressure-sensitive chips, the output capacitance and sensitivity can be doubled within the same chip area. Consequently, the pressure-sensitive chip exhibits higher sensitivity and superior output characteristics, improving sensor performance and making it particularly suitable for the development of high-precision pressure sensors.

[0078] The present invention can be applied to pressure detection, silicon microphones, hygrometers, accelerometers, flow meters, etc.

[0079] It can be understood that the above specific description of the present invention is only used to illustrate the present invention and is not limited to the technical solutions described in the embodiments of the present invention. Those skilled in the art should understand that the present invention can still be modified or replaced by equivalents to achieve the same technical effects; as long as the use requirements are met, they are within the scope of protection of the present invention.

Claims

1. A capacitive chip structure, comprising a lower plate (3), an intermediate plate (4) and an upper plate (6), wherein a lower cavity is formed between the lower plate (3) and the intermediate plate (4), and an upper cavity is formed between the upper plate (6) and the intermediate plate (4), characterized in that: The upper, middle, and lower plates are all movable plates, forming a dual-contact capacitive pressure-sensitive chip with a movable middle plate, which is assembled into a differential pressure sensor or an absolute pressure sensor. A suspended movable middle plate is provided in the structure, and external pressure directly acts on the lower plate. Both the upper and lower plates directly sense external pressure. During operation, the two plates contact the dielectric layer on the middle plate, outputting two capacitance signals. The combination of the lower electrode plate (3), the middle electrode plate (4) and the upper electrode plate (6) is a plurality of groups arranged vertically; the lower electrode plate (3) of the upper group is the upper electrode plate (6) of the adjacent lower group; the upper electrode plate (6) of the uppermost group and the lower electrode plate (3) of the lowermost group are pressure-sensitive movable electrodes; the upper electrode plate (6) of the upper group, the lower electrode plate (3) of the upper group and the lower electrode plate (3) of the adjacent lower group are connected to an electrical signal of a first polarity, and the middle electrode plate (4) of the upper group and the middle electrode plate (4) of the adjacent lower group are connected to an electrical signal of a second polarity, the first polarity being opposite to the second polarity; two differential capacitors are formed to form a differential capacitor. The invention relates to a bridge; or a combination of a lower electrode plate (3), an intermediate electrode plate (4) and an upper electrode plate (6) into multiple groups, which are arranged vertically; the intermediate electrode plate (4) of the upper group is the upper electrode plate (6) of the adjacent lower group; the lower electrode plate (3) of the upper group is the intermediate electrode plate (4) of the adjacent lower group; the upper electrode plate (6) of the uppermost group and the lower electrode plate (3) of the lowermost group are pressure-sensitive movable electrodes; the upper electrode plate (6) of the upper group and the lower electrode plate (3) of the upper group are connected to an electrical signal of a first polarity, and the intermediate electrode plate (4) of the upper group and the lower electrode plate (3) of the adjacent lower group are connected to an electrical signal of a second polarity, and the first polarity is opposite to the second polarity.

2. A capacitive chip structure according to claim 1, characterized in that The upper cavity and the lower cavity are sealed cavities.

3. A capacitive chip structure according to claim 1, characterized in that The combination of the lower electrode plate (3), the middle electrode plate (4) and the upper electrode plate (6) is formed into two groups and arranged vertically; the lower electrode plate (3) of the upper group is the upper electrode plate (6) of the lower group; the upper electrode plate (6) of the upper group and the lower electrode plate (3) of the lower group are pressure-sensitive movable electrodes; the upper electrode plate (6) of the upper group, the lower electrode plate (3) of the upper group and the lower electrode plate (3) of the lower group are connected to an electrical signal of a first polarity, and the middle electrode plate (4) of the upper group and the middle electrode plate (4) of the lower group are connected to an electrical signal of a second polarity, the first polarity being opposite to the second polarity.

4. A capacitive chip structure according to claim 1, characterized in that A dielectric layer (5) is provided on the intermediate electrode plate (4); the capacitive chip further comprises a substrate (2), and the substrate (2) is a single crystal silicon substrate.

5. The capacitive chip structure according to claim 1, characterized in that The lower electrode plate (3) is arranged on the substrate (2); a pad is provided at the lower end of the substrate (2); Or a pad is provided at the lower end of the lower electrode plate (3).

6. A capacitive chip structure according to claim 4, characterized in that The substrate is provided with a through hole to form a pressure chamber to enable the lower plate to sense pressure; Or the outer end of the lower electrode plate (3) extends outward, the outer end of the outward extension portion is arranged on the substrate (2), and a through hole is provided on the outward extension portion to form a pressure inlet cavity to enable the lower electrode plate to sense pressure.

7. The capacitive chip structure according to claim 2, characterized in that The height of the upper sealed cavity is greater than that of the lower sealed cavity; Or the length of the upper sealed cavity is greater than the length of the lower sealed cavity.

8. The capacitive chip structure according to claim 1, characterized in that The upper, middle and lower plates are connected to an external circuit via pressure welding points and metal leads (8) or pressure welding points.

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