Method, system, storage medium and electronic device for implementing division operation on MCU

Abstract

The application discloses a method and system for implementing division operation on MCU, a storage medium and electronic equipment, wherein a dividend A and a divisor B are integers, a binary division operation is to be performed, and the method comprises the following steps: determining whether the dividend A is greater than or equal to the divisor B, if not, a quotient C is 0, if yes, the divisor B is assigned to B1, B1 is compared with the dividend A, the optimal shift number i of the divisor B1 is determined through continuous left shift of B1 and repeated comparison, the dividend A is compared with B1, then the dividend A is assigned to the result of subtraction, 1 is left shifted by the shift number i, then the quotient C is added to the result of left shift, and the quotient C is assigned to the result of addition, B1 is right shifted by the shift number i minus 1, and the operation is repeatedly performed until the dividend A is equal to 0 or the dividend A is less than the divisor B, so that the final quotient C is obtained. The application saves the device cost, helps to improve the competitiveness of products, greatly improves the operation efficiency of division, limits the error to be very small, and can be practically applied.

Description

Technical Field

[0001] The present invention relates to the technical field of embedded systems, and in particular to a method, system, storage medium and electronic device for implementing division operations on an MCU. Background Art

[0002] In an embedded system, due to the high cost sensitivity of products, MCUs with limited resources are usually selected to save costs. These MCUs can meet the needs of the vast majority of applications, but in some cases, division operations are required. For example, a correction factor is obtained by dividing an actual measurement value by a theoretical value to correct certain parameters or curves. Unfortunately, inexpensive MCUs do not have a built-in floating-point arithmetic unit, or the compiler does not support division operations, or there are defects, such as a too small supported range or poor precision. If a division-supported MCU is replaced for this reason, not only will the cost increase, but also due to the change in the MCU architecture, the development workload will increase, delaying the time to market of the product and missing business opportunities.

[0003] Even if the MCU or the compiler does not directly support division operations, there are still ways to achieve the effect of division. Assume that A is the dividend A, B is the divisor B, and the actual division is to solve for the quotient C of A divided by B. Obviously, there is a precision factor in division, because for operations that cannot be divided exactly, how many decimal places are retained has a direct impact on the precision of the quotient C. To implement division on a computer, it is necessary to minimize the operation overhead as much as possible under the premise of meeting the precision requirements. These overheads include workload, time, and storage space, which are several mutually restrictive indicators. Compromises need to be made during application to select the best solution that can be accepted for each indicator.

[0004] To implement integer division on a computer, the basic principle of this technology is subtraction counting. The quotient C is actually the integer division result of A divided by B without a decimal part. The algorithm description is as follows (assuming B is not 0, and both A and B are positive integers):

[0005] a. First, assign C = 0;

[0006] b. Compare A and B. If A < B, return C;

[0007] c. If A is greater than or equal to B, then assign A = A - B, and at the same time increment C by 1; otherwise, return C;

[0008] d. Jump to b and execute

[0009] Therefore, the quotient C is the count of continuously subtracting B from A until A is reduced to less than B.

[0010] The above is called the "basic algorithm". It is simple and easy to understand, but it is very inefficient because the quotient C is a counter value. The larger the value, the more times the counting loop is performed, and the operation time increases linearly with the value of C. When the range of values ​​of A and B is very large, the time consumed by this counting operation is too different and may be too long, making division infeasible. Therefore, it is only suitable for division of data types with a small range.

[0011] Another problem with the "basic algorithm" is its poor computational precision. Because it cannot calculate to decimals and can only round to the nearest integer, the error in the quotient C will be very large when the value of B is very large, since the remainder can be as large as B-1. This renders the calculation result useless in practical terms. Summary of the Invention

[0012] The technical problem to be solved by this invention is to address at least one defect of the related technologies mentioned in the background: inexpensive MCUs do not have a built-in floating-point arithmetic unit, or the compiler does not support division operations, or has defects. If the MCU is replaced with one that supports division, it will not only increase the cost, but also increase the development workload due to the change in MCU architecture, delay the product launch time, and miss business opportunities; the basic division algorithm is very inefficient. This invention provides a method, system, storage medium, and electronic device for implementing division operations on an MCU.

[0013] The technical solution adopted by this invention to solve its technical problem is: to construct a method for implementing division operation on an MCU, where the dividend A and divisor B are integers, and binary division operation is to be performed, including the following steps:

[0014] S0: Determine whether the dividend A is greater than or equal to the divisor B. If not, the quotient C is 0; if yes, execute S1.

[0015] S1: Assign the divisor B to B1, compare B1 with the dividend A, and determine the optimal shift number i of B1 by continuously shifting B1 to the left and incrementing the shift number i by 1 accordingly.

[0016] S2: By comparing the dividend A with B1 and subtracting the result, the result is assigned to the dividend A. At the same time, 1 is shifted left by the shift number i by the step size and added to the quotient C and assigned to the quotient C. Then, B1 is shifted right and the shift number i is subtracted by 1. This process is repeated until the dividend A is equal to 0 or the dividend A is less than the divisor B, thus obtaining the final quotient C.

[0017] Preferably, in the method for implementing division operation on an MCU according to the present invention, step S1 includes:

[0018] S11: Assign the divisor B to B1, and set the initial values ​​of the shift number i and the quotient C to 0;

[0019] S12: Determine whether the dividend A is greater than or equal to B1 and whether the dividend A is less than twice B1. If not, proceed to S13; if yes, proceed to S15.

[0020] S13: Shift B1 left by 1 bit, and increment the shift number i by 1;

[0021] S14: Determine whether the shift has not reached the highest bit of B1. If yes, return to execute S12; otherwise, execute S15.

[0022] S15: Determine whether the shift number i is 0. If yes, return the quotient C as 1; otherwise, determine the shift number i of B1 and the left-shifted B1.

[0023] Preferably, in the method for implementing division operation on an MCU according to the present invention, step S2 includes:

[0024] S21: Determine whether the dividend A is greater than or equal to B1. If yes, proceed to S22; otherwise, proceed to S23.

[0025] S22: Subtract B1 from the dividend A and assign the result to the dividend A; shift 1 to the left by the shift number i and add it to the quotient C and assign the result to the quotient C.

[0026] S23: Shift B1 to the right by 1 bit, and decrease the shift number i by 1;

[0027] S24: Determine whether the dividend A is equal to 0 or whether the dividend A is less than the divisor B. If yes, obtain the final quotient C; otherwise, return to execute S21.

[0028] Preferably, in the method for implementing division operations on an MCU according to the present invention, the method further includes:

[0029] When a correction coefficient is needed, the dividend A is shifted left by N bits, and then a division operation is performed with the divisor B to obtain the quotient k.

[0030] Multiply the value to be corrected by the quotient k and then shift it to the right by N bits to obtain the corrected value.

[0031] This invention also constructs a system for implementing division operations on an MCU, where the dividend A and divisor B are integers, and binary division operations are to be performed, including:

[0032] The judgment module is used to determine whether the dividend A is greater than or equal to the divisor B. If not, the quotient C is 0; if so, the process jumps to the determination module.

[0033] The determination module is used to assign the divisor B to B1, compare B1 with the dividend A, and determine the optimal shift number i of B1 by continuously shifting B1 to the left and incrementing the shift number i by 1 accordingly and repeating the comparison.

[0034] The first calculation module is used to compare the dividend A with the B1, subtract the result and assign it to the dividend A, shift 1 to the left by the shift number i by a step size and add it to the quotient C and assign it to the quotient C, then shift B1 to the right and subtract the shift number i by 1, and repeat the process until the dividend A is equal to 0 or the dividend A is less than the divisor B, to obtain the final quotient C.

[0035] Preferably, in the system for implementing division operations on an MCU according to the present invention, the determining module includes:

[0036] An initialization unit is used to assign the divisor B to B1 and set the initial values ​​of the shift number i and the quotient C to 0.

[0037] The first judgment unit is used to determine whether the dividend A is greater than or equal to B1 and whether the dividend A is less than twice B1. If not, it jumps to the first operation unit and the second judgment unit; if yes, it jumps to the third judgment unit.

[0038] The first arithmetic unit is used to shift B1 left by 1 bit, and to increment the shift number i by 1;

[0039] The second judgment unit is used to determine whether the shift number i is less than the number of digits of the dividend A or the divisor B. If yes, it jumps to the first judgment unit; if no, it jumps to the third judgment unit.

[0040] The third judgment unit is used to determine whether the shift number i is 0. If it is, the quotient C is returned as 1; if not, the shift number i of B1 and the left-shifted B1 are determined.

[0041] Preferably, in the system for implementing division operations on an MCU according to the present invention, the first operation module includes:

[0042] The fourth judgment unit is used to determine whether the dividend A is greater than or equal to B1. If yes, it executes the second operation unit; if no, it executes the third operation unit and the fifth judgment unit.

[0043] The second operation unit is used to subtract B1 from the dividend A and assign the result to the dividend A, and to shift 1 to the left by the shift number i and add it to the quotient C and assign the result to the quotient C.

[0044] The third arithmetic unit is used to right-shift B1 by 1 bit, and decrease the shift number i by 1;

[0045] The fifth judgment unit is used to determine whether the dividend A is equal to 0 or whether the dividend A is less than the divisor B. If yes, the final quotient C is obtained; if no, the process jumps to the fourth judgment unit.

[0046] Preferably, in the system for implementing division operations on an MCU according to the present invention, the system further includes:

[0047] The second calculation module is used to shift the dividend A to the left by N bits and then perform a division operation with the divisor B to obtain the quotient k when a correction coefficient needs to be calculated.

[0048] The third calculation module is used to multiply the value to be corrected by the quotient k and then shift it to the right by N bits to obtain the corrected value.

[0049] The present invention also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the method for implementing division operations on an MCU as described in any of the preceding claims.

[0050] The present invention also constructs an electronic device comprising:

[0051] One or more processors;

[0052] A storage device for storing one or more programs, which, when executed by one or more processors, cause the one or more processors to implement the method of performing division operations on an MCU as described in any of the preceding claims.

[0053] By implementing this invention, the following beneficial effects are achieved:

[0054] This invention implements division on resource-constrained MCUs through subtraction and shift operations. It addresses the problem that inexpensive MCUs often lack built-in floating-point units or cannot directly perform division operations due to compiler limitations. This saves on device costs, eliminates the need to replace the MCU, meets development requirements, and enhances product competitiveness. Furthermore, it significantly improves the efficiency of division operations while minimizing errors, making it suitable for practical applications. Attached Figure Description

[0055] The present invention will be further described below with reference to the accompanying drawings and embodiments. In the accompanying drawings:

[0056] Figure 1 This is a flowchart of the method for implementing division operations on an MCU according to the present invention;

[0057] Figure 2 This is a detailed flowchart of steps S1 and S2 in the method of implementing division operation on MCU of the present invention;

[0058] Figure 3 This is a flowchart of a method for implementing division operations and calculating correction coefficients on an MCU in some other embodiments of the present invention;

[0059] Figure 4 This is a system module block diagram of the present invention for implementing division operations on an MCU;

[0060] Figure 5 This is a system module block diagram of implementing division operations and calculating correction coefficients on an MCU in some other embodiments of the present invention. Detailed Implementation

[0061] To provide a clearer understanding of the technical features, objectives, and effects of the present invention, specific embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0062] It should be noted that the flowcharts shown in the accompanying drawings are merely illustrative and do not necessarily include all content and operations / steps, nor do they necessarily have to be performed in the described order. For example, some operations / steps can be broken down, while others can be combined or partially combined; therefore, the actual execution order may change depending on the specific circumstances.

[0063] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically independent entities. That is, these functional entities can be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0064] like Figure 1 As shown, one embodiment of the present invention discloses a method for implementing division operations on an MCU, where the dividend A and divisor B are integers, and a binary division operation is to be performed, including the following steps:

[0065] S0: Determine if the dividend A is greater than or equal to the divisor B. If not, the quotient C is 0; if so, execute S1.

[0066] S1: Assign the divisor B to B1, compare B1 with the dividend A, and repeatedly compare by continuously shifting B1 to the left and incrementing the shift number i by 1 to determine the optimal shift number i of B1. Find the optimal shift position of B1 before the operation officially begins to avoid wasting operation time.

[0067] S2: Compare the dividend A with B1, subtract the result and assign it to the dividend A. At the same time, shift 1 to the left by the step size i and add it to the quotient C and assign it to the quotient C. Then shift B1 to the right and subtract the shift size i by 1. Repeat this process until the dividend A is equal to 0 or the dividend A is less than the divisor B, and obtain the final quotient C.

[0068] Specifically, in this embodiment, as Figure 2 shown, step S1 includes:

[0069] S11: Assign the divisor B to B1, and set the initial values of the shift number i and the quotient C to 0 (i.e., B1 = B, i = 0, C = 0);

[0070] S12: Determine whether the dividend A is greater than or equal to B1 and whether the dividend A is less than 2 times B1 (i.e., A≥B1, and A<2B1?), if not, then execute S13; if so, then execute S15;

[0071] S13: Shift B1 left by 1 bit, and increment the shift number i by 1 (i.e., shift B1 left by 1 bit, i++);

[0072] S14: Determine whether the shift has not reached the highest bit of B1, that is, whether the shift number i is less than the number of bits of the dividend A or the divisor B (for example, if the dividend A and the divisor B are 16-bit unsigned integers, then i<16?), if so, then return to execute S12; if not, then execute S15;

[0073] S15: Determine whether the shift number i is 0 (i.e., i=0?), if so, then return the quotient C as 1; if not, then determine the shift number i of B1 and B1 after left shift, and execute S21 below.

[0074] Completely, before step S11, there is also S10: Determine whether the dividend A is greater than or equal to the divisor B (i.e., A≥B?), if not, then the quotient C is 0; if so, then execute S11.

[0075] In this embodiment, as Figure 2 shown, step S2 includes:

[0076] S21: Determine whether the dividend A is greater than or equal to B1 (i.e., A≥B1?), if so, then execute S22; if not, then execute S23;

[0077] S22: Subtract B1 from the dividend A and assign the result to the dividend A, and add 1 shifted left by the shift number i to the quotient C and assign the result to the quotient C (i.e., A = A - B1, C += 1 << i); where, due to the nature of binary operations, after subtracting B1 from the dividend A, it must be A < B1 or A = 0;

[0078] S23: Shift B1 right by 1 bit, and decrement the shift number i by 1 (i.e., B1 = B1 >> 1, i--); where, in binary operations, shifting B1 right by 1 bit is equivalent to B1 / 2, in this way, the dividend A may be greater than B1 again;

[0079] S24: Determine whether the dividend A is equal to 0 or whether the dividend A is less than the divisor B (i.e., A=0 or A<B?). If yes, obtain the final quotient C; otherwise, return to execute S21.

[0080] In other embodiments, to address the limitation that the calculation precision is too poor, and it is impossible to take decimals, only integers, such as... Figure 3 As shown, the method further includes:

[0081] S3: When it is necessary to find the value of the correction coefficient or other value that needs to be used as the multiplication coefficient, shift the dividend A to the left by N bits, and then perform a division operation with the divisor B to obtain the quotient k;

[0082] S4: Multiply the value to be corrected by the quotient k and then shift it to the right by N bits to obtain the corrected value.

[0083] Specifically, for division operations involving determining correction coefficients (such as values ​​needed as multiplication coefficients), simply obtaining a decimal number with several decimal places as a correction coefficient, as in regular decimal arithmetic, is quite difficult in embedded systems. Even if it were possible, using this correction coefficient for subsequent multiplication operations would be very challenging, because multiplication and division with decimals are not easy to perform in embedded systems that do not support floating-point arithmetic.

[0084] This situation can be cleverly resolved using the following process:

[0085] When calculating the correction factor, the dividend A is intentionally shifted left by N bits (in binary arithmetic, this is equivalent to multiplying A by 2 to the power of N. When N is large, A is magnified many times over compared to its original value), and then divided with the divisor B. The resulting quotient k is used as the correction factor. The latter is still an integer, but it is 2 to the power of N times the quotient k obtained from the original value A / B. Through this magnification, details of several decimal places are preserved in a rounded manner.

[0086] When using the correction factor, multiplying the value to be corrected X by the quotient k (correction factor) obtained in the previous steps yields a result Y that is obviously a power of 2 times the expected result. Therefore, shifting Y to the right by N bits gives the desired correction value. This approach preserves the precision of several decimal places in the coefficient, ensuring that the error in the final result is within an acceptable range, achieving an effect comparable to a computer system with floating-point arithmetic capabilities.

[0087] For example, suppose the dividend A = 43, the divisor B = 11, the correction factor k = A / B = 3, and the remainder 10 is the error. If the value to be corrected X = 25, then the ideal value of the correction value Y = kX is 3.909 * 25 = 97.737, but the actual value of the correction value Y is 3 * 25 = 75.

[0088] If A is magnified 10000 times and then divided by B, the correction factor k = 10000 * A / B = 39090, with a remainder of 10. The correction value Y = kX = 977250. Then, Y is reduced to 1 / 10000 of its original value, resulting in 97.

[0089] The reason for this phenomenon is that in computers, division does not satisfy the commutative law because the remainder must be discarded. A workaround is to increase the dividend, then proportionally decrease the quotient after the division, thereby reducing the impact of discarding the remainder.

[0090] like Figure 4 As shown, one embodiment of the present invention discloses a system for implementing division operations on an MCU, where the dividend A and divisor B are integers, and a binary division operation is to be performed, including:

[0091] The judgment module is used to determine whether the dividend A is greater than or equal to the divisor B. If not, the quotient C is 0; if so, it jumps to the determination module.

[0092] The determination module is used to assign the divisor B to B1, compare B1 with the dividend A, and determine the optimal shift number i of B1 by continuously shifting B1 to the left and incrementing the shift number i by 1, and then repeating the comparison. This finds the optimal shift position of B1 before the operation officially begins, thus avoiding wasted computation.

[0093] The first operation module is used to compare the dividend A with B1, subtract the result and assign it to the dividend A. At the same time, 1 is shifted left by a step size i and added to the quotient C and assigned to the quotient C. Then, B1 is shifted right and the shift size i is reduced by 1. This process is repeated until the dividend A is equal to 0 or the dividend A is less than the divisor B, thus obtaining the final quotient C.

[0094] Specifically, in this embodiment, the determining module includes:

[0095] An initialization unit is used to assign the divisor B to B1 and set the initial values ​​of the shift number i and the quotient C to 0.

[0096] The first judgment unit is used to determine whether the dividend A is greater than or equal to B1 and whether the dividend A is less than twice B1. If not, it jumps to the first operation unit and the second judgment unit; if yes, it jumps to the third judgment unit.

[0097] The first arithmetic unit is used to shift B1 left by 1 bit and increment the shift number i by 1;

[0098] The second judgment unit is used to determine whether the shift has not reached the highest bit of B1, that is, whether the shift number i is less than the number of bits of the dividend A or the divisor B. If yes, it jumps to the first judgment unit; if no, it jumps to the third judgment unit.

[0099] A third judgment unit, configured to judge whether the shift number i is 0. If so, return the quotient C as 1; if not, determine the shift number i of B1 and B1 after left shift, and adjust to the following fourth judgment unit.

[0100] Specifically, the determination module further includes a sixth judgment unit, configured to judge whether the dividend A is greater than or equal to the divisor B. If not, the quotient C is 0; if so, jump to the initialization unit.

[0101] In this embodiment, the first operation module includes:

[0102] A fourth judgment unit, configured to judge whether the dividend A is greater than or equal to B1. If so, execute a jump to the second operation unit; if not, execute the third operation unit and the fifth judgment unit;

[0103] A second operation unit, configured to assign the result of subtracting B1 from the dividend A to the dividend A, and add the result of shifting 1 to the left by the shift number i to the quotient C and then assign the result to the quotient C; wherein, due to the nature of binary operations, the result of subtracting B1 from the dividend A must be A < B1 or A = 0;

[0104] A third operation unit, configured to shift B1 to the right by 1 bit and subtract 1 from the shift number i; wherein, in binary operations, shifting B1 to the right by 1 bit is equivalent to B1 / 2. In this way, the dividend A may be greater than B1 again;

[0105] A fifth judgment unit, configured to judge whether the dividend A is equal to 0 or whether the dividend A is less than the divisor B. If so, obtain the final quotient C; if not, jump to the fourth judgment unit.

[0106] In some other embodiments, to solve the limitation that the calculation accuracy is too poor to obtain a decimal number and only an integer can be obtained, as Figure 5 shown, the system further includes:

[0107] A second operation module, configured to, when a value such as a correction coefficient needs to be obtained for use as a multiplication coefficient, shift the dividend A to the left by N bits, and then perform a division operation with the divisor B to obtain a quotient k;

[0108] A third operation module, configured to multiply the value to be corrected by the quotient k and then shift the result to the right by N bits to obtain a corrected value.

[0109] Specifically, for some division operations for obtaining a correction coefficient (for example, a value used as a multiplication coefficient), simply obtaining a decimal number with several digits after the decimal point as the correction coefficient as in normal decimal operations is quite difficult in an embedded system. Even if it can be achieved, it is also very difficult to use this correction coefficient in subsequent multiplication operations because in an embedded system that does not support floating-point operations, multiplication and division with decimal numbers are not easy to perform.

[0110] This situation can be cleverly resolved using the following process:

[0111] When calculating the correction factor, the dividend A is intentionally shifted left by N bits (in binary arithmetic, this is equivalent to multiplying A by 2 to the power of N. When N is large, A is magnified many times over compared to its original value), and then divided with the divisor B. The resulting quotient k is used as the correction factor. The latter is still an integer, but it is 2 to the power of N times the quotient k obtained from the original value A / B. Through this magnification, details of several decimal places are preserved in a rounded manner.

[0112] When using the correction factor, multiplying the value to be corrected X by the quotient k (correction factor) obtained in the previous steps yields a result Y that is obviously a power of 2 times the expected result. Therefore, shifting Y to the right by N bits gives the desired correction value. This approach preserves the precision of several decimal places in the coefficient, ensuring that the error in the final result is within an acceptable range, achieving an effect comparable to a computer system with floating-point arithmetic capabilities.

[0113] For example, suppose the dividend A = 43, the divisor B = 11, the correction factor k = A / B = 3, and the remainder 10 is the error. If the value to be corrected X = 25, then the ideal value of the correction value Y = kX is 3.909 * 25 = 97.737, but the actual value of the correction value Y is 3 * 25 = 75.

[0114] If A is magnified 10000 times and then divided by B, the correction factor k = 10000 * A / B = 39090, with a remainder of 10. The correction value Y = kX = 977250. Then, Y is reduced to 1 / 10000 of its original value, resulting in 97.

[0115] The reason for this phenomenon is that in computers, division does not satisfy the commutative law because the remainder must be discarded. A workaround is to increase the dividend, then proportionally decrease the quotient after the division, thereby reducing the impact of discarding the remainder.

[0116] One embodiment of the present invention discloses a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the method for implementing division operations on an MCU as described in the above embodiment.

[0117] One embodiment of the present invention discloses an electronic device, comprising:

[0118] One or more processors;

[0119] A storage device for storing one or more programs, which, when executed by one or more processors, cause the one or more processors to implement the method of performing division operations on an MCU as described in the above embodiments.

[0120] It should be noted that regardless of the MCU type—8-bit, 16-bit, 32-bit, or even 64-bit—and whether it has a built-in floating-point unit or whether the compiler fully supports multiplication and division, all are protected. Furthermore, the data types involved in the calculations are not limited to the 16-bit unsigned integer type mentioned in the algorithm description above, but also include user-defined data types, such as signed integers, all of which are protected. Additionally, for coefficient operations, intentionally amplifying the result by N and then reducing it to 1 / N after actual execution to obtain the correct result, regardless of the size of N chosen, and whether the amplification / reduction is achieved through shifting or multiplication / division, is also protected.

[0121] By implementing this invention, the following beneficial effects are achieved:

[0122] This invention implements division on resource-constrained MCUs through subtraction and shift operations. It addresses the problem that inexpensive MCUs often lack built-in floating-point units or cannot directly perform division operations due to compiler limitations. This saves on device costs, eliminates the need to replace the MCU, meets development requirements, and enhances product competitiveness. Furthermore, it significantly improves the efficiency of division operations while minimizing errors, making it suitable for practical applications.

[0123] It is understood that the above embodiments only illustrate some implementation methods of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the present invention. It should be noted that for those skilled in the art, without departing from the concept of the present invention, the above embodiments or technical features can be freely combined, and several modifications and improvements can be made. These all fall within the protection scope of the present invention. That is, the embodiments described "in some embodiments" can be freely combined with any of the embodiments above and below. Therefore, all equivalent transformations and modifications made within the scope of the claims of the present invention should fall within the scope of the claims of the present invention.

Claims

1. A method for implementing division operations on an MCU, characterized in that, If the dividend A and divisor B are integers, to perform binary division, the following steps are required: S0: Determine whether the dividend A is greater than or equal to the divisor B. If not, the quotient C is 0; if yes, execute S1. S1: Assign the divisor B to B1, compare B1 with the dividend A, and determine the optimal shift number i of B1 by continuously shifting B1 to the left and incrementing the shift number i by 1 accordingly. S2: By comparing the dividend A with B1 and subtracting the result, the result is assigned to the dividend A. At the same time, 1 is shifted to the left by the shift number i by the step size and added to the quotient C and assigned to the quotient C. Then, B1 is shifted to the right and the shift number i is subtracted by 1. This process is repeated until the dividend A is equal to 0 or the dividend A is less than the divisor B, thus obtaining the final quotient C. Step S1 includes: S11: Assign the divisor B to B1, and set the initial values ​​of the shift number i and the quotient C to 0; S12: Determine whether the dividend A is greater than or equal to B1 and whether the dividend A is less than twice B1. If not, proceed to S13; if yes, proceed to S15. S13: Shift B1 left by 1 bit, and increment the shift number i by 1; S14: Determine whether the shift has not reached the highest bit of B1. If yes, return to execute S12; otherwise, execute S15. S15: Determine whether the shift number i is 0. If yes, return the quotient C as 1. If no, determine the shift number i of B1 and the left-shifted B1. Step S2 includes: S21: Determine whether the dividend A is greater than or equal to B1. If yes, proceed to S22; otherwise, proceed to S23. S22: Subtract B1 from the dividend A and assign the result to the dividend A; shift 1 to the left by the shift number i and add it to the quotient C and assign the result to the quotient C. S23: Shift B1 to the right by 1 bit, and decrease the shift number i by 1; S24: Determine whether the dividend A is equal to 0 or whether the dividend A is less than the divisor B. If yes, obtain the final quotient C; otherwise, return to execute S21. The method further includes: When a correction coefficient is needed, the dividend A is shifted left by N bits, and then a division operation is performed with the divisor B to obtain the quotient k. Multiply the value to be corrected by the quotient k and then shift it to the right by N bits to obtain the corrected value.

2. A system for implementing division operations on an MCU, characterized in that, If the dividend A and divisor B are integers, binary division operations are required, including: The judgment module is used to determine whether the dividend A is greater than or equal to the divisor B. If not, the quotient C is 0; if so, the process jumps to the determination module. The determination module is used to assign the divisor B to B1, compare B1 with the dividend A, and determine the optimal shift number i of B1 by continuously shifting B1 to the left and incrementing the shift number i by 1 accordingly and repeating the comparison. The first calculation module is used to compare the dividend A with the B1, subtract the result and assign it to the dividend A, shift 1 to the left by the shift number i by a step size and add it to the quotient C and assign it to the quotient C, then shift B1 to the right and subtract the shift number i by 1, and repeat the process until the dividend A is equal to 0 or the dividend A is less than the divisor B, to obtain the final quotient C; The determining module includes: An initialization unit is used to assign the divisor B to B1 and set the initial values ​​of the shift number i and the quotient C to 0. The first judgment unit is used to determine whether the dividend A is greater than or equal to B1 and whether the dividend A is less than twice B1. If not, it jumps to the first operation unit and the second judgment unit; if yes, it jumps to the third judgment unit. The first arithmetic unit is used to shift B1 left by 1 bit, and to increment the shift number i by 1; The second judgment unit is used to determine whether the shift has not reached the highest bit of B1. If so, it jumps to the first judgment unit; if not, it jumps to the third judgment unit. The third judgment unit is used to determine whether the shift number i is 0. If it is, the quotient C is returned as 1; if not, the shift number i of B1 and the left-shifted B1 are determined. The first computing module includes: The fourth judgment unit is used to determine whether the dividend A is greater than or equal to B1. If yes, it executes the second operation unit; if no, it executes the third operation unit and the fifth judgment unit. The second operation unit is used to subtract B1 from the dividend A and assign the result to the dividend A, and to shift 1 to the left by the shift number i and add it to the quotient C and assign the result to the quotient C. The third arithmetic unit is used to right-shift B1 by 1 bit, and decrease the shift number i by 1; The fifth judgment unit is used to determine whether the dividend A is equal to 0 or whether the dividend A is less than the divisor B. If yes, the final quotient C is obtained; if no, the process jumps to the fourth judgment unit. The system also includes: The second calculation module is used to shift the dividend A to the left by N bits and then perform a division operation with the divisor B to obtain the quotient k when a correction coefficient needs to be calculated. The third calculation module is used to multiply the value to be corrected by the quotient k and then shift it to the right by N bits to obtain the corrected value.

3. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the method for performing division operations on the MCU as described in claim 1.

4. An electronic device, characterized in that, include: One or more processors; A storage device for storing one or more programs, which, when executed by one or more processors, cause the one or more processors to implement the method for implementing division operations on an MCU as described in claim 1.

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