Multi-layer gallium nitride switch device with common source and common gate structure and chip

Abstract

The application relates to a multi-layer gallium nitride switch device and chip with a common-source common-gate structure. The multi-layer gallium nitride switch device with the common-source common-gate structure comprises a first N-type drift layer, a first buffer layer, a first gallium nitride channel layer, a multi-layer second gallium nitride channel layer, a switch drain, a connecting metal layer, a HEMT gate, a P-type drift layer, a second N-type drift layer, a switch gate and a switch source, so as to construct a normally-on high electron mobility transistor and a normally-off metal-oxide semiconductor field effect transistor and form a common-source common-gate structure. The D-HEMT with the multi-layer gallium nitride channel layer can withstand high voltage and has a relatively high current density, and the MOSFET undertakes a switching function, so that the switch drain and the switch source can be completely turned off, and the D-HEMT with the multi-layer gallium nitride channel layer and the MOSFET are complementary.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of semiconductor devices, and particularly relates to a multi-layer gallium nitride switch device with a common-source common-gate structure and a chip. BACKGROUND

[0002] At present, a switch device constructed of a gallium nitride material has many excellent characteristics, and its voltage resistance capability has been one of the pain points of application. If the thickness of a channel layer (N-type gallium nitride) is increased to improve the voltage resistance, the switch device finally obtained also only has one two-dimensional electron gas (2DEG), and the current density of the single-layer two-dimensional electron gas is too low.

[0003] In the prior art, a device structure with a multi-layer GaN channel is proposed, which simultaneously meets the requirements of voltage resistance and current density. However, the device structure with a multi-layer GaN channel has a problem that the device structure with a multi-layer GaN channel cannot be completely turned off. Usually, only the uppermost two-dimensional electron gas can be controlled, the channel of the two-dimensional electron gas cannot be completely broken by voltage, and a negative voltage needs to be applied to turn off the device. Meanwhile, the device also generates large loss when it is turned off. SUMMARY

[0004] The application aims to provide a multi-layer gallium nitride switch device with a common-source common-gate structure and a chip, and aims to solve the problem that a conventional switch device constructed of a gallium nitride material cannot simultaneously meet the requirements of voltage resistance and current density.

[0005] A first aspect of the application provides a multi-layer gallium nitride switch device with a common-source common-gate structure, comprising: a first N-type drift layer and a first buffer layer arranged on the front surface of the first N-type drift layer; a first gallium nitride channel layer arranged on the front surface of the first buffer layer; a plurality of second gallium nitride channel layers arranged in sequence on the front surface of the first gallium nitride channel layer; a switch drain arranged on the first side of the first gallium nitride channel layer and the second gallium nitride channel layer and in contact with the first gallium nitride channel layer and the second gallium nitride channel layer; a connecting metal layer arranged on the front surface of the first N-type drift layer and in contact with the second side of the first buffer layer, the first gallium nitride channel layer and the second gallium nitride channel layer; an HEMT gate arranged between the switch drain and the connecting metal layer; a potential barrier layer arranged between the HEMT gate and the second gallium nitride channel layer; a P-type drift layer arranged on the back surface of the first N-type drift layer; a second N-type drift layer arranged on the back surface of the P-type drift layer; a switch gate; a passivation layer arranged between the switch gate and the first N-type drift layer, arranged between the switch gate and the P-type drift layer, and arranged between the switch gate and the second N-type drift layer; and a switch source arranged on the back surface of the second N-type drift layer and connected with the HEMT gate.

[0006] In one embodiment, the passivation layer covers a first side of the first N-type drift layer, the P-type drift layer, and the second N-type drift layer.

[0007] In one embodiment, the first N-type drift layer, the P-type drift layer, and the second N-type drift layer are provided with downwardly open gate recesses, the gate recesses penetrating into the first N-type drift layer, and the passivation layer is arranged on the inner wall of the gate recesses.

[0008] In one embodiment, the connection metal layer penetrates into the first N-type drift layer.

[0009] In one embodiment, the pattern of the switch source electrode is annular or multi-annular, and the gate recesses are located in the first N-type drift layer, the P-type drift layer, and the second N-type drift layer inside the switch source electrode.

[0010] In one embodiment, the switch drain electrode is arranged on the first buffer layer and contacts the first side of the first gallium nitride channel layer and the first side of each of the second gallium nitride channel layers.

[0011] In one embodiment, the switch drain electrode and the HEMT gate electrode are both annular or multi-annular and do not contact each other, the connection metal layer is columnar and located inside the HEMT gate electrode, the first side is the outer side of the HEMT gate electrode, and the second side is the inner side of the HEMT gate electrode.

[0012] In one embodiment, the first gallium nitride channel layer includes a first channel layer and a first barrier layer arranged on the front of the first channel layer, and the second gallium nitride channel layer includes a second channel layer and a second barrier layer arranged on the front of the second channel layer; the materials of the first channel layer and the second channel layer are both N-type gallium nitride, and the materials of the barrier layer, the first barrier layer, and the second barrier layer are all aluminum gallium nitride; the materials of the first N-type drift layer and the second N-type drift layer are both N-type gallium nitride, and the material of the P-type drift layer is P-type gallium nitride.

[0013] In one embodiment, the switch drain electrode is arranged on the first channel layer and contacts the first side of each of the second gallium nitride channel layers.

[0014] The second aspect of the embodiments of the present application provides a chip including the multi-layer gallium nitride switch device with a common-source common-gate structure as described above.

[0015] The beneficial effects of the embodiments of the present application compared with the prior art are that the first N-type drift layer, the first buffer layer, the first gallium nitride channel layer, the multi-layer second gallium nitride channel layer, the switch drain, the connecting metal layer and the HEMT gate can form a normally-on high electron mobility transistor (D-High Electron Mobility Transistor; D-HEMT), wherein the connecting metal layer can serve as the source of the D-HEMT. The connecting metal layer, the first N-type drift layer, the P-type drift layer, the second N-type drift layer, the switch gate and the switch source can form a normally-off metal-oxide semiconductor field-effect transistor (Metal-Oxide-Semiconductor Field-Effect Transistor; MOSFET), wherein the connecting metal layer can serve as the drain of the MOSFET. The D-HEMT and the MOSFET form a cascode structure (CSCG), the D-HEMT with the multi-layer gallium nitride channel layer can withstand high voltage and has a high current density, and the MOSFET undertakes the switching function, so that the switch drain and the switch source can be completely turned off, realizing the complementation of the D-HEMT with the multi-layer gallium nitride channel layer and the MOSFET. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 A cross-sectional view of a multi-layer gallium nitride switch device with a cascode structure provided by the first embodiment of the present application Figure 1

[0017] Figure 2 A circuit equivalent schematic diagram of a multi-layer gallium nitride switch device with a cascode structure provided by an embodiment of the present application

[0018] Figure 3 A cross-sectional view of a multi-layer gallium nitride switch device with a cascode structure provided by an embodiment of the present application Figure 2

[0019] Figure 4 A top view of a multi-layer gallium nitride switch device with a cascode structure provided by an embodiment of the present application

[0020] Figure 5 A bottom view of a multi-layer gallium nitride switch device with a cascode structure provided by an embodiment of the present application

[0021] Figure 6 A cross-sectional view of a multi-layer gallium nitride switch device with a cascode structure provided by an embodiment of the present application Figure 3

[0022] Figure 7 ​​​Another bottom view of the multi-layer gallium nitride switch device with a cascode structure provided by an embodiment of the present application;

[0023] Figure 8 A schematic view of a chip provided by a second embodiment of the present application.

[0024] The above description of drawings: 10, chip; 20, multi-layer gallium nitride switch device with a cascode structure; 100, first N-type drift layer; 200, first buffer layer; 310, first gallium nitride channel layer; 311, first channel layer; 312, first barrier layer; 320, second gallium nitride channel layer; 321, second channel layer; 322, second barrier layer; 330, barrier layer; 400, switch drain; 500, connection metal layer; 600, HEMT gate; 610, P-type cap layer; 620, gate metal layer; 710, P-type drift layer; 720, second N-type drift layer; 730, support layer; 731, substrate; 732, second buffer layer; 810, switch gate; 820, passivation layer; 900, switch source. DETAILED DESCRIPTION

[0025] In order to make the technical problems to be solved by the present application, technical solutions and beneficial effects clearer, the present application will be further described in detail below in combination with the drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and not to limit the present application.

[0026] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0027] It should be understood that the terms "length", "width", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the purpose of facilitating the description of the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0028] In addition, the terms "first", "second" are only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise specifically limited.

[0029] Figure 1 A cross-sectional schematic diagram of a multilayer gallium nitride switch device with a common source and common gate structure provided in the first embodiment of this application is shown. For ease of explanation, only the parts relevant to this embodiment are shown, and are described in detail below:

[0030] The multilayer gallium nitride switching device with common source and common gate structure includes: a first N-type drift layer 100, a first buffer layer 200, a first gallium nitride channel layer 310, a plurality of second gallium nitride channel layers 320, a switching drain 400, a connecting metal layer 500, a HEMT gate 600, and a barrier layer 330.

[0031] like Figure 1 As shown, the first buffer layer 200 is disposed on the front side of the first N-type drift layer 100. In this embodiment, the front side of the first N-type drift layer 100 is the top surface of the first N-type drift layer 100, and the back side of the first N-type drift layer 100 is the bottom surface of the first N-type drift layer 100. The first gallium nitride channel layer 310 is disposed on the front side of the first buffer layer 200, and a plurality of second gallium nitride channel layers 320 are sequentially stacked on the front side of the first gallium nitride channel layer 310. The switch drain 400 is disposed on the first side of the first gallium nitride channel layer 310 and the second gallium nitride channel layer 320, and is in contact with the first gallium nitride channel layer 310 and the second gallium nitride channel layer 320. The connecting metal layer 500 is disposed on the front side of the first N-type drift layer 100, and is in contact with the second side of the first gallium nitride channel layer 310 and the second gallium nitride channel layer 320. The HEMT gate 600 is disposed on the front side of the top second gallium nitride channel layer 320, and is located between the switch drain 400 and the connection metal layer 500. A barrier layer is disposed between the HEMT gate 600 and the top second gallium nitride channel layer 320.

[0032] Both the first gallium nitride channel layer 310 and the second gallium nitride channel layer 320 can transmit electrical energy. The first N-type drift layer 100, the first buffer layer 200, the first gallium nitride channel layer 310, the second gallium nitride channel layer 320, the switching drain 400, the connecting metal layer 500, and the HEMT gate 600 can form a normally open high electron mobility transistor (D-HEMT). The connecting metal layer 500 serves as the source of the D-HEMT, the switching drain 400 as the drain, and the HEMT gate 600 as the gate. Due to the presence of the first gallium nitride channel layer 310 and multiple second gallium nitride channel layers 320, this D-HEMT exhibits high voltage withstand capability and high current density.

[0033] The multi-layer gallium nitride switch device of the common source and common gate structure further comprises a P-type drift layer 710, a second N-type drift layer 720, a switch gate 810, a passivation layer 820 and a switch source 900.

[0034] As shown in Figure 1 , the P-type drift layer 710 is arranged on the back surface of the first N-type drift layer 100, and the second N-type drift layer 720 is arranged on the back surface of the P-type drift layer 710. The passivation layer 820 is arranged between the switch gate 810 and the first N-type drift layer 100, between the switch gate 810 and the P-type drift layer 710, and between the switch gate 810 and the second N-type drift layer 720. Specifically, the passivation layer 820 is in contact with the first N-type drift layer 100, the P-type drift layer 710 and the second N-type drift layer 720 at the same time, and the switch gate 810 is arranged on the passivation layer 820. The switch source 900 is arranged on the back surface of the second N-type drift layer 720 and connected with the HEMT gate 600.

[0035] Among them, the connection metal layer 500, the first N-type drift layer 100, the P-type drift layer 710, the second N-type drift layer 720, the switch gate 810, the passivation layer 820 and the switch source 900 can constitute a normally closed metal-oxide semiconductor field effect transistor (MOSFET), and the connection metal layer 500 can be used as the drain of the MOSFET. As shown in Figure 1 , Figure 2 , the connection metal layer 500 is both the source of the D-HEMT and the drain of the MOSFET. By connecting the source (the switch source 900) of the MOSFET with the gate (the HEMT gate 600) of the D-HEMT, a cascode structure (CSCG) is formed. The switch drain 400 and the switch source 900 can be connected with an external circuit, the switch drain 400, the connection metal layer 500 and the switch source 900 are used for transmitting electric energy, the MOSFET can undertake the switching function to control the on-off between the switch drain 400 and the switch source 900, and solve the problem that the D-HEMT with a multi-layer gallium nitride channel layer is difficult to completely turn off. At the same time, the multi-layer gallium nitride switch device also has high high-voltage resistance and high current density.

[0036] It should be noted that when the multilayer gallium nitride switch is turned off (the MOSFET is turned off when the switch gate 810 receives a low or zero voltage), when its two electrodes (switch drain 400 and switch source 900) receive voltage (switch drain 400 is at a high potential and switch source 900 is at a low potential), if the voltage is small enough that the D-HEMT remains on, the MOSFET will bear all the voltage; if the voltage is large enough that the D-HEMT is turned off, the D-HEMT and the MOSFET will share the voltage, with the D-HEMT bearing most of the voltage.

[0037] In one embodiment, such as Figure 1 As shown, the switch gate 810 and passivation layer 820 cover the first side of the first N-type drift layer 100, the P-type drift layer 710, and the second N-type drift layer 720. In this embodiment, the first side corresponds to the right side, and the second side corresponds to the left side. That is, the switch drain 400 is disposed on the right side of the first gallium nitride channel layer 310 and the second gallium nitride channel layer 320, and the connecting metal layer 500 is disposed on the front side of the first N-type drift layer 100 and contacts the left side of the first gallium nitride channel layer 310 and the second gallium nitride channel layer 320. Since the first N-type drift layer 100, the P-type drift layer 710, and the second N-type drift layer 720 form a PN junction with the P-type drift layer 710, the first N-type drift layer 100 cannot communicate with the second N-type drift layer 720 through the P-type drift layer 710. The switch gate 810 and the passivation layer 820 cover the sides of the first N-type drift layer 100, the P-type drift layer 710 and the second N-type drift layer 720. The on and off of the passivation layer 820 can be controlled by controlling the voltage applied to the switch gate 810, thereby controlling the connection between the first N-type drift layer 100 and the second N-type drift layer 720.

[0038] In one embodiment, the distance between the switch gate 810 and the switch drain 400 is equal to the distance between the switch gate 810 and the connecting metal layer 500.

[0039] In one embodiment, the first gallium nitride channel layer 310 and the second gallium nitride channel layer 320 have the same thickness.

[0040] In one embodiment, the thickness of the switch drain 400 is equal to the sum of the thicknesses of the first gallium nitride channel layer 310, the plurality of second gallium nitride channel layers 320, and the barrier layer 330.

[0041] In one embodiment, the thickness of the connecting metal layer 500 is equal to the sum of the thicknesses of the first gallium nitride channel layer 310, the plurality of second gallium nitride channel layers 320, the barrier layer 330, and the first N-type drift layer 100.

[0042] In one embodiment, the thickness of the connecting metal layer 500 is greater than the sum of the thicknesses of the first gallium nitride channel layer 310, the plurality of second gallium nitride channel layers 320, the barrier layer 330, and the first N-type drift layer 100. That is, the connecting metal layer 500 extends into the first N-type drift layer 100.

[0043] In one embodiment, the first N-type drift layer 100, the P-type drift layer 710, and the second N-type drift layer 720 are provided with downward-opening gate recesses. These gate recesses extend into the first N-type drift layer 100, meaning the depth of the gate recess is not less than the thickness of the P-type drift layer 710 and the second N-type drift layer 720. A passivation layer 820 covers the gate recess, and a switching gate 810 covers the passivation layer 820. The switching gate 810 and the passivation layer 820 covering the inner wall of the gate recess have strong conductivity, which can increase the current density that the device can pass through. The inner wall of the gate recess can be perpendicular to the first N-type drift layer 100 or at a certain angle to it; this embodiment does not limit this.

[0044] In one example, the depth of the gate recess is equal to the thickness of the P-type drift layer 710 and the second N-type drift layer 720. The sides of the P-type drift layer 710 and the second N-type drift layer 720 form the sidewalls of the gate recess, and the bottom surface of the first N-type drift layer 100 forms the bottom surface of the gate recess. Since the switch gate 810 is covered within the gate recess, its specific shape is determined by the gate recess. The back surface of the second N-type drift layer 720 at the opening edge of the gate recess is also covered by the switch gate 810, and the switch gate 810 does not contact the switch source 900. The switch gate 810 can be connected to an external circuit. By applying a high voltage to the switch gate 810, the passivation layer 820 can form a conductive channel, connecting the first N-type drift layer 100 and the second N-type drift layer 720.

[0045] In one embodiment, such as Figure 3 , Figure 5 As shown, the switch source 900 is in the shape of a ring or polygonal ring, and the gate groove is located inside the first N-type drift layer 100, the P-type drift layer 710 and the second N-type drift layer 720 on the inner side of the switch source 900.

[0046] In one example, such as Figure 5 As shown, the switch source 900 is shaped like a U-shape, with all four sides being of equal length. The opening of the gate recess is also square.

[0047] In one example, the switch source 900 is ring-shaped. Compared with the U-shaped switch source 900, when the switch source 900 is ring-shaped, the MOSFET can withstand a higher breakdown voltage while occupying the same area.

[0048] In an example, the switch source 900 is in a hexagonal ring shape, which can increase the current density of the MOSFET while occupying the same area as the switch source 900 in a U shape.

[0049] In an embodiment, as shown in FIG. 4, the switch drain 400 is disposed on the first buffer layer 200 and contacts the first side of the first gallium nitride channel layer 310 and the second gallium nitride channel layer 320. The switch drain 400 can be in full contact with the first side of each of the first gallium nitride channel layer 310 and the second gallium nitride channel layer 320, thereby improving the conduction efficiency. Figure 3

[0050] In an embodiment, as shown in FIG. 4, the switch drain 400 is disposed on the first buffer layer 200 and contacts the first side of the first gallium nitride channel layer 310 and the second gallium nitride channel layer 320. The switch drain 400 can be in full contact with the first side of each of the first gallium nitride channel layer 310 and the second gallium nitride channel layer 320, thereby improving the conduction efficiency. Figure 3

[0051] In an embodiment, as shown in FIG. 4, the switch drain 400 is disposed on the first buffer layer 200 and contacts the first side of the first gallium nitride channel layer 310 and the second gallium nitride channel layer 320. The switch drain 400 can be in full contact with the first side of each of the first gallium nitride channel layer 310 and the second gallium nitride channel layer 320, thereby improving the conduction efficiency. Figure 4

[0052] In an example, as shown in FIG. 4, the switch drain 400 and the HEMT gate 600 are in a concentric structure, and the connection metal layer 500 is located at the geometric center of the switch drain 400 and the HEMT gate 600. The switch drain 400 and the HEMT gate 600 are both in a U shape, and the connection metal layer 500 is a square column. Figure 4

[0053] In an example, the switch drain 400 and the HEMT gate 600 can also be in a hexagonal ring shape.

[0054] In an embodiment, as shown in FIG. 4, the switch drain 400 is disposed on the first buffer layer 200 and contacts the first side of the first gallium nitride channel layer 310 and the second gallium nitride channel layer 320. The switch drain 400 can be in full contact with the first side of each of the first gallium nitride channel layer 310 and the second gallium nitride channel layer 320, thereby improving the conduction efficiency. Figure 3 ​​​​As shown, the first gallium nitride channel layer 310 includes a first channel layer 311 and a first barrier layer 312 disposed on the front side of the first channel layer 311, and the second gallium nitride channel layer 320 includes a second channel layer 321 and a second barrier layer 322 disposed on the front side of the second channel layer 321.

[0055] like Figure 3 As shown, in one embodiment, the HEMT gate 600 includes a P-type capping layer 610 and a gate metal layer 620. The P-type capping layer 610 is disposed on a barrier layer, and the gate metal layer 620 is disposed on the P-type capping layer 610. The gate metal layer 620 can form a Schottky contact with the P-type capping layer 610. The gate metal layer 620 is used to connect to external circuitry and the switch source 900. The material of the P-type capping layer 610 can be P-type gallium nitride (P-GaN), and the gate metal layer 620 can be a Schottky metal (e.g., any one of gold (Au) or palladium (Pd)).

[0056] It should be noted that the thicker the P-type cap layer 610, the higher the breakdown voltage that the D-HEMT can withstand, but the larger the parasitic capacitance and the slower the switching speed. The larger the length of the P-type cap layer 610 (the area in contact with the barrier layer), the higher the breakdown voltage that the D-HEMT can withstand, but the on-resistance will also increase. Therefore, the P-type cap layer 610 needs to be set according to the actual situation.

[0057] In one embodiment, the materials of the switch drain 400, the connecting metal layer 500, and the switch source 900 can be ohmic metals (such as any one of titanium (Ti) and aluminum (Al)) for transmitting electrical energy.

[0058] It should be noted that the breakdown voltage that the D-HEMT can withstand is directly proportional to the thickness and length of the first channel layer 311 and the second channel layer 321. The length of the first channel layer 311 and the second channel layer 321 refers to the length of the first channel layer 311 and the second channel layer 321 between the switch drain 400 and the connecting metal layer 500. The thickness and length of the first channel layer 311 and the second channel layer 321 need to be configured according to actual requirements.

[0059] In one embodiment, the first channel layer 311 and the second channel layer 321 are both made of N-type gallium nitride (N-GaN), and the barrier layer 330, the first barrier layer 312, and the second barrier layer 322 are both made of aluminum gallium nitride (AlGaN). When N-type gallium nitride and aluminum gallium nitride come into contact, a two-dimensional electron gas that can conduct electricity is generated at the contact site.

[0060] In one embodiment, the first N-type drift layer 100 and the second N-type drift layer 720 are both made of N-type gallium nitride (N-GaN), and the P-type drift layer 710 is made of P-type gallium nitride (P-GaN).

[0061] In one embodiment, the material of the first buffer layer 200 is aluminum nitride (AlN).

[0062] It should be noted that in the specific fabrication process, N-type gallium nitride can be formed by implanting N-type ions into gallium nitride, and P-type ions can be implanted into gallium nitride to form P-type gallium nitride. The N-type material can form a PN junction with the P-type material to block the transmission of current.

[0063] In one embodiment, barrier layer 330 and the top second barrier layer 322 can be merged into the same layer.

[0064] In one embodiment, such as Figure 6 As shown, the switch drain 400 is disposed on the first channel layer 311 and is in contact with the first side of each second gallium nitride channel layer 320.

[0065] In one example, such as Figure 6 As shown, the multilayer gallium nitride switch device with common source and common gate structure has two second gallium nitride channel layers 320. The switch drain 400 is disposed on the first channel layer 311 and is in contact with the outer side of the two upper second gallium nitride channel layers 320. The switch drain 400 can thus be connected to the two-dimensional electron gas in the first gallium nitride channel layer 310 and the second gallium nitride channel layer 320 to realize power transmission.

[0066] In one embodiment, the multilayer gallium nitride switch device with a common source and common gate structure further includes a support layer 730. The support layer 730 includes a second buffer layer 732 disposed on the back side of the second N-type drift layer 720 and a substrate 731 disposed on the back side of the second buffer layer 732. The thickness of the support layer 730 is greater than the thickness of the switch source 900. This embodiment does not limit the shape of the support layer 730. The substrate 731 is made of N-type gallium nitride, and the second buffer layer 732 is made of aluminum nitride (AlN).

[0067] The support layer 730 is used as an initial support structure before constructing the multilayer gallium nitride switch device with a common source and common gate structure in any of the above embodiments. This facilitates the construction of the multilayer gallium nitride switch device with a common source and common gate structure on the basis of the support layer 730. After the multilayer gallium nitride switch device with a common source and common gate structure is completed, the support layer 730 can be removed to increase the available area on the back side of the second N-type drift layer 720, thereby constructing a larger switch source 900 and improving the current density of the device.

[0068] Figure 2 A schematic diagram of a chip provided in the second embodiment of this application is shown. For ease of explanation, only the parts related to this embodiment are shown, and the details are as follows:

[0069] A chip 10 comprising the multi-layer gallium nitride switch device 20 of the common-source common-gate structure as any of the above embodiments. Specifically, the chip 10 can comprise a switching circuit or logic circuit composed of a plurality of multi-layer gallium nitride switch devices 20 of the common-source common-gate structure as switching elements therein. The embodiments do not limit the type of the circuit, and the number and connection relationship of the multi-layer gallium nitride switch devices 20 of the common-source common-gate structure can be set according to specific needs.

[0070] It can be clearly understood by those skilled in the art that, for the convenience and brevity of description, only the division of the above functional units and modules is exemplified, and in actual application, the above functions can be completed by different functional units and modules according to needs, that is, the internal structure of the device is divided into different functional units or modules to complete all or part of the functions described above. Each functional unit and module in the embodiments can be integrated in one processing unit, or each unit can exist physically, or two or more units can be integrated in one unit, and the integrated unit can be realized in the form of hardware or in the form of software functional unit. In addition, the specific names of each functional unit and module are only for easy distinction, and do not limit the protection scope of the application. The specific working process of the units and modules in the system can refer to the corresponding process in the foregoing method embodiments, which will not be repeated here.

[0071] In the above embodiments, the description of each embodiment has its own emphasis, and the parts not described or recorded in detail in a certain embodiment can be referred to the relevant description of other embodiments.

[0072] The above-described embodiments are only used to illustrate the technical solutions of the present application, rather than limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacements for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application.

Claims

1. A multilayer gallium nitride switching device with a common source and common gate structure, characterized in that, include: A first N-type drift layer and a first buffer layer disposed on the front side of the first N-type drift layer; The first gallium nitride channel layer is disposed on the front side of the first buffer layer; Multiple second gallium nitride channel layers are sequentially stacked on the front side of the first gallium nitride channel layer; The switch drain is located on the first side of the first gallium nitride channel layer and the second gallium nitride channel layer, and is in contact with the first gallium nitride channel layer and the second gallium nitride channel layer; A connecting metal layer is disposed on the front side of the first N-type drift layer and contacts the second side of the first buffer layer, the first gallium nitride channel layer, and the second gallium nitride channel layer; The HEMT gate is disposed between the switch drain and the connection metal layer; A barrier layer is disposed between the HEMT gate and the second gallium nitride channel layer; A P-type drift layer is disposed on the back side of the first N-type drift layer; The second N-type drift layer is disposed on the back side of the P-type drift layer; Switch gate; A passivation layer is disposed between the switch gate and the first N-type drift layer, between the switch gate and the P-type drift layer, and between the switch gate and the second N-type drift layer; The switching source is located on the back side of the second N-type drift layer and connected to the HEMT gate; The first N-type drift layer, the P-type drift layer, and the second N-type drift layer are provided with downward-opening gate grooves, the gate grooves extending into the first N-type drift layer, and the passivation layer is disposed on the inner wall of the gate grooves.

2. The multilayer gallium nitride switching device with a common source and common gate structure as described in claim 1, characterized in that, The passivation layer covers the first side of the first N-type drift layer, the P-type drift layer, and the second N-type drift layer.

3. The multilayer gallium nitride switching device with a common source and common gate structure as described in claim 2, characterized in that, The connecting metal layer extends into the first N-type drift layer.

4. The multilayer gallium nitride switching device with a common source and common gate structure as described in claim 1, characterized in that, The switch source electrode has a ring or polygonal ring pattern, and the gate groove is located inside the first N-type drift layer, the P-type drift layer and the second N-type drift layer on the inner side of the switch source electrode.

5. The multilayer gallium nitride switching device with a common source and common gate structure as described in claim 1, characterized in that, The switch drain is disposed on the first buffer layer and is in contact with the first side of the first gallium nitride channel layer and the first side of each of the second gallium nitride channel layers.

6. The multilayer gallium nitride switching device with a common source and common gate structure as described in claim 5, characterized in that, The switch drain and the HEMT gate are both annular or polygonal and do not contact each other. The connecting metal layer is columnar and located inside the HEMT gate. The first side is the outer side of the HEMT gate, and the second side is the inner side of the HEMT gate.

7. The multilayer gallium nitride switching device with a common source and common gate structure as described in claim 1, characterized in that, The first gallium nitride channel layer includes a first channel layer and a first barrier layer disposed on the front side of the first channel layer; the second gallium nitride channel layer includes a second channel layer and a second barrier layer disposed on the front side of the second channel layer; the first channel layer and the second channel layer are both made of N-type gallium nitride; the barrier layer, the first barrier layer and the second barrier layer are all made of aluminum gallium nitride; the first N-type drift layer and the second N-type drift layer are both made of N-type gallium nitride; and the P-type drift layer is made of P-type gallium nitride.

8. The multilayer gallium nitride switching device with a common source and common gate structure as described in claim 7, characterized in that, The switch drain is disposed on the first channel layer and is in contact with the first side of each second gallium nitride channel layer.

9. A chip, characterized in that, Including the multilayer gallium nitride switching device with a common source and common gate structure as described in any one of claims 1-8.

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