Pfc circuit, power supply circuit, and electronic device

Abstract

The application discloses a PFC circuit, a power supply circuit and electronic equipment, and relates to the technical field of power supply circuits. The PFC circuit comprises a first capacitor and a first diode, the first end of the first capacitor is connected with the first input end of the PFC circuit, the second end of the first capacitor is connected with the cathode of the first diode and has a first connecting point, and the anode of the first diode is connected with the second input end of the PFC circuit; a second diode and a second capacitor, the cathode of the second diode is connected with the first end of the first capacitor and the first output end of the PFC circuit, the anode of the second diode is connected with the first end of the second capacitor and has a second connecting point, and the second end of the second capacitor is connected with the anode of the first diode and the second output end of the PFC circuit; a third diode, the anode of the third diode is connected with the first connecting point, and the cathode of the third diode is connected with the second connecting point; and a current path, the current path is connected with the first diode and / or the second diode in parallel, and is used for inhibiting the inrush current of the input end of the PFC circuit and the ripple current of the output end of the PFC circuit. The power factor and safety of the circuit are higher.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of electronic circuits, in particular to a PFC circuit, a power supply circuit and an electronic device. BACKGROUND

[0002] In electronic circuits, in order to improve the power factor of the electrical equipment, PFC (Power Factor Correction) is usually added in the circuit, for example, in the related art, a valley fill circuit as shown in the figure can be added in the circuit, the capacitor C1 and the capacitor C2 in the valley fill circuit adopt the mode of series charging and parallel discharging to increase the conduction angle of the alternating current input, so as to achieve the purpose of improving the power factor. Figure 1 The valley fill circuit in the related art has the disadvantage that due to the working characteristics of series charging and parallel discharging of the capacitor C1 and the capacitor C2, the high-frequency ripple current generated by the power conversion circuit at the rear end of the valley fill circuit can only be absorbed by the capacitor C1 and the capacitor C2 during the parallel discharging and series charging of the valley fill circuit, and at other times, the diodes D1 and D2 are in the off state, the high-frequency ripple current generated by the power conversion circuit will flow into the power grid through the power supply line, the loop of the high-frequency ripple current is large, and the high-frequency ripple current directly flows into the power grid, thereby making the EMI (Electromagnetic Interference) performance of the circuit poor, reducing the power factor of the circuit, and greatly polluting the harmonic of the power grid.

[0003] The valley fill circuit in the related art has the disadvantage that due to the working characteristics of series charging and parallel discharging of the capacitor C1 and the capacitor C2, the high-frequency ripple current generated by the power conversion circuit at the rear end of the valley fill circuit can only be absorbed by the capacitor C1 and the capacitor C2 during the parallel discharging and series charging of the valley fill circuit, and at other times, the diodes D1 and D2 are in the off state, the high-frequency ripple current generated by the power conversion circuit will flow into the power grid through the power supply line, the loop of the high-frequency ripple current is large, and the high-frequency ripple current directly flows into the power grid, thereby making the EMI (Electromagnetic Interference) performance of the circuit poor, reducing the power factor of the circuit, and greatly polluting the harmonic of the power grid. SUMMARY

[0004] The present application aims to at least solve one of the technical problems in the related art. To this end, the first object of the present application is to provide a PFC circuit, by connecting a current path in parallel to the first diode and / or the second diode, to suppress the inrush current at the input end and the ripple current at the output end of the PFC circuit, reduce the EMI interference and input current distortion caused by the ripple current, thereby improving the EMI performance and power factor of the PFC circuit, reducing the harmonic pollution to the power grid; at the same time, the inrush current suppression capability of the PFC circuit can be enhanced, the safety of the PFC circuit can be improved, and the overall optimization of the PFC circuit is realized.

[0005] The second object of the present application is to provide a power supply circuit.

[0006] The third object of the present application is to provide an electronic device.

[0007] To achieve the above object, the first aspect of the present application provides a PFC circuit, comprising: a first capacitor and a first diode, a first end of the first capacitor being connected with a first input end of the PFC circuit, a second end of the first capacitor being connected with a cathode of the first diode and forming a first connection point, an anode of the first diode being connected with a second input end of the PFC circuit; a second diode and a second capacitor, a cathode of the second diode being connected with the first end of the first capacitor and a first output end of the PFC circuit respectively, an anode of the second diode being connected with a first end of the second capacitor and forming a second connection point, a second end of the second capacitor being connected with the anode of the first diode and a second output end of the PFC circuit respectively; a third diode, an anode of the third diode being connected with the first connection point, a cathode of the third diode being connected with the second connection point; a current path, the current path being connected with the first diode and / or the second diode in parallel, for suppressing a surge current at the input end of the PFC circuit and a ripple current at the output end of the PFC circuit.

[0008] According to the PFC circuit of the present application, the current path is connected with the first diode and / or the second diode in parallel, for suppressing the surge current at the input end of the PFC circuit and the ripple current at the output end of the PFC circuit, reducing the EMI interference and the input current distortion caused by the ripple current, so as to improve the EMI performance and the power factor of the PFC circuit, and reduce the harmonic pollution to the power grid; meanwhile, the surge current suppression capability of the PFC circuit is enhanced, the safety of the PFC circuit is improved, and the overall optimization of the PFC circuit is realized.

[0009] According to an embodiment of the present application, the current path comprises: a third capacitor connected with the first diode in parallel; and / or, a fourth capacitor connected with the second diode in parallel.

[0010] According to an embodiment of the present application, the capacitance of the third capacitor and the capacitance of the fourth capacitor are both smaller than the capacitance of the first capacitor and the capacitance of the second capacitor.

[0011] According to an embodiment of the present application, the capacitance of the first capacitor is equal to the capacitance of the second capacitor.

[0012] According to an embodiment of the present application, the PFC circuit further comprises: a resistor connected with the third diode in series.

[0013] According to one embodiment of the present application, in a first stage, the input voltage of the PFC circuit is greater than the voltage of the first capacitor and less than the series voltage of the first capacitor and the second capacitor, the first diode, the second diode and the third diode are all in the off state, the input voltage supplies power to the load of the output end of the PFC circuit and charges the current path; in a second stage, the input voltage is greater than the series voltage of the first capacitor and the second capacitor, the third diode is in the on state, the input voltage charges the first capacitor, the second capacitor and the current path and supplies power to the load, wherein the current path is discharged after being charged to a peak voltage; in a third stage, the input voltage is greater than the voltage of the first capacitor and less than the series voltage of the first capacitor and the second capacitor, the first diode, the second diode and the third diode are all in the off state, the input voltage and the current path jointly supply power to the load.

[0014] To achieve the above object, the second aspect of the present application provides a power supply circuit, comprising: a rectifier circuit, an input end of the rectifier circuit being connected with an alternating current power supply, the rectifier circuit being used for converting alternating current provided by the alternating current power supply into first direct current; the aforementioned PFC circuit, an input end of the PFC circuit being connected with the rectifier circuit, an output end of the PFC circuit being connected with a load, the PFC circuit being used for converting the first direct current into second direct current to provide the load and performing power factor correction.

[0015] The power supply circuit according to the embodiment of the present application can improve the EMI performance and the power factor of the power supply circuit, reduce the harmonic pollution to the power grid, enhance the surge current suppression capability of the power supply circuit and improve the safety of the power supply circuit, thereby realizing the overall optimization of the power supply circuit.

[0016] According to one embodiment of the present application, the rectifier circuit is a full-bridge uncontrollable rectifier circuit.

[0017] To achieve the above object, the third aspect of the present application provides an electronic device, comprising the aforementioned PFC circuit or the aforementioned power supply circuit.

[0018] The electronic device according to the embodiment of the present application can improve the EMI performance and the power factor of the electronic device, reduce the harmonic pollution to the power grid, enhance the surge current suppression capability of the electronic device and improve the safety of the electronic device, thereby realizing the overall optimization of the electronic device.

[0019] Additional aspects and advantages of the present application will be made apparent by the following description. BRIEF DESCRIPTION OF DRAWINGS

[0020] Figure 1 It is a valley filling circuit in the related art;

[0021] Figures 2a-2c This is a schematic diagram of the structure of a PFC circuit according to some embodiments of the present invention.

[0022] Figures 3a-3c A circuit diagram of a PFC circuit according to some embodiments of the present invention;

[0023] Figure 4 This is a timing diagram of a PFC circuit according to an embodiment of the present invention;

[0024] Figure 5 This is a schematic diagram showing the results of conducted interference tests on valley-fill circuits in related technologies.

[0025] Figure 6 This is a schematic diagram showing the results of conducted interference testing of a PFC circuit according to an embodiment of the present invention.

[0026] Figure 7 This is a schematic diagram of a power supply circuit according to an embodiment of the present invention;

[0027] Figure 8 A circuit diagram of a power supply circuit according to an embodiment of the present invention;

[0028] Figures 9a-9b This is a schematic diagram of the structure of an electronic device according to an embodiment of the present invention. Detailed Implementation

[0029] Embodiments of the present invention are described in detail below, examples of which are illustrated in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain the present invention, and should not be construed as limiting the present invention.

[0030] The PFC circuit, power supply circuit, and electronic device proposed in the embodiments of the present invention are described below with reference to the accompanying drawings.

[0031] Figures 2a-2c This is a schematic diagram of the structure of a PFC circuit according to some embodiments of the present invention, with reference to... Figures 2a-2c As shown, the PFC circuit 100 includes: a first capacitor C1, a first diode D1, a second diode D2, a second capacitor C2, a third diode D3, and a current path 110.

[0032] The first end of the first capacitor C1 is connected with the first input end IN1 of the PFC circuit 100, the second end of the first capacitor C1 is connected with the cathode of the first diode D1 and forms a first connection point J1, and the anode of the first diode D1 is connected with the second input end IN2 of the PFC circuit 100; the cathode of the second diode D2 is connected with the first end of the first capacitor C1 and the first output end OU1 of the PFC circuit 100 respectively, the anode of the second diode D2 is connected with the first end of the second capacitor C2 and forms a second connection point J2, and the second end of the second capacitor C2 is connected with the anode of the first diode D1 and the second output end OU2 of the PFC circuit respectively; the anode of the third diode D3 is connected with the first connection point J1, and the cathode of the third diode D3 is connected with the second connection point J2; the current path 110 is connected with the first diode D1 and / or the second diode D2 in parallel, for inhibiting the inrush current of the input end and the ripple current of the output end of the PFC circuit 100.

[0033] Specifically, referring to Fig. 1, Figure 2a The first capacitor C1, the first diode D1, the second diode D2, the second capacitor C2 and the third diode D3 constitute a typical valley fill circuit. When the input voltage of the PFC circuit 100 is lower than the voltage across the first capacitor C1 and the second capacitor C2, the first diode D1 and the second diode D2 are both turned on, at this time, the first capacitor C1 and the second capacitor C2 are connected in parallel to discharge to the load at the output end of the PFC circuit 100; when the input voltage of the PFC circuit 100 is higher than the sum of the voltages across the first capacitor C1 and the second capacitor C2, the first diode D1 and the second diode D2 are turned off, and the third diode D3 is turned on, at this time, the input voltage charges the first capacitor C1 and the second capacitor C2 connected in series, so as to increase the conduction angle of the AC input, thereby achieving the effect of improving the power factor. However, when the input voltage is higher than the smaller one of the voltages across the first capacitor C1 and the second capacitor C2, and lower than the sum of the voltages across the first capacitor C1 and the second capacitor C2, at this time, the first diode D1, the second diode D2 and the third diode D3 are all turned off, at this time, the PFC circuit 100 is equivalent to a wire, thus the ripple current generated by the load at the output end directly flows into the power grid, thereby generating EMI interference and harmonic pollution. Meanwhile, when a large inrush current occurs in the power grid, such as lightning inrush, EFT (electrical fast transient), damped oscillation wave, etc., the voltage will be directly conducted to the load at the output end, thereby possibly causing damage to the load.

[0034] In the embodiment of the present application, referring to Fig. 2, Figure 2aAs shown, by connecting the current path 110 in parallel with the first diode D1, when the first diode D1 is off, the current path 110 can provide a charge-discharge circuit for the first capacitor C1, so that when the first diode D1 is off, the first capacitor C1 can still be charged and discharged through the current path 110, avoiding fluctuations in the input and output currents, thereby suppressing the output current ripple, and further reducing the EMI interference and input current distortion caused by the ripple current, improving the EMI performance and power factor of the PFC circuit 100, and reducing the harmonic pollution to the power grid. The EMI performance of the PFC circuit 100 refers to the ability of the PFC circuit 100 to withstand EMI interference. Since the PFC circuit 100 of the embodiment can reduce the EMI interference caused by the ripple current, the ability of the PFC circuit 100 to withstand EMI interference can also be improved. At the same time, the first capacitor C1 can also act as a bus equivalent capacitor of the PFC circuit 100 to suppress the inrush current at the input end, thereby reducing the risk of damage to the output load and improving the safety of the PFC circuit 100.

[0035] Similarly, referring to Figure 2b As shown, the current path 110 can also be connected in parallel with the second diode D2, and when the second diode D2 is off, the second capacitor can also be charged and discharged through the current path 110, thereby also suppressing the inrush current at the input end and the output current ripple of the PFC circuit 100.

[0036] In addition, referring to Figure 2c As shown, the current path 110 can be connected in parallel with the first diode D1 and the second diode D2 at the same time, so that when the first diode D1 and the second diode D2 are off, the first capacitor C1 and the second capacitor C2 can be charged and discharged at the same time, thereby enhancing the effect of suppressing the inrush current and the ripple current.

[0037] In the above embodiment, by connecting the current path in parallel with the first diode and / or the second diode, the inrush current at the input end and the output current ripple of the PFC circuit are suppressed, the EMI interference and input current distortion caused by the ripple current are reduced, thereby improving the EMI performance and power factor of the PFC circuit, reducing the harmonic pollution to the power grid, and enhancing the inrush current suppression ability of the PFC circuit, improving the safety of the PFC circuit, and achieving overall optimization of the PFC circuit.

[0038] In some embodiments, referring to Figures 3a-3c As shown, the current path 100 includes a third capacitor C3 and / or a fourth capacitor C4, wherein the third capacitor C3 is connected in parallel with the first diode D1, and the fourth capacitor C4 is connected in parallel with the second diode D2.

[0039] Furthermore, the capacitance values ​​of the third capacitor C3 and the fourth capacitor C4 are both less than the capacitance value of the first capacitor C1 and less than the capacitance value of the second capacitor C2.

[0040] Furthermore, the capacitance of the first capacitor C1 is equal to the capacitance of the second capacitor C2.

[0041] Furthermore, in the first stage, the input voltage of the PFC circuit 100 is greater than the voltage of the first capacitor C1 and less than the series voltage of the first capacitor C1 and the second capacitor C2. The first diode D1, the second diode D2, and the third diode D3 are all in the off state. The input voltage supplies power to the load at the output terminal of the PFC circuit 100 and charges the current path 100. In the second stage, the input voltage is greater than the series voltage of the first capacitor C1 and the second capacitor C2. The third diode D3 is in the on state. The input voltage charges the first capacitor C1, the second capacitor C2, and the current path 110 and supplies power to the load. The current path 110 discharges after being charged to the peak voltage. In the third stage, the input voltage is greater than the voltage of the first capacitor C1 and less than the series voltage of the first capacitor C1 and the second capacitor C2. The first diode D1, the second diode D2, and the third diode D3 are all in the off state. The input voltage and the current path 100 jointly supply power to the load.

[0042] Specifically, the first capacitor C1 and the second capacitor C2 need to be capacitors with the same capacitance value so that the charge on both ends of the first capacitor C1 and the second capacitor C2 is consistent during the operation of the PFC circuit 100, ensuring that the output current and voltage waveforms of the PFC circuit 100 are normal and that the PFC circuit 100 operates normally. At the same time, the capacitance values ​​of the third capacitor C3 and the fourth capacitor C4 need to be set much smaller than the capacitance values ​​of the first capacitor C1 and the second capacitor C2. For example, the capacitance values ​​of the first capacitor C1 and the second capacitor C2 can be set to the uf level, while the capacitance values ​​of the third capacitor C3 and the fourth capacitor C4 can be set to the nf level. This way, the circuit can be provided with a path for the first capacitor C1 and the second capacitor C2, while avoiding an imbalance in the capacitance values ​​of the first capacitor C1 and the second capacitor C2, thus ensuring the normal operation of the PFC circuit 100.

[0043] The following is based on Figure 3b Taking the PFC circuit shown as an example, refer to... Figure 3b As shown, the current path 100 includes the fourth capacitor C4 at this time. The timing diagram of the PFC circuit 100 at this time can be referred to. Figure 4 As shown, the positive directions of the input current IIN, the circuit current IC1 where the first capacitor C1 is located, and the circuit current IC4 where the fourth capacitor C4 is located are as follows: Figure 3bAs shown. In the period of TO-T1, when the input voltage is less than the voltage across the first capacitor C1, the first diode D1 and the second diode D2 are turned on, and the third diode D3 is turned off. The first capacitor C1 and the second capacitor C2 are connected in parallel to discharge the load at the output end. At this time, the input current Iin and the circuit current IC4 of the fourth capacitor C4 are 0, the circuit current IC1 of the first capacitor C1 is negative, and the voltage across the fourth capacitor C4 is the forward conduction voltage drop of the second diode D2, which is usually about 1V. At this time, the bus equivalent capacitor of the PFC circuit 100 is the first capacitor C1 connected in parallel with the second capacitor C2.

[0044] In the period of T1-T2, the PFC circuit 100 enters the first stage. At this time, the input voltage of the PFC circuit 100 is greater than the voltage of the first capacitor C1 and less than the series voltage of the first capacitor C1 and the second capacitor C2. The first diode D1, the second diode D2, and the third diode D3 are all in the off state. The input voltage supplies power to the load at the output end of the PFC circuit 100. The first capacitor C1 does not participate in the energy transfer process. Therefore, the input current IIN is positive, and the circuit current of the first capacitor is 0. At the same time, the input voltage charges the fourth capacitor C3 through the circuit in which the second capacitor C2 is located. Therefore, the circuit current IC4 of the fourth capacitor C4 gradually decreases after being generated, as shown. Since the capacity of the fourth capacitor C4 is much smaller than that of the second capacitor C2, the charging current is extremely small. Therefore, the change in the amount of electricity of the second capacitor C2 can be ignored, and the second capacitor C2 can be regarded as not participating in the energy transfer process. In this stage, the bus equivalent capacitor of the PFC circuit 100 is the second capacitor C2 connected in series with the fourth capacitor C4. Figure 4

[0045] In the period of T2-T3, the PFC circuit 100 enters the second stage. At this time, the input voltage is greater than the series voltage of the first capacitor C1 and the second capacitor C2. The third diode D3 is in the on state. The input voltage charges the first capacitor C1 and the second capacitor C2, and supplies power to the load. Therefore, the input current IIN is positive, and the circuit current IC1 of the first capacitor C1 is positive. At the same time, the input voltage also charges the fourth capacitor C4, as shown. When the fourth capacitor C4 is charged to the peak value, the fourth capacitor C4 starts to discharge. Therefore, the circuit current IC4 of the fourth capacitor C4 decreases continuously after the zero-crossing point, as shown. In the second stage, the bus equivalent capacitor of the PFC circuit 100 is the first capacitor C1 connected in series with the second capacitor C2. Figure 4 Figure 4

[0046] ​​​In the T3-T4 period, the PFC circuit 100 enters the third stage, the input voltage is greater than the voltage of the first capacitor C1 and less than the series voltage of the first capacitor C1 and the second capacitor C2, the first diode D1, the second diode D2 and the third diode D3 are all in the off state, at this time the input voltage current supplies power to the load, the first capacitor C1 does not participate in the energy transmission process, therefore, the input current IIN is positive, the circuit current IC1 of the first capacitor is 0; at the same time, the fourth capacitor C4 can discharge to the load through the loop of the second capacitor C2, therefore the circuit current IC4 of the fourth capacitor C4 will continuously decrease, in the third stage, the bus equivalent capacitor of the PFC circuit 100 is the second capacitor C2 in series with the fourth capacitor C4, one working cycle of the PFC circuit 100 ends, the subsequent flow is referred to Figure 4 As shown, they are all the same as the T0-T4 period, which will not be repeated here.

[0047] In the above flow, in the different periods of T0-T4, the PFC circuit 100 all has a bus capacitor to suppress the inrush current of the input alternating current and the ripple current of the output load, wherein in the T1-T2 and T3-T4 periods, at this time the bus equivalent capacitor of the PFC circuit 100 is the second capacitor C2 in series with the fourth capacitor C4, since the fourth capacitor C4 is small, the equivalent capacitance value of the series is also small, therefore it can filter out the high-frequency ripple current without affecting the energy transmission of the PFC circuit, thereby making the PFC circuit 100 have the effect of suppressing the inrush current of the input end and the high-frequency ripple current of the output end in the whole working cycle, and further being able to reduce the EMI interference caused by the high-frequency ripple current and the input current distortion, or the damage of the inrush current to the output load. At the same time, the PFC circuit 100 in the embodiment of the present application can realize the effect of reducing the high-frequency ripple current and the inrush current by only adding one capacitor with extremely small capacitance value, the circuit structure is simple, thereby being conducive to the development trend of miniaturization and high power density of the PFC circuit.

[0048] In addition, the EMI interference includes conducted disturbance and radiation emission, therefore the PFC circuit 100 in the embodiment of the present application also has the effect of reducing the conducted disturbance and radiation emission, thereby making the embodiment of the present application be able to pass the conducted disturbance test in the GB9254 specification, wherein the conducted disturbance test requirement in the GB9254 specification is: the margin of the 400Khz-30Mhz frequency band under the CLASS B limit condition is greater than or equal to -15db. It is referred to Figures 5-6 As shown, the horizontal solid line in the figure is the peak upper limit requirement of the conducted disturbance test signal of the GB9254, the dashed solid line is the average upper limit requirement of the conducted disturbance test signal of the GB9254, when using Figure 1 As shown, the valley filling circuit as the PFC circuit, the peak and average of the conducted disturbance test signal are all higher than the upper limit of the test requirement; when using Figure 3bThe peak and average of the conducted disturbance test signal of the PFC circuit shown is lower than the upper limit of the test requirement.

[0049] It should be noted that, referring to Figure 3a The specific working principle of the third capacitor C3 is similar to that of the fourth capacitor C4, which will not be described here again. In addition, referring to Figure 3c The third capacitor C3 and the fourth capacitor C4 can be simultaneously arranged in the PFC circuit 100 to strengthen the suppression effect of the inrush current and the high-frequency ripple current.

[0050] In the above embodiment, by connecting the third capacitor in parallel across the first diode of the PFC and / or connecting the fourth capacitor in parallel across the second diode as a current path, the inrush current at the input end and the ripple current at the output end of the PFC circuit can be effectively suppressed, the conducted disturbance, the radiation emission and the input current distortion caused by the ripple current can be reduced, thereby the EMI performance and the power factor of the PFC circuit can be improved, the harmonic pollution to the power grid can be reduced, the inrush current suppression capability of the PFC circuit can be enhanced, the safety of the PFC circuit can be improved, the structure of the current path is simple, which is conducive to the miniaturization and the high-power-density development trend of the PFC circuit, and thus the overall optimization of the PFC circuit is realized.

[0051] In some embodiments, referring to Figures 3a-3c The PFC circuit 100 further comprises a resistor R connected in series with the third diode D3.

[0052] Specifically, the resistor R mainly plays a current-limiting role to avoid that the charging current is too large when the first capacitor C1 and the second capacitor C2 are charged, thereby protecting the safety of the PFC circuit.

[0053] In summary, according to the PFC circuit of the embodiment of the present application, by connecting the third capacitor in parallel across the first diode of the PFC and / or connecting the fourth capacitor in parallel across the second diode as a current path, the inrush current at the input end and the ripple current at the output end of the PFC circuit can be effectively suppressed, the conducted disturbance, the radiation emission and the input current distortion caused by the ripple current can be reduced, thereby the EMI performance and the power factor of the PFC circuit can be improved, the harmonic pollution to the power grid can be reduced, the inrush current suppression capability of the PFC circuit can be enhanced, the safety of the PFC circuit can be improved, the structure of the current path is simple, which is conducive to the miniaturization and the high-power-density development trend of the PFC circuit, and thus the overall optimization of the PFC circuit is realized.

[0054] In some embodiments, the embodiment of the present application further provides a power supply circuit, referring to Figure 7 The power supply circuit 1000 comprises the rectifier circuit 200 and the aforementioned PFC circuit 100.

[0055] The input end of the rectifier circuit 200 is connected with the AC power supply VI, and the rectifier circuit 200 is used for converting the AC power provided by the AC power supply VI into first DC power; the input end of the PFC circuit 100 is connected with the rectifier circuit 200, and the output end of the PFC circuit 100 is connected with the load 300, and the PFC circuit 100 is used for converting the first DC power into second DC power to provide the load 300 and perform power factor correction.

[0056] Further, referring to Figure 8 As shown in the figure, the rectifier circuit 100 is a full-bridge uncontrollable rectifier circuit.

[0057] Specifically, the full-bridge uncontrollable rectifier circuit has the advantages of low cost and full-wave rectification, thereby being capable of simplifying the structure of the power supply circuit and reducing the cost of the power supply circuit.

[0058] According to the power supply circuit of the embodiment of the present application, the aforementioned PFC circuit is capable of improving the EMI performance and power factor of the power supply circuit, reducing the harmonic pollution to the power grid, and improving the safety of the power supply circuit; at the same time, the circuit structure is simple, which is beneficial to the miniaturization and high power density development trend of the power supply circuit, thereby realizing the overall optimization of the power supply circuit.

[0059] In some embodiments, the embodiment of the present application also provides an electronic device, referring to Figures 9a-9b As shown in the figure, the electronic device 2000 comprises the aforementioned PFC circuit 100, or the aforementioned power supply circuit 1000.

[0060] According to the electronic device of the embodiment of the present application, the aforementioned PFC circuit or the aforementioned power supply circuit is capable of improving the EMI performance and power factor of the electronic device, reducing the harmonic pollution to the power grid, and improving the safety of the electronic device; at the same time, it is beneficial to reduce the volume of the electronic device and improve the power density of the electronic device, thereby realizing the overall optimization of the power supply circuit.

[0061] It is to be appreciated that the above description and the examples that follow are intended to be illustrative only and that changes can be made to the description, as represented by the above listed elements, by the steps recited in the flow charts, and by the examples that follow, without departing from the spirit of the application. Accordingly, the scope of the present application is intended to be defined only by the appended claims.

[0062] It should be understood that aspects of the application can be implemented in hardware, software, firmware or a combination thereof. In the above embodiments, various steps or methods can be implemented in software or firmware that is stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any of the following techniques, which are well known in the art of hardware implementation, can be used: a hybrid of the above techniques, a mixture of two or more of the above techniques, or a combination of the above techniques with other techniques not listed above.

[0063] In the description of the present specification, the description of the terms "one embodiment", "some embodiments", "an example", "a specific example", or "some examples" and the like means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Also, the specific features, structures, materials or characteristics described can be combined in any appropriate manner in one or more embodiments or examples.

[0064] In addition, the terms "first", "second", etc. are used only for the purpose of description, and should not be understood as indicating or implying relative importance or implying a number of the technical features indicated. Therefore, the features defined as "first", "second" can explicitly or implicitly include at least one of the features. In the description of the present application, the meaning of "a plurality of" is at least two, for example, two, three, etc., unless otherwise explicitly specified and limited.

[0065] In the present application, unless otherwise explicitly specified and limited, the terms "mounting", "connecting", "connecting", "fixing" and the like should be understood broadly, for example, it can be fixedly connected, or it can be detachably connected, or it can be integrated; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium; it can be the internal communication of two elements or the interaction relationship between two elements, unless otherwise explicitly limited. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0066] Although the embodiments of the present application have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limiting the present application, and those skilled in the art can make changes, modifications, replacements and variations to the above embodiments within the scope of the present application.

Claims

1. A PFC circuit, characterized by, comprises: a first capacitor and a first diode, a first end of the first capacitor is connected with a first input end of the PFC circuit, a second end of the first capacitor is connected with a cathode of the first diode and forms a first connection point, an anode of the first diode is connected with a second input end of the PFC circuit; a second diode and a second capacitor, a cathode of the second diode is connected with the first end of the first capacitor and a first output end of the PFC circuit respectively, an anode of the second diode is connected with a first end of the second capacitor and forms a second connection point, a second end of the second capacitor is connected with the anode of the first diode and a second output end of the PFC circuit respectively; a third diode, an anode of the third diode is connected with the first connection point, a cathode of the third diode is connected with the second connection point; a current path, the current path comprises a third capacitor and / or a fourth capacitor, the current path is connected with the first diode and / or the second diode in parallel, for suppressing the inrush current of the input end and the ripple current of the output end of the PFC circuit; wherein, the capacitance of the third capacitor and the capacitance of the fourth capacitor are both smaller than the capacitance of the first capacitor and the capacitance of the second capacitor.

2. The PFC circuit according to claim 1, wherein: the third capacitor is connected with the first diode in parallel; and / or, the fourth capacitor is connected with the second diode in parallel.

3. The PFC circuit of claim 2, wherein, the capacitance of the first capacitor is equal to the capacitance of the second capacitor.

4. The PFC circuit of any of claims 1-3, wherein, the PFC circuit further comprises a resistor, the resistor is connected with the third diode in series.

5. The PFC circuit according to any one of claims 1-3, wherein: in a first stage, the input voltage of the PFC circuit is greater than the voltage of the first capacitor and smaller than the series voltage of the first capacitor and the second capacitor, the first diode, the second diode and the third diode are all in an off state, the input voltage supplies power to a load of the output end of the PFC circuit and charges the current path; in a second stage, the input voltage is greater than the series voltage of the first capacitor and the second capacitor, the third diode is in an on state, the input voltage charges the first capacitor, the second capacitor and the current path, and supplies power to the load, wherein the current path discharges after being charged to a peak voltage; in a third stage, the input voltage is greater than the voltage of the first capacitor and smaller than the series voltage of the first capacitor and the second capacitor, the first diode, the second diode and the third diode are all in an off state, the input voltage and the current path jointly supply power to the load.

6. A power supply circuit, characterized by comprising: comprises: a rectifier circuit, an input end of the rectifier circuit is connected with an alternating current power supply, the rectifier circuit is used for converting alternating current provided by the alternating current power supply into first direct current ； The PFC circuit according to any one of claims 1-5, wherein an input end of the PFC circuit is connected with the rectifier circuit, an output end of the PFC circuit is connected with a load, and the PFC circuit is configured to convert the first direct current into a second direct current to provide the load and perform power factor correction.

7. The power supply circuit of claim 6, wherein, The rectifier circuit is a full-bridge uncontrollable rectifier circuit.

8. An electronic device, comprising: The power supply circuit according to any one of claims 6-7, or the PFC circuit according to any one of claims 1-5.

Images