An anti-interference radio frequency front-end circuit with reconfigurable operating frequency

Abstract

The present invention discloses an anti-interference radio frequency front-end circuit with reconfigurable working frequency, and the radio frequency front-end circuit includes a commutation circuit, a selection circuit, a rotation control circuit and an averaging or integration circuit. The commutation circuit converts one radio frequency signal into N multi-phase radio frequency signal outputs; the selection circuit includes N N-to-1 selectors, which selectively output the multi-phase radio frequency signal; the rotation control circuit outputs a control word sequence with a periodic regularity, controls the N N-to-1 selectors in the selection circuit, and realizes the rotation of the multi-phase radio frequency signal into the averaging or integration circuit; the averaging or integration circuit averages or integrates the radio frequency signal in the time domain; the radio frequency front-end circuit realizes the reconfiguration of the working frequency by changing the control word sequence output by the rotation control circuit. The present invention can be used for anti-interference of the radio frequency front end, and has the advantages of easy integration and high flexibility.

Description

Technical Field

[0001] The invention belongs to the field of wireless communication and electronic science and technology, and relates to an anti-interference radio frequency front-end circuit with reconfigurable working frequency. Background Art

[0002] In modern communication environments, the number of electronic devices increases, the frequency band occupancy rate also increases, and the interference signals increase accordingly. Wireless signals may be interfered by other wireless devices, electromagnetic interference and clutter, resulting in problems such as signal quality degradation, slower transmission rate, and shorter communication distance. The RF front end is a very important component of wireless communication systems. In a high-interference environment, the interference to the RF front end will have a great impact on the performance of the entire system. Therefore, improving the anti-interference ability of the RF front end has also become an important issue in the design and research of wireless communication systems.

[0003] In order to deal with out-of-band interference signals, traditional wireless receivers usually set up a bandpass filter (SAW filter) between the antenna and the front-end circuit to select the frequency band. Receivers that support multi-band communication need to use multiple filters with different operating frequencies, which not only increases the cost of the system, but also reduces the reliability of the overall circuit due to the increase in off-chip components and hinders the further reduction of the system size.

[0004] The invention patent "An anti-interference circuit and receiver" (CN215871381U, 2022.02.18) introduces an anti-interference circuit, including a receiving circuit, a detection circuit, a limiting circuit and a selection circuit. The detection circuit detects the strength of the interference signal in the radio frequency signal, and feeds the detection result back to the selection circuit, which controls the limiting circuit to reduce the strength of the interference signal in the radio frequency signal. The working frequency of the anti-interference circuit is fixed, and it is impossible to suppress interference signals in a wide frequency range.

[0005] In order to solve the shortcomings of high cost and low integration of traditional anti-interference front-ends, the present invention provides an anti-interference RF front-end circuit with reconfigurable operating frequency. The circuit can configure the on-chip circuit according to different needs and change the operating frequency of the circuit, thereby achieving anti-interference in a wide frequency range, so that the overall circuit has higher integration and flexibility and lower cost. Summary of the invention

[0006] Purpose of the invention: The purpose of the present invention is to provide an anti-interference RF front-end circuit with reconfigurable operating frequency, so as to solve the problem that the operating frequency range of traditional anti-interference circuits is difficult to adjust and widen; the RF front-end circuit converts the input RF signal into a multi-phase RF signal, controls the multi-phase RF signal to flow into the averaging or integration circuit in different rotation modes, so that the operating frequency of the RF front-end circuit is shifted high or low, thereby realizing the reconfiguration of the operating frequency of the RF front-end circuit.

[0007] In order to realize the reconfigurable working frequency and anti-interference of the RF front-end circuit, the present invention adopts the following scheme:

[0008] An anti-interference radio frequency front-end circuit with reconfigurable working frequency, the radio frequency front-end circuit includes a commutation circuit, a selection circuit, a rotation control circuit and an averaging or integration circuit. The commutation circuit converts one radio frequency signal into N multi-phase radio frequency signal outputs; the selection circuit includes N N-to-1 selectors, and the N-way inputs of each N-to-1 selector are respectively connected to the N-way outputs of the commutation circuit; the rotation control circuit outputs a control word sequence with a periodic regularity, controls the N N-to-1 selectors in the selection circuit, and makes each N-to-1 selector rotate and output the N-way input, so as to realize the rotation of the radio frequency signal into the averaging or integration circuit; the averaging or integration circuit averages or integrates the input radio frequency signal in the time domain. The radio frequency front-end circuit realizes the reconfiguration of the working frequency by changing the control word sequence output by the rotation control circuit.

[0009] Preferably, the N-bit control word sequence output of the rotation control circuit is connected to the control ends of N N-to-1 selectors respectively according to the forward rotation or reverse rotation mode, so that the N N-to-1 selectors simultaneously output N RF signals with different phases.

[0010] Furthermore, forward rotation can shift the operating frequency of the circuit toward a higher direction; reverse rotation can shift the operating frequency of the circuit toward a lower direction.

[0011] Preferably, the rotation control circuit can achieve different rotation rates, and the rotation rate determines the specific offset of the operating frequency.

[0012] Preferably, the rotation control circuit includes a shift register and a digital logic circuit.

[0013] Furthermore, the shift register and the digital logic circuit are controlled by a clock signal of a single frequency, and the digital logic circuit is controlled to output different control word sequences with periodic regularity by configuring the data in the shift register.

[0014] Preferably, the commutation circuit is composed of a switch array circuit and a clock circuit.

[0015] Furthermore, the switch array circuit includes N switches, and the inputs of the N switches are connected together; the clock circuit outputs N periodic pulse signals, each pulse signal has a different phase, and controls the conduction and shutdown of the N switches in the switch array respectively.

[0016] Preferably, the commutation circuit is composed of N delay units and N switches.

[0017] Furthermore, the delay circuit includes N delay units, the inputs of the N delay units are connected together, and the delay of the delay unit of each branch is different; the switch array circuit includes N switches, and the N switches are controlled by the same clock to control the conduction and shutdown of each branch.

[0018] Preferably, the averaging or integrating circuit comprises a capacitor array for voltage maintenance.

[0019] Preferably, the forward rotation connection is as follows: the N-bit control word sequence output by the rotation control circuit is cyclically shifted to the left N times and connected to the control ends of N N-to-1 selectors respectively. The control word sequence is connected according to C 1 , C 2 ,…,C N-1 , C N Connect to the control end of the first N-to-1 selector in the order of C 2 , C 3 ,…,C N , C 1 Connect to the control end of the second N-to-1 selector in the order of C N , C 1 ,…,C N-2 , C N-1 The sequences are connected to the control end of the Nth N-to-1 selector.

[0020] Preferably, the reverse rotation connection is as follows: the N-bit control word sequence output by the rotation control circuit is cyclically shifted right N times and connected to the control ends of N N-to-1 selectors respectively. The control word sequence is connected according to C 1 , C 2 ,…,C N-1 , C N Connect to the control end of the first N-to-1 selector in the order of C N , C 1 ,…,C N-2 , C N-1 Connect to the control end of the second N-to-1 selector in the order of C 2 , C 3 ,…,C N , C 1 The sequences are connected to the control end of the Nth N-to-1 selector.

[0021] Compared with the existing technology, the advantages of this solution are as follows:

[0022] The anti-interference RF front-end circuit with reconfigurable working frequency of the present invention, under the premise of maintaining high-performance anti-interference, adopts reconfigurable technology to achieve arbitrary regulation of working frequency within a wide frequency range in complex electromagnetic environments where interference signals may change rapidly and useful signals may switch over a wide frequency range, and has the advantages of wide working frequency range, short regulation time, and high on-chip integration. It solves the problems and technical bottlenecks of the traditional anti-interference RF receiving system, such as mutual constraints between performance indicators such as linearity, noise coefficient, interference suppression, bandwidth, etc., the inability to achieve high performance at the same time, and the inability to achieve arbitrary regulation of working frequency within a wide frequency range. The present invention can be widely used in scenarios with complex interference signals such as wireless communications, radar, and electronic countermeasures, to solve the anti-interference problems of RF front-end circuits in spectrum congestion, coexistence, and confrontation environments. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a structural schematic diagram of an anti-interference radio frequency front-end circuit with reconfigurable operating frequency according to the present invention;

[0024] Figure 2 is a schematic diagram of a first embodiment of a commutation circuit of the present invention;

[0025] Figure 3 is a schematic diagram of a second embodiment of a commutation circuit of the present invention;

[0026] Figure 4 is a schematic diagram of a rotation control circuit of the present invention;

[0027] Figure 5 It is a connection diagram of the rotation control circuit and the selection circuit for realizing forward rotation of the present invention;

[0028] Figure 6 It is a connection diagram of a rotation control circuit and a selection circuit for realizing reverse rotation of the present invention. DETAILED DESCRIPTION

[0029] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be interpreted as limiting the present invention.

[0030] Figure 1The present invention discloses a block diagram of an anti-interference radio frequency front-end circuit with reconfigurable working frequency, wherein the radio frequency front-end circuit comprises a commutation circuit, a selection circuit, a rotation control circuit and an averaging or integration circuit. The commutation circuit has a radio frequency signal input and N multi-phase radio frequency signal outputs; the selection circuit comprises N N-to-1 selectors, and the N-way inputs of each N-to-1 selector are respectively connected to the N-way outputs of the commutation circuit; the rotation control circuit outputs a control word sequence with a periodic regularity, controls the N N-to-1 selectors in the selection circuit, and enables each N-to-1 selector to rotate and output the N-way inputs, thereby realizing the rotation of the radio frequency signal into the averaging or integration circuit; the averaging or integration circuit averages or integrates the input radio frequency signal in the time domain.

[0031] The N-to-1 selector is controlled by an N-bit control word sequence. The N-bit control word sequence output of the rotation control circuit is connected to the control ends of N N-to-1 selectors respectively according to the forward rotation or reverse rotation mode, so that the N N-to-1 selectors simultaneously output N RF signals with different phases.

[0032] The rotation control circuit can realize different rotation sequences and rotation rates. Forward rotation can realize a high shift of the operating frequency, and reverse rotation can realize a low shift of the operating frequency. The rotation rate determines the specific shift of the operating frequency.

[0033] See also Figure 2 The schematic diagram of the first embodiment of the commutation circuit shown includes a transistor M 1 To M N and clock circuits, LO 1 To LO N N pulse signals with the same frequency but different phases; RF signal input IN is connected to transistor M 1 To M N Source of clock LO 1 To LO N Connect transistor M 1 To M N Gate of OUT 1 To OUT N Connect transistor M 1 To M N The drain of transistor M 1 To M N Working in the switching state, when the clock LO 1 To LO N When they are high level, transistor M 1 To M N are turned on respectively, when the clock LO 1 To LO N When the level is low, transistor M 1 To M NDisconnect separately.

[0034] See also Figure 3 The schematic diagram of the second embodiment of the commutation circuit shown in FIG. 1 includes first to Nth delay units and transistors M 1 To M N , the delays of the first to Nth delay units are different; the RF signal input IN is connected to the inputs of the first to Nth delay units; the outputs of the first to Nth delay units are respectively connected to the transistors M 1 To M N Source; OUT 1 To OUT N Connect transistor M 1 To M N The drain of the clock LO is connected to the transistor M 1 To M N The gate of transistor M 1 To M N Working in the switching state, when the clock LO is high, the transistor M 1 To M N When the clock LO is low, transistor M 1 To M N disconnect.

[0035] Rotation control circuit, a specific implementation circuit is as follows Figure 4 As shown, it includes a shift register, an accumulator and a decoder; the shift register, the accumulator and the decoder are controlled by a single frequency clock signal CLK; the shift register stores M-bit "0" or "1" digital signals; when each clock cycle of CLK arrives, the shift register outputs the next digital signal. If the current clock cycle outputs the last bit, the next clock cycle starts outputting from the first bit again; the accumulator starts counting in a binary format from 0. If the digital signal output by the shift register is "0", the accumulator output remains unchanged. If the digital signal output by the shift register is "1", the accumulator output is increased by 1; the decoder converts the binary digital signal output by the accumulator into a control word sequence C 1 To C N , and at the same time, only one control word in the control word sequence is "1".

[0036] A specific connection method of a forward rotation control circuit and a selection circuit is as follows: Figure 5 The N-bit control word sequence output by the rotation control circuit is cyclically shifted to the right N times and connected to the control terminals of N N-to-1 selectors respectively. Figure 5 For example, according to C 1 , C 2 ,…,C N-1 , C N Connect to the control end of the first N-to-1 selector in the order of C2 , C 3 ,…,C N , C 1 Connect to the control end of the second N-to-1 selector in the order of C N , C 1 ,…,C N-2 , C N-1 The sequences are connected to the control end of the Nth N-to-1 selector.

[0037] A specific connection method between the output of a reverse rotation control circuit and a selector is as follows: Figure 6 The N-bit control word sequence output by the rotation control circuit is cyclically shifted to the left N times and connected to the control terminals of N N-to-1 selectors respectively. Figure 6 For example, according to C 1 , C 2 ,…,C N-1 , C N Connect to the control end of the first N-to-1 selector in the order of C N , C 1 ,…,C N-2 , C N-1 Connect to the control end of the second N-to-1 selector in the order of C 2 , C 3 ,…,C N , C 1 The sequences are connected to the control end of the Nth N-to-1 selector.

[0038] The above embodiments are only for illustrating the technical idea of ​​the present invention, and cannot be used to limit the protection scope of the present invention. Any changes made on the basis of the technical solution in accordance with the technical idea proposed by the present invention shall fall within the protection scope of the present invention.

Claims

1. An anti-interference RF front-end circuit with reconfigurable operating frequency, It is characterized in that It includes a commutation circuit, a selection circuit, a rotation control circuit and an averaging or integration circuit; The commutation circuit converts one channel of radio frequency signal into N channels of multi-phase radio frequency signal output; The selection circuit includes N N-to-1 selectors, and the N-way inputs of each N-to-1 selector are respectively connected to the N-way outputs of the commutation circuit; The rotation control circuit outputs a control word sequence with a periodic regularity, controls N N-to-1 selectors in the selection circuit, and makes each N-to-1 selector rotate and output N inputs, thereby realizing the rotation of multi-phase radio frequency signals into an averaging or integration circuit; The averaging or integrating circuit averages or integrates the input multi-phase radio frequency signal in the time domain; The averaging or integrating circuit includes a capacitor array.

2. According to claim 1, the anti-interference RF front-end circuit with reconfigurable operating frequency, It is characterized in that The N-bit control word sequence output of the rotation control circuit is connected to the control ends of N N-to-1 selectors respectively according to the forward rotation or reverse rotation mode, so that the N N-to-1 selectors simultaneously output N RF signals with different phases.

3. According to claim 2, the anti-interference RF front-end circuit with reconfigurable operating frequency, It is characterized in that Forward rotation can achieve a higher shift in the circuit's operating frequency, and reverse rotation can achieve a lower shift in the circuit's operating frequency; the rotation control circuit can achieve different rotation rates, and the rotation rate determines the specific offset of the operating frequency.

4. According to claim 1, the anti-interference RF front-end circuit with reconfigurable operating frequency, It is characterized in that The rotation control circuit includes a shift register and a digital logic circuit; The shift register and the digital logic circuit are controlled by a clock signal of a single frequency, and the digital logic circuit is controlled to output different control word sequences with periodic regularity by configuring the data in the shift register.

5. The anti-interference RF front-end circuit with reconfigurable operating frequency according to claim 1, It is characterized in that The commutation circuit is composed of a switch array circuit and a clock circuit; The switch array circuit includes N switches, and the inputs of the N switches are connected together; the clock circuit outputs N periodic pulse signals, each pulse signal has a different phase, and controls the conduction and disconnection of the N switches in the switch array respectively.

6. The anti-interference RF front-end circuit with reconfigurable operating frequency according to claim 1, It is characterized in that The commutation circuit is composed of a delay circuit and a switch array circuit; The delay circuit includes N delay units, the inputs of the N delay units are connected together, and the delay of the delay unit of each branch is different; the switch array circuit includes N switches, and the N switches are controlled by the same clock to control the conduction and shutdown of each branch.

7. The anti-interference RF front-end circuit with reconfigurable operating frequency according to claim 2, It is characterized in that The connection mode of the forward rotation is as follows: the N-bit control word sequence output by the rotation control circuit is cyclically shifted to the left N times and connected to the control terminals of N N-to-1 selectors respectively. The control word sequence is in accordance with C 1 , C 2 ,…,C N-1 , C N Connect to the control end of the first N-to-1 selector in the order of C 2 , C 3 ,…,C N , C 1 Connect to the control end of the second N-to-1 selector in the order of C N , C 1 ,…,C N-2 , C N-1 The sequences are connected to the control end of the Nth N-to-1 selector.

8. The anti-interference RF front-end circuit with reconfigurable operating frequency according to claim 2, It is characterized in that The reverse rotation connection is as follows: the N-bit control word sequence output by the rotation control circuit is cyclically shifted to the right N times and connected to the control terminals of N N-to-1 selectors respectively. 1 , C 2 ,…,C N-1 , C N Connect to the control end of the first N-to-1 selector in the order of C N , C 1 ,…,C N-2 , C N-1 Connect to the control end of the second N-to-1 selector in the order of C 2 , C 3 ,…,C N , C 1 The sequences are connected to the control end of the Nth N-to-1 selector.

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