A method and system for dynamic management of multiple nodes based on PCIe switches

Abstract

This invention provides a multi-node dynamic management method and system based on a PCIe switch. The system includes a PCIe switch and a multi-processor node connected to the PCIe switch. Each multi-processor node includes one upstream port node and multiple downstream port nodes. The upstream port node is used for PCIe switch link configuration, data processing, data distribution, and data management. The downstream port nodes are used to receive and process data allocated by the upstream port node and output the processed data. The method includes defining the upstream and downstream port nodes within the multi-processor node; the upstream port node performs link configuration, data processing, data distribution, and data management on the PCIe switch; and the downstream port nodes receive and process the distributed data. The method and system of this invention can increase the rate of product data exchange and processing, and provide fault-tolerant backup capabilities and health monitoring capabilities to improve reliability.

Description

Technical Field

[0001] This invention relates to the field of airborne embedded computer data processing technology, specifically to a multi-node dynamic management method and system based on an SM8619PCIe switch. Background Technology

[0002] As the core component of the avionics airborne computer, the data processing module mainly provides computing, communication and data conversion functions for the avionics system. In order to ensure the accuracy, timeliness and reliability of the avionics system's processing tasks, the data processing module needs to provide high-performance and highly deterministic data communication and computing capabilities, while also having a certain degree of fault tolerance and backup capabilities.

[0003] PCIe, as a high-speed serial computer expansion bus standard, is primarily used by devices that communicate directly with the processor. PCIe allocates dedicated channel bandwidth to devices to ensure point-to-point, full-duplex, high-speed data transmission between the device and the processor. A PCIe switch is a switching communication device based on the PCIe communication protocol. It expands the point-to-point, full-duplex, high-speed communication capability supported by PCIe to high-speed data exchange capability between multiple nodes. Therefore, PCIe switches can not only improve the data exchange rate of computer products but also support redundant architectures in products.

[0004] However, most current data exchange links based on PCIe switches only utilize the switches for data communication between multiple nodes, which cannot provide fault tolerance and backup capabilities, and thus cannot meet the reliability requirements of avionics systems. Summary of the Invention

[0005] To meet the requirements of high performance, high determinism, and high reliability of data processing modules, this invention designs a multi-node dynamic management method and system based on PCIe switches. This system and method fully utilize the high-speed switching characteristics of PCIe switches to enhance the module's data exchange and processing capabilities to meet the requirements of high performance and high determinism.

[0006] The technical solution to achieve the purpose of the invention is as follows:

[0007] In a first aspect, the present invention provides a multi-node dynamic management system based on a PCIe switch, including a PCIe switch and a multi-processor node, wherein the multi-processor node is connected to the PCIe switch and is used to receive data output by the PCIe switch, process the data and output it.

[0008] The multiprocessor node includes one upstream port node and multiple downstream port nodes. The upstream port node is used for PCIe switch link configuration, data processing, data distribution, and data management. The downstream port nodes are used to receive and process the data allocated by the upstream port node and output the processed data.

[0009] Furthermore, the multi-node dynamic management system also includes an MCU auxiliary circuit, which is connected to the multi-processor node and is used to monitor the working status of the multi-processor node, and switch the upstream port node and the downstream port node within the multi-processor node according to the monitoring results.

[0010] Furthermore, the MCU auxiliary circuit via I 2 The C-bus connects the processor nodes in the multiprocessor node in series.

[0011] Furthermore, the MCU auxiliary circuit is connected to the PCIe switch and is used to monitor the operating status of the PCIe switch.

[0012] Furthermore, the PCIe switch is equipped with multiple registers, each of which corresponds one-to-one with a processor node within the multiprocessor node, and the registers configure whether the corresponding processor node is a master processor node or a slave processor node.

[0013] Furthermore, the PCIe switch is configured with multiple links, and each link is assigned an upstream port node or a downstream port node.

[0014] Secondly, this invention provides a multi-node dynamic management method based on a PCIe switch, comprising the following steps:

[0015] Define the upstream and downstream port nodes within a multiprocessor node;

[0016] Upstream port nodes perform link configuration, data processing, data distribution, and data management for PCIe switches, while downstream port nodes receive, process, and distribute the data, and then output the processed data.

[0017] Furthermore, the multi-node dynamic management method also includes:

[0018] Based on the MCU auxiliary circuit, the working status of upstream port nodes, downstream port nodes, and PCIe switch internal links is monitored. When an upstream port node is malfunctioning, the PCIe switch is controlled to switch the upstream port node to a downstream port node and configure any downstream port node as an upstream port interface.

[0019] Furthermore, the aforementioned MCU auxiliary circuit monitors the operating status of the intralinks within the PCIe switch based on level signals, including:

[0020] When the output is low, the system determines that the working status of the internal link of the PCIe switch is abnormal and reports the abnormal result.

[0021] When a high-level or high / low waveform signal is output, it indicates that the internal link of the PCIe switch is functioning normally.

[0022] Furthermore, the aforementioned MCU auxiliary circuit monitors the operating status of each processor node within the multiprocessor node based on the heartbeat signal, including:

[0023] When the MCU auxiliary circuit receives the heartbeat signal output by the processor node at a set frequency, it determines that the processor node is operating normally.

[0024] When the MCU auxiliary circuit does not receive the heartbeat signal output by the processor node, it determines that the processor node is in an abnormal working state and reports the abnormal result.

[0025] Compared with the prior art, the beneficial effects of the present invention are: the multi-node dynamic management method and system designed in the present invention are based on a reasonable and effective redundant data processing architecture designed for PCIe switches. On the one hand, it can increase the data exchange and processing rate of products; on the other hand, it can provide fault-tolerant backup capabilities and health monitoring capabilities, thereby improving reliability. Attached Figure Description

[0026] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below.

[0027] Figure 1 This is an architecture diagram of a multi-node dynamic management system based on a PCIe switch in a specific implementation.

[0028] Among them, 1. PCIe switch; 2. Multiprocessor node; 11. Upstream port node; 12. Downstream port node; 3. MCU auxiliary circuit. Detailed Implementation

[0029] The present invention will be further described below with reference to specific embodiments, and the advantages and features of the present invention will become clearer as a result. However, these embodiments are merely exemplary and do not constitute any limitation on the scope of the present invention. Those skilled in the art should understand that modifications or substitutions can be made to the details and form of the technical solutions of the present invention without departing from the spirit and scope of the present invention, but all such modifications and substitutions fall within the protection scope of the present invention.

[0030] PCIe is a high-speed serial computer expansion bus standard. A PCIe switch is a communication device used to enable PCIe data exchange between multiple nodes, providing high-speed, stable, full-duplex, high-bandwidth data transmission between them. Therefore, the rational and effective introduction of PCIe switches into onboard computer data processing modules can improve the data exchange rate and stability of the product, while also supporting the design of redundant product architectures. Based on this, this invention provides a multi-node dynamic management method and system based on PCIe switches.

[0031] Example 1:

[0032] This embodiment provides a multi-node dynamic management system based on a PCIe switch. (See also...) Figure 1 As shown, the multi-node dynamic management system includes a PCIe switch 1 and a multiprocessor node 2. The multiprocessor node 2 is connected to the PCIe switch 1 and is used to receive data output by the PCIe switch 1, process the data, and then output it.

[0033] The multiprocessor node includes an upstream port node 11 and multiple downstream port nodes 12. The upstream port node 11 is used for PCIe switch link configuration, data processing, data distribution, and data management. The downstream port nodes 12 are used to receive and process the data allocated by the upstream port node 11 and output the processed data. The downstream port node 12 can directly transmit the processed data to the PCIe switch 1, or it can transmit the data to the PCIe switch 1 via the upstream port node 11.

[0034] See Figure 1 As shown, multiprocessor node 1 has four processor nodes that support PCIe interfaces, including one upstream port node 11 and three downstream port nodes 12. Each of the four processor nodes can be configured to switch between upstream port node 11 and downstream port node 12 according to specific needs.

[0035] In this embodiment, the upstream port node 11 (also known as the master node) and the downstream port node 12 (also known as the slave node) in the multiprocessor node 2 are pre-configured. When the system is powered on, it automatically loads as the upstream port node 11, and the other processor nodes automatically load as the downstream port nodes 12. At the same time, each processor node in the multiprocessor node 2 can identify each other as the upstream port node 11 or the downstream port node 12 through the PCIe switch 1.

[0036] Optionally, the multi-node dynamic management system further includes an MCU auxiliary circuit 3, which is connected to the multi-processor node 2 and is used to monitor the working status of the multi-processor node 2, and switch the upstream port node 11 and the downstream port node 12 within the multi-processor node 2 according to the monitoring results.

[0037] During system operation, upstream port node 11 and downstream port node 12 may experience abnormalities. Therefore, in order to avoid data processing failure due to the abnormality of a certain processor node, in this specific embodiment, the upstream port node 11 or downstream port node 12 of the processor node is set to a configurable and switchable form. That is, when the upstream port node 11 is abnormal, it is automatically configured as the downstream port node 12, and the downstream port node 12 can be configured as the new upstream port node 11 when the upstream port node 11 is abnormal.

[0038] Furthermore, the MCU auxiliary circuit 3 is connected via I 2 The C-bus connects each processor node in the multiprocessor node 2 in series to simplify the connection between the MCU auxiliary circuit 3 and the multiprocessor node 2, while ensuring that the processor nodes in the multiprocessor node 2 can obtain the status of other processor nodes.

[0039] Optionally, the MCU auxiliary circuit 3 is connected to the PCIe switch 1 and is used to monitor the working status of the PCIe switch 1. By detecting and monitoring the working status of the PCIe switch 1, it is possible to promptly identify whether the problem is with the PCIe switch 1 or the multiprocessor node 2 when an anomaly occurs in data processing.

[0040] In an embodiment where no accompanying drawings are shown, the PCIe switch 2 is provided with multiple registers, each of which corresponds one-to-one with a processor node in the multiprocessor node 2, and the registers configure whether the corresponding processor node is a master processor node or a slave processor node.

[0041] In an embodiment where no accompanying drawings are shown, the PCIe switch 1 is used to implement high-speed interconnection between four supporting processor nodes, and the PCIe switch is configured with multiple links, each of which is assigned an upstream port node or a downstream port node.

[0042] For example, the model could be an SM8619 PCIe switch. The SM8619 PCIe switch is a PCIe switching device with 16 channels and 16 ports. In a PCIe switching circuit, the SM8619 PCIe switch can be configured as 4 links, each link corresponding to 4 channels, and each link configured with one processor node. It should be noted that the number of channels in each link can be the same or different, depending on the actual requirements.

[0043] Example 2:

[0044] This embodiment provides a multi-node dynamic management method based on a PCIe switch, including the following steps:

[0045] Define the upstream and downstream port nodes within a multiprocessor node;

[0046] Upstream port nodes perform link configuration, data processing, data distribution, and data management for PCIe switches, while downstream port nodes receive, process, and distribute the data, and then output the processed data.

[0047] In an improved embodiment, the above-described multi-node dynamic management method further includes:

[0048] Based on the MCU auxiliary circuit, the working status of upstream port nodes, downstream port nodes, and PCIe switch internal links is monitored. When an upstream port node is malfunctioning, the PCIe switch is controlled to switch the upstream port node to a downstream port node and configure any downstream port node as an upstream port interface.

[0049] Optionally, the above-mentioned MCU auxiliary circuit monitors the operating status of the intralinks within the PCIe switch based on level signals, including:

[0050] When the output is low, the system determines that the working status of the internal link of the PCIe switch is abnormal and reports the abnormal result.

[0051] When a high-level or high / low waveform signal is output, it indicates that the internal link of the PCIe switch is functioning normally.

[0052] Optionally, the aforementioned MCU auxiliary circuit monitors the operating status of each processor node within the multiprocessor node based on the heartbeat signal, including:

[0053] When the MCU auxiliary circuit receives the heartbeat signal output by the processor node at a set frequency, it determines that the processor node is operating normally.

[0054] When the MCU auxiliary circuit does not receive the heartbeat signal output by the processor node, it determines that the processor node is in an abnormal working state and reports the abnormal result.

[0055] This embodiment uses four FT-2000 / 4 processor nodes, SM8619 PCIe switching, HWD32F103MLQFP64 MCU auxiliary circuitry, and I... 2 Taking the C-bus-based multiprocessor interconnect architecture as an example, the above-mentioned multi-node dynamic management method is explained:

[0056] The MCU auxiliary circuit configures the upstream / downstream attributes of the corresponding ports of each processor node by configuring the SM8619PCIe switch. After the attribute configuration is completed, the processor node configured as the upstream port performs link initialization operation and specifies the PCIe exchange space between downstream port nodes.

[0057] During normal operation, upstream and downstream ports achieve high-speed data exchange and processing via PCIe links, and the MCU is responsible for real-time monitoring of the PCIe switching network status. In the event of data transmission packet loss or even a complete link disconnection, the MCU auxiliary circuitry can quickly locate the cause of the fault and provide a backup mechanism. The specific steps are as follows:

[0058] Step 1: The MCU auxiliary circuit uses the level signals in the link status of the SM8619PCIe switch and the heartbeat signals of each processor node received by its GPIO pins to determine whether it is a link status fault or a processor node fault, and records the fault and reports the results.

[0059] Step 2: If the level signal is abnormal, it is determined to be a link fault. The fault information is reported to the external overall control equipment through the external bus so that remedial measures can be taken in time.

[0060] Step 3: If the heartbeat signal of the upstream node is abnormal, it is determined that the upstream node has failed. In the traditional PCIe architecture, the inability to configure the PCIe switching space will cause the entire PCIe switching network to lose its working capability. In this embodiment, the upstream node is automatically switched to a downstream node, and a downstream node is configured as a new upstream node. The new upstream node performs link configuration, data processing, data distribution, and data management to ensure the normal operation of the PCIe switching network and improve the fault tolerance of the product.

[0061] The specific steps for switching between upstream and downstream nodes are as follows;

[0062] Step 3.1: The MCU sets the DisablePort X bit of the parity port disable register of the SM8619PCIe switch to 1 via the I2C bus;

[0063] Step 3.2: The MCU writes the port number of the processor node that needs to be set as the upstream port to 1DCh[27:24] of the SM8619PCIe switch via the I2C bus;

[0064] Step 3.3: The MCU sets the DisablePort X bit of the parity port disable register of the SM8619PCIe switch to 0 via the I2C bus.

[0065] The aforementioned multi-node dynamic management method and system are based on a reasonable and effective redundant data processing architecture designed for PCIe switches. On the one hand, it can increase the data exchange and processing speed of the product; on the other hand, it can provide fault-tolerant backup capabilities and health monitoring capabilities, thereby improving reliability.

[0066] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

[0067] In addition, this specific embodiment also discloses a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, it implements the above-described multi-node dynamic management method based on a PCIe switch.

[0068] This specific embodiment also discloses a computer-readable storage medium storing the above-described multi-node dynamic management method based on a PCIe switch.

[0069] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A multi-node dynamic management system based on a PCIe switch, characterized in that: It includes a PCIe switch, a multiprocessor node, and an MCU auxiliary circuit. The multiprocessor node is connected to the PCIe switch and is used to receive data output by the PCIe switch, process the data, and then output it. The multiprocessor node includes one upstream port node and multiple downstream port nodes. The upstream port node is used for PCIe switch link configuration, data processing, data distribution, and data management. The downstream port nodes are used to receive and process the data allocated by the upstream port node and output the processed data. The MCU auxiliary circuit is connected to the multiprocessor node and the PCIe switch, and is used to monitor the working status of the multiprocessor node, switch the upstream port node and the downstream port node within the multiprocessor node according to the monitoring results, and monitor the working status of the PCIe switch.

2. The multi-node dynamic management system based on a PCIe switch according to claim 1, characterized in that, The MCU auxiliary circuit is connected via I 2 The C-bus connects the processor nodes in the multiprocessor node in series.

3. The multi-node dynamic management system based on a PCIe switch according to claim 1, characterized in that: The PCIe switch has multiple registers, each corresponding to a processor node within the multiprocessor node, and each register configures whether the corresponding processor node is a master processor node or a slave processor node.

4. The multi-node dynamic management system based on a PCIe switch according to claim 1, characterized in that: The PCIe switch is configured with multiple links, and each link is assigned an upstream port node or a downstream port node.

5. A multi-node dynamic management method based on a PCIe switch, characterized in that, Includes the following steps: Define the upstream and downstream port nodes within a multiprocessor node; Upstream port nodes perform link configuration, data processing, data distribution, and data management for PCIe switches, while downstream port nodes receive, process, and distribute the data, and then output the processed data. Based on the MCU auxiliary circuit, the working status of upstream port nodes, downstream port nodes, and PCIe switch internal links is monitored. When an upstream port node is malfunctioning, the PCIe switch is controlled to switch the upstream port node to a downstream port node and configure any downstream port node as an upstream port interface.

6. The multi-node dynamic management method based on a PCIe switch according to claim 5, characterized in that, The MCU auxiliary circuit monitors the operating status of the intralinks within the PCIe switch based on level signals, including: When the output is low, the system determines that the working status of the internal link of the PCIe switch is abnormal and reports the abnormal result. When a high-level or high / low waveform signal is output, it indicates that the internal link of the PCIe switch is functioning normally.

7. The multi-node dynamic management method based on a PCIe switch according to claim 5, characterized in that, The MCU auxiliary circuit monitors the operating status of each processor node within the multiprocessor node based on the heartbeat signal, including: When the MCU auxiliary circuit receives the heartbeat signal output by the processor node at a set frequency, it determines that the processor node is operating normally. When the MCU auxiliary circuit does not receive the heartbeat signal output by the processor node, it determines that the processor node is in an abnormal working state and reports the abnormal result.

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