Signal transmission system, signal processing system and method thereof

Abstract

A signal transmitting system, a signal processing system and methods thereof are disclosed. A frequency dependent dynamic range control method is used in a signal transmitting system having a lower impedance in a high frequency region, whereby a current spectrum and a regulation parameter are dynamically estimated to reduce the current in the high frequency region. This method advantageously avoids current overload without using a series resistor as a current limiter.

Description

TECHNICAL FIELD

[0001] The present invention relates to signal processing apparatus, systems and methods. More particularly, embodiments of the present invention use a frequency dependent dynamic range control technique in a signal emitting system to avoid current overload. In some embodiments, the technique is applied to a piezo speaker system. BACKGROUND

[0002] Piezo speakers are characterized by a low impedance in the high frequency region, representing a capacitive load. As a result, signals of higher frequencies can cause current overload. Known dynamic range control methods typically use a series resistor as a current limiter, but cause signal attenuation at all frequencies.

[0003] Therefore, there is a need for improved methods and systems that address some of the problems described above. SUMMARY

[0004] In embodiments of the present invention, a frequency dependent dynamic range control method is used in a signal emitting system that has a low impedance in the high frequency region. The present invention implements an efficient technique to dynamically estimate the current spectrum and adjust parameters to reduce the current in the high frequency region. The method of the present invention advantageously avoids current overload without using a series resistor as a current limiter.

[0005] Embodiments of the present invention provide a signal emitting system that includes a signal emitter, an amplifier and a processor. The signal emitter has a conductance that increases with signal frequency, the signal emitter being configured to emit an output signal based on an amplified signal. The amplifier is coupled to the signal emitter, the amplifier being configured to receive a dynamically adjusted source signal and generate the amplified signal based on the dynamically adjusted source signal, and transmit the amplified signal to the signal emitter.

[0006] A processor is coupled to the amplifier to receive the source signal and generate the dynamically adjusted source signal for the amplifier. The processor includes a frequency conversion module, a spectrum-voltage transfer function module, an admittance characteristic module, a parameter extraction module, a dynamically adjusted filter module, an inverse conversion module, and a post-processing module. The frequency conversion module converts the source signal into a frequency domain representation, which includes multiple frequency intervals. The spectrum-voltage transfer function module converts the frequency domain representation into a voltage representation. The admittance characteristic module converts the voltage representation into a current spectrum. The parameter extraction module determines the breakdown frequency interval index and roll-off factor, where the breakdown frequency interval index is the index of the highest frequency interval where the accumulated current does not exceed the current limit, and uses the roll-off factor to exponentially decay the frequency domain representation, where the roll-off factor is a dynamically determined value ranging from 0 to 1, iteratively determined to keep the total current below the current limit. A dynamic adjustment filter module is used to construct an adjustment gain vector for the multiple frequency ranges, wherein the adjustment gain vector includes a flat-band portion with unity gain and a roll-off portion with attenuation gain. Based on the breakdown frequency range index, the range index of the frequency range in the flat-band portion is lower than the flat-band range index, and the range index of the frequency range in the roll-off portion is higher than the flat-band range index. The adjustment gain vector is applied to the frequency domain representation to produce an adjusted frequency domain representation. An inverse conversion module is used to inversely convert the adjusted frequency domain representation to an intermediate time domain signal. A post-processing module performs gradient control on the intermediate time domain signal to limit the differences between consecutive samples of the intermediate time domain signal to generate the dynamically adjusted source signal, and sends the dynamically adjusted source signal to the amplifier.

[0007] In some embodiments of the signal transmission system described above, the parameter extraction module is configured to use a binary search to iteratively determine the roll-off factor, wherein the gain of the first interval in the roll-off portion is reduced by the roll-off factor, and the gain of the remaining interval in the roll-off portion is reduced exponentially by the roll-off factor.

[0008] In some embodiments, the signal transmitter is a piezoelectric loudspeaker, and the output signal is an audio signal.

[0009] In some embodiments, the frequency domain representation includes Fast Fourier Transform (FFT), Discrete Fourier Transform (DFT), Modified Discrete Cosine Transform (MDCT), Modified Discrete Sine Transform (MDST), Constant Q Transform (CQT), and Variable Q Transform (VQT) using filter channel distribution based on Equivalent Rectangular Bandwidth (ERB) or Buck scale.

[0010] In some embodiments, the current spectrum is modified according to an expansion factor greater than 1.

[0011] In some embodiments, the post-processing module determines a difference threshold for the gradient control based on characteristics of the source signal and the intermediate time-domain signal, including at least one of crest factor, mean value, standard deviation, root mean square, maximum amplitude, average amplitude, crest factor, spectral centroid, and spectral spread.

[0012] Some embodiments of the present disclosure provide a signal processing method, comprising the steps of: providing a frequency-domain representation of a source signal, wherein the frequency-domain representation comprises a plurality of frequency bins; dynamically determining a clipping frequency bin index and a roll-off factor, wherein the clipping frequency bin index is a highest frequency bin index at which a cumulative current is below a current limit, and the roll-off factor defines an exponential decay of the frequency-domain representation, wherein the roll-off factor is a number from 0 to 1, and iteratively determining such that a total current is below the current limit; constructing an adjustment gain vector for the plurality of frequency bins, wherein the adjustment gain vector comprises a flat portion having a unity gain and a roll-off portion having a decay gain, wherein based on the clipping frequency bin index, the frequency bins of the flat portion have bin indices below a flat bin index, and the frequency bins of the roll-off portion have bin indices above the flat bin index; applying the adjustment gain vector to the frequency-domain representation to generate an adjusted frequency-domain representation such that the total current is below the current limit.

[0013] In some embodiments, the signal processing method further comprises: receiving the source signal in a time domain; converting the source signal to the frequency-domain representation; converting the frequency-domain representation to a voltage representation; converting the voltage representation to a current spectrum; estimating a current using the current spectrum; converting the adjusted frequency-domain representation to an intermediate time-domain signal; performing gradient control on the intermediate time-domain signal to limit a difference between consecutive samples of the intermediate time-domain signal, thereby generating a dynamically adjusted source signal; and sending the dynamically adjusted source signal to an amplifier. BRIEF DESCRIPTION OF DRAWINGS

[0014] Figure 1 A schematic diagram of a signal emitting system 100 illustrating various embodiments of the present disclosure.

[0015] Figure 2 A schematic block diagram of an audio system 200 illustrating various embodiments of the present disclosure.

[0016] Figure 3 A plot of impedance versus frequency for a representative piezoelectric speaker, in which impedance decreases as signal frequency increases.

[0017] Figure 4 A plot of a transfer function of an example amplifier.

[0018] Figure 5A A plot of a current spectrum for a piezoelectric speaker.

[0019] Figure 5B Harmonic amplitude distribution of a piezoelectric loudspeaker is plotted.

[0020] Figure 6 A schematic block diagram of a processor 600 of some embodiments of the present invention is plotted.

[0021] Figure 7A Gain versus frequency transfer function plot in log-linear scale according to various embodiments of the present invention.

[0022] Figure 7B Gain versus frequency transfer function plot in linear-linear scale and log decibel scale according to various embodiments of the present invention.

[0023] Figure 8 A simplified flowchart of a signal processing method according to various embodiments of the present invention is plotted.

[0024] Figure 9 A simplified block diagram of an apparatus that can be used to implement various embodiments of the present invention is plotted.

[0025] Reference numerals

[0026] 100, 200: signal transmission system; 101, 132, S IN , x[n], z[n]: source signal; 110: signal transmitter; 112, 205: output signal; 120: amplifier; 122: amplified signal; 130, 600, 960: processor; 200: audio system; 201, Vin: input signal; 202: ADC; 203: digital signal; 204: digital signal processor; 206: DAC; 208: audio amplifier; 209, Vout: audio output signal; 210: loudspeaker; 310, 320, 330: curve; 520: harmonic; 610: frequency conversion module; 620: transfer function module; 630: admittance characteristic module; 640: parameter extraction module; 650: dynamic adjustment filter module; 660: inverse conversion module; 670: post-processing module; 701-m1, 701-m2, 701-m3: transfer function; 702-1: flat band portion; 702-1: first portion; 702-2: second portion; 702-2: roll-off portion; 810-890: steps; 900: computer system; 910: monitor; 920: computer; 930: user output device; 940: user input device; 950: communication interface; 970: RAM; 980: disk drive; 990: bus subsystem; G[k]: admittance function; H[k]: spectral-voltage transfer function; I[k]: current spectrum; Q[k]: adjustment gain vector; V[k]: voltage representation; X[k], Y[k]: frequency domain representation; y[n]: intermediate time domain signal. Detailed Implementation

[0027] Figure 1 Schematic diagrams illustrating signal transmission systems 100 according to various embodiments of the present invention are shown. Figure 1 As shown, the signal transmission system 100 includes a signal transmitter 110, an amplifier 120 coupled to the signal transmitter 110, and a processor 130 coupled to the amplifier 120. The signal transmitter 110 is configured to transmit an output signal 112 (also labeled S in the figure) based on the amplified signal 122. OUT Amplifier 120 is configured to receive a dynamically adjusted source signal 132, generate an amplified signal 122 based on the dynamically adjusted source signal 132, and transmit the amplified signal 122 to signal transmitter 110. Processor 130 is coupled to amplifier 120. Processor 130 is configured to receive source signal 101 (also indicated as S in the figure). IN It processes the source signal 101 to generate a dynamically adjusted source signal 132 and sends the dynamically adjusted source signal 132 to the amplifier 120.

[0028] In various embodiments, the signal transmitter 110 can be any system that transmits signals. For example, in some embodiments, the signal transmitter 110 is an audio speaker, headphones, or an audio signal transmitter. In some embodiments, the signal transmitter 110 is an antenna that transmits electromagnetic signals. For example, the signal transmitter 110 can be a radio signal transmitter or an optical signal transmitter.

[0029] In various embodiments, amplifier 120 is an electronic amplifier circuit that amplifies or increases the power of a signal, where the signal is typically a voltage or current that varies over time. Examples of amplifier 120 include audio amplifiers, radio frequency (RF) amplifiers, operational amplifiers, or switched-mode amplifiers. Amplifier 120 can be implemented using CMOS transistors or bipolar transistor circuits. The output format of amplifier 120 is suitable for signal transmitter 110. For example, signal transmitter 110 may include a signal converter or transducer that converts the source signal into an analog or digital electronic signal that can be processed by signal transmitter 110. For example, signal transmitter 110 may include an analog-to-digital converter (ADC) and a digital-to-analog converter (DAC), etc.

[0030] According to embodiments, processor 130 can be any signal processing device. For example, processor 130 may include analog filter circuitry, a general-purpose digital computer, or a digital signal processor (DSP). For a given processor 130, the form of the source signal 132 is suitable for the processor. For example, signal transmitter 110 may include a signal converter or transducer that converts the source signal into an analog or digital electronic signal that can be processed by processor 130. For example, signal transmitter 110 may include an analog-to-digital converter and a digital-to-analog converter. Further details of signal transmitter 110 are described below using audio system 200 as an example.

[0031] Figure 2 A simplified block diagram of an audio system 200 according to various embodiments of the present invention is shown. Figure 2 As shown, the audio system 200 is configured to receive an audio input signal Vin 201 and provide an audio output signal Vout 209 to the speaker 210. The audio system 200 includes an analog-to-digital converter 202, a digital signal processor 204, a digital-to-analog converter 206, and an audio amplifier 208. The output signal from the analog-to-digital converter 202 is a digital signal 203 fed into the digital signal processor 204, which generates a processed output signal 205 for the digital-to-analog converter 206. The output signal from the digital-to-analog converter 206 is an analog signal 207 (also labeled Va in the figure), which is fed into the audio amplifier 208; the audio amplifier 208 provides the audio output signal 209 (also labeled Vout in the figure) to the speaker 210. The functions of these components are not detailed here.

[0032] In the audio system 200, the digital signal processor 204 is... Figure 1 An example of a processor 130 in a signal transmission system 100. Audio amplifier 208 is... Figure 1 An example of amplifier 120 in signal transmission system 100, speaker 210 is Figure 1 An example of a signal transmitter 110 in a signal transmission system 100. The digital signal 203 input to the digital signal processor 204 corresponds to... Figure 1 The source signal 101 in the signal transmission system 100. The output signal 205 from the digital signal processor 204 is a digital signal, also called z[n], where n is an integer.

[0033] In some embodiments, the audio system 200 is a piezoelectric speaker system, wherein the speaker 210 is a piezoelectric speaker. Figure 3 The impedance versus frequency curve of a representative piezoelectric loudspeaker is plotted, showing that the impedance decreases as the signal frequency increases. Figure 3In particular, curve 310 is a log-log curve, curve 320 is a linear-log curve, and curve 330 is a linear-linear curve. In all three graphs, the circles represent measured characteristics, the dashed lines are interpolated or extrapolated curves, and the dotted line shows the theoretical impedance versus frequency curve for a capacitor with a capacitance of 440 nf. All three graphs show that the impedance of the piezoelectric speaker decreases as the frequency increases, representing a capacitive load.

[0034] Figure 4 A graph of the transfer function of an example amplifier is shown. It can be seen that the speaker system does not have a flat transfer function, with the gain dropping at higher frequencies. Figure 4 A representative transfer function of a class-D amplifier.

[0035] It is known that piezoelectric speakers suffer from high current overload due to low impedance in the high frequency region. A maximum current limit is usually specified in the datasheet, and breakdown can occur when the current exceeds the maximum current limit.

[0036] In addition, the speaker system can have non-linear characteristics due to harmonic distortion, as shown in Figure 5A and Figure 5B . Figure 5A A graph of the current spectrum of a piezoelectric speaker is shown, with the horizontal axis being the frame index and the vertical axis being the frequency, Figure 5A showing harmonics and harmonics aliasing of a linear sweeping tone. Figure 5B A graph of the harmonic amplitude distribution of a piezoelectric speaker is shown. In Figure 5B , the horizontal axis is the harmonic index and the vertical axis is the amplitude; the above-mentioned deficiencies hinder reliable current estimation and make it difficult to implement dynamic range control.

[0037] A known way to limit the current of a piezoelectric speaker system is to cascade the piezoelectric speaker with a series resistor. However, this method disadvantageously reduces the gain in the high frequency region even if the content does not trigger current overload, resulting in permanent attenuation of high frequency content. Therefore, the signal content needs to be modified only when it is necessary to keep the current below the current limit and maintain a smooth perception.

[0038] Figure 6 A simplified block diagram of a processor 600 according to some embodiments of the present application is shown. The process 600 is an example of a processor that can be used as the processor 130 in the signal transmission system 100 of Figure 1 or as the digital signal processor 204 in the audio system 200 of Figure 2 . In particular, the process 600 can be used as the processor 130 in the signal transmission system 100 ofFigure 1 signal transmission system 100 and Figure 2 audio system 200, the load device is characterized by impedance decreasing with increasing frequency, representing a capacitive load device. In other words, the load device is characterized by admittance increasing with increasing signal frequency. Examples of such load devices include piezoelectric speakers.

[0039] In Figure 6 embodiments, the processor 600 includes a frequency conversion module 610, a transfer function module 620, an admittance characteristic module 630, a parameter extraction module 640, a dynamic adjustment filter module 650, an inverse conversion module 660, and a post-processing module 670. In some embodiments, the processor 600 is configured to receive a source signal x[n], process the source signal x[n], and generate a dynamically adjusted source signal z[n], where n is an integer.

[0040] In some embodiments, a processor (e.g., the processor 130 in Figure 1 and the processor 600 in Figure 6 is coupled to an amplifier (e.g., the amplifier 120 in Figure 1 or the audio amplifier 208 in Figure 2 ) and configured to receive a source signal x[n] and generate a dynamically adjusted source signal z[n] to the amplifier 120. In some embodiments, the processor includes a frequency conversion module 610 configured to convert the source signal x[n] to a reconfigurable frequency domain representation X[k], where the frequency domain representation includes a plurality of frequency bins. A transfer function module 620 converts the frequency domain representation X[k] to a voltage representation V[k], and an admittance characteristic module 630 converts the voltage representation V[k] to a current spectrum I[k]. For example, an audio signal with a bandwidth of 24K can be divided into 512 bins.

[0041] In some embodiments, the reconfigurable frequency-domain representation can be selected from a fast Fourier transform (FFT), a Discrete Fourier Transform (DFT), a Modified Discrete Cosine Transform (MDCT), a Modified Discrete Sine Transform (MDST), a Constant Q transform (CQT), or a Variable Q transform (VQT) using filterbank distribution according to Equivalent Rectangular Bandwidth (ERB) or Bark scale.

[0042] The processor 600 further includes a parameter extraction module 640 configured to determine a breakdown frequency bin index kb and a roll-off factor r, where the breakdown frequency bin index kb is the highest frequency bin index at which the cumulative current does not exceed the preset current limit, and the roll-off factor r is used to exponentially decay (rn) the frequency-domain representation, where the roll-off factor is a dynamically determined value ranging from 0 to 1, determined iteratively such that the overall current is the preset current limit. For example, in an embodiment, the roll-off factor r is selected such that the total current is equal to or less than 95% and greater than 90% of the current limit.

[0043] The processor 600 further includes a dynamic adjustment filter module 650 configured to construct an adjustment gain vector Q[k] for a plurality of frequency bins, where the adjustment gain vector includes a flat-band portion with unity gain and a roll-off portion with decay gain. Examples of the flat-band portion and the roll-off portion are shown in Figure 7A and Figure 7B .

[0044] Figure 7A is a transfer function of gain versus frequency in a log-linear scale according to various embodiments of the present application. As shown in Figure 7A Based on the breakdown frequency bin index, the flat-band portion 702-1 includes frequency bins with bin indices lower than the flat-band bin indices (f1, f2, or f3), and the roll-off portion 702-2 includes frequency bins with bin indices higher than the flat-band bin indices. The dynamic adjustment filter module 650 is configured to apply the adjustment gain vector Q[k] to the frequency-domain representation to produce an adjusted frequency-domain representation Y[k]. Figure 7B The transfer function of gain versus frequency is shown in a linear-linear scale (720) and a log-decibel scale (730).

[0045] The processor 600 also includes an inverse conversion module 660 configured to perform an inverse conversion (F"1) to convert the adjusted frequency domain representation Y[k] to an intermediate time domain signal y[n]. In some embodiments, the processor 600 also includes a post-processing module 670 that applies a gradient control to the intermediate time domain signal y[n] to limit the difference between consecutive samples of the intermediate time domain signal y[n], thereby producing a dynamically adjusted source signal z[n] and sending the dynamically adjusted source signal to an amplifier (e.g., the amplifier 120 in Figure 1 or the audio amplifier 208 in Figure 2 ). Further details of the processor 600 are described below.

[0046] In some embodiments, the channels of the digital sampled signal s[n; m] (e.g., at 48 kHz) are based on frames (e.g., 512 samples, i.e., 1.6667 ms), where m is the index of the frame. A window function w[n] (e.g., Hanning window, 1024 points) is used to modulate the frame signal and its memory (e.g., the previous frame) to produce a windowed signal x[n; m].

[0047] x[n; m] = w[n] s[n; m] (1)

[0048] For simplicity, Figure 6 a single signal frame is illustrated for illustration and the frame index "m" is omitted. For example, in Figure 6 , the signal x[n; m] is shown as x[n]. Similarly, the signals X[k; m], V[k; m], I[k; m], Y[k; m], y[n; m], and z[n; m] are shown as X[k], V[k], I[k], Y[k], y[n], and z[n], respectively.

[0049] In the frequency conversion module 610, the windowed signal x[n; m] is converted into a frequency domain representation X[k; m] (k = 1... 1024) by a Fourier transform (e.g., FFT).

[0050]

[0051] The frequency domain representation can be characterized by the first value, i.e., the bin in some context. In some embodiments, the conversion operation is performed for the first value.

[0052] The transfer function module 620 converts the frequency domain representation into a voltage spectrum V[k; m] by a spectrum-to-voltage transfer function H[k].

[0053] V[k;m]=H[k]X[k;m] (3)

[0054] An example of the spectrum-voltage transfer function H[k] is in Figure 4 As shown in the figure, the spectrum-voltage transfer function H[k] defines the mapping between the frequency domain representation and the voltage spectrum.

[0055] In the admittance characteristic module 630, the admittance function G[k] (for example, Figure 2 Convert the voltage spectrum to the current spectrum I[k;m].

[0056] I[k;m]=G[k]V[k;m] (4)

[0057] An example of the admittance function G[k] is shown in Figure 3 Admittance function G[k]( Figure 3 Figure 330 in the figure can be directly derived from the impedance function (e.g., Figure 3 Export from Figure 310 or Figure 320.

[0058] The parameter extraction module 640 is used to determine the total current of the channels, specifically whether the total current of any channel exceeds a predetermined current limit Ilmt. For example, the predetermined current limit could be a maximum current limit listed in the specifications of a signal transmitter (e.g., a piezoelectric loudspeaker). If the total current of any channel exceeds the predetermined current limit Ilmt, two parameters of the dynamically adjusted filter function Q[k;m] are determined. In some embodiments, the roll-off factor is an exponential function used to reduce high-frequency signals to avoid breakdown. (See below for reference.) Figure 7A and Figure 7B The dynamically adjusted filter function Q[k;m] is described in more detail.

[0059] In the dynamic adjustment filter module 650, the dynamic adjustment filter function Q[k;m] is applied to the dynamic attenuation portion of the frequency domain representation, thereby keeping the total current under control. The dynamic adjustment filter function Q[k;m] is applied to modify the frequency domain representation to generate an attenuated frequency domain representation Y[k;m], ensuring that the total current is below a predetermined current limit Ilmt.

[0060] Y[k;m]=Q[k;m]X[k;m] (5)

[0061] Please refer to Figure 6 In the inverse conversion module 660, the attenuated frequency domain representation Y[k;m] is converted back to the intermediate time domain signal y[n;m] by an inverse Fourier transform (e.g., IFFT).

[0062]

[0063] Next, in the post-processing module 670, the dynamically adjusted source signal z[n; m] can be synthesized from the intermediate time-domain signal by an overlap-and-add method and a gradient control.

[0064] When the current spectrum can be scaled advantageously by a puffing factor (> 1). Figure 5A A spectrogram of the output current of a linearly scanned tone from 50 Hz to 24 kHz is shown. The light dashed line 510 highlights the fundamental frequency of the scanned tone. The non-linearity of the system generates harmonics 520. The trace of the harmonics is an aliased image 530 of the harmonics that exceeds the Nyquist frequency of the measurement device (i.e. half of the sampling rate). All harmonics and aliased energy is considered in the total current. From the observation, the harmonics of different fundamental frequencies exhibit similar behavior. Figure 5B The distribution of the relative harmonic amplitudes (i.e. the fundamental amplitude normalized) is shown. It can be seen that the odd harmonics (characterized by odd harmonic indices) stand out. The even harmonics (characterized by even harmonic indices) are more likely to be aliased images of the odd harmonics that exceed the Nyquist frequency. The puffing factor can be determined from the root mean square of the largest harmonic amplitudes in the collected harmonic amplitudes.

[0065] In the dynamic regulation filter module 650, the filter function Q[k; m] dynamically attenuates a portion of the frequency-domain representation to keep the total current under control. When the estimated current exceeds the current limit, the single-sideband (SSB) filter function is split into two frequency bands: a flat band consisting of the first K0intervals and an attenuation band consisting of the remaining K1intervals (i.e. The number of intervals is split into two frequency bands: a flat band consisting of the first K0intervals and an attenuation band consisting of the remaining K1intervals (i.e. The values of the flat band intervals are all 1, the values of the roll-off band intervals are less than 1, and preferably monotonically decreasing with increasing frequency. The value of the first remaining interval can be defined by a roll-off factor r, the value of the second remaining interval can be r 2 , and the value of the i-th remaining interval can be r i .

[0066]

[0067] In the parameter extraction module 640, the breakdown frequency interval index kb and the roll-off factor r are determined. Since the total current is calculated in root mean square (rms) fashion, it is more convenient to check whether the accumulated current exceeds the current limit using sum-square.

[0068]

[0069] To define the value of K0correctly, the accumulated square current S[k] is calculated from the first interval.

[0070]

[0071] where I[i] is the current of the i-th component in the first interval.

[0072] The breakdown frequency interval index kb is determined based on the position where the cumulative current first just exceeds the current limit. In other words, the breakdown frequency interval index is the highest frequency interval index where the cumulative current does not exceed the current limit.

[0073] k b = max arg S[k] < S lmt (9)

[0074] A flattening factor b (e.g. 0.8) is applied to the breakdown frequency interval index kb to obtain the number of flattening intervals.

[0075] K o = b k b (10)

[0076] A roll-off factor r is then selected to control the current.

[0077]

[0078]

[0079] S flat +S roll <S lmt (13)

[0080] S roll <S lmt -S flat =S thr (14)

[0081]

[0082] where S lmt denotes the current limit, S thr denotes the threshold current limit of the roll-off part.

[0083] Let s = r 2 and 0 < s < 1 to simplify the problem to a mathematically more tractable polynomial.

[0084]

[0085] Given I[i+K0] 2The left-hand term can be evaluated efficiently by a MAC (Multiply or Accumulate) operation as the coefficients are known. A binary search or gradient search is performed in the range 0 to 1 to narrow the range of s. Next, the roll-off factor r can be determined as follows.

[0086]

[0087] As mentioned above, setting two parameters K0and r is sufficient to keep the current below the limit. In some embodiments, it is quite desirable to adjust the parameters once the triggering condition has disappeared to mitigate perceptual discontinuity. An adaptation (or forgetting) factor a and b is advantageously applied to each parameter.

[0088]

[0089]

[0090] where m is the frame index.

[0091] Figure 7A The transfer functions (Q[k]) for dynamic determination for a particular test vector are depicted in accordance with some embodiments of the present application. In Figure 7A the horizontal axis is frequency in kHz on a linear scale and the vertical axis is gain on a logarithmic scale. Figure 7A The transfer function for each frame of the test vector is shown. For example, transfer functions 701-m1, 701-m2, and 701-m3 depict the transfer function for frame index numbers m1, m2, and m3 of a signal having multiple audio signal frames. The transfer function for each frame of the signal is dynamically determined, and the frame index values m1, m2, and m3 do not necessarily represent the order of the frames.

[0092] Each transfer function (701) is composed of two parts: a first part 702-1 represented by a constant gain and a second part 702-2 represented by a roll-off gain function. In some embodiments, the first part 702-1 is a flat band portion of unity gain, and the second part 702-2 is a roll-off portion of decaying gain. In Figure 7A In a log-linear plot of the transfer function, the first part 702-1 and the second part 702-2 are both shown as straight lines, the first part 702-1 is flat, and the second part 702-2 is tilted downward. Depending on the spectrum of each frame, the slope and the transition frequency K0of each frame can be different. For example, transition frequencies f1, f2, and f3 are shown for frame index values m1, m2, and m3, respectively.

[0093] As Figure 7AThe lower limit of all transfer functions is shown as a thick black line 705, which represents the minimum gain for each frequency bin of all frames. Without dynamically determining the width of the flat band (determined by the transition frequency) and the slope of the roll-off band, a fixed filter with the transfer function represented by 705 can be applied to avoid current breakdown. On the other hand, a dynamic adjustment filter is determined for each frame. This dynamic approach advantageously preserves high frequency content with allowed gain while keeping the current under control.

[0094] In the post-processing module 670, a gradient control is added to check or adjust the difference (delta) between samples to prevent short-term current surges. For each sample, the difference d[n] between consecutive samples is first calculated, and if the difference is greater than a threshold dthr, the difference is limited within the threshold; in other words, the next sample z[n] is set to the previous sample y[n-1] plus or minus the threshold dthr. On the other hand, if the difference is not greater than the threshold dthr, the next sample y[n] is taken as the final conditioned sample.

[0095] d[n] = y[n] - y[n-1] (20)

[0096]

[0097] In some embodiments, the threshold dthr can be a constant of the system. However, it can disadvantageously impose too much restriction, resulting in unnecessary distortion. In some embodiments, the threshold can be determined based on characteristics of the source signal and / or the conditioned source signal, including mean, standard deviation, root mean square, maximum amplitude, average amplitude, crest factor, spectral centroid, and spectral spread, etc.

[0098] Figure 8 A simplified flowchart of a method for signal processing according to various embodiments of the present application is illustrated. In Figure 8 The method 800 includes the following steps.

[0099] At step 810, a source signal is received.

[0100] At step 820, the source signal is converted to a reconfigurable frequency domain representation, where the frequency domain representation includes a plurality of frequency bins.

[0101] At step 830, the frequency domain representation is converted to a voltage representation.

[0102] At step 840, the voltage representation is converted to a current spectrum.

[0103] At step 850, a breakdown frequency bin index and a roll-off factor are determined, where the breakdown frequency bin index is the highest frequency bin index for which the cumulative current does not exceed the current limit, and the roll-off factor is used to exponentially decay the frequency domain representation, where the roll-off factor is a dynamically determined value ranging from 0 to 1 that is iteratively determined such that the total current is below the current limit.

[0104] At step 860, an adjustment gain vector is constructed for the plurality of frequency bins, where the adjustment gain vector contains a flat portion of unity gain and a roll-off portion of decay gain, where the frequency bins of the flat portion have bin indices lower than the flat bin index based on the breakdown frequency bin index, and the frequency bins of the roll-off portion have bin indices higher than the flat bin index.

[0105] At step 870, the adjustment gain vector is applied to the frequency domain representation to produce an adjusted frequency domain representation.

[0106] At step 880, the adjusted frequency domain representation is inverse converted to an intermediate time domain signal.

[0107] At step 890, gradient control is applied to the intermediate time domain signal to limit the difference between consecutive samples of the intermediate time domain signal, thereby producing a dynamically adjusted source signal.

[0108] In some embodiments, the method 800 further includes sending the dynamically adjusted source signal to an amplifier.

[0109] In some embodiments, the method further includes iteratively determining the roll-off factor using a binary search, where the gain of the first bin in the roll-off portion is reduced by the roll-off factor, and the remaining bins in the roll-off portion are reduced by exponents of the roll-off factor.

[0110] In some embodiments, the method produces a dynamically adjusted source signal for a signal emitter that is characterized by an increasing admittance with signal frequency.

[0111] In some embodiments, the method produces a dynamically adjusted source signal for a piezoelectric speaker to produce an audio output.

[0112] In some embodiments, the reconfigurable frequency domain representation is selected from a Fast Fourier Transform (FFT), a Discrete Fourier Transform (DFT), a Modified Discrete Cosine Transform (MDCT), a Modified Discrete Sine Transform (MDST), a Constant Q Transform (CQT), or a Variable Q Transform (VQT) using a filter bank distribution based on Equivalent Rectangular Bandwidth (ERB) or Bark scale.

[0113] In some embodiments, the method further includes modifying the current spectrum by a dilation factor greater than 1.

[0114] In some embodiments, the method further comprises determining a difference threshold for the gradient control based on characteristics of the source signal and the intermediate time domain signal, including at least one of: a crest factor, and a mean value and a standard deviation; a root mean square; a maximum amplitude; a mean amplitude; a crest factor; a spectral centroid; and a spectral spread.

[0115] In some embodiments, the method 800 summarized above is performed by the signal processing system 600 in the signal transmission systems 100 and 200 described above with reference to Figures 1 to 7B

[0116] The methods and processes of the present application can be partially or entirely implemented by code and / or data stored in a computer-readable storage medium or device, such that when a computer system reads and executes the code and / or data, the computer system performs the associated methods and processes. These methods and processes can also be partially or entirely implemented by hardware modules or devices, such that when the hardware modules or devices are activated, they carry out the associated methods and processes. The methods and processes disclosed herein can be implemented using a combination of code, data, hardware modules or devices.

[0117] According to some embodiments, the techniques described herein can be implemented by one or more special-purpose computing devices or general-purpose computers. A special-purpose computing device can be hard-wired to perform the techniques, or can include digital electronic devices such as one or more application-specific integrated circuits (ASICs) or field programmable logic arrays (FPGAs) that are persistently programmed to perform the techniques, or can include one or more general purpose hardware processors programmed to perform the techniques pursuant to program instructions in firmware, memory, other storage, or a combination. Such special-purpose computing devices can also combine custom hard-wired logic, analog circuitry, or other custom programming (including

[0118] Figure 9 A simplified block diagram of a device that can be used to implement various embodiments in accordance with the present application is illustrated. Figure 9 Only embodiments in conjunction with the present application are illustrated and described, and the scope of the claims of the present application is not limited thereby. Those skilled in the art will recognize other variations, modifications and alternatives. In one embodiment, a computer system 900 generally includes a monitor 910, a computer 920, a user output device 930, a user input device 940, a communication interface 950.

[0119] Figure 9 A computer system capable of embodying the present disclosure is illustrated. For example, Figure 1 the processor 130 in the device 100 of​Figure 2 the digital signal processor 204 in FIG. 1, Figure 6 the processor 600 in FIG. 6 can be implemented using a system similar to Figure 9 the system 900 depicted in FIG. 9. The functions of the processor can be performed by one or more processors depicted in FIG. 10. The amplifiers 120 and the audio amplifiers 208, the ADCs 202, and the DACs 206 can be implemented using standard analog and mixed-signal techniques. The signal emitters 110, including the speakers 210, are typically provided by the respective device vendors. Figure 9

[0120] As shown in FIG. 9, the computer 920 can include a processor 960 that communicates with a number of peripheral devices via a bus subsystem 990. These peripheral devices can include user output devices 930, user input devices 940, communication interfaces 950, and storage subsystems such as random access memory (RAM) 970 and disk drives 980. Figure 9

[0121] The user input devices 940 can include all possible types of devices and mechanisms used to input information to the computer 920. These can include a keyboard; a keypad; a mouse; a stylus; a microphone; and other types of input devices. In various embodiments, the user input devices 940 are typically embodied as a computer mouse, a trackball, a trackpad, a joystick, a wireless remote, a drawing tablet, a voice command system, an eye tracking system, and the like. The user input devices 940 typically allow the user to select objects, icons, text, and the like that appear on the monitor 910 via commands that are rendered by inputting devices. The user input devices 940 typically allow the user to command the computer 920 by clicking on or otherwise selecting one or more buttons appearing on the monitor 910.

[0122] The user output devices 930 include all possible types of devices and mechanisms used to output information from the computer 920, such as a display (e.g., the monitor 910), a non-visual display (e.g., audio output devices, etc.).

[0123] The communication interfaces 950 provide an interface to other communication networks and devices. The communication interfaces 950 can be used to receive data from and transmit data to other systems. Embodiments of the communication interfaces 950 typically include an Ethernet card, a modem (telephone, satellite, cable

[0124] ​​In various embodiments, computer system 900 can also include software that enables the computer system 900 to communicate over network 990, such as software for communicating hyper-text

[0125] RAM 970 and disk drive 980 are configured to store an example of tangible storage media, such as an embodiment of the present application, containing executable computer code, human readable code, and the like. Other types of physical storage media include floppy disks, removable hard disks, optical storage media (e.g., CD-ROMs, DVDs and bar codes), semiconductor memory (e.g., flash memory), read-only memories (ROMs), battery backed volatile memories, network storage devices, and the like. RAM 970 and disk drive 980 can be configured to store basic programming and data structures that provide functionality provided by the present application.

[0126] Software code modules and instructions that provide the functionality of the present application can be stored in RAM 970 and disk drive 980. These software code modules and instructions are executed by processor 960. RAM 970 and disk drive 980 can also provide a repository for storing data used in accordance with the present application.

[0127] RAM 970 and disk drive 980 can include a number of memories including a main random access memory (RAM) for storage of instructions and data used on program execution and a read only memory (ROM) in which fixed instructions are stored. RAM 970 and disk drive 980 can include a file storage subsystem that provides persistent (non-volatile) storage for program and data files. RAM 970 and disk drive 980 can also include removable storage systems such as removable flash memory.

[0128] Bus subsystem 990 provides a mechanism for letting the various components and subsystems of computer 920 communicate with each other as intended. Although bus subsystem 990 is shown schematically as a single bus, alternative embodiments of the bus subsystem can utilize multiple buses.

[0129] Figure 9A computer system capable of implementing the present application is illustrated in FIG. 1. As those skilled in the art will appreciate, the present application is suitable for use with all types of computer systems and is not limited to a particular type of computer or network. Many other hardware and software configurations are suitable for use with the present application. For example, the computer can be a desktop computer, a laptop computer, a mainframe computer, or a tablet computer. In addition, the computer can be a series of networked computers. Moreover, other microprocessors, such as Pentium TM or Itanium TM microprocessors, Opteron TM or Athlon XP TM microprocessors from Advanced Micro Devices, Inc., etc. can be used. In addition, other types of operating systems, such as or other operating systems from Microsoft Corporation, Solaris from Sun Microsystems, LINUX, UNIX, etc. can be used. In other embodiments, the techniques described above can be implemented on a chip or a board.

[0130] Various embodiments of the present application can be implemented in the form of logic in software, hardware, or a combination of both. The logic can be stored in a non-transitory computer-readable or machine-readable storage medium as a set of instructions adapted to direct a processor of a computer system to perform a set of steps disclosed in the embodiments of the present disclosure. The logic can form part of a computer program product adapted to direct an information processing apparatus to perform a set of steps disclosed in the embodiments of the present disclosure. Based on the disclosure and teachings provided herein, a person of ordinary skill in the art will appreciate other ways and / or methods to implement the present disclosure.

[0131] The data structures and code described herein can be stored in part or in whole on a computer-readable storage medium and / or hardware module and / or hardware device. The computer-readable storage medium includes, but is not limited to, volatile memory, non-volatile memory, magnetic and optical storage devices such as disk drives, magnetic tape, CDs (compact discs), DVDs (digital versatile discs or digital video discs), or other media capable of storing code and / or data. The hardware modules or devices described herein include, but are not limited to, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), dedicated or shared processors, and / or other hardware modules or devices now known or later developed.

[0132] The methods and processes herein can be partially or entirely embodied in code and / or data stored in a computer-readable storage medium or device, such that when a computer system reads and executes the code and / or data, the computer system performs the associated methods and processes. The methods and processes can also be partially or entirely embodied in a hardware module or device, such that when the hardware module or device is activated, the associated methods and processes are performed. The methods and processes disclosed herein can be embodied using a combination of code, data, and hardware modules or devices.

Claims

1. A signal transmitting system, characterized by, Comprising: a signal emitter having an admittance increasing with signal frequency, the signal emitter to emit an output signal based on an amplified signal; an amplifier coupled to the signal emitter, the amplifier to: receive a dynamically adjusted source signal; generate the amplified signal based on the dynamically adjusted source signal; and transmit the amplified signal to the signal emitter; and a processor coupled to the amplifier and to receive a source signal and generate the dynamically adjusted source signal to the amplifier, the processor comprising: a frequency conversion module to convert the source signal to a frequency domain representation, wherein the frequency domain representation comprises a plurality of frequency bins; a spectrum-to-voltage transfer function module to convert the frequency domain representation to a voltage representation; an admittance characteristic module to convert the voltage representation to a current spectrum; a parameter extraction module to determine a clipping frequency bin index and a roll-off factor, wherein the clipping frequency bin index is a highest frequency bin index at which a cumulative current does not exceed a current limit, and the roll-off factor is a dynamically determined value ranging from 0 to 1 used to exponentially decay the frequency domain representation, wherein the roll-off factor is determined iteratively such that a total current is below the current limit; a dynamic adjustment filter module to: construct an adjustment gain vector for the plurality of frequency bins, wherein the adjustment gain vector comprises a flat band portion having unity gain and a roll-off portion having decay gain, wherein based on the clipping frequency bin index, the frequency bins of the flat band portion have bin indices below a flat band bin index and the frequency bins of the roll-off portion have bin indices above the flat band bin index; and apply the adjustment gain vector to the frequency domain representation to generate an adjusted frequency domain representation; an inverse conversion module to inverse convert the adjusted frequency domain representation to an intermediate time domain signal; and a post-processing module to perform gradient control on the intermediate time domain signal to limit a difference between consecutive samples of the intermediate time domain signal to generate the dynamically adjusted source signal and send the dynamically adjusted source signal to the amplifier. The parameter extraction module is configured to use a binary search to iteratively determine the roll-off factor, and wherein a gain of a first bin in the roll-off portion is reduced by the roll-off factor and a gain of remaining bins in the roll-off portion is exponentially reduced by the roll-off factor. The signal emitter is a piezoelectric speaker and the output signal is an audio signal. The frequency domain representation comprises a fast Fourier transform, a discrete Fourier transform, a modified discrete cosine transform, a modified discrete sine transform, a constant Q transform, and a variable Q transform using a filter channel distribution according to an equivalent rectangular bandwidth or a Bark scale.

2. The signal launch system of claim 1, wherein, The current spectrum is modified according to a dilation factor, the dilation factor being greater than 1.

3. The signal launch system of claim 1, wherein, ​ 4. The signal launch system of claim 1, wherein, ​ 5. The signal launch system of claim 1, wherein, ​ 6. The signal launch system of claim 1, wherein, The post-processing module determines a difference threshold for the gradient control based on characteristics of the source signal and the intermediate time-domain signal, the characteristics of the source signal and the intermediate time-domain signal including at least one of a crest factor, a mean value, a standard deviation, a root mean square, a maximum amplitude, an average amplitude, a crest factor, a spectral centroid, and a spectral spread.

7. A signal processing system, characterized by Comprise: a processor coupled to an amplifier and configured to receive a source signal and to generate a dynamically adjusted source signal to the amplifier, the processor comprising: a frequency conversion module to convert the source signal to a frequency domain representation, wherein the frequency domain representation comprises a plurality of frequency bins; a spectrum-to-voltage transfer function module to convert the frequency domain representation to a voltage representation; an admittance characteristic module to convert the voltage representation to a current spectrum; a parameter extraction module to determine a clipping frequency bin index and a roll-off factor, wherein the clipping frequency bin index is a highest frequency bin index at which an accumulated current does not exceed a current limit, and to exponentially decay the frequency domain representation using the roll-off factor, wherein the roll-off factor is a dynamically determined value ranging from 0 to 1 and is iteratively determined such that a total current is below the current limit; a dynamically adjusted filter module to: construct an adjustment gain vector for the plurality of frequency bins, wherein the adjustment gain vector comprises a flat portion having unity gain and a roll-off portion having decay gain, wherein based on the clipping frequency bin index, the frequency bins of the flat portion have bin indices below a flat bin index and the frequency bins of the roll-off portion have bin indices above the flat bin index; and apply the adjustment gain vector to the frequency domain representation to generate an adjusted frequency domain representation; an inverse conversion module to convert the adjusted frequency domain representation to an intermediate time-domain signal; and a post-processing module to gradient control the intermediate time-domain signal to limit a difference between consecutive samples of the intermediate time-domain signal to generate the dynamically adjusted source signal and to send the dynamically adjusted source signal to the amplifier. The parameter extraction module is configured to iteratively determine the roll-off factor using a binary search, and wherein a gain of a first bin in the roll-off portion is reduced by the roll-off factor and a gain of remaining bins in the roll-off portion is exponentially reduced by the roll-off factor. The processor generates the dynamically adjusted source signal for a signal emitter whose admittance increases with signal frequency.

8. The signal processing system of claim 7, wherein, The processor generates the dynamically adjusted source signal for a piezoelectric speaker to generate an audio output signal.

9. The signal processing system of claim 7, wherein, The frequency domain representation comprises a fast Fourier transform, a discrete Fourier transform, a modified discrete cosine transform, a modified discrete sine transform, a constant Q transform, and a variable Q transform using a filter channel distribution according to an equivalent rectangular bandwidth or a Bark scale.

10. The signal processing system of claim 7, wherein, The current spectrum is modified according to a puffing factor, the puffing factor being greater than 1.

11. The signal processing system of claim 7, wherein, ​ 12. The signal processing system of claim 7, wherein, ​ 13. The signal processing system of claim 7, wherein, The post-processing module determines the difference threshold for the gradient control based on characteristics of the source signal and the intermediate time-domain signal, the characteristics of the source signal and the intermediate time-domain signal including at least one of a crest factor, a mean value, a standard deviation, a root mean square, a maximum amplitude, an average amplitude, a crest factor, a spectral centroid, and a spectral spread.

14. A signal processing method characterized by, Further comprising the steps of: providing a frequency domain representation of a source signal, wherein the frequency domain representation comprises a plurality of frequency bins; dynamically determining a clipping frequency bin index and a roll-off factor, wherein the clipping frequency bin index is a highest frequency bin index at which a cumulative current is below a current limit, and the roll-off factor defines an exponential decay of the frequency domain representation, wherein the roll-off factor is a number from 0 to 1, and iteratively determining such that a total current is below the current limit; constructing an adjustment gain vector for the plurality of frequency bins, wherein the adjustment gain vector comprises a flat portion having unity gain and a roll-off portion having an attenuation gain, wherein based on the clipping frequency bin index, the frequency bins of the flat portion have bin indices below a flat bin index, and the frequency bins of the roll-off portion have bin indices above the flat bin index; and applying the adjustment gain vector to the frequency domain representation to produce an adjusted frequency domain representation such that a total current is below the current limit.

15. The signal processing method of claim 14, wherein, Further comprising the steps of: receiving the source signal in a time domain; converting the source signal to the frequency domain representation; converting the frequency domain representation to a voltage representation; converting the voltage representation to a current spectrum; estimating a current using the current spectrum; inverse converting the adjusted frequency domain representation to an intermediate time-domain signal; gradient controlling the intermediate time-domain signal to limit a difference between consecutive samples of the intermediate time-domain signal to produce a dynamically adjusted source signal; and sending the dynamically adjusted source signal to an amplifier.

16. The signal processing method of claim 15, wherein, Further comprising the steps of: iteratively determining the roll-off factor using a binary search, wherein a gain of a first bin in the roll-off portion is reduced based on the roll-off factor, and remaining bins in the roll-off portion are reduced by an exponential of the roll-off factor.

17. The signal processing method of claim 15, wherein, Further comprising the steps of: producing the dynamically adjusted source signal for a signal emitter, wherein an admittance of the signal emitter increases with signal frequency.

18. The signal processing method of claim 15, wherein, The dynamically adjusted source signal is used for a piezoelectric speaker to produce an audio output signal.

19. The signal processing method of claim 15, wherein, The frequency domain representation comprises a Fast Fourier Transform, a Discrete Fourier Transform, a Modified Discrete Cosine Transform, a Modified Discrete Sine Transform (MDST), a Constant Q Transform, and a Variable Q Transform using a filter bank distribution according to an equivalent rectangular bandwidth or a Bark scale.

20. The signal processing method of claim 15, wherein, Further comprising the steps of: modifying the current spectrum based on a puffing factor, wherein the puffing factor is greater than 1.

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