A bipolar undervoltage lockout protection circuit

Abstract

The application discloses a kind of bipolar under-voltage lockout protection circuits, including resistance proportional current mirror and starting circuit, resistance proportional current mirror includes LPNP1 tube, LPNP2 tube and LPNP3 tube, LPNP1 tube emitter is connected with power supply Vcc by resistance R1, LPNP2 tube emitter is connected with power supply Vcc by resistance R2;LPNP2 tube and LPNP3 tube common base, LPNP2 tube collector LPNP3 tube emitter connection, LPNP3 collector is connected with ground by resistance R3;LPNP2 tube collector is connected with bias circuit and current source;bias circuit and current source are respectively connected with the collector and base of darlington tube, the emitter of darlington tube is connected with the first end of resistance R9, and the second end of R9 is connected with the collector of NPN19 tube, the base of NPN19 tube is connected with the collector, and the emitter is grounded;With the characteristics of simple process, low power consumption, threshold voltage high precision, high reliability.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit technology, specifically relating to a bipolar undervoltage lockout protection circuit. Background Technology

[0002] Undervoltage lockout (LVL) circuits are an indispensable protection module in power management and driver chips. To ensure the chip continues to operate normally under fluctuating power supply voltage, the LVL module monitors the power supply voltage. By monitoring power supply changes, the LVL module controls subsequent circuits to ensure that the circuit shuts down when the voltage is low after power-on, thus ensuring chip safety and reducing unnecessary power consumption. When the voltage reaches a certain value, the chip enters normal operation. If the power supply voltage is abnormal and falls below the preset value of the LVL module, the chip is shut down to prevent system crashes. The LVL module ensures that power supply voltage fluctuations do not affect the normal operation of the chip and subsequent circuits, ensuring that the power supply voltage can normally drive various digital and analog circuits within the chip, thereby improving the overall reliability of the power management and driver chip.

[0003] Traditional undervoltage lockout protection circuits are relatively complex. They use a voltage comparator circuit to compare the sampled power supply voltage with the system reference voltage. When the sampled power supply voltage is lower than the system preset value, the undervoltage lockout circuit outputs a high level to shut down the chip system, preventing the chip from outputting erroneous logic. When the sampled power supply voltage is higher than the preset value, the undervoltage lockout circuit outputs a low level, and the system returns to normal operation. A traditional undervoltage lockout circuit typically requires a voltage reference circuit, a resistor sampling circuit, a fast-response comparator, and an undervoltage shutdown circuit. See details... Figure 1 The voltage reference circuit is not shown in the diagram. Vref represents the output voltage of the voltage reference circuit. Resistors R1, R2, and R3 are connected in series to form a voltage sampling circuit. Module A1 represents a comparator. The power supply sampling voltage V1 is compared with the reference voltage Vref by the comparator. The output result controls the operation or shutdown of the subsequent chip. M1 and R3 control the threshold voltage when the circuit is turned on and off. To ensure a high-speed response of the comparator, a large operating current is typically required. Furthermore, the resistor sampling circuit usually uses multiple high-resistance resistors, occupying a large chip area and generating significant power consumption after the circuit is operating normally. The ratio of the current flowing through the sampling resistor to the current flowing into the comparator is related to the accuracy of the undervoltage lockout threshold voltage. To ensure threshold accuracy, the current of the sampling resistor is generally designed to be more than 10 times the comparator input current. Therefore, traditional undervoltage lockout circuit design involves a trade-off between response speed, threshold voltage accuracy, and power consumption. In summary, traditional bipolar undervoltage lockout protection circuits are complex in structure, consume a lot of power, occupy a large chip area, and increase manufacturing costs. Summary of the Invention

[0004] This invention provides a bipolar undervoltage lockout protection circuit that does not require a resistor sampling circuit and a comparator, and features simple manufacturing process, low power consumption, high threshold voltage accuracy, and high reliability.

[0005] To achieve the above objectives, the present invention provides a bipolar undervoltage lockout protection circuit, comprising a resistive proportional current mirror, wherein the resistive proportional current mirror includes LPNP1, LPNP2, and LPNP3 transistors. The emitter of LPNP1 is connected to the power supply Vcc via resistor R1, and the emitter of LPNP2 is connected to the power supply Vcc via resistor R2. LPNP2 and LPNP3 share a common base, the collector of LPNP2 is connected to the emitter of LPNP3, and the collector of LPNP3 is grounded via resistor R3. The collector of LPNP2 is connected to the bias circuit and... The current source is connected; the bias circuit and the current source are respectively connected to the collector and base of the Darlington transistor, the emitter of the Darlington transistor is connected to the first end of the resistor R9, the second end of the resistor R9 is connected to the collector of the NPN19 transistor, the base and collector of the NPN19 transistor are connected, and the emitter is grounded; the power supply Vcc is connected to the startup circuit, the startup circuit is connected to the base of the NPN15 transistor, the collector of the NPN15 transistor, and the collector of the NPN16 transistor, the emitter of the NPN15 transistor is connected to the base of the NPN16 transistor, and the emitter of the NPN16 transistor is grounded.

[0006] Furthermore, the current source includes LPNP7, LPNP8 and LPNP9 transistors, with LPNP7 and LPNP8 sharing a common base. The collectors of LPNP7 and LPNP8 are connected to the emitter and base of LPNP9 transistors, respectively. The collector and base of LPNP9 transistors are connected to two amplifier circuits, respectively.

[0007] Furthermore, the collector of the LPNP9 transistor is connected to the collector of the NPN12 transistor, the NPN12 and NPN13 transistors share a common base, the emitter of the NPN12 transistor is connected to the first end of the resistor R7, and the second end of the resistor R7 and the emitter of the NPN13 transistor are grounded.

[0008] Furthermore, the base voltage V of NPN12 and NPN13 transistors BNPN12-13 The base bias voltage is provided by the collector voltage V1 of the LPNP2 transistor through the bias circuit.

[0009] Furthermore, the bias circuit includes an NPN6 transistor, a PNP17 transistor, an NPN18 transistor, resistors R5, R6, and R10. The collector of the NPN6 transistor is connected to its base and the collector of the PNP2 transistor. The emitter of the NPN6 transistor is connected to the base of the NPN17 transistor. The collector of the NPN17 transistor is connected to the power supply VCC and the collector of the NPN18 transistor. The emitter of the NPN17 transistor is connected to the base of the NPN18 transistor. The emitter of the NPN18 transistor is connected to the first end of resistor R5. The second end of resistor R5 is connected to the first end of resistor R6. The second end of resistor R6 is connected to the first end of resistor R10. The second end of resistor R10 is grounded.

[0010] Furthermore, resistor R5 is connected between the BE junction of the NPN14 transistor.

[0011] Furthermore, the second terminal of resistor R7 and the NPN13 transistor are grounded through resistor R8.

[0012] Furthermore, the startup circuit includes an NJFET transistor, an NPN5 transistor, and a resistor R4. The drain of the NJFET transistor is connected to the power supply Vcc, the gate is grounded, the source is connected to the base of the NPN5 transistor, the collector of the NPN5 transistor is connected to the collector of the LPNP1 transistor, and the emitter of the NPN5 transistor is grounded through the resistor R4.

[0013] Furthermore, the collector of LPNP1 is connected to the collector of NPN4, the emitter of NPN4 is connected to the emitter of NPN5, and the base is grounded through a resistor.

[0014] Furthermore, the bipolar undervoltage lockout protection circuit is formed using a pure bipolar process.

[0015] Compared with the prior art, the present invention has at least the following beneficial technical effects:

[0016] The undervoltage lockout protection circuit proposed in this invention, implemented using bipolar technology, eliminates the need for the resistor sampling structure and comparator found in traditional undervoltage lockout circuits. This simplifies the circuit structure, reduces power consumption, saves chip area, and improves the reliability of the power management chip. It also reduces manufacturing costs and can be widely used in various bipolar or BiCMOS power management and driver chips.

[0017] The core of this invention is the ingenious connection of the electrodes of two LPNP transistors, LPNP2 and LPNP3. LPNP2 and LPNP3 share a common base, and the collector of LPNP2 is connected to the emitter of LPNP3. The subsequent circuit controls LPNP2's operation in the amplification or saturation region, thereby controlling the on / off state of LPNP3. When LPNP3 is on, the output OUT is high, controlling the operating state of each module in the circuit and enabling the undervoltage lockout function. When LPNP3 is off, the output OUT is low, not affecting the operating state of the circuit modules, and disabling the undervoltage lockout function.

[0018] Another core aspect of this invention is the use of a high-precision current source as a load. Utilizing the difference in transconductance between the emitter feedback amplification structure and the simple amplification structure, the Darlington transistor composed of NPN10 and NPN11 is turned on or off when the base voltage of the transistor changes. NPN12 and resistor R7 form a common-emitter amplification structure with emitter feedback, while NPN13 is a simple common-emitter amplification structure. Both amplification structures share a common base, and a high-precision Wilson current mirror is used as the load. By utilizing the difference in transconductance between these two amplification structures, the collector output current varies with the input voltage. The difference in output current controls the base current of the Darlington transistors NPN10-11, causing them to turn on or off, thereby controlling the LPNP2 transistor to operate in the amplification or saturation region. The common-emitter amplification structure and the high-precision load ensure a high precision turn-off threshold voltage.

[0019] When the base voltage rises due to the influence of the power supply voltage, the current increase of NPN12 is less than that of NPN13 due to the different transconductance. The current provided by the load current mirror is the same. The excess current at one end of NPN12 flows into the base of Darlington NPN10-11, NPN10-11 conducts, and LPNP2 exits saturation and enters the amplification region.

[0020] When the base voltage decreases due to the power supply voltage, the current reduction of NPN12 is less than that of NPN13 due to the difference in transconductance. The current provided by the load current mirror is the same, that is, the conduction current of NPN12 is greater than that of NPN13. There is no current input to the base of Darlington transistor NPN10-11, NPN10-11 is turned off, and LPNP2 enters the saturation region from the amplification region.

[0021] The third key point of this invention is that the Darlington transistors NPN10-11 have different on and off states, while the base voltages (V) of NPN12 and NPN13 transistors are different. BNPN12-13 ), collector voltage V1 of LPNP2 transistor and power supply voltage (V CC Different correlations result in threshold voltage hysteresis characteristics.

[0022] When the NPN10-11 transistor is turned off, the voltage V1 follows V CCVoltage rises or falls synchronously, V BNPN12-13 It is positively correlated with voltage V1, that is, V BNPN12-13 It increases or decreases synchronously with V1;

[0023] When the Darlington transistor NPN10-11 is turned on, V BNPN12-13 This creates negative feedback for the voltage V1, and V1 and V BNPN12-13 The voltage reaches a stable value, and at this time the voltage V1 is unaffected by V. CC The effect of voltage changes.

[0024] The voltage V is controlled by setting the value of the resistor in the circuit. CC Undervoltage lockout threshold V during rise and fall processes TH1 and V TH2 The value of the undervoltage lockout hysteresis voltage (V) is controlled by adjusting the value of resistor R7 to control the difference in transconductance between the two transistors. TH1 -V TH2 ).

[0025] The startup circuit of this invention uses an NJFET transistor with a relatively large equivalent resistance and a small device area, thereby reducing unnecessary power consumption while minimizing the area. After the circuit is operating normally, the startup circuit is disconnected from the internal circuit, reducing the impact of the startup circuit on the circuit's operating state, and allowing the stable V... BNPN12-13 The NPN4 transistor provides bias current to the current mirror, further stabilizing the circuit's operating state.

[0026] The present invention includes an overcurrent protection structure with an indirect resistor R5 between the BE junction of the NPN14 transistor to prevent excessive current from burning out the device. Attached Figure Description

[0027] Figure 1 This is a schematic diagram of a traditional undervoltage lockout structure;

[0028] Figure 2 This is a circuit diagram of the present invention;

[0029] Figure 3 The simulation results for the circuit application of this invention are shown in the figure. The rising threshold voltage is 4.2V, the falling threshold voltage is 3.4V, and the hysteresis voltage is 0.8V. Detailed Implementation

[0030] To make the objectives and technical solutions of this invention clearer and easier to understand, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. The specific embodiments described herein are for illustrative purposes only and are not intended to limit the invention.

[0031] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more. In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0032] Key factors to consider in integrated circuit design include the type of process technology used, chip area, and power consumption during operation. This invention designs an undervoltage lockout protection circuit without a comparator and resistor sampling structure. This circuit features voltage hysteresis characteristics; during the rising and falling edges of the power supply voltage, a hysteresis voltage is applied to the switching threshold voltage to prevent the chip from repeatedly switching due to power fluctuations. The hysteresis voltage can be adjusted by changing the resistor. The circuit is characterized by simple process technology, low power consumption, high threshold voltage accuracy, and high reliability, meeting the requirements of power management and driver chips for undervoltage lockout circuits.

[0033] This invention is based on a basic bipolar process and uses devices such as a vertical NPN transistor (hereinafter referred to as NPN transistor), a horizontal PNP transistor (hereinafter referred to as LPNP transistor), a base region resistor (R), and an NJFET transistor formed without the need for additional photomasks based on the bipolar process.

[0034] Reference Figure 2A bipolar undervoltage lockout protection circuit includes an NJFET transistor, LPNP1, LPNP2, LPNP3, LPNP7, LPNP8, LPNP9, NPN4, NPN5, NPN6, NPN10, NPN11, NPN12, NPN13, NPN14, NPN15, NPN16, NPN17, NPN18, NPN19, and resistors R1, R2, R3, R4, R5, R6, R7, R8, R9, and R10.

[0035] Combined with appendix Figure 2 The present invention will be described in detail below.

[0036] The emitter of LPNP1 is connected to the power supply via resistor R1, and the emitter of LPNP2 is connected to the power supply via resistor R2. LPNP1, R1, LPNP2, and R2 form a resistive current mirror. The bias current is mirrored from LPNP1 to LPNP2, providing the operating current for the internal circuit.

[0037] The LPNP2 and LPNP3 transistors share a common base. The collector of the LPNP2 transistor is connected to the emitter of the LPNP3 transistor, and the collector of the LPNP3 transistor is grounded through resistor R3. The collector, base, and emitter of the transistors are represented by the letters C, B, and E, respectively. The undervoltage lockout function of the circuit is achieved by controlling whether the LPNP2 transistor is in the amplification region or the saturation region. When the LPNP2 transistor is operating in the saturation region, the CB junction is forward biased, which means the EB junction of the LPNP3 transistor is forward biased, and the LPNP3 transistor is turned on. The LPNP3 collector (OUT) output is high, which can control the operating state of each module of the circuit, and the undervoltage lockout is enabled. When the LPNP2 transistor is operating in the amplification region, the CB junction is reverse biased, which means the EB junction of the LPNP3 transistor is reverse biased, and the LPNP3 transistor is turned off. The OUT output is low, which does not affect the operating state of each module of the circuit, and the undervoltage lockout is disabled.

[0038] The NPN10 and NPN11 transistors share a common collector, and the emitter of the NPN10 transistor is connected to the base of the NPN11 transistor to form a Darlington transistor NPN10-11. By controlling the on / off state of the Darlington transistor NPN10-11, the LPNP2 transistor can be controlled to operate in the saturation region or the amplification region. When the Darlington transistor NPN10-11 is on, the LPNP2 transistor operates in the amplification region; when the Darlington transistor NPN10-11 is off, the LPNP2 transistor operates in the saturation region.

[0039] The NPN12 and NPN13 transistors share a common base. The emitter of the NPN12 transistor is connected to resistor R7 to form a common-emitter amplifier structure with emitter feedback. The NPN13 transistor is a simple common-emitter amplifier structure. LPNP7, LPNP8, and LPNP9 transistors form a Wilson current source, which serves as the active collector load for the NPN12 and NPN13 common-emitter amplifier structures. Therefore, the collector load currents of the two transistors are equal. The transconductances of the two amplifier structures are as follows:

[0040]

[0041] Gm npn13 =gm npn13

[0042]

[0043]

[0044] And I C12 =I C13 Therefore, gm npn12 =gm npn13 ,but

[0045] Gm npn12 <Gm npn13

[0046] As can be seen from the above formula, the transconductance difference between the two amplification structures is related to the collector current and the resistance R7.

[0047] Because the two amplification structures have different transconductances, the collector currents of NPN12 and NPN13 change differently when their base voltages change. This current difference controls the switching on and off of Darlington transistor NPN10-11. When NPN10-11 is off, LPNP2 is saturated, and the voltage V1 changes with the power supply voltage V. CC The base bias voltages of NPN12 and NPN13 transistors are provided by V1 through NPN6, PNP17, NPN18, and resistors R5, R6, and R10. As the supply voltage increases, the collector voltage V of NPN13 transistor also increases. CQ13 With V BNPN12-13 The voltage increases and decreases as the power supply voltage increases, when V1 and the collector V of the NPN13 transistor increase. CNPN13When the voltage difference reaches the forward voltage of the two BE junctions, the Wilson current source composed of NPN7, NPN8, and NPN9 starts. The current sources provide the same load current. Due to the different transconductances, the increase in the collector current of NPN12 is less than the increase in the collector current of NPN13 when the power supply voltage rises. The excess current at one end of the collector of NPN12 flows into the base of the Darlington transistor NPN10-11. When it reaches a certain value, NPN10-11 turns on, and LPNP2 exits saturation and enters the amplification region. The undervoltage lockout function is turned off, and the circuit works normally. At this time, V1 and V BNPN12-13 The voltage forms negative feedback to reach a stable value, and does not change with V. CC The voltage changes with the voltage; after the circuit is working normally, the voltage V1 does not change with the power supply voltage, when V CC When the voltage difference between V1 and V2 decreases to 0.1V, i.e., the EC voltage of LPNP2 is 0.1V, LPNP2 enters the saturation operating region, and the voltage of V1 begins to decrease with V2. CC Lower and lower, V BNPN12-13 Initially, V1 decreases; as analyzed earlier, the transconductance of the NPN12 structure is less than that of the NPN13 structure, V BNPN12-13 When the voltage drops, the decrease in collector current of NPN12 is less than that of NPN13, meaning the on-state current of NPN12 is greater than that of NPN13. Since the current source load provides the same current, when the voltage drops to a certain value, there is no current input to the base of Darlington transistor NPN10-11, and NPN10-11 turns off, forming positive feedback. This further deepens the saturation depth of LPNP2, and the undervoltage protection function is activated.

[0048] At the moment the undervoltage lockout function is turned on and off, V BNPN12-13 The base bias voltage is provided by V1 through NPN6, PNP17, NPN18 and resistors R5, R6, and R10, and changes synchronously with the power supply voltage. The common-emitter terminals of both NPN12 and NPN13 amplification structures are grounded through resistor R8. The transconductance difference between the two amplification structures is related to resistor R7; therefore, V1 is controlled by adjusting the values ​​of R5, R6, R10, R7, and R8. CC Undervoltage lockout threshold V during rise and fall processes TH1 and V TH2 The value of the undervoltage lockout hysteresis voltage (V) is controlled by adjusting the value of resistor R7 to control the difference in transconductance between the two transistors. TH1 -V TH2 ).

[0049] The NJFET transistor, fabricated using pure bipolar technology, has the characteristics of small area and large equivalent resistance. Together with NPN5 transistor and resistor R4, it forms a startup circuit. When the power supply voltage rises to a value greater than one BE junction, the startup circuit is turned on, and LPNP1 and LPNP2 transistors begin to conduct.

[0050] Before the Darlington transistors NPN10-11 are turned on, the undervoltage lockout function is enabled. After the circuit starts, NPN15 and NPN16 are turned on, and the voltage drop across resistor R4 is a BE junction. At this time, V BNPN12-13 Voltage varies with V CC The change is at a lower value, and NPN4 is turned off; after Darlington transistor NPN10-11 turns on, the voltage drop across resistor R9 and NPN19 increases due to the increased current. At this time, NPN16 enters saturation due to excessive base current caused by the increased base voltage, and the base voltage of NPN5 is pulled down, thus turning it off; at this time, V BNPN12-13 Voltage does not change with V CC The NPN4 transistor changes with the value of V, eventually reaching a stable value. BNPN12-13 It is turned on by providing a base bias voltage, thus disconnecting the startup circuit from the internal circuit.

[0051] Resistor R5 is connected between the BE junction of NPN14 transistor as an overcurrent protection structure for Darlington NPN17-18 transistors, ensuring the reliability of circuit operation.

[0052] The above content is only for illustrating the technical concept of the present invention and should not be construed as limiting the scope of protection of the present invention. Any modifications made to the technical solution based on the technical concept proposed in this invention shall fall within the scope of protection of the claims of this invention.

Claims

1. A bipolar undervoltage lockout protection circuit, characterized in that, The device includes a resistive proportional current mirror, which includes LPNP1, LPNP2 and LPNP3 transistors. The emitter of LPNP1 transistor is connected to the power supply Vcc through resistor R1, and the emitter of LPNP2 transistor is connected to the power supply Vcc through resistor R2. The LPNP2 and LPNP3 transistors share a common base, the collector of LPNP2 is connected to the emitter of LPNP3, and the collector of LPNP3 is grounded through resistor R3. The collector of the LPNP2 transistor is connected to the bias circuit and the current source; the bias circuit is connected to the collector of the Darlington transistor; the current source is connected to the base of the Darlington transistor; the emitter of the Darlington transistor is connected to the first end of the resistor R9; the second end of the resistor R9 is connected to the collector of the NPN19 transistor; the base of the NPN19 transistor is connected to the collector; and the emitter is grounded. The power supply Vcc is connected to the startup circuit, which is connected to the base of NPN15 transistor, the collector of NPN15 transistor, and the collector of NPN16 transistor. The emitter of NPN15 transistor is connected to the base of NPN16 transistor, and the emitter of NPN16 transistor is grounded. The current source includes an LPNP7 transistor, an LPNP8 transistor, and an LPNP9 transistor. The LPNP7 transistor and the LPNP8 transistor share a common base. The collector of the LPNP7 transistor is connected to the emitter of the LPNP9 transistor. The collector of the LPNP8 transistor is connected to the base of the LPNP9 transistor. The collector of the LPNP9 transistor is connected to a common-emitter amplifier structure with emitter feedback. The base of the LPNP9 transistor is connected to a simple common-emitter amplifier structure. The bias circuit includes an NPN6 transistor, a PNP17 transistor, an NPN18 transistor, resistors R5, R6, and R10. The collector of the NPN6 transistor is connected to its base and the collector of the PNP2 transistor. The emitter of the NPN6 transistor is connected to the base of the NPN17 transistor. The collector of the NPN17 transistor is connected to the power supply VCC and the collector of the NPN18 transistor. The emitter of the NPN17 transistor is connected to the base of the NPN18 transistor. The emitter of the NPN18 transistor is connected to the first end of resistor R5. The second end of resistor R5 is connected to the first end of resistor R6. The second end of resistor R6 is connected to the first end of resistor R10. The second end of resistor R10 is grounded.

2. The bipolar undervoltage lockout protection circuit according to claim 1, characterized in that, The collector of the LPNP9 transistor is connected to the collector of the NPN12 transistor. The NPN12 and NPN13 transistors share a common base. The emitter of the NPN12 transistor is connected to the first end of the resistor R7. The second end of the resistor R7 and the emitter of the NPN13 transistor are grounded.

3. The bipolar undervoltage lockout protection circuit according to claim 2, characterized in that, The base voltage V of the NPN12 and NPN13 transistors BNPN12-13 The base bias voltage is provided by the collector voltage V1 of the LPNP2 transistor through the bias circuit.

4. The bipolar undervoltage lockout protection circuit according to claim 1, characterized in that, The resistor R5 is connected between the BE junction of the NPN14 transistor.

5. A bipolar undervoltage lockout protection circuit according to claim 2, characterized in that, The second terminal of resistor R7 and NPN13 transistor are grounded through resistor R8.

6. A bipolar undervoltage lockout protection circuit according to claim 1, characterized in that, The startup circuit includes an NJFET, an NPN5 transistor, and a resistor R4. The drain of the NJFET is connected to the power supply Vcc, the gate is grounded, the source is connected to the base of the NPN5 transistor, the collector of the NPN5 transistor is connected to the collector of the LPNP1 transistor, and the emitter of the NPN5 transistor is grounded through the resistor R4.

7. A bipolar undervoltage lockout protection circuit according to claim 6, characterized in that, The collector of the LPNP1 transistor is connected to the collector of the NPN4 transistor, the emitter of the NPN4 transistor is connected to the emitter of the NPN5 transistor, and the base is grounded through a resistor.

8. A bipolar undervoltage lockout protection circuit according to claim 1, characterized in that, The bipolar undervoltage lockout protection circuit is formed using a pure bipolar process.

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