RF amplifier

Abstract

The present disclosure describes an RF amplifier implemented in SiGe HBT technology. The RF amplifier has a cascode stage including a common base (CB) transistor and a common emitter (CE) transistor arranged in series between a first voltage rail and a second voltage rail. An RF input is coupled to a base of the CE transistor, and an RF output is coupled to a collector of the CB transistor. The RF amplifier includes a CB power down circuit arranged between a base of the CB transistor and the second voltage rail, and a CE power down circuit arranged between the base of the CE transistor and the second voltage rail. In a power down mode, the CE power down circuit couples the base of the common emitter transistor to the second voltage rail. The CB power down mode circuit couples the base of the CB transistor to the second voltage rail via a high-ohmic path.

Description

Technical Field

[0001] This disclosure relates to a radio frequency (RF) amplifier for implementation in silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) technology. Background Technology

[0002] For example, RF amplifiers used in antenna arrays in 5G multi-channel products can be implemented using SiGe HBT technology. Adding germanium to the base of a bipolar transistor can improve RF performance by reducing the bandgap. For battery-powered products, it may also be necessary for the RF amplifier to have a standby leakage current below a certain level. In non-battery-powered applications of RF amplifiers, such as in cellular base stations, leakage current measurements performed during production testing can also detect devices with relatively weak capacitors, oxides, and MOSFETs. Devices with high leakage current and / or other faults can then be screened out. Summary of the Invention

[0003] The appended claims define various aspects of this disclosure. In a first aspect, an RF amplifier is provided for implementation in SiGe HBT technology, the RF amplifier comprising: a common-source cascode stage including a common-base cascode transistor and a common-emitter transistor arranged in series between a first voltage rail and a second voltage rail; an RF input coupled to the base of the common-emitter transistor; an RF output coupled to the collector of the common-base cascode transistor; and a common-base bias circuit coupled to the base of the common-base cascode transistor and including a common-emitter transistor disposed between the base of the common-base cascode transistor and the first voltage rail. A common-base power-off circuit between two voltage rails; a common-emitter bias circuit coupled to the base of the common-emitter transistor, the common-emitter bias circuit including a common-emitter power-off circuit disposed between the base of the common-emitter transistor and the second voltage rail; and wherein, in a power-off operation mode, the common-emitter power-off circuit is configured to couple the base of the common-emitter transistor to the second voltage rail, and the common-base power-off circuit is configured to couple the base of the common-base transistor to the second voltage rail via a high-ohm path.

[0004] In one or more embodiments, in power-down mode, the base-emitter junction of the common-base cascode transistor is not reverse-biased.

[0005] In one or more embodiments, the first voltage rail may be a voltage power supply rail and the second voltage rail may be a ground rail.

[0006] In one or more embodiments, the impedance of the high-ohm path may be greater than 100 kiloohms.

[0007] In one or more embodiments, the common-base power-off circuit may include a current mirror, wherein a first transistor of the current mirror is coupled to a reference current source, and a second transistor of the current mirror is disposed between the base of the common-base cascode transistor and a second power supply terminal, and wherein the current mirror is configured to limit the current between the base of the common-base cascode transistor and the second power supply terminal in a power-off mode.

[0008] In one or more embodiments, the current limit may be determined by the ratio of the relative width to the length of the first MOS transistor channel and the second MOS transistor channel.

[0009] In one or more embodiments, the RF amplifier may additionally include a second cascode stage having a second common-emitter transistor and a second common-base cascode transistor, wherein the current mirror further includes a third transistor disposed between the base of the second common-base cascode transistor and a second power supply terminal. The current mirror may also be configured to limit the current between the base of the second common-base cascode transistor and the second power supply terminal in a power-down mode.

[0010] In one or more embodiments, the common-base bias circuit may further include a common-base test mode control transistor coupled between the base of the common-base cascode transistor and a second power rail, wherein in the common-base test mode, the common-base bias circuit is further configured to couple the base of the common-base cascode transistor to the second power rail via a low-ohm path, and the common-emitter power-off circuit is further configured to couple the base of the common-emitter transistor to the second power rail via a low-ohm path.

[0011] In one or more embodiments, the common-base bias circuit may further include a common-emitter test mode control transistor coupled between the base of the common-base cascode transistor and a first power rail, wherein in the common-emitter test mode, the common-base bias circuit is further configured to couple the base of the common-base cascode transistor to the first power rail via a low-ohm path, and the common-emitter power-off circuit is further configured to couple the base of the common-emitter transistor to a second power rail via a low-ohm path.

[0012] In one or more embodiments, the RF amplifier may further include an emitter isolation switch disposed between the emitter of the common-emitter transistor and a second power supply terminal and having a control input configured to receive a power-down control signal, wherein in a power-down operating mode, the emitter isolation switch is configured to decouple the emitter of the common-emitter transistor from the second power supply rail.

[0013] In one or more embodiments, in a power-down mode, the common-emitter power-down circuit can be configured to couple the base of the common-emitter transistor to a second power rail via a high-ohm path.

[0014] In one or more embodiments, in a power-down operation mode, the common-emitter power-down circuit can be configured to couple the base of the common-emitter transistor to a second voltage rail via a low-ohmic path, wherein the impedance of the low-ohmic path is less than the impedance of the high-ohmic path.

[0015] The impedance of a low-ohm path can be less than 2 kiloohms.

[0016] An embodiment may include the RF amplifier in a mobile device or a mobile cellular base station.

[0017] In one or more embodiments, in a power-down operating mode, in response to the presence of a manufacturing defect, the voltage level at the base of the common-base cascode transistor may be increased to within 5% of the first power rail voltage. If no manufacturing defect is present, the voltage level at the base of the common-base cascode transistor may be within 5% of the second power rail voltage.

[0018] In one or more embodiments, the high-ohmic path impedance may be greater than 1 MΩ.

[0019] In a second aspect, an RF amplifier is provided for implementation in SiGe HBT technology, the RF amplifier comprising: a common-base cascode transistor and a common-emitter transistor arranged in series between a power node and a ground node; an RF input coupled to the base of the common-emitter transistor; an RF output coupled to the collector of the common-base cascode transistor; a common-base power-off circuit arranged between the base of the common-base cascode transistor and the ground node; and a common-emitter power-off circuit arranged between the base of the common-emitter transistor and the ground node; and wherein, in a power-off operation mode, the common-emitter power-off circuit is configured to couple the base of the common-emitter transistor to the ground node, and the common-base power-off circuit is configured to couple the base of the common-base transistor to the ground node via a high-ohm path.

[0020] In one or more embodiments, the high-ohm path may have an effective impedance value greater than 100 kiloohms. Attached Figure Description

[0021] In the figures and description, similar reference numerals refer to similar features. Embodiments will now be described in detail only by way of examples shown in the accompanying drawings, in which:

[0022] Figure 1 A typical RF amplifier is shown.

[0023] Figure 2 It shows in Figure 1This is part of the common-base bias circuit and common-emitter bias circuit used in the power-down operation mode of the RF amplifier.

[0024] Figure 3 It shows in Figure 1 An example common-base bias circuit used in the normal operating mode of an RF amplifier.

[0025] Figure 4 It shows in Figure 1 An example common-emitter bias circuit used in the normal operating mode of an RF amplifier.

[0026] Figure 5 An RF amplifier according to an embodiment is shown.

[0027] Figure 6 An example leakage current path attributed to stacking faults is shown.

[0028] Figure 7 An RF amplifier according to an embodiment is shown.

[0029] Figure 8 An RF amplifier according to an embodiment is shown.

[0030] Figure 9 A bias circuit for a common-base cascode transistor in an RF amplifier according to an embodiment is shown.

[0031] Figure 10 An RF amplifier according to an embodiment is shown. Detailed Implementation

[0032] Figure 1 A typical RF amplifier 100 is shown. The RF amplifier 100 may have an RF input 118 and an RF output 108. The RF amplifier 100 has a common-source, common-gate stage including a common-base bias circuit 102 and a common-emitter bias circuit 104. The RF amplifier 100 has a common-emitter (CE) transistor Q1, which is typically an NPN HBT with its emitter connected to a second power rail or node 114, which is typically at ground potential. Node 112 may be connected to the collector of the common-emitter transistor Q1 and the emitter of a common-base (CB) cascode transistor Q2, which is typically an NPN HBT. The collector of the common-base, CB transistor Q2 may be connected to the RF output 108. The collector of the common-base, CB transistor Q2 may be connected to the first terminal of an inductor or coil L1. The second end of the inductor or coil L1 may be connected to a first power rail or node 106, which may be at a power supply voltage VCC during operation, for example, in the range of 2.5 to 3 volts.

[0033] RF input 118 can be connected to the first terminal of AC coupling capacitor C1. The second terminal of AC coupling capacitor C1 can be connected to common-emitter bias circuit output 116. Common-emitter bias circuit output 116 is connected to the base of common-emitter transistor Q1. Common-base bias circuit output 110 is connected to the base of common-base cascode transistor Q2.

[0034] In the normal operating mode or amplification mode of the RF amplifier 100, the common-emitter transistor Q1 is typically biased at its base by the common-emitter bias circuit 104, causing it to carry a desired current and have a bias voltage Vb_ce. The common-base cascode transistor Q2 is typically biased at its base by the common-base bias circuit 102 with a desired voltage Vb_cb, ensuring that the common-emitter transistor Q1 is not saturated and maximizing the RF output voltage swing at the collector of the common-base cascode transistor Q2. The RF signal on the RF input 118 is typically fed to the base of the common-emitter transistor Q1 via the AC coupling capacitor C1.

[0035] For cases where amplification is not required, this RF power amplifier 100 typically has a power-down mode. Figure 2 A portion of the common-base bias circuit 102 and common-emitter bias circuit 104 used in the power-down operation mode of the RF amplifier 100 is shown. During normal operation, the CE bias output 116 and CB bias output 110 are driven by the normal operation CE bias circuit (not shown) and the normal operation CB bias circuit (not shown) and are low-ohms. When used in power-down mode, these normal operation bias circuits become high-ohms. To prevent floating nodes and associated undefined voltages, the CE bias circuit 104 includes a CE-down NMOS transistor M1 having a drain connected to the common-emitter bias circuit output 116, a source connected to the second power rail 114, and a gate connected to the power-down mode control 120. The CB bias circuit 102 includes a CB power-off NMOS transistor M2, which has a drain connected to the common-base bias circuit output 110, a source connected to the second power rail 114, and a gate connected to the power-off mode control 120.

[0036] During the power-down mode, power-down mode control 120 is confirmed, and CE power-down NMOS transistor M1 and CB power-down NMOS transistor M2 are turned on, thereby coupling the base of common-emitter transistor Q1 and the base of common-base cascode transistor to ground. Transistors M1 and M2 provide a low-ohmic path to the second power rail 114, which may have an impedance in the range of several hundred Ω to 1kΩ to provide a robust power-down state. The second power rail 114 is typically grounded, and the corresponding base voltage levels Vb_ce for common-emitter transistor Q1 and Vb_cb for CB transistor Q2, the base of the common-emitter transistor, are maintained at voltage levels close to those of the second power rail 114.

[0037] Figure 3 A typical common-base bias circuit 150 is shown, which may be included in a common-emitter bias circuit 102 to bias a common-base cas-source transistor Q2 in normal operating mode. Node 152 is connected to the first terminal of resistor R1. Node 152 is connected to the collector of bias transistor Q3. Node 152 is connected to the first terminal of resistor R2. Node 152 is connected to the first terminal of bias current source 156. The second terminal of bias current source 156 is connected to a first power rail 106. Node 154 is connected to the second terminal of second resistor R2. Node 154 is connected to the first terminal of second current source 158. Node 154 is connected to the base of bias transistor Q3. A second power rail 114 is connected to the second terminal of second current source 158. The second power rail 114 is connected to the emitter of bias transistor Q3. The second power rail 114 is connected to the first terminal of capacitor C2. The common-base bias circuit output 110 is connected to the second terminal of the first resistor R1. The common-base bias circuit output 110 is connected to the second terminal of the decoupling capacitor C2.

[0038] During normal operation of the RF amplifier 100, decoupling capacitor C2 provides the RF base current for the common-base cascode transistor Q2. Resistor R1 provides isolation to the bias circuit 150 but does not significantly modify the voltage bias level Vb_cb. Current sources 156 and 158 provide currents Itop and Ibot, respectively, where the difference between currents Itop and Ibot flows through Q3. The base-emitter voltage Vbe of Q3 is added to voltage Ibot·R2 to provide the bias voltage Vb_cb. The value of Ibot·R2 is determined to provide a sufficient collector voltage to the common-emitter transistor to prevent saturation.

[0039] Figure 4A typical common-emitter bias circuit 160 is shown, which may be included in a common-emitter bias circuit 104 to bias a common-emitter transistor Q1 in normal operating mode. Node 162 is connected to the base of a bias transistor Q4, which is an NPN transistor as shown. Node 162 is connected to the first terminal of a feedback resistor R4. The emitter of the bias transistor Q4 is connected to a second power rail 114. The common-emitter bias circuit output 116 is connected to the second terminal of the feedback resistor R4. The common-emitter bias circuit output 116 is connected to the first terminal of a current source 164. The common-emitter bias circuit output 116 is connected to the collector of the bias transistor Q4. A first power rail 106 is connected to the first terminal of the current source 164. The combination of the feedback resistor R4 and the bias transistor Q4 produces a relatively low ohmic impedance corresponding to 1 / gm of the bias transistor Q4 at DC and low frequencies, while having a relatively high ohmic impedance corresponding to the value of the feedback resistor R4 at RF operating frequencies. This avoids transferring the carrier input power at the RF frequency to the bias circuit 160 and avoids shortening the modulation bandwidth frequency for optimal linearity.

[0040] Figure 5 An RF amplifier 200 according to an embodiment is shown. The RF amplifier 200 may have an RF input 118 and an RF output 108, as well as a common-source cascode stage for a common-emitter transistor Q1 and a common-base cascode transistor Q2. The RF input 118 may be connected to the base of the common-emitter transistor Q1 via an AC coupling capacitor C1. The RF amplifier 100 has a common-base bias circuit 210 and a common-emitter bias circuit 104. The RF amplifier 100 has a common-emitter (CE) transistor Q1, which is typically an NPN HBT with its emitter connected to a second power rail 114, which is typically grounded. Node 112 may be connected to the collector of the common-emitter transistor Q1 and the emitter of the common-base (CB) cascode transistor Q2, which is typically an NPN HBT. The collector of the common-base cascode transistor Q2 may be connected to the RF output 108. The collector of the common-base, common-source, common-gate transistor Q2 can be connected to the first terminal of the inductor or L1. The second terminal of the inductor or coil L1 can be connected to the first power rail 106, which can be at the power supply voltage VCC.

[0041] The CE bias circuit 104 includes a CE-off NMOS transistor M1, which has a first terminal connected to the common-emitter bias circuit output 116, a second terminal connected to the second power rail 114, and a gate terminal connected to the power-off mode control 120. The CB bias circuit 210 includes a CB-off NMOS transistor M3, which has a first terminal connected to node 212, a second terminal connected to the second power rail 114, and a gate terminal connected to the power-off mode control 120. Node 212 can be connected to the first terminal of a pull-down resistor Rpd. The second terminal of the pull-down resistor Rpd can be connected to the common-base bias circuit output 110. Bias circuitry for the CE bias circuit 104 and the CB bias circuit 210 is not shown.

[0042] Normal operation is similar to that previously described for RF amplifier 100. During power-down mode, power-down mode control 120 is confirmed, and CE power-down NMOS transistor M1 and CB power-down NMOS transistor M3 are turned on, thereby coupling the base of common-emitter transistor Q1 and common-base cascode transistor Q2 to the second power rail 114. Transistor M1 provides a low-ohmic path to the second power rail 114, which may have an impedance in the range of several hundred Ω to 1kΩ to provide a robust power-down state. Resistor Rpd may have an impedance value much higher than that of the low-ohmic path. The impedance value of Rpd may, for example, be higher than 100KΩ. Resistor Rpd and transistor M3 provide a high-ohmic path to the second power rail 114. As used in this disclosure, the terms high-ohmic path and low-ohmic path refer to, for example, the effective impedance between two nodes such as the base of the transistor and the second power rail. This effective impedance may be implemented by active or passive circuitry.

[0043] The inventors of this disclosure have learned that by providing a high-impedance path from the base of the common-base cascode transistor Q2 to the second power supply voltage rail 114 in a power-down mode, the production yield of the RF amplifier 200 can be increased.

[0044] This can be further referenced. Figure 6 understand, Figure 6 The effect of so-called stacking faults is shown. Stacking faults can occur in SiGe HBTs, and also in any other technique using epitaxial devices with two (or more) materials having different lattice constants.

[0045] These stacking faults are lattice defects that create a conduction path from the collector through the base to the emitter. These defects are electrically modeled as a resistor Rce from the collector to the emitter. Similar to other defects, they are technically characterized as a distribution of a certain defect density and the severity of its impact, i.e., the distribution of this Rce. These defects can affect product yield in two ways. First, if the leakage current itself is required by the system or application, a leakage current higher than required will cause the device to fail. Second, stacking faults in HBTs produce high leakage levels typically >1uA, which cannot be distinguished from capacitor / oxide / MOSFET leakage. Therefore, leakage current attributable to stacking faults will negatively impact product yield.

[0046] refer to Figure 6 The table below shows the equivalent circuits for four cases of the cascode stage 250, distinguishing between stacking faults in the RF transistors, in the power-down mode of the RF amplifier 100. Case 1 is shown by equivalent circuit 252, Case 2 by equivalent circuit 254, Case 3 by equivalent circuit 256, and Case 4 by equivalent circuit 260. In each of the four cases, the base of the common-emitter transistor Q1 and the common-base cascode transistor Q2 are connected to the second power rail 114 via a low-ohmic path and are therefore shown as directly connected. Since the DC resistance of the coil L1 is negligible, the coil L1 is also omitted in the equivalent circuit 250, and therefore, in the power-down mode, a low-ohmic path exists between the first power rail 106 and the collector of the common-base cascode transistor Q2.

[0047] Case 1 shows the equivalent circuit 252 without stacking faults.

[0048] Case 2 is illustrated by equivalent circuit 254, which has a resistor Rce1 connected between the collector of common-emitter transistor Q1 and the second power rail 114, the resistor Rce1 corresponding to the stacking fault in common-emitter transistor Q1.

[0049] Case 3 is illustrated by equivalent circuit 256, which has a resistor Rce2 connected between the collector of common-base cascode transistor Q2 and the first power rail 106, the resistor Rce2 corresponding to the stacking fault in common-base cascode transistor Q2.

[0050] Case 4 is illustrated by equivalent circuit 260, which has a resistor Rce1 connected between the collector of common-emitter transistor Q1 and the second power rail 114, and a resistor Rce2 connected between the collector of common-base cascode transistor Q2 and the first power rail 106. Case 4 corresponds to a stacking fault in both common-emitter transistor Q1 and common-base cascode transistor Q2. Table 1 below provides an overview of the fault conditions for each case.

[0051] Table 1

[0052] Case Number Common-emitter transistor Q1 Common base cascode transistor Q2 1 No stacking fault No stacking fault 2 Stacking stagger No stacking fault 3 No stacking fault Stacking stagger 4 Stacking stagger Stacking stagger

[0053] Assuming the first power rail 106 is at the power supply voltage Vcc and the second power rail 114 is grounded, then case 1 is not of concern because case 1 indicates a fault-free condition.

[0054] The second scenario will not lead to an increase in leakage current due to stacking faults when the pull-down of CB transistor Q2 is connected to ground, because CB transistor Q2 will be disconnected, thereby generating zero voltage across Rce1 and thus zero current.

[0055] For case 3, there exists a leakage path 258 from the reverse-biased base-emitter junction of the common-base cascode transistor Q2 to the cascode pull-down. This leakage reverse base-emitter junction may occur on high-fT NPN HBTs used at relatively low reverse breakdown voltages, such as approximately 1.5V with a 1µA leakage at the base-emitter junction.

[0056] Case 4 has a direct leakage current path 262 from the power supply to ground via resistors Rce2 and Rce1. Since Case 4 requires two stacking faults in transistors electrically connected to each other, it is much less likely to occur than Case 3, which only requires one stacking fault in any CB transistor. Because stacking faults are first-order proportional to the emitter area, large transistors are more likely to have stacking faults than small transistors. Therefore, this increases the probability of stacking faults in both transistors if there is a power stage where both common-emitter transistor Q1 and CB transistor Q2 are large, relative to Case 4. However, in practice, the probability of Case 4 occurring can be reduced by the device layout that breaks down large transistors into parallel power stages, called power cells. Therefore, Case 2 or Case 3 are the most likely scenarios.

[0057] Referring now to RF amplifier 200, if the stacking fault shown in case 3 occurs, any leakage current originating from the cascode stacking fault must flow through this high resistance Rpd to create a sufficient voltage drop to effectively block the leakage path. This is because if the base voltage of the cascode transistor Q2 is close to VCC, there may be no reverse-biased base-emitter junction, and therefore no leakage current. A typical resistance value can be several times VCC divided by the leakage standard. For example, for a typical 1uA leakage standard and a 2.5V supply voltage Vcc, four times the tolerance makes Rpd 10MΩ. Furthermore, since a path to ground still exists, even if this path is a high-ohmic path, the RF power amplifier will still avoid increased leakage current in case 2, because in this case, the base of the cascode transistor will be grounded, and thus the CB transistor Q2 will be disconnected.

[0058] In this way, when implemented, for example, in SiGe HBT technology, the RF power amplifier 200 can have reduced leakage current in the presence of stacking faults. This can improve product yield because the RF amplifier 200 can still have acceptable leakage current even when stacking faults are present.

[0059] Figure 7 RF amplifier 300 is shown. RF amplifier 300 is similar to RF amplifier 200. The difference is firstly that an additional NMOS transistor M4 is present, which has a first terminal coupled to the emitter of Q1 and a second terminal coupled to the second power rail 114. The gate of the NMOS is coupled to an inverted power-off control input 120', which is driven by the inverted signal of the power-off control signal pd. Secondly, the common-emitter bias circuit 104 is replaced by a common-emitter bias circuit 210', which has a resistor Rpd' connected in series with a MOS transistor M3' similar to the common-base bias circuit 210. In other examples, an alternative power-off circuit providing a high-ohmic path to the second power rail can be used.

[0060] In normal operation, NMOS transistor M4 is turned on, providing a low-ohmic path between the emitter of Q1 and the second power rail 114. Normal operation of RF amplifier 300 is otherwise similar to RF amplifiers 100 and 200. In power-down mode, NMOS transistor M4 is turned off, except for the high-ohmic path originating from the base of CB transistor Q2 via resistor Rpd and M3, which disconnects the emitter of Q1. The common-emitter bias circuit 210' provides a high-ohmic path from the base of common-emitter transistor Q1 via resistor Rpd' and MOS transistor M3' to the second power rail 114. (See also...) Figure 6If stacking faults exist in both the common-base cascode transistor Q2 and the common-emitter transistor Q1, disconnecting the emitter prevents a leakage path from Vcc to ground, as shown in the equivalent circuit 260 of case 4. In cases 2 and 3, as explained for RF power amplifier 300, leakage current can also be reduced.

[0061] Furthermore, in case 4, when both the common-emitter transistor Q1 and the common-base cascode transistor Q2 have stacking faults, when the NMOS transistor M4 is off, the emitter of the common-emitter transistor Q1 is highly ohmic, so its voltage will begin to rise until its reverse-biased base-emitter junction begins to conduct. The high-ohmic resistor Rpd', connected in series with M3', prevents reverse biasing of the base-emitter junction because the voltage at the base of the common-emitter transistor Q1 will also increase. Therefore, the leakage path from the base-emitter junction of the common-emitter transistor Q1 to the second power rail 114 is blocked.

[0062] RF amplifiers 200 and 300 use resistors Rpd to implement a high-resistance path to ground. Implementing resistors with high values ​​can require a large implementation area. For example, a multi-channel 5G front-end IC with eight channels on one IC, each channel having five stages to achieve sufficient gain at millimeter-wave frequencies, requires eighty cascode bias circuits, and therefore eighty 10MΩ resistors.

[0063] This is through Figure 8 The RF amplifier 400 shown addresses this issue. As previously described with respect to RF amplifiers 100, 200, and 300, RF amplifier 400 includes a common-source cascode stage of a common-emitter transistor Q1 and a common-base cas-source cascode transistor Q2, as well as an inductor L1, a DC coupling capacitor C1, and a common-emitter bias circuit 104. RF amplifier 400 further includes a common-base bias circuit 420 with a power-off circuit 410.

[0064] The power-off circuit 410 includes a current mirror arrangement of NMOS transistors M5 and M6, a current source 404, and an additional NMOS transistor M7. The current source 404 has a first terminal connected to a first power rail 106 and a second terminal connected to a node 402. Node 402 can be connected to the gates of NMOS transistors M5 and M6, the first terminal of NMOS transistor M7, and the first terminal of M5. The second terminals of M5, M6, and M7 can be connected to a second power rail 114. The current source 404 may have a control input connected to a power-off control. The gate of NMOS transistor M7 can be connected to an inverting power-off control input 120'.

[0065] The normal operation of RF amplifier 400 is similar to that of RF amplifiers 100, 200, and 300. In normal operation, current source 404 is off, and NMOS transistor M7 is on, thus coupling the gates of NMOS transistors M5 and M6 to the second power rail 114, which may be grounded. In power-down mode, current source 404 is on, and transistor M7 is off.

[0066] In power-down mode operation, NMOS transistor M6 provides a high-ohmic path from the base of common-base cas-gate transistor Q2 to the second power rail 114. The relative width-to-length ratio of the current mirror transistors M5 and M6 can be selected to determine the maximum permissible current through M6 from the base of common-base cas-gate transistor Q2 to the second power rail 114. This maximum permissible current can be selected as part of a leakage criterion. For example, if 300nA is selected as part of a 1uA leakage criterion, at most three stacking faults are allowed. If current source 404 provides 100nA of current, then for a 300nA current through M6, the W / L ratio of M6 must be three times that of M5.

[0067] NMOS transistor M6 has two operating schemes:

[0068] 1. Linear Region: When there are no stacking faults in the cascode transistor, the NMOST M6 will operate in this manner; the NMOST M6 acts as a pull-down to ground, even with a desired relatively low impedance of several hundred kΩ.

[0069] 2. Saturation region: The NMOST M6 acts as a current source and limits the stacking fault effect in the cascode transistor to a power leakage of 300nA; the output impedance of the NMOST M6 in this scheme can easily reach several hundred MΩ.

[0070] In some examples, a single input mirror path via current source 404 and NMOS transistor M5 can be used, with multiple output mirror transistors arranged in parallel with NMOS transistor M6 for multiple cascode transistor biasing circuits.

[0071] Figure 9 A common-base bias circuit 500 is shown, which can be used to bias common-base cascode transistors such as Q2 in RF amplifiers 200, 300, and 400.

[0072] The common-base bias circuit 500 includes a power-off circuit 410. It should be understood that in other examples, the power-off circuit used in common-base bias circuits 210 and 420 may be used instead. The remainder of the circuit shown is used to bias the common-base cascode transistor in the RF amplifier during normal operating mode.

[0073] Node 502 is connected to the gate of PMOS transistor Mtop and the drain of PMOS transistor M8. The first power rail 106 is connected to the source of PMOS transistor Mtop and PMOS transistor M8.

[0074] Node 504 is connected to the first terminal of the first resistor R1′, the first terminal of the second resistor R2′, and the collector of the NPN transistor Q3′.

[0075] Node 506 is connected to the second terminal of the second resistor R2′, the source of NMOS transistor M11, and the drain of NMOS transistor Mbot.

[0076] Node 508 is connected to the gate of NMOS transistor Mbot and the drain of NMOS transistor M9.

[0077] The second power rail 114 is connected to the source of NMOS transistors M9, Mbot, and M10, the emitter of NPN transistor Q3′, and the first terminal of capacitor C2′.

[0078] Node 510 is connected to the drain of NMOS transistor M1, the drain of NMOS transistor M10, and the base of NPN bipolar transistor Q3′.

[0079] The output 110 of the common-base bias circuit is connected to the second terminal of capacitor C2′ and the second terminal of resistor R1′.

[0080] Power-off control input 120 is connected to the gates of NMOS transistors M9 and M10. Inverting power-off control input 120' is connected to the gates of MOS transistors M8 and M11.

[0081] In normal mode, circuit 500 is configured similarly to common-base bias circuit 150, and power-off circuit 410 is disabled. The Itop and Ibot current sources are now represented by transistors Mtop and Mbot. These transistors are turned off by MOS transistor switches M8 and M9 at their gates, driven by power-off signals pd and pd_bar, where pd_bar is the inverted signal of power-off signal pd. Power-off is active when pd = vcc. It should be noted that transistor Q3' needs to be turned off by two NMOS switches M10 and M11 at the base of transistor Q3'. This only requires maintaining high impedance at the Vcasc node for all voltages between gnd and vcc. Without these two additional switches, transistor Q3 would act as a diode connected to ground, thus preventing high impedance for voltages such as >0.4V in Vcasc. M6 provides a current source that is turned on during power-off and turned off during normal operation.

[0082] Figure 10 An RF amplifier circuit 600 with multiple non-operating modes is shown. The CE bias circuit 604 includes a CE-off NMOS transistor M1' having a first terminal connected to a common-emitter bias circuit output 116, a second terminal connected to a second power rail 114, and a gate terminal connected to a first mode control input 606. The CB bias circuit 610 includes a common-base test-mode NMOS transistor M13 having a first terminal connected to a common-base bias circuit output 110, a second terminal connected to a second power rail 114, and a gate terminal connected to a second mode control input 612. The CB bias circuit 610 also includes a common-emitter test-mode PMOS transistor M12 having a first terminal connected to a common-base bias circuit output 110, a second terminal connected to a first power rail 106, and a gate terminal connected to a third mode control input 614.

[0083] The CB bias circuit 610 includes a CB-deactivated NMOS transistor M3', which has a first terminal connected to node 602, a second terminal connected to the second power rail 114, and a gate terminal connected to the fourth mode control input 608. The CB bias circuit 610 also includes a resistor Rpd', which has a first terminal connected to node 602 and a second terminal connected to the common-base bias circuit output 110.

[0084] During operation, the first mode control input 606, the second mode control input 612, the third mode control input 614, and the fourth mode control input 608 can be connected to a controller (not shown). In addition to the normal operating mode, the RF power amplifier circuit 600 has the following modes.

[0085] Mode 1 is the previously described mode that provides a high-impedance path to the second power rail. As shown, this is provided by a resistor Rpd, which can have a resistance greater than 100KΩ, but a current source such as current source 410 can also be used. This is a low-leakage mode where the stacking faults of CE transistor Q1 and CB transistor Q2 are not visible in VCC leakage measurements.

[0086] Mode 2 is a low-ohm pull-down mode, in which stacking faults are not visible in the VCC leakage measurement for CE transistor Q1, but stacking faults are visible for CB transistor Q2. Mode 2 can be referred to as the common-base test mode.

[0087] Mode 3, for example, biases the CB cascode transistor Q2 in active mode by forcing the cascode base voltage to VCC. In Mode 3, stacking faults are not visible in VCC leakage measurements for the CB cascode transistor Q2, but stacking faults are visible for the CE transistor Q1. Mode 3 can be referred to as the common-emitter test mode.

[0088] Table 2 below shows the states of transistors M1′, M3′, M13, and M12 in different operating modes.

[0089] Table 2

[0090] normal Mode 1 Mode 2 Mode 3 M1′ disconnect Connect Connect Connect M3′ disconnect Connect disconnect disconnect M13 disconnect disconnect Connect disconnect M12 disconnect disconnect disconnect Connect

[0091] The RF amplifier 600 can be configured to Mode 2 and / or Mode 3 during production testing to screen for extreme stacking faults that could degrade product performance. Using Mode 1 during power-down mode allows the RF amplifier to maintain acceptable leakage current even in the presence of less severe stacking faults. Therefore, the RF amplifier 600 delivers optimized yield for the desired performance.

[0092] The described embodiments of the RF amplifier allow for the presence of stacking faults while maintaining acceptable leakage current levels. The embodiments of the RF amplifier also maintain acceptable leakage current levels for any other physical mechanism that creates unintended resistive paths from the collector to the emitter or from the collector to the base.

[0093] The cascode stage is shown as having a single cascode transistor Q2. In other examples, the cascode stage can use a differential pair as the cascode on top of a common-emitter transistor, similar to the Gilbert cell used in mixers, variable gain amplifiers (VGAs), and vector modulators. The cascode stage shown and described uses an NPN bipolar transistor. However, it should be understood that other examples can use PNP transistors or a combination of NPN and PNP transistors.

[0094] An RF amplifier for implementation in SiGe HBT technology is described. The RF amplifier has a cascode stage comprising a common-base (CB) transistor and a common-emitter (CE) transistor arranged in series between a first voltage rail and a second voltage rail. An RF input is coupled to the base of the CE transistor, and an RF output is coupled to the collector of the CB transistor. The RF amplifier includes a CB power-off circuit arranged between the base of the CB transistor and the second voltage rail, and a CE power-off circuit arranged between the base of the CE transistor and the second voltage rail. In power-off mode, the CE power-off circuit couples the base of the common-emitter transistor to the second voltage rail. The CB power-off mode circuit couples the base of the CB transistor to the second voltage rail via a high-ohm path.

[0095] Although the appended claims are directed to specific combinations of features, it should be understood that the scope of the disclosure of this invention also includes any novel feature or combination of novel features or any generalization of such novel feature as expressly or implicitly disclosed herein, regardless of whether such novel feature relates to the same invention as currently claimed in any of the claims or whether such novel feature alleviates any or all of the same technical problems as those alleviated by this invention.

[0096] Features described in the context of a single embodiment may also be provided in combination in a single embodiment. Conversely, for the sake of brevity, the various features described in the case of a single embodiment may also be provided individually or in any suitable sub-combination.

[0097] The applicant hereby reminds that new claims may be made for such features and / or combinations thereof during the examination of this application or any other application derived therefrom.

[0098] For completeness, the term "comprising" does not exclude other elements or steps, the term "a" or "an" does not exclude that a plurality of, a single processor or other unit may perform the functions of the several components described in the claims, and the reference numerals in the claims should not be construed as limiting the scope of the claims.

Claims

1. A radio frequency, RF, amplifier implemented in a silicon germanium, SiGe, heterojunction bipolar transistor, HBT, technology, characterized by, The RF amplifier includes: A common-source common-gate stage, the common-source common-gate stage including a common-base common-source common-gate transistor and a common-emitter transistor arranged in series between a first voltage rail and a second voltage rail; An RF input, which is coupled to the base of the common-emitter transistor; An RF output, which is coupled to the collector of the common-base cascode transistor; A common-base bias circuit, the common-base bias circuit being coupled to the base of the common-base cascode transistor, and including a common-base power-off circuit disposed between the base of the common-base cascode transistor and the second voltage rail; A common-emitter bias circuit, coupled to the base of the common-emitter transistor, includes a common-emitter de-energization circuit disposed between the base of the common-emitter transistor and the second voltage rail; and In the power-down mode, the common-base power-down circuit is configured to couple the base of the common-base cascode transistor to the second voltage rail via a high-ohm path, and the common-emitter power-down circuit is configured to couple the base of the common-emitter transistor to the second voltage rail via a low-ohm path, wherein the impedance of the low-ohm path is less than the impedance of the high-ohm path.

2. The RF amplifier of claim 1, wherein, In the power-down mode, the base-emitter junction of the common-base cascode transistor is not reverse-biased.

3. The RF amplifier of any preceding claim, wherein, The first voltage rail is a voltage power supply rail and the second voltage rail is a ground rail.

4. The RF amplifier of claim 1 or 2, wherein, The impedance of the high-ohm path is greater than 100 kiloohms.

5. The RF amplifier of claim 1 or 2, wherein, The common-base power-off circuit includes a current mirror, wherein a first transistor of the current mirror is coupled to a reference current source, and a second transistor of the current mirror is disposed between the base of the common-base cascode transistor and a second power supply terminal, and wherein the current mirror is configured to limit the current between the base of the common-base cascode transistor and the second power supply terminal in the power-off mode.

6. The RF amplifier of claim 5, wherein, The current limit is determined by the ratio of the relative width to the length of the first MOS transistor channel and the second MOS transistor channel.

7. The RF amplifier of claim 5, wherein, The system also includes a second cascode stage having a second common-emitter transistor and a second common-base cascode stage, wherein the current mirror further includes a third transistor disposed between the base of the second common-base cascode stage and the second power supply terminal, and wherein the current mirror is further configured to limit the current between the base of the second common-base cascode stage and the second power supply terminal in the power-off mode.

8. The RF amplifier of claim 1 or 2, wherein, The common-base bias circuit further includes a common-base test mode control transistor coupled between the base of the common-base cascode transistor and the second power rail, wherein in the common-base test mode, the common-base bias circuit is further configured to couple the base of the common-base cascode transistor to the second power rail via a low-ohm path, and the common-emitter power-off circuit is further configured to couple the base of the common-emitter transistor to the second power rail via a low-ohm path.

9. A mobile device, characterized by The RF amplifier according to any one of the preceding claims.

10. A mobile cellular base station, characterized by The RF amplifier according to any one of claims 1 to 8.

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