Amplifier with improved isolation

Abstract

An amplifier (700) includes a common emitter stage coupled to a first input (720) and a second input (725), a common base stage coupled to the common emitter stage and a first output (730) and a second output (735), and a cancellation path coupled to the common emitter stage and the common base stage and the first output and the second output. The cancellation path generates a first cancellation signal 180 degrees out of phase with a first leakage signal at the first output and a second cancellation signal 180 degrees out of phase with a second leakage signal at the second output. The cancellation path includes a first cancellation transistor (M6) coupled to the common emitter stage and the common base stage and the first output and a second cancellation transistor (M5) coupled to the common emitter stage and the common base stage and the second output.

Description

Background Technology

[0001] Many RF front-end architectures use amplifiers to combine, separate, and isolate parts of signal paths to support multiple operating modes. For example, amplifiers capable of shutting down and isolating specific signal paths can be used to reconfigure in-phase and quadrature signal receivers into real-signal-only receivers to reduce power consumption, select specific receiver channels for multi-channel radios, select specific clock signals or local oscillator signals among multiple sources, and serve as an alternative to traditional switches in transmitter and receiver paths in time-division multiplexing systems. However, the parasitic capacitance of transistors can cause signal leakage between signal paths, making it difficult to isolate one signal path from another at millimeter (mm) wave frequencies. Furthermore, conventional signal multiplexing schemes can encounter equipment reliability issues. Summary of the Invention

[0002] In some implementations, an amplifier includes six transistors. A first transistor is coupled to a first input, and a second transistor is coupled to a second input. A third transistor is coupled to the first transistor and a first output, and a fourth transistor is coupled to the second transistor and a second output. A fifth transistor is coupled to the first transistor, the third transistor, and the second output, and a sixth transistor is coupled to the second transistor, the fourth transistor, and the first output. Characteristics of the fifth transistor, such as threshold voltage, geometry, rotation, and bias, are selected to match the corresponding characteristics of the fourth transistor. Similarly, characteristics of the sixth transistor are selected to match the corresponding characteristics of the third transistor.

[0003] In some implementations, the fifth and sixth transistors are biased to be on when the amplifier operates in isolation mode, and biased to be off when the amplifier does not operate in isolation mode. In some examples, the fifth and sixth transistors comprise metal-oxide-semiconductor field-effect transistors and are biased such that the gate-drain voltage of the fifth and sixth transistors does not cause gate oxide breakdown in the fifth and sixth transistors. Attached Figure Description

[0004] For a detailed description of the various examples, reference will now be made to the accompanying drawings, in which:

[0005] Figures 1A-1B An example signal path is shown that uses an amplifier to perform signal combination, separation, and isolation.

[0006] Figures 2A-2C The graphs show the cascaded amplifier and the amplifier output signal in normal and isolated operating modes.

[0007] Figure 3 An isolated cascaded amplifier is shown.

[0008] Figure 4 A cascaded amplifier with two stages is shown.

[0009] Figures 5A-5B A cascaded amplifier with a differential short-circuit switch is shown, along with a graph of the amplifier's output signal in isolated operation mode.

[0010] Figures 6A-6B A cascaded amplifier with an AC short-circuit switch is shown, along with a graph of the amplifier's output signal in isolated operation mode.

[0011] Figures 7A-7E An example amplifier with a path cancellation is shown, along with voltage and spectrum diagrams of the amplifier output signal in normal and isolated operating modes. Detailed Implementation

[0012] The disclosed amplifier actively eliminates radio frequency (RF) leakage signals in isolated operation mode by generating a copy signal 180 degrees out of phase with the leakage signal. The disclosed amplifier provides improved signal isolation without changing the amplifier's input impedance and without significantly increasing power consumption or the semiconductor die area occupied by the amplifier. The amplifier disclosed herein includes six transistors. A first transistor is coupled to a first input, and a second transistor is coupled to a second input. A third transistor is coupled to the first transistor and a first output. A fourth transistor is coupled to the second transistor and a second output.

[0013] The fifth transistor is coupled to the first and third transistors and the second output, and generates a copy signal that is 180 degrees out of phase with the signal leakage through the second and fourth transistors, thereby eliminating it. The sixth transistor is coupled to the second and fourth transistors and the first output, and generates a copy signal that is 180 degrees out of phase with the signal leakage through the first and third transistors, thereby eliminating it. The fifth and sixth transistors are biased to be off in normal operating mode and on in isolated operating mode.

[0014] Figures 1A-1B An example signal path is shown that uses an amplifier to perform signal combination, separation, and isolation. Figure 1A Signal combining stage 110 and signal separating stage 140 are shown. Signal combining stage 110 includes amplifiers 115 and 120, which amplify their respective input signals and input the amplified output signal to a single input of amplifier 130. The combined signal is amplified in amplifier 130. In signal separating stage 140, the output of amplifier 130 is provided to amplifiers 145 and 150, separating the combined signal into two input signals. Amplifiers 145 and 150 amplify their respective input signals.

[0015] Figure 1BSignal isolation stage 160 is illustrated. In many front-end architectures, signal paths are modified in different operating modes to achieve different signal functions. For example, signal combination stage 110 is modified in isolated operating mode to achieve signal isolation stage 160. Amplifier 170 is placed in isolated mode such that the input of amplifier 180 becomes the sole output of amplifier 165, without any contribution from amplifier 170. However, isolating one signal path from another at frequencies above 20 GHz can be challenging. Even in isolated operating mode, parasitic capacitances of transistors in the amplifier can cause signal leakage between signal paths, and conventional signal multiplexing schemes may encounter device reliability issues.

[0016] Figures 2A-2C The graphs show the output signals of the cascaded amplifier 200 in normal and isolated operating modes. Figure 2A A cascaded amplifier 200 is shown. A signal source 205 is coupled to the primary winding of transformer 210. The secondary winding of transformer 210 is coupled to inputs 220 and 225 of amplifier 200. In normal operating mode, a first bias voltage source 215 biases the secondary winding of transformer 210 with a voltage Vbias1. In isolated operating mode, the first bias voltage source 215 couples the secondary winding of transformer 210 to ground. Outputs 230 and 235 of amplifier 200 are coupled to the primary winding of transformer 240, which is biased by a constant voltage Vbias2 245 between normal and isolated operating modes.

[0017] Amplifier 200 includes transistors M1-M4, which are metal-oxide-semiconductor field-effect transistors (MOSFETs). In this example, M1-M4 are n-type MOSFETs (NMOS). In other examples, one or more of M1-M4 are p-type MOSFETs (PMOS) or bipolar junction transistors (BJTs). A BJT includes a base corresponding to the gate terminal, and collector and emitter corresponding to the drain and source terminals. The base of the BJT and the gate terminal of the MOSFET are also referred to as control inputs. The collector and emitter of the BJT and the drain and source terminals of the MOSFET are also referred to as current terminals.

[0018] The gate terminal of M1 is coupled to input 220 and the gate terminal of M2 is coupled to input 225. The source terminals of M1 and M2 are coupled to ground in this embodiment. In other examples, the source terminals of M1 and M2 are coupled to a current source. The source terminal of M3 is coupled to the drain terminal of M1, and the source terminal of M4 is coupled to the drain terminal of M2. The gate terminals of M3 and M4 receive a control signal CTL that biases M3 and M4 to conduct in normal operating mode and couples the gate terminals of M3 and M4 to ground in isolated operating mode. The drain terminal of M3 is coupled to output 230, and the drain terminal of M4 is coupled to output 235.

[0019] Figure 2B The graphs of the amplifier output signals at outputs 230 and 235 are shown in normal operating mode. M3 and M4 are turned on, and the secondary winding of transformer 210 is biased to Vbias1. The voltage swing of the output signal can be as high as 2.4V. Figure 2C The diagram shows the amplifier output signals at outputs 230 and 235 in isolated operating mode. The secondary winding of transformer 210 and the gate terminals of M1-M4 are biased to ground. Amplifier 200 provides approximately 25 dB of isolation. However, RF signal leakage at outputs 230 and 235 may have an average RMS voltage value of approximately 62 mV, large enough to corrupt signals in the intended signal path.

[0020] Figure 3 Two cascaded amplifiers connected in parallel to create signal path 300 are shown. The first cascaded amplifier 350 in signal path 300 is similar to [the following diagram] in normal operating mode. Figure 2A Amplifier 200 is shown. The secondary winding of transformer 310 is biased to voltage Vbias1 315 in both normal and isolated operating modes. The gate terminals of M3 and M4 are biased by voltage Vbias2 345 to be on in both normal and isolated operating modes. The second cascaded amplifier 380 in signal path 300 includes transistors M5-M8 and is similar to amplifier 200 in isolated operating mode. The gate terminals of M7 and M8 are coupled to ground. In a network configuration, cascaded amplifiers 350 and 380 are coupled together in parallel at outputs 330 and 335 of signal path 300. Amplifier 350 is the intended signal path for outputs 330 and 335. Amplifier 380 is an alternative signal path providing approximately 25 dB of isolation, which may be insufficient to prevent signal corruption in the intended signal path.

[0021] In normal operating mode, the peak voltage swing of the output signals at outputs 330 and 335 from the drain terminals of M3 and M4, respectively, can be approximately 2.4V. In some embodiments, the peak voltage swing exceeds the maximum gate-drain voltage Vgd rating for transistors M7 and M8 in the cascaded amplifier 380, causing gate oxide breakdown in M7 and M8. Furthermore, grounding the gate terminals of M5 and M6 in amplifier 380 causes a significant change in the input impedance of amplifier 380 at RF frequencies and disrupts the matching of the signal network preceding amplifier 380.

[0022] Figure 4 A cascaded amplifier 400 with two stages in isolation mode is shown. The first stage 450 includes transistors M1-M4, and the second stage 470 includes transistors M5-M8. In both normal and isolated operating modes, the secondary winding of transformer 410 is biased by voltage Vbias1 415, as are the gate terminals of M1 and M2 in the first stage 450. In this embodiment, the source terminals of M1 and M2 are coupled to ground. In other examples, the source terminals of M1 and M2 are coupled to a current source. The gate terminals of M3 and M4 are coupled to ground in isolated mode and biased by voltage Vbias2 445 in normal operating mode. The output of the first stage 450 is coupled to the primary winding of transformer 460, which is biased by Vbias2 445. The second stage 470 is coupled to the secondary winding of transformer 460, which is coupled to ground.

[0023] In the second stage 470, the gate terminals of M5 and M6 are coupled to ground in isolation mode and biased by Vbias2 445 in normal operation mode. In this embodiment, the source terminals of M5 and M6 are coupled to ground. In other examples, the source terminals of M1 and M2 are coupled to a current source. The gate terminals of M7 and M8 receive Vbias2 445, which biases M7 and M8 to conduct in both normal and isolation operation modes. Because the gate voltages of M1-M2 in the first stage 450 and M7-M8 in the second stage 470 are constant, input and output impedance matching and amplifier reliability can be maintained regardless of whether amplifier 400 operates in normal or isolation mode. However, the series connection of two stages doubles the power consumption of the amplifier in normal operation mode and occupies a large area of ​​the semiconductor chip, including amplifier 400.

[0024] Figures 5A-5B The diagram shows the output signals of a cascaded amplifier 500 with a differential short-circuit switch and the amplifier in isolated operation mode. Amplifier 500 and... Figure 2AThe amplifier 200 shown is similar in normal operating mode. The gate terminals of M3 and M4 are biased to be on in both normal and isolated operating modes, as demonstrated by the Vbias2545 in this example. Transistor M5 is used as a differential short-circuit switch. The drain terminal of M5 is coupled to the drain terminal of M1 and the source terminal of M3. The source terminal of M5 is coupled to the drain terminal of M2 and the source terminal of M4.

[0025] The gate terminal of M5 receives the control signal CTL, which biases M5 to turn off in normal operation mode and turn on in isolated operation mode. Figure 5B The graphs of the amplifier output signals at outputs 530 and 535 are shown in isolated operating mode. In isolated operating mode, the RF signal leakage at outputs 530 and 535 can have an average Vrms value of approximately 219 mV. Amplifier 500 provides only approximately 14 dB of isolation. The differential short-circuit switch M5 could be made larger to improve the isolation of amplifier 500, but at the cost of increased die area and increased parasitic capacitance.

[0026] Figures 6A-6B A cascaded amplifier 600 with an AC short-circuit switch is shown, along with a graph of the amplifier's output signal in isolated operation mode. Amplifier 600 and... Figure 2A The amplifier 200 shown is similar in normal operating mode. The gate terminals of M3 and M4 are biased to be on in both normal and isolated operating modes, as demonstrated by a Vbias2 645 in this example. Transistors M5 and M6 act as AC short-circuit switches. The drain terminal of M5 is coupled to the drain terminal of M1 and the source terminal of M3. The source terminal of M5 is coupled to capacitor 650, which is further coupled to ground. The drain terminal of M6 is coupled to the drain terminal of M2 and the source terminal of M4. The source terminal of M6 is coupled to capacitor 655, which is further coupled to ground. The gate terminals of M5 and M6 receive a control signal CTL that biases M5 and M6 to be off in normal operating mode and on in isolated operating mode.

[0027] Figure 6B The graphs show the amplifier output signals at outputs 630 and 635 in isolated operating mode. RF signal leakage at outputs 630 and 635 can have an average Vrms value of approximately 380 mV. Amplifier 600 provides only about 9 dB of isolation. AC short-circuit switches M5 and M6 could be made larger to improve the isolation of amplifier 600, but at the cost of increased die area and increased parasitic capacitance. Similarly, the capacitance values ​​of capacitors 650 and 655 could be increased to improve the isolation of amplifier 600, but this also increases the die area occupied by the capacitors.

[0028] Figures 7A-7EAn example amplifier 700 with a cancellation path is shown, along with voltage and spectrum diagrams of the amplifier output signal in normal and isolated operating modes. Figure 7A An example amplifier 700 is shown. A signal source 705 is coupled to the primary winding of a transformer 710. The secondary winding of the transformer 710 is coupled to inputs 720 and 725 of the amplifier 700 and is biased by a constant voltage Vbias1 715 between normal and isolated operating modes. The outputs 730 and 735 of the amplifier 700 are coupled to the primary winding of a transformer 740, which is biased by a constant voltage Vbias2 745 between normal and isolated operating modes.

[0029] Amplifier 700 includes transistors M1-M6, which in this example are NMOS. In other examples, one or more of M1-M6 are PMOS or bipolar junction transistors. The gate terminal of M1 is coupled to input 720, and the gate terminal of M2 is coupled to input 725. In this embodiment, the source terminals of M1 and M2 are coupled to ground. In other examples, the source terminals of M1 and M2 are coupled to a current source. The source terminal of M3 is coupled to the drain terminal of M1, and the source terminal of M4 is coupled to the drain terminal of M2. The gate terminals of M3 and M4 are biased to conduct in normal operating mode and isolated operating mode, in this example via Vbias2 745. The drain terminal of M3 is coupled to output 730, while the drain terminal of M4 is coupled to output 735.

[0030] Transistors M5 and M6 form cancellation path 750. M5 forms a cancellation path from the first signal path (input 720 and M1) to output 735. The characteristics of M5 are selected to match the characteristics of M4, including threshold voltage Vth, geometry, rotation, and bias. The source terminal of M5 is coupled to the drain terminal of M1 and the source terminal of M3. The drain terminal of M5 is coupled to output 735. M6 forms a cancellation path from the second signal path (input 725 and M2) to output 730. The characteristics of M6 are selected to match the characteristics of M3, including Vth, geometry, rotation, and bias. The source terminal of M6 is coupled to the drain terminal of M2 and the source terminal of M4. The drain terminal of M6 is coupled to output 730.

[0031] The gate terminals of M5 and M6 receive a control signal CTL, which biases M5 and M6 to be turned on in isolated operation mode and turned off in normal operation mode. Figure 7B The graphs show the amplifier output signals at outputs 730 and 735 in normal operating mode. M5 and M6 are off. The output signal voltage swing can reach up to 2.4V. Figure 7CThe spectrum of the amplifier output signal in normal operating mode is shown at outputs 730 and 735, centered at approximately 20 GHz.

[0032] In the isolated operation mode, CTL biases M5 and M6 to conduct. M5 propagates a copy signal 180 degrees out of phase with the leaked signal through the second signal path, essentially eliminating the leaked signal, and M6 propagates a copy signal 180 degrees out of phase with the leaked signal through the first signal path, essentially eliminating the leaked signal. Figure 7D The graphs of the amplifier output signals at outputs 730 and 735 are shown in isolated operating mode. The replicated signals through M5 and M6 essentially eliminate leakage signals at outputs 730 and 735 and provide approximately 58 dB of isolation for amplifier 700. Figure 7E The graph shows the spectrum of the amplifier output signal at outputs 730 and 735 in isolated operation mode. Signal leakage at 20 GHz is less than 2 mV. The second harmonic at 40 GHz is filtered out by subsequent amplifier stages, requiring no modification.

[0033] In some implementations, the CTL biases M5 and M6 such that the gate-source voltage Vgs is less than Vth and Vgd is less than the maximum Vgd rating to prevent gate oxide breakdown. In an example implementation, the maximum Vgd rating for M5 and M6 is approximately 2V, while Vth for M5 and M6 is approximately 0.7V. In normal operating mode, the peak voltage swing of the signals at outputs 730 and 735 is approximately 2.4V. In normal operating mode, the CTL biases the gate terminals of M5 and M6 to approximately 0.6V, less than Vth = 0.7V, keeping M5 and M6 off. The Vgd for M5 and M6 at peak voltage is 1.8V, lower than the maximum Vgd rating of 2V.

[0034] The term "coupled" is used throughout this specification. This term can encompass a connection, communication, or signaling path that achieves a functional relationship consistent with the description of this disclosure. For example, if device A generates a signal to control device B to perform an action, in a first example, device A is coupled to device B; or in a second example, if intermediate component C does not significantly alter the functional relationship between device A and device B, device A is coupled to device B via intermediate component C, such that control signals generated by device B via device A are controlled by device A.

[0035] Within the scope of the claims, modifications to the described embodiments are possible, and other embodiments are also possible.

Claims

1. An amplifier comprising: The first transistor is coupled to the first input; The second transistor is coupled to the second input; A third transistor, which is coupled to the first transistor and the first output; The fourth transistor is coupled to the second transistor and the second output; A fifth transistor, which is coupled to the first transistor, the third transistor, and the second output; as well as A sixth transistor, coupled to the second and fourth transistors and the first output, wherein the fifth and sixth transistors are biased off when the amplifier is not operating in isolation mode. When the amplifier operates in isolation mode, the fifth transistor and the sixth transistor are biased to conduct to form a first cancellation signal path from the first input through the first transistor and the fifth transistor to the second output, and to form a second cancellation signal path from the second input through the second transistor and the sixth transistor to the first output.

2. The amplifier of claim 1, wherein the characteristics of the fifth transistor are matched with those of the fourth transistor, wherein the characteristics of the sixth transistor are matched with those of the third transistor, and wherein the characteristics include threshold voltage, geometry, rotation, and bias.

3. The amplifier of claim 1, wherein the fifth transistor and the sixth transistor comprise metal-oxide-semiconductor field-effect transistors and are biased such that the gate-drain voltage of the fifth transistor and the sixth transistor does not cause gate oxide breakdown in the fifth transistor and the sixth transistor.

4. The amplifier of claim 1, wherein the third transistor and the fourth transistor are biased to be turned on.

5. The amplifier of claim 1, wherein the first input and the second input are configured to be coupled to the secondary winding of a transformer.

6. The amplifier of claim 1, wherein the first output and the second output are configured to be coupled to the primary winding of a transformer.

7. An amplifier comprising: A common emitter stage, which is coupled to the first and second inputs; A common-base stage, which is coupled to the common-emitter stage and the first and second outputs; as well as Elimination paths, coupled to the common emitter and common base stages, as well as the first and second outputs, wherein the elimination paths are configured as follows: When the amplifier operates in isolation mode, it generates a first cancellation signal that is 180 degrees out of phase with the first leakage signal at the first output and a second cancellation signal that is 180 degrees out of phase with the second leakage signal at the second output; and The first cancellation signal and the second cancellation signal are not generated when the amplifier is not operating in the isolation mode.

8. The amplifier of claim 7, wherein the cancellation path comprises: A first elimination transistor is coupled to the common emitter, the common base, and the first output; as well as A second elimination transistor is coupled to the common emitter and common base stages and the second output.

9. The amplifier of claim 8, wherein the first cancellation transistor and the second cancellation transistor are biased to be turned on when the amplifier operates in the isolation mode.

10. The amplifier of claim 8, wherein when the amplifier is not operating in the isolation mode, the first cancellation transistor and the second cancellation transistor are biased to be off.

11. The amplifier of claim 10, wherein the first cancel transistor and the second cancel transistor comprise metal-oxide-semiconductor field-effect transistors and are biased by a bias voltage when the amplifier is not operating in the isolation mode, such that the gate-source voltages of the first cancel transistor and the second cancel transistor are less than threshold voltages for the first cancel transistor and the second cancel transistor, and such that the gate-drain voltages of the first cancel transistor and the second cancel transistor are less than maximum gate-drain voltages for the first cancel transistor and the second cancel transistor.

12. The amplifier of claim 8, wherein the common-emitter stage comprises: A first transistor, coupled to the first input, the common base, and the second cancel transistor; as well as A second transistor is coupled to the second input, the common base, and the first cancel transistor.

13. The amplifier of claim 8, wherein the common-base stage comprises: A first transistor, which is coupled to the emitter, the second cancel transistor, and the first output; as well as The second transistor is coupled to the common-emitter stage, the first cancel transistor, and the second output.

14. The amplifier of claim 13, wherein the first transistor and the second transistor are biased to be turned on.

15. An amplifier comprising: The first transistor is coupled to the first input; The second transistor is coupled to the second input; A third transistor, which is coupled to the first transistor and the first output; The fourth transistor is coupled to the second transistor and the second output; A first elimination path between the first transistor and the third transistor and the second output, wherein the first elimination path is configured as follows: When the amplifier operates in isolation mode, it generates a first cancellation signal that is 180 degrees out of phase with the first leakage signal passing through the second transistor and the fourth transistor. and The first cancellation signal is not generated when the amplifier is not operating in the isolation mode; and A second elimination path between the second transistor and the fourth transistor and the first output, wherein the second elimination path is configured as follows: When the amplifier operates in isolation mode, it generates a second cancellation signal that is 180 degrees out of phase with the second leakage signal passing through the first transistor and the third transistor; and The second cancellation signal is not generated when the amplifier is not operating in the isolation mode.

16. The amplifier of claim 15, wherein the first cancellation path includes a first cancellation transistor coupled to the first transistor and the third transistor and the second output, and wherein the second cancellation path includes a second cancellation transistor coupled to the second transistor and the fourth transistor and the first output.

17. The amplifier of claim 16, wherein the characteristics of the first cancellation transistor are matched with the characteristics of the fourth transistor, wherein the characteristics of the second cancellation transistor are matched with the characteristics of the third transistor, and wherein the characteristics include threshold voltage, geometry, rotation, and bias.

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