Solar cell and identification method

Abstract

This invention discloses a solar cell and an identification method therein. The solar cell includes a semiconductor substrate, spaced-apart grid electrodes located on the surface of the semiconductor substrate, and at least one identification code. The identification code includes multiple marker points for forming battery data traceability, wherein at least one grid electrode overlaps with at least one marker point to form an overlapping region. The width of the grid electrode in the overlapping region is greater than the width of the grid electrode in the non-overlapping region, and the diameter of the marker point is not less than the width of the grid electrode in the non-overlapping region. This invention improves the decoding rate of the identification code.

Description

Technical Field

[0001] This invention relates to the field of photovoltaic technology, and more specifically, to a solar cell and an identification method thereon. Background Technology

[0002] Currently, photovoltaic (PV) modules are experiencing rapid development in my country. Marking is essential for tracking solar cells within PV modules during and after the manufacturing process. Typically, marking is done on the silicon wafer surface for information traceability during production. This is achieved by using a laser to create small pits or lines of pits on the wafer surface, forming a marking pattern. Each wafer is given a unique code. After marking, the marking information is read by capturing an image of the mark and analyzing it, then mapped to each wafer. This allows for the tracking of each silicon wafer during post-processing to produce solar cells and modules, which is of great significance for information traceability throughout the entire PV industry chain.

[0003] Currently, with the development of solar cell technology, the spacing between sub-grid lines is becoming increasingly smaller. When recognizing and parsing QR code information, there is a mutually limiting relationship between the magnification of the camera lens and the field of view; the higher the magnification, the smaller the field of view. Since battery production lines use belt-driven stepping conveyors with a positional error of approximately ±2mm, the magnification of the camera lens is limited to avoid the QR code appearing out of the field of view due to positional errors. This, in turn, limits the size of the QR code. Generally, the QR code size used on the battery production line needs to be larger than 2mm*2mm, the corresponding encoding matrix size needs to be larger than 20*20, and the data capacity needs to be greater than 20 bits, meaning the QR code size must be larger than the sub-grid line spacing. Thus, the QR code will inevitably be obscured by at least one grid line, affecting the parsing effect. Existing technology addresses this problem by breaking the grid line at the QR code location to avoid its position. However, this not only disrupts the overall appearance of the solar cell but also weakens the current collection capacity of the QR code area compared to other areas due to the missing grid line, thus affecting the electrical performance of that area.

[0004] Therefore, there is an urgent need to provide a solar cell that can improve the success rate of tag decoding without affecting the current collection capability. Summary of the Invention

[0005] In view of this, the present invention provides a solar cell and an identification method to improve the decoding rate of identification codes.

[0006] On one hand, the present invention provides a solar cell, including a semiconductor substrate, and at least one identification code and spaced grid electrodes located on the surface side of the semiconductor substrate. The identification code includes a plurality of markers for forming battery data traceability, wherein at least one grid electrode overlaps with at least one of the markers to form an overlapping region, the width of the grid electrode in the overlapping region is greater than the width of the grid electrode in the non-overlapping region, and the diameter of the marker is not less than the width of the grid electrode in the non-overlapping region.

[0007] Optionally, the width difference between the gate line electrodes in the overlapping region and the gate line electrodes in the non-overlapping region is a, where 1μm≤a≤20μm.

[0008] Optionally, the number of markers is M, and the number of markers overlapping with the gate electrode is N, where N / M ≤ 20%.

[0009] Optionally, a marker point includes a first portion region and a second portion region, the first portion region overlapping with the gate electrode, the area of ​​the first portion region being S1, and the area of ​​the marker point being S, wherein S1 / S≤60%.

[0010] Optionally, the diameter of the marker point is D, and the width of the grid line electrode is d, where D ≥ 2d.

[0011] Optionally, 50μm≤D≤250μm.

[0012] Optionally, the depth of the marking point is less than or equal to 6 μm in a direction perpendicular to the surface of the semiconductor substrate.

[0013] Optionally, the spacing between adjacent gate line electrodes is k, where 1mm ≤ k ≤ 4mm.

[0014] Optionally, the marking point is a pit formed by laser or high-energy particle impact or chemical etching.

[0015] Optionally, the decoding error correction capability of the identification code is less than or equal to 25%.

[0016] On the other hand, the present invention also provides a method for identifying a solar cell, the solar cell comprising a semiconductor substrate, and at least one identification code and spaced grid electrodes located on the surface side of the semiconductor substrate. The identification code includes a plurality of markers for forming battery data traceability, wherein at least one grid electrode overlaps with at least one of the markers to form an overlapping region, the width of the grid electrode in the overlapping region is greater than the width of the grid electrode in the non-overlapping region, and the diameter of the marker is not less than the width of the grid electrode in the non-overlapping region.

[0017] The identification method includes the following steps:

[0018] Obtain an image of the identification code;

[0019] The image is preprocessed;

[0020] The marker points that overlap with the gate line electrodes are completed using a compensation algorithm to obtain a complete identity code.

[0021] Optionally, the compensation algorithm is the Hough circle detection method or the contour tracking algorithm.

[0022] Compared with the prior art, the solar cell and identification method provided by the present invention achieve at least the following beneficial effects:

[0023] The solar cell of this invention does not disconnect the grid electrodes to avoid the identification code, thus ensuring the integrity of the solar cell in terms of appearance and maintaining the integrity of the grid electrodes without causing any missing grid lines, thereby ensuring the solar cell's ability to collect current. In this application, at least one grid electrode overlaps with at least one marker point to form an overlapping region. The width of the grid electrode in the overlapping region is greater than the width of the grid electrode in the non-overlapping region, and the diameter of the marker point is not less than the width of the grid electrode in the non-overlapping region. This application not only ensures that the grid electrodes in the overlapping region, excluding those filling the laser pit, still maintain current transmission capability, preventing the grid electrodes from breaking at the location of the marker point, thus preventing current from being conducted and reducing cell efficiency, but also ensures that the marker point is not completely covered by the grid electrodes, thereby improving the success rate of subsequent decoding.

[0024] Of course, any product implementing this invention does not necessarily need to achieve all of the technical effects described above at the same time.

[0025] Other features and advantages of the invention will become clear from the following detailed description of exemplary embodiments of the invention with reference to the accompanying drawings. Attached Figure Description

[0026] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments of the invention and, together with their description, serve to explain the principles of the invention.

[0027] Figure 1 This is a schematic diagram of a planar structure of a solar cell provided by the present invention;

[0028] Figure 2 yes Figure 1 A magnified view of a portion of region A in the middle;

[0029] Figure 3 This is a magnified view of the overlap between the grid line electrodes and the marker points;

[0030] Figure 4 This is another magnified view of the overlap between the grid line electrodes and the marker points;

[0031] Figure 5 This is a cross-sectional view along the A-A' direction in diagram 2;

[0032] Figure 6 This is a flowchart of a solar cell identification method provided by the present invention. Detailed Implementation

[0033] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the invention.

[0034] The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the invention or its application or use.

[0035] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.

[0036] In all the examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

[0037] It should be noted that similar labels and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be discussed further in subsequent figures.

[0038] Reference Figures 1 to 4 , Figure 1 This is a schematic diagram of a planar structure of a solar cell provided by the present invention. Figure 2 yes Figure 1 A magnified view of a portion of region A in the middle. Figure 3 This is a magnified view of the overlap between the grid line electrodes and the marker points; Figure 4 This is another magnified view showing the overlap between the grid line electrodes and the marker points. For example... Figure 1 As shown, the solar cell 100 provided in this embodiment includes a semiconductor substrate 1, and grid line electrodes 2 arranged at intervals on the surface side of the semiconductor substrate 1, and at least one identification code 3. The identification code 3 includes a plurality of marker points 4 for forming battery data traceability, wherein at least one grid line electrode 2 overlaps with at least one marker point 4 to form an overlapping region 5. Figure 3 and Figure 4The width of the gate electrode 2 in the overlapping region 5 is greater than the width of the gate electrode 2 in the non-overlapping region, and the diameter of the marker point 4 is not less than the width of the gate electrode 2 in the non-overlapping region.

[0039] In some embodiments, the semiconductor substrate 1 can be a single-crystal silicon substrate, and multiple laser pits, i.e., marking points 4, are formed on the semiconductor substrate 1 by laser irradiation. To extract the current generated by the photovoltaic effect in the semiconductor substrate 1, grid electrodes 2 need to be disposed on the surface of the semiconductor substrate 1. The grid electrodes 2 can be composed of main grid lines and fine grid lines, and the materials of the main grid lines and fine grid lines can be conductive metal materials such as copper, nickel, aluminum, silver, or aluminum-silver alloys. The solar cell 100 also includes fine grid lines extending along the row direction X and arranged in the column direction Y, and main grid lines extending along the row direction X and column direction Y. It should be noted that... Figure 1 The quantity and spacing of fine grid lines and main grid lines are not intended as limitations on the actual product, but are merely illustrative. Since the spacing between main grid lines is typically large, the identification code 3 usually does not overlap with the main grid lines. In this invention, the grid line electrode 2 that overlaps with the identification code 3 refers to the fine grid line. Figure 1 The grid electrode 2 is intact, and the grid electrode 2 is not disconnected to avoid the identification code 3, thus ensuring the integrity of the appearance of the solar cell 100. Moreover, the grid line is retained in the area overlapping with the identification code 3, which does not reduce the current collection ability of that area.

[0040] Figure 1 The diagram only shows the case where one identification code 3 is set on the semiconductor surface. Multiple identification codes 3 can also be set. When multiple identification codes 3 are set, if the solar cell 100 is sliced, it can be ensured that each slice has an identification code 3, so as to realize the tracking of the solar cell 100.

[0041] Figure 1 and Figure 2 The identification code 3 is only for illustrative purposes. For example, it can be 10*10 (rows * columns), 12*12 (rows * columns), 13*13 (rows * columns), or 22*22 (rows * columns). In this embodiment, only 20*20 (rows * columns) is used as an example for illustrative purposes. The number of marker points 4 contained in the identification code 3 is not specifically limited here and can be determined according to the actual product.

[0042] Figure 1 and Figure 2 In the diagram, the number of overlapping regions 5 formed by the overlap of the gate electrode 2 and the marker point 4 is only for illustrative purposes and is not specifically limited here. For example, only one gate electrode 2 may overlap with the marker point 4, or two gate electrodes 2 may overlap with the marker point 4.

[0043] As an example, Figure 3 and Figure 4 The diagram shows two cases where the grid electrode 2 overlaps with the marker point 4, one of which is as follows: Figure 3 In the case of [the specific situation], part of the gate electrode 2 overlaps with the marker point 4; another example is [the following]. Figure 4 In the case described above, the gate electrode 2 passes through the marker point 4 and completely overlaps with the marker point 4. In this invention, the width of the gate electrode in the overlapping area refers to... Figure 3 and Figure 4 The overall width 2a of the grid electrode overlapping with marker point 4; the width of the grid electrode in the non-overlapping region refers to the grid width 2b outside the overlapping region 5 with marker point. In some cases, the grid width 2b is equal to or approximately equal to the sub-grid width. Optionally, the grid electrode width in the overlapping region and the grid electrode width in the non-overlapping region can be obtained by measuring with an imaging device or a profilometer. The grid electrode 2 is formed by screen printing conductive paste. When the grid electrode 2 inevitably overlaps with marker point 4 (laser pit), some conductive paste will fill the laser pit. If the width of the grid electrode 2 in the overlapping region 5 is equal to or less than that in the non-overlapping region, some of it will fill the laser pit, thus narrowing the width of the grid electrode 2 used for current transmission and reducing the current output power. If the width of the grid electrode 2 in the overlapping region 5 is smaller than that in the non-overlapping region, the grid electrode 2 may break, thus preventing current output and reducing battery efficiency. In this embodiment, the width of the gate electrode 2 in the overlapping region 5 is greater than the width of the gate electrode 2 in the non-overlapping region. This ensures that, excluding the gate electrode 2 filling the laser pit in the overlapping region 5, the remaining gate electrode 2 still ensures current transmission, thus ensuring battery efficiency. Furthermore, it prevents the gate electrode 2 from breaking at the location of the marker point 4, which would prevent current from being conducted and reduce battery efficiency.

[0044] In some embodiments, the diameter of marker point 4 is not less than the width of the gate electrode 2 in the non-overlapping region, meaning the diameter of marker point 4 is relatively large. This ensures that marker point 4 is not completely covered by the gate electrode 2, thereby improving the success rate of subsequent decoding. During subsequent decoding, since the area of ​​marker point 4 covered by the gate electrode 2 is small, the covered area can be supplemented using a corresponding compensation algorithm, thereby improving the decoding success rate.

[0045] Compared with the prior art, the 100 solar cells of this embodiment have at least the following beneficial effects:

[0046] The solar cell 100 of the present invention does not disconnect the grid electrode 2 to avoid the identification code 3, which not only ensures the integrity of the solar cell 100 in appearance, but also does not cause the grid line to be missing, maintaining the integrity of the grid electrode 2 and ensuring the current collection capability of the solar cell 100. In this embodiment, at least one grid electrode 2 overlaps with at least one marker point 4 to form an overlapping region 5. The width of the grid electrode 2 in the overlapping region 5 is greater than the width of the grid electrode 2 in the non-overlapping region, and the diameter of the marker point 4 is not less than the width of the grid electrode 2 in the non-overlapping region. This embodiment can not only ensure that the grid electrode 2 in the overlapping region 5, excluding the grid electrode 2 filling the laser pit, still guarantees current transmission and ensures battery efficiency, but also prevents the grid electrode 2 from breaking at the location where the marker point 4 is set, thereby preventing current from being conducted and reducing battery efficiency. Of course, it can also ensure that the marker point 4 is not completely covered by the grid electrode 2, thereby improving the success rate of subsequent decoding.

[0047] In some alternative embodiments, reference continues to be made to... Figure 1 and Figure 2 The width difference between the gate electrode 2 in the overlapping region 5 and the gate electrode 2 in the non-overlapping region is a, where 1μm≤a≤20μm.

[0048] Optionally, the width difference between the gate electrode 2 in the overlapping region 5 and the gate electrode 2 in the non-overlapping region can be 1μm, 3μm, 5μm, 8μm, 10μm, 15μm, 20μm, or any value between 1μm and 20μm, without any specific limitation here.

[0049] It should be noted that the width difference between the gate electrode 2 in the overlapping region 5 and the gate electrode 2 in the non-overlapping region cannot be too large or too small. If the width difference is too small, as mentioned above, the wider gate electrode 2 in the overlapping region 5 is used to fill the marker point 4; if it is too small, the marker point 4 cannot be filled. If the width difference is too large, too much silver paste will be filled into the marker point 4, resulting in an excessively large area of ​​the marker point 4, which will reduce the decoding success rate during subsequent decoding. In this embodiment, the width difference 'a' between the gate electrode 2 in the overlapping region 5 and the gate electrode 2 in the non-overlapping region is within the range of 1μm ≤ a ≤ 20μm. This satisfies the requirement that the gate electrode 2 fills the marker point 4 without causing the area of ​​the gate electrode 2 filled into the marker point 4 to be too large, thus reducing the decoding success rate.

[0050] In some alternative embodiments, reference continues to be made to... Figure 2 The number of marker points 4 is M, and the number of marker points 4 that overlap with the grid line electrode 2 is N, where N / M≤20%.

[0051] Optionally, N / M can be 20%, 18%, 16%, 13%, 10%, 8%, 5%, 2%, or 0, or any value less than or equal to 20%, without specific limitations.

[0052] It is understood that the solar cell 100 in this embodiment may simultaneously possess the technical features of any of the above embodiments. For example, in this embodiment, at least one grid electrode 2 of the solar cell 100 overlaps with at least one marker point 4 to form an overlapping region 5. The width of the grid electrode 2 in the overlapping region 5 is greater than the width of the grid electrode 2 in the non-overlapping region, and the diameter of the marker point 4 is not less than the width of the grid electrode 2 in the non-overlapping region. At the same time, the range of the width difference 'a' between the grid electrode 2 in the overlapping region 5 and the grid electrode 2 in the non-overlapping region is 1μm≤a≤20μm, which is not specifically limited here.

[0053] Understandably, the more marker points 4 overlap with the gate electrode 2, the lower the decoding success rate; conversely, the fewer marker points 4 overlap with the gate electrode 2, the higher the decoding success rate. For example, in a 20*20 (rows*columns) array of 400 marker points 4, if only 4 marker points 4 overlap with the gate electrode 2 (i.e., only 4 marker points 4 are obscured by the gate electrode 2), the probability of successful decoding will be higher. During decoding, a compensation algorithm can be used to complete the obscured portions, thereby improving the decoding success rate.

[0054] In this embodiment, the ratio N / M of the number of marker points 4 overlapping with the grid electrode 2 to the total number of marker points 4 is ≤20%. Since the number of marker points 4 blocked by the grid electrode 2 is small, the decoding success rate of the identification code 3 is improved.

[0055] In some alternative embodiments, reference continues to be made to... Figure 2 A marker point includes a first part region and a second part region. The first part region overlaps with the gate electrode 2. The area of ​​the first part region is S1, and the area of ​​the marker point 4 is S, where S1 / S≤60%.

[0056] It should be noted that, Figure 2 The first and second parts of the region of marker point 4 are not labeled. Optionally, S1 / S can be 60%, 50%, 40%, 30%, 20%, 10%, 5%, 0, or any value less than or equal to 60%, without specific limitations here.

[0057] In this application, the area of ​​the first part of the region that overlaps with the gate electrode 2 is not specifically limited, as long as the ratio of the area S2 of the first part of the region to the area S of the marker point 4, S1 / S, is ≤60%. The second part of the region refers to the part that does not overlap with the gate electrode 2.

[0058] It is understood that the solar cell 100 in this embodiment may simultaneously possess the technical features of any of the above embodiments. For example, in this embodiment, at least one grid electrode 2 of the solar cell 100 overlaps with at least one marker point 4 to form an overlapping region 5. The width of the grid electrode 2 in the overlapping region 5 is greater than the width of the grid electrode 2 in the non-overlapping region, and the diameter of the marker point 4 is not less than the width of the grid electrode 2 in the non-overlapping region. At the same time, the range of the width difference a between the grid electrode 2 in the overlapping region 5 and the grid electrode 2 in the non-overlapping region is 1μm≤a≤20μm, and the ratio of the number N of marker points 4 overlapping with the grid electrode 2 to the total number M of marker points 4 is N / M≤20%.

[0059] It is understandable that if the area where a marker point 4 overlaps with the gate electrode 2 is larger, the probability that the marker point 4 can be recognized is lower, which will reduce the overall success rate of recognizing the identity code 3. Conversely, if the area where a marker point 4 overlaps with the gate electrode 2 is smaller, the probability that the marker point 4 can be recognized is higher, thereby improving the overall success rate of recognizing the identity code 3. In this embodiment, the ratio of the area S2 of the first part of the region to the area S of the marker point 4, S1 / S, is ≤60%, which ensures that each marker point 4 is recognized, thereby improving the decoding success rate of the identity code 3.

[0060] In some alternative embodiments, reference continues to be made to... Figure 2 The diameter of marker 4 is D, and the width of grid electrode 2 is d, where D≥2d.

[0061] Figure 2 The diameter D of marker point 4 and the width d of grid electrode 2 are not marked.

[0062] It is understood that the solar cell 100 in this embodiment may simultaneously possess the technical features of any of the above embodiments. For example, in this embodiment, at least one grid electrode 2 of the solar cell 100 overlaps with at least one marker point 4 to form an overlapping region 5. The width of the grid electrode 2 in the overlapping region 5 is greater than the width of the grid electrode 2 in the non-overlapping region, and the diameter of the marker point 4 is not less than the width of the grid electrode 2 in the non-overlapping region. At the same time, the range of the width difference 'a' between the grid electrode 2 in the overlapping region 5 and the grid electrode 2 in the non-overlapping region is 1μm≤a≤20μm. The ratio of the number N of marker points 4 overlapping with the grid electrode 2 to the total number M of marker points 4 is N / M≤20%. A marker point 4 includes a first part region and a second part region. The first part region overlaps with the grid electrode 2. The area of ​​the first part region is S1, and the area of ​​the marker point 4 is S, where S1 / S≤60%.

[0063] It is understandable that the larger the diameter of the marker point 4 and the smaller the width of the grid electrode 2, the smaller the ratio of the area of ​​the marker point 4 obscured by the grid electrode 2 to the total area of ​​the marker point 4. Therefore, the probability of a single marker point 4 being successfully identified is greater, and ultimately, the overall success rate of identifying the identity code 3 is higher. In this embodiment, the ratio of the diameter D of the marker point 4 to the width d of the grid electrode 2 is greater than or equal to 2. Therefore, the diameter D of the marker point 4 is more than twice the width d of the grid electrode 2. Thus, even when a marker point 4 is completely obscured by a single grid electrode 2, it is only half the size of the marker point 4. This ensures that each marker point 4 is identified, thereby improving the decoding success rate of the identity code 3.

[0064] In some alternative embodiments, reference continues to be made to... Figure 2 , 50μm≤D≤250μm.

[0065] In some embodiments, the width d of the gate electrode 2 is between 20 and 80 μm, i.e., 20 μm ≤ d ≤ 80 μm. For example, the width d of the gate electrode 2 can be 20 μm, 30 μm, 40 μm, 50 μm, 60 μm, 70 μm, or 80 μm. In some embodiments, 20 μm ≤ d ≤ 40 μm and 50 μm ≤ D ≤ 250 μm, where D can be any value between 50 μm and 250 μm, as long as D ≥ 2d. This ensures that each marker point 4 is recognized, thereby improving the decoding success rate of the identification code 3.

[0066] In some alternative embodiments, refer to Figure 5 , Figure 5 This is a cross-sectional view along the A-A' direction in 2. In this embodiment, the depth of the marker point 4 is less than or equal to 6 μm in the direction perpendicular to the surface of the semiconductor substrate 1.

[0067] The solar cell 100 in this embodiment may have the technical features of any of the above embodiments. For example, in this embodiment, at least one grid electrode 2 overlaps with at least one marker point 4 to form an overlapping region 5. The width of the grid electrode 2 in the overlapping region 5 is greater than the width of the grid electrode 2 in the non-overlapping region, and the diameter of the marker point 4 is not less than the width of the grid electrode 2 in the non-overlapping region. Simultaneously, the width difference 'a' between the grid electrode 2 in the overlapping region 5 and the grid electrode 2 in the non-overlapping region is in the range of 1μm≤a≤20μm. The ratio N of the number of marker points 4 overlapping with the grid electrode 2 to the total number of marker points 4, N / M≤20%. A marker point 4 includes a first part region and a second part region. The first part region overlaps with the grid electrode 2, and the area of ​​the first part region is S1, and the area of ​​the marker point 4 is S, where S1 / S≤60%. The ratio of the diameter D of the marker point 4 to the width d of the grid electrode 2 is greater than or equal to 2.

[0068] Reference Figure 5 In the direction perpendicular to the surface of the semiconductor substrate 1, the greater the depth of the marking point 4, the greater the damage to the surface of the semiconductor substrate 1, which will reduce the efficiency of photocurrent generation. If the depth of the marking point 4 is greater, more conductive silver paste will be needed to fill the marking point 4 when fabricating the gate electrode 2 by screen printing, and the more material used to fabricate the gate electrode 2, the higher the cost.

[0069] It should be noted that there is a correlation between the depth of marker point 4, the width of the gate electrode in the overlapping region, and the width of the gate electrode in the non-overlapping region. The greater the depth of marker point 4, the greater the width of the gate electrode in the overlapping region, and the greater the difference in width between the gate electrodes in the overlapping and non-overlapping regions. For example, if the depth of marker point 4 is 6 μm and the width of the gate electrode in the non-overlapping region is 40 μm, then the width of the gate electrode in the overlapping region is usually 50 μm. Of course, there is some error involved, and no specific limit is made here.

[0070] In this embodiment, the depth of the marking point 4 in the direction perpendicular to the surface of the semiconductor substrate 1 is less than or equal to 6 μm. The small depth of the marking point 4 has the following advantages: firstly, it causes less damage to the semiconductor substrate 1 and basically does not reduce the efficiency of photocurrent generation; secondly, if the gate electrode 2 overlaps with the marking point 4 when the gate electrode 2 is fabricated by screen printing, not much conductive silver paste is needed to fill the marking point 4, thus not increasing the cost.

[0071] In some alternative embodiments, reference continues to be made to... Figure 1 The spacing between adjacent gate line electrodes 2 is k, where 1mm≤k≤4mm.

[0072] Optionally, k can be 1mm, 2mm, 3mm, or 4mm; no specific limitation is made here.

[0073] It is understandable that the smaller the spacing k between the grid electrodes 2, the more grid electrodes 2 there are, and the better the current collection capability of the solar cell 100. Conversely, the larger the spacing k between the grid electrodes 2, the fewer the grid electrodes 2 there are, and the worse the current collection capability of the solar cell 100. The spacing k between the grid electrodes 2 cannot be too small either, as a small spacing k increases manufacturing difficulty. For example, k < 1 mm will increase the manufacturing process difficulty. In this embodiment, 1 mm ≤ k ≤ 4 mm allows for an increase in the number of grid electrodes 2, improving the current collection capability of the solar cell 100 without increasing the manufacturing process difficulty.

[0074] In some alternative embodiments, marker point 4 is a pit formed by laser or high-energy particle impact or chemical etching.

[0075] The method for forming marker point 4 can be laser irradiation, high-energy particle impact, or chemical etching. No specific limitation is made here regarding the method of forming the pit of marker point 4. For example only, marker point 4 is a pit formed by laser irradiation.

[0076] The marker point 4 in this application can satisfy the marker point 4 of any of the above embodiments, and will not be described again here.

[0077] In some optional embodiments, the decoding error correction capability of the identification code 3 is less than or equal to 25%.

[0078] When setting the encoding rules for the identification code 3, a higher error correction level results in a higher percentage of correction through the identification method when errors occur during subsequent decoding. See Table 1 below, which shows the error correction level and the percentage of correction. In this embodiment, the error correction capability is increased to over 25%, meaning that even if no more than 25% of the identification code 3 is obscured, the entire identification code 3 can still be parsed through data redundancy and error correction during encoding. Preferably, this embodiment uses QR code encoding rules, corresponding to either the "Q" or "H" error correction level. The error correction code for the QR code used in this invention can be implemented using the Reed-Solomon error correction algorithm.

[0079] In this embodiment, the decoding error correction capability of the identification code 3 is less than or equal to 25%. No more than 25% of the identification code 3 is obscured. Through data redundancy and error correction during encoding, the entire identification code 3 can still be parsed.

[0080] Table 1. QR code error correction levels

[0081]

[0082] Based on the same inventive concept, this invention also provides a method for identifying a solar cell 100, wherein the solar cell 100 can be any of the solar cells 100 described in the above embodiments, such as... Figure 1 and Figure 2 The solar cell 100 includes a semiconductor substrate 1, and at least one identification code 3 and spaced grid electrodes 2 located on the surface side of the semiconductor substrate 1. The identification code 3 includes a plurality of marker points 4 for forming battery data traceability, wherein at least one grid electrode 2 overlaps with at least one marker point 4 to form an overlapping region 5. The width of the grid electrode 2 in the overlapping region 5 is greater than the width of the grid electrode 2 in the non-overlapping region, and the diameter of the marker point 4 is not less than the width of the grid electrode 2 in the non-overlapping region. The solar cell 100 here has the beneficial effects of any of the above embodiments, which will not be repeated here.

[0083] Combination Figure 6 , Figure 6 This is a flowchart of a solar cell identification method provided by the present invention. Figure 6 The identification method in the image includes the following steps:

[0084] S1: Obtain the image of the identification code;

[0085] S2: Perform image preprocessing;

[0086] S3: The markers that overlap with the grid line electrodes are completed using a compensation algorithm to obtain a complete identification code.

[0087] In this invention, after acquiring images of the identification code using image acquisition devices such as high-definition cameras, the images are first preprocessed. This preprocessing involves removing interference points in the image that are not part of the identification code. Then, the overlapping marker points with the grid electrodes are supplemented using a compensation algorithm to obtain the complete identification code. Because the diameter of the marker points in the solar cell is not less than the width of the grid electrodes in the non-overlapping areas (i.e., the marker point diameter is relatively large), it ensures that the marker points are not completely covered by the grid electrodes. Therefore, the compensation algorithm can be used to supplement the overlapping marker points with the grid electrodes to obtain the complete identification code, thereby improving the success rate of subsequent decoding.

[0088] In some alternative embodiments, the compensation algorithm is the Hough circle detection method or the contour tracking algorithm.

[0089] In some embodiments, when marker points are formed by methods such as lasers, the marker points are typically curves (e.g., circles). When the marker points are obscured by grid electrodes, their outlines are incomplete circles during imaging. These incomplete circles can be obtained by using the Hough circle detection method or contour tracking algorithms. The Hough transform detection method is a method for detecting the shape of discontinuity boundaries. It achieves the fitting of straight lines and curves by transforming the image coordinate space to a parameter space.

[0090] The contour tracking algorithm obtains the contour of the marked points in the image through an image segmentation algorithm.

[0091] Comparative experiment:

[0092] To demonstrate that the technical solution in this invention can improve the decoding success rate of the identification code without affecting battery efficiency, several sets of experiments were conducted. The specific experimental parameters and results are shown in Table 2 below:

[0093] Table 2 Experimental parameters and results

[0094]

[0095]

[0096] The comparative experiments 1 and 2 in Table 2 above use technical parameters commonly used in the prior art, while embodiments 1 to 16 use the technical parameters of the embodiments of the present invention. As can be seen from Table 2, the decoding success rate of comparative experiments 1 and 2 is 0, meaning the identification code cannot be recognized; however, after using the technical parameters of the embodiments of the present invention, the decoding success rate is higher, greatly improving the decoding success rate. Furthermore, compared to not setting markers, the battery efficiency of comparative experiments 1 and 2 is reduced, showing a negative value; however, after using the technical parameters of the embodiments of the present invention, the current remains unchanged compared to not setting markers. The present invention improves the decoding success rate while ensuring battery efficiency.

[0097] As can be seen from the above embodiments, the solar cell and identification method provided by the present invention achieve at least the following beneficial effects:

[0098] The solar cell of this invention does not disconnect the grid electrodes to avoid the identification code, thus ensuring the integrity of the solar cell in terms of appearance and maintaining the integrity of the grid electrodes without causing any missing grid lines, thereby ensuring the solar cell's ability to collect current. In this application, at least one grid electrode overlaps with at least one marker point to form an overlapping region. The width of the grid electrode in the overlapping region is greater than the width of the grid electrode in the non-overlapping region, and the diameter of the marker point is not less than the width of the grid electrode in the non-overlapping region. This application not only ensures that the grid electrodes in the overlapping region, excluding those filling the laser pit, still maintain current transmission capability, preventing the grid electrodes from breaking at the location of the marker point, thus preventing current from being conducted and reducing cell efficiency, but also ensures that the marker point is not completely covered by the grid electrodes, thereby improving the success rate of subsequent decoding.

[0099] While specific embodiments of the invention have been described in detail by way of examples, those skilled in the art should understand that the examples are for illustrative purposes only and not intended to limit the scope of the invention. Those skilled in the art should understand that modifications can be made to the above embodiments without departing from the scope and spirit of the invention. The scope of the invention is defined by the appended claims.

Claims

1. A solar cell, characterized in that, The device includes a semiconductor substrate, and a series of gate electrodes arranged at intervals on the surface side of the semiconductor substrate, and at least one identification code. The identification code includes a plurality of markers for forming battery data traceability, wherein at least one of the gate electrodes overlaps with at least one of the markers to form an overlapping region. The width of the gate electrode in the overlapping region is greater than the width of the gate electrode in the non-overlapping region, and the diameter of the marker is not less than the width of the gate electrode in the non-overlapping region.

2. The solar cell according to claim 1, characterized in that, The width difference between the gate electrode in the overlapping region and the gate electrode in the non-overlapping region is a, where 1μm≤a≤20μm.

3. The solar cell according to claim 1, characterized in that, The number of marker points is M, and the number of marker points overlapping with the gate electrode is N, where N / M≤20%.

4. The solar cell according to claim 1, characterized in that, A marker point includes a first portion region and a second portion region, the first portion region overlapping with the gate electrode, the area of ​​the first portion region being S1, and the area of ​​the marker point being S, wherein S1 / S≤60%.

5. The solar cell according to claim 1, characterized in that, The depth of the marking point is less than or equal to 6 μm in a direction perpendicular to the surface of the semiconductor substrate.

6. The solar cell according to claim 1, characterized in that, The marker points are pits formed by laser or high-energy particle impact or chemical etching.

7. The solar cell according to any one of claims 1-6, characterized in that, The decoding and error correction capability of the identification code is less than or equal to 25%.

8. A method for identifying solar cells, characterized in that, The solar cell includes a semiconductor substrate, and a grid line electrode arranged at intervals on the surface side of the semiconductor substrate and at least one identification code. The identification code includes a plurality of marker points for forming battery data traceability, wherein at least one of the grid line electrodes overlaps with at least one of the marker points to form an overlapping region. The width of the grid line electrode in the overlapping region is greater than the width of the grid line electrode in the non-overlapping region, and the diameter of the marker point is not less than the width of the grid line electrode in the non-overlapping region. The identification method includes the following steps: Obtain an image of the identification code; The image is preprocessed; The marker points that overlap with the gate line electrodes are completed using a compensation algorithm to obtain a complete identity code.

9. The solar cell identification method according to claim 8, characterized in that, The compensation algorithm is either the Hough circle detection method or the contour tracking algorithm.

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