Single-phase inverter based on flying-capacitor three-level boost and control method
By adjusting the circuit structure and control method of the single-phase inverter and using a buffer capacitor to absorb power fluctuations at twice the power frequency, the power fluctuation problem in the single-phase DC-AC system was solved, achieving efficient energy conversion and improved system reliability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- XI AN JIAOTONG UNIV
- Filing Date
- 2022-12-29
- Publication Date
- 2026-04-21
AI Technical Summary
In single-phase DC-AC systems, power fluctuations occur, resulting in double the power frequency current ripple on the DC-side inductor and double the power frequency voltage ripple on the DC-side capacitor. This affects fuel cell lifespan, photovoltaic panel efficiency, AC-side power quality, and motor drive.
A single-phase inverter based on a flying capacitor three-level boost is adopted. By adjusting the circuit structure and control method, the traditional three-level boost circuit is transformed into a non-isolated three-level boost circuit. The buffer capacitor absorbs the power frequency fluctuation of twice the power frequency, reducing the impact on the inductor current and DC bus voltage ripple, and avoiding the use of electrolytic capacitors.
It achieves the suppression of second harmonic ripple without adding circuit components, thereby improving system reliability and power density, extending converter lifespan, and simplifying control complexity.
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Figure CN116317499B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of power technology, specifically relating to a single-phase inverter and control method based on a flying capacitor type three-level boost. Background Technology
[0002] Single-phase DC-AC converters, as interface devices between DC power supplies and AC loads or single-phase AC power grids, are widely used in modern society for converting single-phase DC power to AC power and providing stable energy to electrical equipment. However, single-phase DC-AC energy conversion systems have an inherent problem: the DC power input to the converter is constant, while the power required by the AC load or grid fluctuates at twice the power frequency (100Hz). This imbalance in instantaneous power between the AC and DC sides generates a current ripple at twice the power frequency on the DC-side inductor and a voltage ripple at twice the power frequency on the DC-side capacitor, a problem known as the second harmonic ripple problem in single-phase inverter systems. In specific application scenarios, this problem can have many adverse effects: if the DC power supply is a fuel cell or photovoltaic panel, the fluctuating current on the inductor will affect the lifespan of the fuel cell and the MPPT efficiency of the photovoltaic panel; if the AC side is connected to a single-phase grid or used to drive a motor, the fluctuating voltage on the DC bus will affect the power quality of the grid and the motor's operation.
[0003] To address the power fluctuation problem in single-phase DC-AC systems, a traditional solution is to employ a passive power decoupling strategy. This involves increasing the values of the capacitors and inductors within the converter to suppress the second harmonic ripple within a reasonable range, ensuring it does not affect the operation of the DC-side power supply and the AC-side load. While this method has proven effective, it also introduces various problems such as excessive system size, high cost, and poor reliability.
[0004] To overcome the shortcomings of passive power decoupling schemes, active power decoupling schemes have received widespread attention in recent years. The implementation method involves adding a buffer circuit to the existing converter, utilizing the energy storage devices within the buffer circuit to absorb power fluctuations, eliminating the adverse effects of low-frequency ripple within the converter, and avoiding the use of electrolytic capacitors and large inductors. However, most of these methods require the addition of extra circuitry, resulting in high costs and complex control. Summary of the Invention
[0005] The purpose of this invention is to provide a single-phase inverter and control method based on a flying capacitor type three-level boost. This single-phase inverter circuit realizes the energy conversion between the DC side and the AC side, avoids the adverse effects of low-frequency ripple on the DC side and the AC side, and greatly reduces the system's demand for passive components such as inductors and capacitors and the control complexity.
[0006] To achieve the above objectives, the present invention employs the following technical means:
[0007] A single-phase inverter based on a flying capacitor three-level booster includes: a front-stage flying capacitor three-level booster and a rear-stage inverter bridge;
[0008] The pre-stage flying capacitor type three-level boost includes an input DC power supply V. dc Inductor L, MOSFET power transistor Q a MOSFET power transistor Q b Diode D a Diode D b Buffer capacitor C f DC bus capacitor C o The input DC power supply V dc The positive terminal is connected to one end of the input inductor L, and the other end of the inductor L is connected to the diode D. a anode and MOSFET power transistor Q a The drain of the diode; diode D a Cathode and buffer capacitor C f The positive electrode and diode D b The anode of the MOSFET is connected; the power transistor Q is connected to the anode. a The source and MOSFET power transistor Q b The drains are connected; MOSFET power transistor Q b The source is connected to a DC power supply V. dc The negative terminal and DC bus capacitor C o The negative terminal; buffer capacitor C f The negative terminal is connected to the MOSFET power transistor Q. a The source; DC bus capacitor C o The positive terminal of the diode D is connected to b Cathode; DC bus capacitor C o Connect to the input terminal of the fully controlled inverter bridge;
[0009] The subsequent inverter bridge includes a fully controlled inverter bridge and a filter inductor L. ac Filter capacitor C ac The load resistor R; the input terminal of the fully controlled inverter bridge is connected to the DC bus capacitor C. o The positive output of the fully controlled inverter bridge is connected to an inductor L. ac The positive terminal of the fully controlled inverter bridge is connected to the common ground on the AC side, and the negative terminal of the inverter bridge is connected to the common ground on the AC side; capacitor C ac It is connected in parallel with the load resistor R, and one end is connected to the inductor L. ac One end is the negative terminal, and the other end is connected to the public area on the AC side.
[0010] As a further improvement of the present invention, the fully controlled inverter bridge consists of four MOSFET power transistors S ap S an S bp Sbn composition.
[0011] As a further improvement of the present invention, the buffer capacitor C f and DC bus capacitor C o All are thin-film capacitors.
[0012] As a further improvement of the present invention, the inductance value of the inductor L satisfies: Where: V dc K is the DC side input voltage. I f is the inductor current ripple factor. s P is the switching frequency of the MOSFET power transistor. dc This represents the DC component of the converter's rated output power.
[0013] As a further improvement to the present invention, the DC bus capacitor C o The capacitance value C o satisfy: Where: P dc V represents the DC component of the converter's rated output power, fs is the MOSFET's switching frequency, and V o V is the DC bus voltage of the converter. dc This is the DC-side input voltage.
[0014] As a further improvement to the present invention, the buffer capacitor C f The capacitance value C f The value satisfies:
[0015] , where: P dc K represents the DC component of the converter's rated output power. F ω is the buffer voltage ripple factor. line It is the power frequency angular frequency. This represents the average voltage across the buffer capacitor.
[0016] The control method for a single-phase inverter based on a flying capacitor three-level boost includes:
[0017] Set the double-frequency ripple on the input inductor L to 0, and the DC bus capacitor C... o The second harmonic ripple control is set to 0, utilizing the buffer capacitor C. f It absorbs the second harmonic ripple energy within the system.
[0018] As a further improvement of the present invention, it also includes decoupling operations on the coupled portion of the power stage circuit, specifically including:
[0019] It is the command signal for the steady-state average value of the DC bus voltage, directly given by the digital controller; V busThe DC bus voltage signal obtained through real-time sampling is filtered out by a notch filter to remove the second harmonic ripple signal, thus obtaining the real-time DC component of the bus voltage. The difference is input to the PI controller G. V Obtain the reference value of the DC component of the input inductor current. Real-time sampled inductor current signal i L After passing through a notch filter, the DC component of the inductor current, which is twice the power frequency component, is obtained. This DC component is then compared with the reference value of the current signal. The difference is input to the PI controller G. I The system's control variable G can then be obtained; the traditional dual-loop control method, with an outer voltage loop and an inner current loop, precisely controls the DC component of the input inductor current and the DC bus voltage.
[0020] V F0 To buffer the DC component of the capacitor voltage, it is directly given by the digital controller; the subsequent fully controlled inverter bridge is an open-loop control, and the AC side phase information signal sin(2ωt) is easily obtained; substituting it into the decoupling calculation formula, the duty cycle signal d is obtained. a and d b ; the duty cycle signal d a and duty cycle signal d b Modulation generates switch signal sw a ,sw b To achieve the Q of the MOSFET power transistor a and MOSFET power transistor Q b Control.
[0021] As a further improvement of the present invention, the decoupling calculation formula for the coupled part of the power stage circuit is as follows:
[0022]
[0023] Where, d a ,d b These represent the MOSFET power transistors Q and Q respectively. a With Q a The duty cycle of the circuit is turned on; ω is the power frequency angular frequency, V F0 This represents the average voltage across the buffer capacitor.
[0024] Compared with existing technologies, the present invention has the following advantages:
[0025] The single-phase inverter circuit of this invention requires no additional circuit components; it only requires adjustments to the circuit structure and control method based on a traditional three-level boost circuit. The traditional three-level boost circuit is modified into a non-isolated three-level boost circuit, and the DC bus capacitor is reduced from two to one, with the other bus capacitor becoming a flying (buffer) capacitor. By controlling the operation of the two MOSFET power transistors, the buffer capacitor absorbs the double-frequency power fluctuation caused by the instantaneous power inequality between the DC and AC sides of the converter. While achieving AC / DC power conversion, it not only suppresses the double-frequency ripple on the input inductor current but also controls the capacitor voltage ripple on the DC bus, avoiding the use of electrolytic capacitors and replacing them with film capacitors. This helps improve power density, extend converter lifespan, and enhance system reliability.
[0026] The control method of this invention introduces decoupling operations on the coupled part of the power stage circuit in the control loop based on the converter modeling results, so as to realize direct control of the input-side inductor current and DC bus voltage in real time. At the same time, according to the power conservation relationship, the power fluctuation injected into the converter will spontaneously transfer to the buffer capacitor, avoiding the complex command generation and tracking of buffer capacitor voltage. The control method is simple and reliable. Attached Figure Description
[0027] Figure 1 This is a circuit topology diagram of the present invention;
[0028] Figure 2a This is the circuit topology diagram of the converter used in this invention in mode one.
[0029] Figure 2b This is the circuit topology diagram of the converter used in this invention in mode two.
[0030] Figure 2c This is the circuit topology diagram of the converter used in this invention under three modes;
[0031] Figure 2d The circuit topology of the converter used in this invention is shown in mode four.
[0032] Figure 3 This is a block diagram of the control method used in this invention;
[0033] Figure 4a The voltage waveforms across capacitors C1 and C2, and the inductor current waveform i, are shown for those not using the control method of this invention. L ;
[0034] Figure 4b The waveforms of the DC bus voltage, AC output voltage and current, and modulation waves are shown for control methods not employing the present invention.
[0035] Figure 4c The buffer capacitor C is used in the control method of this invention. f The voltage waveform on the DC bus and the capacitance C o Voltage waveform and input inductor current waveform;
[0036] Figure 4d The AC output voltage and current waveforms using this invention; modulation wave C a and C b The waveform; Detailed Implementation
[0037] To enable those skilled in the art to better understand the technical solutions of this invention, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this invention.
[0038] The key to this invention is to adjust the traditional three-level boost circuit to a flying capacitor type three-level boost circuit, so that one of the original DC bus capacitors becomes a flying (buffer) capacitor. By modeling and controlling the converter, the power fluctuation is transferred to the buffer capacitor, thereby achieving DC-AC power conversion while suppressing inductor current ripple and DC bus voltage ripple.
[0039] like Figure 1 As shown, a single-phase inverter topology based on a flying capacitor type three-level booster includes: a front-stage flying capacitor type three-level booster and a rear-stage inverter bridge;
[0040] The pre-stage flying capacitor type three-level boost includes an input DC power supply V. dc Inductor L, MOSFET power transistor Q a MOSFET power transistor Q b Diode D a Diode D b Buffer capacitor C f DC bus capacitor C o The subsequent inverter bridge includes a fully controlled inverter bridge and a filter inductor L. ac Filter capacitor C ac The load resistor R; the input terminal of the fully controlled inverter bridge is connected to the DC bus capacitor C. o .
[0041] Specifically, it includes the input DC power supply V. dc One inductor L, two MOSFET power transistors Q a and Qb Two diodes D a and D b Buffer capacitor C f DC bus capacitor C o And a set of fully controlled inverter bridges. AC output filter inductor L ac and filter capacitor C ac and load resistance R. Buffer capacitor C f Used to absorb fluctuating power; Output DC bus capacitor C o Used to stabilize DC voltage; two power devices Q a Q b Separate controls are used to achieve control objectives.
[0042] The input DC power supply V dc The positive terminal is connected to one end of the input inductor L, and the other end of the inductor L is connected to the diode D. a anode and MOSFET power transistor Q a The drain of the diode; diode D a Cathode and buffer capacitor C f The positive electrode and diode D b The anode of the MOSFET is connected; the power transistor Q is connected to the anode. a The source and MOSFET power transistor Q b The drains are connected; MOSFET power transistor Q b The source is connected to a DC power supply V. dc The negative terminal and DC bus capacitor C o The negative terminal of the buffer capacitor Cf is connected to the MOSFET power transistor Q. a The source; DC bus capacitor C o The positive terminal of the diode D is connected to b The cathode; the DC bus capacitor Co is connected to the input terminal of the fully controlled inverter bridge; the positive output of the fully controlled inverter bridge is connected to the inductor L. ac The positive terminal of the fully controlled inverter bridge is connected to the common ground on the AC side, and the negative terminal of the inverter bridge is connected to the common ground on the AC side; capacitor C ac It is connected in parallel with the load resistor R, and one end is connected to the inductor L. ac One end is the negative terminal, and the other end is connected to the public area on the AC side.
[0043] This invention uses a non-isolated boost topology. By directly controlling the input-side current waveform and the DC-side bus voltage, it automatically transfers the power fluctuations at twice the power frequency to the buffer capacitor. While achieving AC / DC power conversion, it not only suppresses the ripple of the second harmonic on the input inductor current but also controls the capacitor voltage ripple on the DC bus. This avoids the use of electrolytic capacitors, allowing them to be replaced with film capacitors, which helps to improve power density, extend converter lifespan, and enhance system reliability.
[0044] Among them, the buffer capacitor Cf and DC bus capacitor C o All are thin-film capacitors.
[0045] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments.
[0046] When the converter is working normally, the buffer capacitor C is required. f The voltage is always less than the output DC bus capacitance C. o The voltage. Based on the MOSFET power transistor Q... a and MOSFET power transistor Q b Depending on the state, the converter has four modes, such as Figures 2a to 2d As shown.
[0047] Denote the MOSFET power transistor Q a Turn on, MOSFET power transistor Q b The equivalent circuit for conduction is converter mode one; at this time, diode D a and diode D b Both are reverse biased and cannot conduct; inductor L is charging, DC bus capacitor C o Discharge, such as Figure 2a As shown.
[0048] Denote the MOSFET power transistor Q a Turn off, MOSFET power transistor Q b The equivalent circuit that is conducting is converter mode two; at this time, diode D b Diode D cannot conduct when reverse biased. a When the circuit is turned on, the inductor L discharges, and the buffer capacitor C... f Charging, DC bus capacitor C o Discharge, such as Figure 2b As shown.
[0049] Denote the MOSFET power transistor Q a Turn on, MOSFET power transistor Q b The equivalent circuit when turned off is converter mode three; at this time, diode D a Diode D cannot conduct when reverse biased. b When the circuit is turned on, the inductor L charges, and the buffer capacitor C... f Discharge, DC bus capacitor C o Charging, such as Figure 2c As shown.
[0050] Denote the MOSFET power transistor Q a Turn off, MOSFET power transistor Q b The equivalent circuit when turned off is mode four; at this time, diode D a D b Due to freewheeling conduction, inductor L discharges, and DC bus capacitor C...o Charging, such as Figure 2d As shown.
[0051] Based on the above analysis, an average model of the converter can be established:
[0052]
[0053] This invention provides device parameter design for a converter. L represents the inductance value, C... o C is the capacitance value of the DC bus capacitor. f Let i be the capacitance of the buffer capacitor. L V is the inductor current. dc The DC input voltage, v o The DC bus voltage, v f To buffer the capacitor voltage, d a For MOSFET power transistor Q a Duty cycle, d b For MOSFET power transistor Q b The duty cycle is denoted by R, where R is the resistance of the load resistor.
[0054] Regarding the parameter design of semiconductor devices, Q a D a The reverse voltage is greater than the peak voltage of the buffer capacitor; Q b D b The reverse voltage is greater than the output voltage minus the peak voltage of the buffer capacitor.
[0055] Regarding the parameter design of inductor L, note the inductor current ripple Δi over one switching cycle. L Size satisfies:
[0056]
[0057] In the above formula, d a For MOSFET power transistor Q a Duty cycle, T s V is the switching cycle of the MOSFET power transistor. dc Where L is the DC input voltage, f is the inductance value, and f is the DC input voltage. s Let Q be the switching frequency of the MOSFET power transistor. a and MOSFET power transistor Q b The switching cycle and switching frequency are the same.
[0058] Denote the inductor current ripple factor K I for:
[0059]
[0060] In the above formula, iL Let Δi be the inductor current. L This refers to the inductor current ripple.
[0061] Combining equations (2) and (3), we obtain that the inductance value L satisfies:
[0062]
[0063] Where: V dc K is the DC side input voltage. I f is the inductor current ripple factor. s P is the switching frequency of the MOSFET power transistor. dc This represents the DC component of the converter's rated output power.
[0064] Regarding DC bus capacitor C o When taking the value, note that the magnitude of the capacitor voltage ripple ΔV0 over one switching cycle satisfies:
[0065]
[0066] In the above formula, d b For MOSFET power transistor Q b Duty cycle, T s i is the switching cycle of the MOSFET power transistor. L For inductor current, C o f is the capacitance value of the DC bus capacitor. s This represents the switching frequency of the MOSFET power transistor.
[0067] Denote the DC bus capacitor voltage ripple factor K. V for:
[0068]
[0069] Equations (5) and (6) combined yield the DC bus capacitance C. o The value satisfies:
[0070]
[0071] Where: P dc f is the DC component of the rated output power of the converter. s V is the switching frequency of the MOSFET. o V is the DC bus voltage of the converter. dc This is the DC-side input voltage.
[0072] Regarding the buffer capacitor C f When considering the value, note the capacitor voltage ripple Δv over one twice the power frequency cycle. f Size satisfies:
[0073]
[0074] In the above formula, ω is the power frequency angular frequency of the AC output voltage, V F This represents the average voltage across the buffer capacitor.
[0075] Let K be the voltage ripple factor of the buffer capacitor. F for:
[0076]
[0077] Equations (8) and (9) combined yield the buffer capacitor C. f The value satisfies:
[0078]
[0079] Where: P dc K represents the DC component of the converter's rated output power. F V is the buffer voltage ripple coefficient, ω is the power frequency angular frequency, and V F This represents the average voltage across the buffer capacitor.
[0080] The present invention also provides a control method for the converter, such as... Figure 3 As shown. The specific derivation steps are as follows:
[0081] The control method of this invention includes direct control of the DC-side input current and the AC-side output voltage. Since the subsequent fully controlled rectifier bridge is an open-loop control, direct control of the AC-side output voltage is equivalent to direct control of the preceding DC bus voltage. According to the law of conservation of energy, if the current waveform and DC bus voltage on the DC input side of the converter are effectively controlled, the remaining energy will be spontaneously transferred to the buffer capacitor. Specifically:
[0082] Set the double-frequency ripple on the input inductor L to 0, and the DC bus capacitor C... o The second harmonic ripple control is set to 0, utilizing the buffer capacitor C. f It absorbs the second harmonic ripple energy within the system.
[0083] Based on this idea, the following assumptions are made regarding the steady-state operation of the converter:
[0084] Assumption 1: The input inductor current of the converter is constant, with no second harmonic ripple, i.e., i L =I L ;
[0085] Assumption 2: The DC bus voltage of the converter is constant, with no second harmonic ripple, i.e., v o =V o ;
[0086] Assumption 3: The converter has an efficiency of 100% and no power loss inside the converter.
[0087] According to assumption 2, we have:
[0088] v o (t)=V o (11)
[0089] Considering the derivative term with respect to the DC bus capacitor voltage in the average converter model, we have:
[0090]
[0091] Combining equations (11) and (12), we get:
[0092]
[0093] Further, regarding i in the above formula inv and i L After simplification, when the converter operates in steady state, the input power on the DC side should be equal to the DC component of the output power on the AC side. Therefore:
[0094]
[0095] Among them, V AC I represents the amplitude of the inverter output voltage. AC This represents the amplitude of the inverter's output current.
[0096] According to assumption 1 and equation (14), we have:
[0097]
[0098] The subsequent stage is a fully controlled inverter bridge, therefore the DC bus current i bus It can be represented as:
[0099]
[0100] Where M is the modulation coefficient of the inverter bridge, and ω is the power frequency angular frequency of the AC output voltage of the inverter bridge.
[0101] Equations (13), (15), and (16) are combined to obtain the MOSFET power transistor Q. b duty cycle d b The expression is:
[0102]
[0103] Let the gain of the preamplifier flying capacitor type three-level boost be expressed as G = V o / V dc , then d b The expression can be represented as:
[0104]
[0105] According to the principle of power conservation, the instantaneous power injected into the converter should be the sum of the instantaneous power of each component in the circuit:
[0106] p in =p ac +p Cf +p Co +p L +p semi (18)
[0107] Where, p ac p represents the instantaneous power output of the converter. cf p represents the instantaneous power of the buffer capacitor. co p represents the instantaneous power of the DC bus capacitor. L p represents the instantaneous power of the inductor. semi This indicates the instantaneous power of a semiconductor device.
[0108] Based on assumptions 1, 2, and 3: Since there is no loss in the circuit, the instantaneous power of the semiconductor device is 0; since the DC bus voltage is constant, there is no energy change on the DC bus capacitor, and the instantaneous power of the DC bus capacitor is 0; since the inductor current is constant, there is no energy change on the inductor, and the instantaneous power of the inductor is 0. Equation (18) can be further simplified to:
[0109] p in =p ac +p Cf (19)
[0110] Right now:
[0111]
[0112] When the converter is operating in steady state, the DC component of the DC input power is equal to the DC component of the AC output power, and the power of the internal buffer capacitor of the converter should be equal to the second harmonic component of the AC output power of the converter.
[0113]
[0114] Solving the differential equation represented by equation (21), we can obtain the sequential expression for the buffer capacitor voltage as follows:
[0115]
[0116] Among them, V F0 This is for the DC component of the buffer capacitor voltage.
[0117] Substituting the above equation into the derivative of the buffer capacitor voltage in the average model, we can obtain the Q of the MOSFET power transistor.a duty cycle d a The expression is:
[0118]
[0119] Combining equations (17) and (23), in order to achieve the decoupling control effect, a decoupling calculation for the coupled parts of the power stage circuit is introduced in the control loop:
[0120]
[0121] This establishes the control block diagram of the converter, such as Figure 3 As shown.
[0122] It is the command signal for the steady-state average value of the DC bus voltage, directly given by the digital controller. V bus The DC bus voltage signal obtained through real-time sampling is filtered out by a notch filter to remove the second harmonic ripple signal, thus obtaining the real-time DC component of the bus voltage. The difference is input to the PI controller G. V Obtain the reference value of the DC component of the input inductor current. Real-time sampled inductor current signal i L After passing through a notch filter, the DC component of the inductor current, which is twice the power frequency component, is obtained. This DC component is then compared with the reference value of the current signal. The difference is input to the PI controller G. I The system's control variable G can then be obtained. A traditional dual-loop control method, with an outer voltage loop and an inner current loop, is used to precisely control the DC component of the input inductor current and the DC bus voltage.
[0123] V F0 To buffer the DC component of the capacitor voltage, it is directly given by the digital controller. The subsequent fully controlled inverter bridge is an open-loop control, and the AC side phase information signal sin(2ωt) is easily obtained. Substituting into the decoupling calculation of (24), the duty cycle signal d is obtained. a and d b The duty cycle signal d a and duty cycle signal d b Modulation generates switch signal sw a ,sw b To achieve Q of MOSFET power transistor a and MOSFET power transistor Q b Control.
[0124] By directly controlling the DC input current waveform and DC bus voltage, the power fluctuations at twice the power frequency are automatically transferred to the buffer capacitor. This achieves both DC-AC power conversion and the control objectives of reducing inductor current ripple and stabilizing the DC bus voltage. It effectively reduces the converter's requirements for inductors and capacitors, allowing electrolytic capacitors to be replaced with film capacitors, thus improving the converter's power density, lifespan, and reliability.
[0125] To verify the theoretical analysis of the converter described above, this invention provides a design example.
[0126] The converter parameters are as follows: V dc =160V,P in =1kW,V dc_link =400V, M=0.8, f s =20kHz, L=5mH, C o =C f =200uF, C1=C2=200uF, L ac =2mH,C ac =10uF, R=48.4Ω, f line =50Hz, where f line This is the power frequency. (C) o C f C1 and C2 are the capacitance values of the DC bus capacitor and the buffer capacitor in this design; C1 and C2 are the same capacitance values of the DC bus capacitor in the traditional method.
[0127] Figure 4a The voltage waveforms v on the two DC bus capacitors without employing the control method proposed in this invention are given. C1 and v C2 and the waveform i of the input inductor current L .
[0128] Figure 4b The DC bus voltage waveform V is given when the control method proposed in this invention is not used. bus AC output voltage V ac Current i Lf Waveform, and modulated wave C a and C b .
[0129] Figure 4c The buffer capacitor voltage waveform v using the control method of this invention is given. f The voltage waveform v on the DC bus capacitor bus And the waveform i of the input inductor current. LThe DC bus voltage ripple was reduced to approximately 1.5V, a 99.06% reduction compared to the 160V of the traditional control method. The buffer capacitor voltage ripple was 60V, a 25% reduction compared to the voltage ripple on a single capacitor in the traditional control method. The inductor current ripple was controlled to remain essentially constant within 1A.
[0130] Figure 4d The AC side output voltage v using the control method of this invention is given. ac and current i Lf Waveform; Modulated wave C a and C b The waveforms show that the quality of both the output voltage and current waveforms has been significantly improved.
[0131] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit the implementation methods. For those skilled in the art, other variations and modifications can be made based on the above description without departing from the spirit and scope of the present invention, and these variations and modifications should still be within the protection scope of the present invention. The scope of protection of the present invention is defined by the appended claims and their equivalents.
Claims
1. A control method for a single-phase inverter based on a flying capacitor three-level boost converter, characterized in that, A single-phase inverter includes: a front-end flying capacitor type three-level boost and a rear-end inverter bridge; The pre-stage flying capacitor type three-level boost includes an input DC power supply. V dc ,inductance L MOSFET power transistor Q a MOSFET power transistor Q b ,diode D a ,diode D b Buffer capacitor C f DC bus capacitor C o The input DC power supply V dc The positive terminal is connected to the input inductor L One end, inductor L The other end is connected to a diode D a anode and MOSFET power transistor Q a Drain of diode; D a Cathode and buffer capacitor C f positive electrode and diode D b The anode is connected; MOSFET power transistor Q a The source and MOSFET power transistor Q b The drains are connected; MOSFET power transistor Q b The source is connected to a DC power supply. V dc The negative terminal and the DC bus capacitor C o The negative terminal; buffer capacitor C f The negative terminal is connected to the MOSFET power transistor. Q a Source; DC bus capacitor C o The positive terminal of the diode is connected to the diode. D b Cathode; DC bus capacitor C o Connect to the input terminal of the fully controlled inverter bridge; The subsequent inverter bridge includes a fully controlled inverter bridge and a filter inductor. L ac Filter capacitor C ac and load resistance R The input terminal of the fully controlled inverter bridge is connected to the DC bus capacitor. C o The positive output of the fully controlled inverter bridge is connected to an inductor. L ac The positive terminal of the capacitor is connected to the common ground on the AC side, and the negative terminal of the fully controlled inverter bridge is connected to the common ground on the AC side. C ac With load resistance R Parallel connection, one end connected to an inductor L ac One end is the negative terminal, and the other end is connected to the public area on the AC side; The control method includes: Input inductor L The frequency doubler ripple control is 0, and the DC bus capacitor is 0. C o The frequency doubler ripple control is 0, utilizing a buffer capacitor. C f Absorbs second-harmonic ripple energy within the system; It also includes decoupling operations on the coupled parts of the power stage circuit, specifically including: It is the command signal for the steady-state average value of the DC bus voltage, which is directly given by the digital controller; V bus The DC bus voltage signal obtained through real-time sampling is filtered out by a notch filter to remove the second harmonic ripple signal, thus obtaining the real-time DC component of the bus voltage. Difference input PI regulator G V Obtain the reference value of the DC component of the input inductor current. Real-time sampled inductor current signal i L After passing through a notch filter, the DC component of the inductor current, which is twice the power frequency component, is obtained. This DC component is then compared with the reference value of the current signal. Difference input PI regulator G I The system's control variables can then be obtained. G The traditional dual-loop control method, with an outer voltage loop and an inner current loop, was used to precisely control the DC component of the input inductor current and the DC bus voltage. V F0 To buffer the DC component of the capacitor voltage, it is directly given by the digital controller; the subsequent fully controlled inverter bridge is an open-loop control, making it easy to obtain signals with AC side phase information. sin(2ωt) Substituting the decoupling calculation formula, the duty cycle signal is obtained. d a and d b ; the duty cycle signal d a and duty cycle signal d b Modulation generates switching signal sw a , sw b To achieve the power transistor of MOSFET Q a and MOSFET power transistor Q b Control.
2. The control method for a single-phase inverter based on a flying capacitor three-level boost according to claim 1, characterized in that, The fully controlled inverter bridge consists of four MOSFET power transistors. S ap , S an , S bp , S bn composition.
3. The control method for a single-phase inverter based on a flying capacitor three-level boost according to claim 1, characterized in that, The buffer capacitor C f and DC bus capacitor C o All are thin-film capacitors.
4. The control method for a single-phase inverter based on a flying capacitor three-level boost according to claim 1, characterized in that, The inductor L The sense value satisfies: ,in: V dc This is the DC-side input voltage. K I This is the inductor current ripple factor. f s This refers to the switching frequency of the MOSFET power transistor. P dc This represents the DC component of the converter's rated output power.
5. The control method for a single-phase inverter based on a flying capacitor three-level boost according to claim 1, characterized in that, DC bus capacitor C o The capacitance C o satisfy: ,in: P dc This refers to the DC component of the converter's rated output power. fs The switching frequency of the MOSFET. V o This refers to the DC bus voltage of the converter. V dc This is the DC-side input voltage. K V This represents the DC bus capacitor voltage ripple coefficient.
6. The control method for a single-phase inverter based on a flying capacitor three-level boost according to claim 1, characterized in that, Buffer capacitor C f The capacitance C f The value satisfies: ,in: P dc This refers to the DC component of the converter's rated output power. K F This is the buffer voltage ripple factor. ω line It is the power frequency angular frequency. This represents the average voltage across the buffer capacitor.
7. The control method for a single-phase inverter based on a flying capacitor three-level boost according to claim 1, characterized in that, The decoupling formula for the coupled part of the power stage circuit is as follows: in, d a , d b They represent MOSFET power transistors respectively. Q a and Q a The duty cycle during conduction; ω It is the power frequency angular frequency. V F0 G represents the average voltage of the buffer capacitor; G is the gain of the three-level boost converter with a flying capacitor in the preceding stage. V dc This is the DC-side input voltage. P dc This refers to the DC component of the converter's rated output power. C f It is a buffer capacitor.
Citation Information
Patent Citations
Method for reducing low-frequency ripple voltage of intermediate direct current link of single-phase inverter
CN105141116A
Electric power supply
JP2022148112A