Three-level neutral point clamped inverter control method, device, electronic equipment and medium
By constructing a virtual voltage vector and clamping the maximum phase current, the problem of high switching loss in the three-level neutral-point clamped inverter is solved, and a balance between extending the inverter life and current control is achieved.
Patent Information
- Application Number
- CN202310465405.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-04-26
- Publication Date
- 2025-10-03
- Estimated Expiration
- 2043-04-26
AI Technical Summary
The existing three-level neutral-point clamped inverter has high switching losses in the power devices, which leads to excessively high IGBT junction temperature and shortens the life of the inverter.
By constructing a virtual voltage vector and based on the method of clamping the maximum phase current, the voltage vector that is most conducive to balancing the midpoint voltage is selected for output, thereby reducing the switching loss of power devices, lowering the junction temperature, and improving the life of the inverter.
While ensuring current control and midpoint potential balance, it reduces the switching loss of power devices and extends the service life of the inverter.
Smart Images

Figure CN116317655B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of electric power technology, and in particular to a control method, device, electronic equipment and medium for a three-level neutral point clamped inverter. Background Art
[0002] Three-level neutral-point-clamped (NPC) inverters have been widely used in rail transit electric traction, wind power generation, shield tunneling, and other fields due to their advantages such as low device voltage stress, high output voltage and current quality, and simple structure. In these scenarios, the power loss generated by power devices represented by insulated-gate bipolar transistors (IGBTs) causes the vast majority of system losses, and excessive system losses also increase the operating costs of the electric drive system. The reliability of power electronic devices is mainly affected by the maximum temperature and temperature cycling. 55% of electric drive failures are caused by thermal cycling or temperature increases of power devices. In addition, the life of the IGBT mainly depends on its junction temperature fluctuation and average junction temperature. The failure of the power device will eventually have a catastrophic impact on the electric drive system.
[0003] Existing technologies, such as the three-level traditional SVPWM strategy, have very low output current harmonics and excellent control effects. However, due to the frequent switching times within a switching cycle, switching near the three-phase current amplitude leads to a significant increase in switching losses of power devices, ultimately causing the IGBT junction temperature to be too high and shortening the inverter life. Summary of the Invention
[0004] The main purpose of the embodiments of the present invention is to provide a three-level neutral point clamped inverter control method, device, electronic device and medium, which reduce the loss and junction temperature of the three-level neutral point clamped inverter while ensuring neutral point potential balance and current control, and improve its life.
[0005] One aspect of the present invention provides a three-level neutral point clamped inverter control method, comprising:
[0006] Obtaining a reference current and a feedback current, and determining a reference voltage according to the reference current and the feedback current;
[0007] determining, according to a phase angle of a reference voltage vector, a first sector in which the reference voltage is located, wherein the three-level space voltage vector includes a virtual voltage vector and a basic voltage vector, and the virtual voltage vector is synthesized by the basic voltage vector;
[0008] Determine the phase to be clamped based on the relative magnitudes of the first sector and the three-phase current, and obtain an alternative vector and an alternative switching sequence;
[0009] selecting a target switching sequence from the candidate switching sequences according to the candidate vector, wherein the target switching sequence is used to keep the midpoint potential within a preset range;
[0010] According to the target switching sequence, a target three-phase current is output.
[0011] According to the three-level neutral point clamped inverter control method, obtaining a reference current and a feedback current, and determining a reference voltage according to the reference current and the feedback current include:
[0012] The reference current and the feedback current in a two-phase stationary coordinate system are obtained, and the reference current and the feedback current are used as inputs of a linear controller to obtain the reference voltage.
[0013] According to the three-level neutral point clamped inverter control method, wherein the virtual voltage vector is synthesized by the basic voltage vector, the method includes:
[0014] determining a basic voltage vector according to a reference voltage vector;
[0015] The virtual voltage vector is obtained by synthesizing two adjacent basic voltage vectors according to the clamping principle, or synthesizing at least three basic voltage vectors located at the vertices according to the clamping principle.
[0016] According to the three-level neutral point clamped inverter control method, determining the first sector where the reference voltage is located according to the reference voltage vector phase angle includes:
[0017] Periodically sampling the reference voltage to obtain the amplitude and phase angle of the reference voltage;
[0018] The first sector where the reference voltage is located is determined according to the amplitude and the phase angle.
[0019] Determining the phase to be clamped based on the relative magnitudes of the first sector and the three-phase currents, and obtaining an alternative vector and an alternative switching sequence, including:
[0020] Sampling the three-phase currents in the first sector where the reference voltage is located, determining the maximum current among the three-phase currents, and using the phase where the maximum current is located as the clamping phase;
[0021] searching, from the first sector according to the clamped phase, a second sector for representing a minimum sector formed by the basic voltage vector and the virtual voltage vector;
[0022] At least one of the basic voltage vector and the virtual voltage vector constituting the second sector is used as a candidate vector, and the switching sequence is determined according to the candidate vector.
[0023] According to the three-level neutral-point clamped inverter control method, a target switching sequence is selected from the alternative switching sequences according to the alternative vector, and the target switching sequence is used to keep the neutral-point potential within a preset range, including:
[0024] Calculating the midpoint current of each of the candidate switching sequences according to the relationship between the midpoint current and the three-phase switching function;
[0025] collecting capacitor voltages of the first capacitor and the second capacitor, and calculating a midpoint voltage deviation based on the capacitor voltages;
[0026] According to the midpoint voltage deviation, the target switching sequence that satisfies a preset midpoint current is selected from the candidate switching sequences, where the preset midpoint current includes one of the midpoint current closest to 0 and the maximum midpoint current.
[0027] According to the three-level neutral point clamped inverter control method, outputting a target three-phase current according to the target switching sequence includes:
[0028] sending control harmonics to the inverter in a segmented manner according to the basic voltage vector and the virtual voltage vector of the target switching sequence;
[0029] The output target three-phase current is measured and Clarke transformation is performed.
[0030] Another aspect of an embodiment of the present invention provides a three-level neutral point clamped inverter control device, comprising:
[0031] A reference voltage module, configured to obtain a reference current and a feedback current, and determine a reference voltage according to the reference current and the feedback current;
[0032] a virtual vector module, determining a first sector in which the reference voltage is located based on a phase angle of a reference voltage vector, wherein the first sector is located in a three-level space voltage vector, the three-level space voltage vector including a virtual voltage vector and a basic voltage vector, the virtual voltage vector being synthesized by the basic voltage vector;
[0033] An alternative module, which determines the phase to be clamped according to the relative magnitudes of the first sector and the three-phase current, and obtains an alternative vector and an alternative switching sequence;
[0034] a midpoint balancing module, configured to select a target switching sequence from the candidate switching sequences according to the candidate vector, wherein the target switching sequence is configured to keep the midpoint potential within a preset range;
[0035] The output module is used to output the target three-phase current according to the target switching sequence.
[0036] Another aspect of an embodiment of the present invention provides an electronic device, including a processor and a memory;
[0037] The memory is used to store programs;
[0038] The processor executes the program to implement the method described above.
[0039] Embodiments of the present invention further disclose a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device can read the computer instructions from the computer-readable storage medium and execute the computer instructions, causing the computer device to perform the method described above.
[0040] The beneficial effects of the present invention are as follows: based on the method of clamping the maximum phase current, a virtual voltage vector is constructed, and by judging the position of the voltage vector, the voltage vector that is most conducive to balancing the midpoint voltage is selected for output, thereby ensuring the current control and midpoint potential balance effects while reducing the switching loss of the power device, reducing the junction temperature, and thus increasing its life, and ultimately increasing the life of the inverter.
[0041] Additional aspects and advantages of the present invention will be set forth in part in the description which follows and, in part, will be obvious from the description which follows, or may be learned by practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0042] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the following description of the embodiments with reference to the accompanying drawings, in which:
[0043] Figure 1 It is the topology diagram of the three-level neutral point clamped inverter.
[0044] Figure 2 is the spatial voltage vector diagram of the three-level neutral-point clamped inverter.
[0045] Figure 3 4 is a flow chart of a control method for a three-level neutral-point clamped inverter according to an embodiment of the present invention.
[0046] Figure 4 This is the virtual voltage vector synthesis process intention of an embodiment of the present invention.
[0047] Figure 5 Schematic diagram of a three-level space voltage vector composed of a virtual voltage vector and a basic voltage vector according to an embodiment of the present invention.
[0048] Figure 6 1 is a schematic diagram of a three-level space voltage sector confirmation process according to an embodiment of the present invention.
[0049] Figure 7 3 is a schematic diagram of a process of clamping based on current amplitude according to an embodiment of the present invention.
[0050] Figure 8 Schematic diagram of the relative position of voltage and current and the maximum phase current in each sector according to an embodiment of the present invention
[0051] Figure 9a , Figure 9b 2 is a schematic diagram of synthesizing two virtual voltage vectors according to an embodiment of the present invention.
[0052] Figure 10a , Figure 10b 2 is a schematic diagram of switching sequences corresponding to two virtual voltage vectors according to an embodiment of the present invention.
[0053] Figure 11 1 is a schematic diagram of a midpoint electrical balancing process according to an embodiment of the present invention.
[0054] Figure 12 1 is a schematic diagram of a three-phase current output process according to an embodiment of the present invention.
[0055] Figure 13 Schematic diagram of another three-level neutral-point clamped inverter control flow.
[0056] Figure 14 2 is a diagram of a three-level neutral-point clamped inverter control and analysis device according to an embodiment of the present invention. DETAILED DESCRIPTION
[0057] The following describes embodiments of the present invention in detail. Examples of the embodiments are shown in the accompanying drawings, where the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. In the subsequent description, suffixes such as "module," "component," or "unit" used to represent elements are used solely to facilitate the description of the present invention and have no specific meaning in themselves. Therefore, "module," "component," or "unit" may be used interchangeably. "First," "second," and the like are used solely to distinguish technical features and should not be construed as indicating or implying relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features. In this subsequent description, the consecutive numbering of method steps is for ease of review and understanding. In conjunction with the overall technical solution of the present invention and the logical relationship between the various steps, adjusting the order of implementation of the steps does not affect the technical effects achieved by the technical solution of the present invention. The embodiments described below with reference to the accompanying drawings are exemplary and are intended only to explain the present invention and should not be construed as limiting the present invention.
[0058] Reference Figure 1 , Figure 1This is the topology diagram of the three-level neutral point clamped inverter. In the topology diagram of the three-phase three-level NPC inverter (three-level neutral point clamped inverter), V dc Indicates the DC bus voltage; i dc Represents the DC bus current; C1 and C2 represent the top and bottom capacitors, V C1 and V C2 Represents the voltage between the two capacitors, i C1 and i C2 Represents the current flowing through the two capacitors respectively; O represents the neutral point (NP) of the inverter; L represents the load inductance; R represents the load resistance; i a ,i b and i c Indicates the three-phase load current.
[0059] Reference Figure 2 , Figure 2 This is the spatial voltage vector diagram of the three-level neutral point clamped inverter. The three-level inverter has 27 basic voltage vectors, but excluding 6 redundant small vectors and 2 redundant zero vectors, there are only 19 effective voltage vectors. In each small sector, there are only three vectors available for combination. Figure 2 Z1~Z6 are the six large sectors of the three-level space voltage vector, and each large sector with an interval of π / 3 is divided into four small sectors. ref Rotating at an angular velocity of ω in the α-β space vector plane, it can be synthesized by the three basic voltage vectors in the corresponding small sector. Based on the volt-second balance principle, the action time of each voltage vector can be calculated. Finally, the three-level space voltage vector classification is generated by combining the nine-segment switching sequence. Refer to Table 1:
[0060]
[0061] Table 1
[0062] like Figure 3 As shown, the embodiment of the present invention provides a process of a three-level neutral point clamped inverter control method, which specifically includes but is not limited to steps S100-S500:
[0063] S100 , obtaining a reference current and a feedback current, and determining a reference voltage according to the reference current and the feedback current.
[0064] In some embodiments, the reference voltage is obtained by obtaining a reference current and a feedback current in a two-phase stationary coordinate system, and the reference current and the feedback current are used as inputs of a linear controller. For example, the linear controller can be a PI controller or a device capable of achieving equivalent functions.
[0065] S200, determining a first sector where a reference voltage is located according to a reference voltage vector phase angle, wherein the first sector is located in a three-level space voltage vector, wherein the three-level space voltage vector includes a virtual voltage vector and a basic voltage vector, and the virtual voltage vector is synthesized by the basic voltage vector.
[0066] In some embodiments, reference Figure 4 The virtual voltage vector synthesis process shown in FIG. 1 includes but is not limited to steps S210 to S220:
[0067] S210, determining a basic voltage vector according to a reference voltage vector;
[0068] S220 , synthesizing two adjacent basic voltage vectors according to the clamping principle, or synthesizing at least three basic voltage vectors located at the vertices according to the clamping principle to obtain a virtual voltage vector.
[0069] For example, refer to Figure 5 The schematic diagram of the three-level space voltage vector composed of the virtual voltage vector and the basic voltage vector is shown in FIG. Figure 5 In the figure, the black dot represents the basic voltage vector, and the midpoint of the line connecting any two basic voltage vectors represents the virtual voltage vector. When two adjacent voltage vectors are synthesized, only one phase of the power tube is involved in switching, and the number of switching is small. Therefore, from the perspective of reducing switching losses, it is determined that the 27 basic voltage vectors (reference Figure 2 ), firstly, the two adjacent basic voltage vectors are synthesized according to the clamping principle to obtain a new virtual voltage vector (the midpoint of the small triangle side, the virtual vector V V1 ); Secondly, for each small sector (such as small sectors ① ~ ④) the virtual vector (virtual vector V V2 ), which is synthesized by three basic vectors located at the vertices according to the clamping principle.
[0070] S300 , determining a phase to be clamped based on the relative magnitudes of the first sector and the three-phase currents, and obtaining an alternative vector and an alternative switching sequence.
[0071] In some embodiments, it is necessary to confirm the phase of the reference voltage. Figure 6 The schematic diagram of the sector confirmation process shown includes but is not limited to steps S310 to S320:
[0072] S310, periodically sampling the reference voltage to obtain the amplitude and phase angle of the reference voltage;
[0073] S320: Determine a first sector where the reference voltage is located based on the amplitude and the phase angle, wherein the first sector is used to represent a large sector where the reference voltage is located.
[0074] In some embodiments, in order to reduce the frequent switching times within a switching cycle, the switching near the three-phase current amplitude causes a significant increase in the switching loss of the power device, which ultimately causes the IGBT junction temperature to be too high and the inverter life to be shortened, this embodiment provides a technical solution by clamping at the current amplitude, referring to Figure 7 , which includes but is not limited to steps S330 to S350:
[0075] S330, sampling the three-phase currents in the first sector where the reference voltage is located, determining the maximum current among the three-phase currents, and using the phase where the maximum current is located as the clamping phase;
[0076] S340 , searching for a second sector from the first sector according to the clamped phase, where the second sector is used to represent a minimum sector formed by the basic voltage vector and the virtual voltage vector;
[0077] S350 , using at least one of a basic voltage vector and a virtual voltage vector constituting the second sector as a candidate vector, and determining a switching sequence according to the candidate vector.
[0078] For example, refer to Figure 8 The relative position of voltage and current and the maximum phase current of each sector are shown in the figure. Figure 5 , Figure 8 For RL load, R = 10Ω, L = 10mH, then its load angle is 17.4°. At this time, the current lags the voltage by a load angle. According to the traditional strategy, the large sectors Z1 to Z6 are divided. Figure 8 The relationship between current and voltage can be used to obtain the phase corresponding to the maximum current in each large sector. ref Located near the left boundary of sector Z1, the maximum current i max for i a , then it is necessary to clamp the A phase, that is, to ensure that the A phase tube of the inverter does not switch in the current sampling period; when u ref When the rotation reaches the right boundary of the first sector, the maximum current i max for i b , then it is necessary to clamp the inverter phase B power device. Therefore, the relative magnitude of the three-phase current can be determined in each sampling cycle, and then the clamping phase is determined, and the output switching sequence is clamped.
[0079] according to Figure 5 , since the formation of some virtual voltage vectors needs to consider redundant small vectors, therefore, for the generation of its pulse sequence, the virtual voltage vector V V1 and V V2 The calculation is:
[0080] V V1 =1 / 2(V1+V2) (1)
[0081] V V2 =1 / 3(V1+V2+V3) (2)
[0082] In formula (1) and formula (2), V V1 and V V2 They represent two constructed virtual vectors respectively; V1, V2 and V3 represent basic voltage vectors for constructing the virtual vectors.
[0083] When the reference voltage vector V ref Rotate to Figure 5 When the position is shown, the small sector ② is as follows Figure 9a As shown, the small sector ② is divided into Figure 9b The quadrilateral sector (second sector) shown, then V ref Located in the third quadrilateral sector, its final position is determined to be Z1-②-3.
[0084] The voltage vector acting in each switching cycle and its switching sequence are determined by the candidate vectors in the smallest quadrilateral sector. Figure 9b As shown, the quadrilateral vertices are 3 virtual vectors and 1 basic voltage vector, and each virtual vector can generate 1 to 3 switching sequences according to different clamping requirements. For the three sequences 1, 2 and 5, they are synthesized by two basic vectors, each acting on 0.5 T s For the three sequences of 6, 7 and 8, three basic voltage vectors are synthesized, acting on 1 / 3 respectively. T s ; For 3 and 4, the corresponding basic voltage vector can be directly output within one sampling period. Figure 9b The eight corresponding switching sequences in the small quadrilateral shown can meet different clamping requirements, as shown in Table 2. A+, AO, and A- in Table 2 respectively represent clamping phase A to the P, O, and N states. The remaining meanings are the same and are not repeated here. Figure 10a express Figure 9b The switching state of sequence 1 adopts a three-segment wave generation method, and the wave generation method of the remaining virtual vectors composed of two basic voltage vectors is the same; Figure 10b express Figure 10b The switching state of sequence 8 adopts a five-segment wave generation method, and the wave generation method of the remaining virtual vectors composed of three basic voltage vectors is the same.
[0085]
[0086] Table 2
[0087] S400 , selecting a target switching sequence from the candidate switching sequences according to the candidate vector, where the target switching sequence is used to keep the midpoint potential within a preset range.
[0088] In some embodiments, reference Figure 11 The midpoint electrical balancing process diagram shown includes but is not limited to steps S410 to S30:
[0089] S410, calculating the midpoint current of each candidate switching sequence according to the relationship between the midpoint current and the three-phase switching function;
[0090] S420, collecting capacitor voltages of the first capacitor and the second capacitor, and calculating a midpoint voltage deviation based on the capacitor voltages;
[0091] S430 , selecting a target switching sequence that satisfies a preset midpoint current from the candidate switching sequences according to the midpoint voltage deviation, where the preset midpoint current includes one of a current closest to 0 and a maximum midpoint current.
[0092] For example, in order to reduce switching losses while ensuring the control effect of the midpoint potential, it is necessary to further consider the impact of different switching sequences on the midpoint potential under the same clamping state. The relationship between the midpoint current and the three-phase switching function can be expressed as:
[0093] i O =(1-|S A |)i a +(1-|S B |)i b +(1-|S C |)i c (3)
[0094] When the reference voltage vector is located Figure 8 When the position is shown, if the clamping phase A is determined, the candidate switching sequence is shown in the second row of Table 2. The midpoint current when POO acts alone is i b +i c , the midpoint current when PPO acts alone is i c , then the midpoint current under the action of the virtual voltage vector corresponding to sequence 1 is
[0095] i O1 =1 / 2(i b +i c )+1 / 2i c (4)
[0096] The calculation of midpoint current under the action of virtual vectors corresponding to sequence 2 and sequence 5 is the same as sequence 1. The midpoint current under the action of ONN alone is i a The midpoint current under the action of PON alone is i b , then the midpoint current under the action of the virtual vector corresponding to sequence 8 is:
[0097] i O8=1 / 3i b +1 / 3(i b +i c )+1 / 3i c (5)
[0098] At this point, the midpoint currents corresponding to all output sequences that can clamp phase A can be calculated.
[0099] Then, in order to determine the switching sequence that is most conducive to midpoint balance, it is necessary to determine the direction of the feedback midpoint voltage. The midpoint voltage deviation can be expressed as:
[0100] ΔU C =U C1 -U C2 (6)
[0101] If ΔU C >0, indicating that the voltage of capacitor C1 is large at this time, C1 needs to discharge, and C2 needs to be charged. In principle, a virtual vector that makes the midpoint current less than 0 should be selected at this time. However, there may not be a switching sequence in the alternative vector that makes the midpoint current strictly less than 0. Therefore, calculate the midpoint current corresponding to all alternative sequences and select the switching sequence that can minimize the midpoint current for output; similarly, if ΔU C <0, indicating that the voltage of capacitor C2 is large at this time, C1 needs to be charged, and C2 needs to be discharged, so the switching sequence that can maximize the midpoint current is selected for output.
[0102] S500: Output target three-phase current according to the target switching sequence.
[0103] In some embodiments, reference Figure 12 The three-phase current output process diagram shown includes but is not limited to steps S510 to S520:
[0104] S510, sending control harmonics to the inverter in a segmented manner according to the basic voltage vector and the virtual voltage vector of the target switching sequence;
[0105] S520 , measuring the output target three-phase current and performing Clarke transformation.
[0106] For example, refer to Figure 13 Another three-level neutral point clamped inverter control process diagram shown includes steps S610 to S650:
[0107] S610 , taking the difference between the reference current and the feedback current in the α-β coordinate system and inputting the difference into the PI controller to obtain a reference voltage vector in the α-β coordinate system, where the α-β coordinate system is a two-phase stationary coordinate system;
[0108] S620, calculating the reference voltage vector amplitude and phase angle, and determining the sector in which it is located;
[0109] S630, determining the maximum phase current based on the fed-back three-phase current, determining the clamped phase, and obtaining an alternative vector and switching sequence;
[0110] S640, determining the feedback midpoint voltage, and selecting a switching sequence that makes the midpoint approach equilibrium for output;
[0111] S650 measures the output three-phase current and performs 3S / 2S transformation (Clark transformation).
[0112] Figure 14 14 is a diagram of a three-level neutral-point clamped inverter control and analysis device according to an embodiment of the present invention. The device includes a reference voltage module 1410 , a virtual vector module 1420 , an alternative module 1430 , a neutral-point balancing module 1440 , and an output module 1450 .
[0113] Among them, the reference voltage module is used to obtain the reference current and the feedback current, and determine the reference voltage according to the reference current and the feedback current; the virtual vector module is used to determine the first sector where the reference voltage is located according to the phase angle of the reference voltage vector, and the first sector is in the three-level space voltage vector. The three-level space voltage vector includes a virtual voltage vector and a basic voltage vector, and the virtual voltage vector is synthesized by the basic voltage vector; the alternative module is used to determine the phase to perform clamping processing according to the relative size of the first sector and the three-phase current, and obtain the alternative vector and the alternative switching sequence; the midpoint balancing module is used to select the target switching sequence from the alternative switching sequence according to the alternative vector, and the target switching sequence is used to keep the midpoint potential within a preset range; the output module is used to output the target three-phase current according to the target switching sequence.
[0114] For example, the reference voltage module, virtual vector module, alternative module, midpoint balancing module, and output module in the device can implement any of the aforementioned three-level midpoint clamped inverter control methods, namely, determining a reference voltage based on the reference current and feedback current according to the obtained reference current and feedback current; determining the first sector where the reference voltage is located from the three-level spatial voltage vector; determining the phase to be clamped based on the first sector, obtaining an alternative vector and an alternative switching sequence; determining the phase to be clamped based on the relative magnitude of the first sector and the three-phase current, obtaining an alternative vector and an alternative switching sequence; and outputting a target three-phase current according to the target switching sequence. The beneficial effects of the present invention are: constructing a virtual voltage vector based on the method of clamping the maximum phase current, and selecting the voltage vector that is most conducive to balancing the midpoint voltage by determining the location of the voltage vector for output, thereby reducing the switching loss of the power device, reducing the junction temperature, and thereby increasing its lifespan, while ensuring the current control and midpoint potential balancing effects.
[0115] An embodiment of the present invention further provides an electronic device, the electronic device including a processor and a memory;
[0116] The memory stores a program;
[0117] The processor executes the program to perform the aforementioned three-level neutral-point clamped inverter control method; the electronic device has the function of carrying and running the three-level neutral-point clamped inverter control software system provided by the embodiment of the present invention, such as a controller.
[0118] An embodiment of the present invention further provides a computer-readable storage medium, wherein the storage medium stores a program, and the program is executed by a processor to implement the three-level neutral-point clamped inverter control method as described above.
[0119] In some optional embodiments, the function / operation mentioned in the block diagram may not occur in the order mentioned in the operation diagram. For example, depending on the function / operation involved, the two boxes shown in succession can actually be executed substantially simultaneously or the boxes can sometimes be executed in reverse order. In addition, the embodiment presented and described in the flow chart of the present invention is provided in an exemplary manner for the purpose of providing a more comprehensive understanding of the technology. The disclosed method is not limited to the operation and logic flow presented herein. Optional embodiments are contemplated in which the order of the various operations is changed and the sub-operations described as a part of a larger operation are performed independently.
[0120] An embodiment of the present invention further discloses a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device can read the computer instructions from the computer-readable storage medium and execute the computer instructions, causing the computer device to perform the aforementioned three-level neutral-point clamped inverter control method.
[0121] Furthermore, although the present invention is described in the context of functional modules, it should be understood that, unless otherwise indicated, one or more of the functions and / or features described may be integrated into a single physical device and / or software module, or one or more functions and / or features may be implemented in separate physical devices or software modules. It will also be understood that a detailed discussion of the actual implementation of each module is not necessary for understanding the present invention. More specifically, given the properties, functions, and internal relationships of the various functional modules in the devices disclosed herein, the actual implementation of the module will be understood within the ordinary skill of an engineer. Therefore, a person skilled in the art using ordinary skill will be able to implement the present invention set forth in the claims without undue experimentation. It will also be understood that the specific concepts disclosed are merely illustrative and are not intended to limit the scope of the present invention, which is determined by the full scope of the appended claims and their equivalents.
[0122] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.
[0123] The logic and / or steps represented in the flowcharts or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing the logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (e.g., a computer-based system, a system including a processor, or other system that can fetch and execute instructions from an instruction execution system, apparatus, or device). For purposes of this specification, a "computer-readable medium" can be any device that can contain, store, communicate, propagate, or transport a program for use by, or in conjunction with, an instruction execution system, apparatus, or device.
[0124] More specific examples (a non-exhaustive list) of computer-readable media include the following: an electrical connection with one or more wires (electronic devices), a portable computer disk cartridge (magnetic devices), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), a fiber optic device, and a portable compact disc read-only memory (CDROM). In addition, the computer-readable medium may even be paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, deciphering, or processing in another suitable manner as necessary, and then stored in a computer memory.
[0125] It should be understood that various parts of the present invention can be implemented using hardware, software, firmware, or a combination thereof. In the above-described embodiments, multiple steps or methods can be implemented using software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented using hardware, as in another embodiment, any one of the following technologies known in the art or a combination thereof can be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application-specific integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.
[0126] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "examples," "specific examples," or "some examples" means that a specific feature, structure, material, or characteristic described in conjunction with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
[0127] While embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions, and variations may be made to the embodiments without departing from the principles and spirit of the invention, and that the scope of the invention is defined by the claims and their equivalents.
[0128] The above is a specific description of the preferred implementation of the present invention, but the present invention is not limited to the embodiments. Those skilled in the art can make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of this application.
Claims
1. A three-level neutral point clamped inverter control method, characterized in that: include: Obtaining a reference current and a feedback current, and determining a reference voltage according to the reference current and the feedback current; determining, based on a reference voltage vector phase angle, a first sector in which the reference voltage is located, wherein the first sector is located in a three-level space voltage vector, the three-level space voltage vector including a virtual voltage vector and a basic voltage vector, the virtual voltage vector being synthesized by the basic voltage vector; Determine the phase to be clamped based on the relative magnitudes of the first sector and the three-phase current, and obtain an alternative vector and an alternative switching sequence; selecting a target switching sequence from the candidate switching sequences according to the candidate vector, wherein the target switching sequence is used to keep the midpoint potential within a preset range; outputting a target three-phase current according to the target switching sequence; The virtual voltage vector is synthesized by the basic voltage vector, including: determining a basic voltage vector according to the reference voltage vector; synthesizing two adjacent basic voltage vectors according to a clamping principle, or synthesizing at least three basic voltage vectors located at vertices according to a clamping principle, to obtain the virtual voltage vector; The determining, according to the reference voltage vector phase angle, the first sector in which the reference voltage is located includes: Periodically sampling the reference voltage to obtain the amplitude and phase angle of the reference voltage; determining the first sector in which the reference voltage is located according to the amplitude and the phase angle; The determining of the phase to be clamped based on the relative magnitudes of the first sector and the three-phase current, and obtaining an alternative vector and an alternative switching sequence, includes: Sampling the three-phase currents in the first sector where the reference voltage is located, determining the maximum current among the three-phase currents, and using the phase where the maximum current is located as the clamping phase; searching, from the first sector according to the clamped phase, a second sector for representing a minimum sector formed by the basic voltage vector and the virtual voltage vector; At least one of the basic voltage vector and the virtual voltage vector constituting the second sector is used as a candidate vector, and the switching sequence is determined according to the candidate vector.
2. The three-level neutral point clamped inverter control method according to claim 1, characterized in that: The obtaining of a reference current and a feedback current, and determining a reference voltage according to the reference current and the feedback current, includes: The reference current and the feedback current in a two-phase stationary coordinate system are obtained, and the reference current and the feedback current are used as inputs of a linear controller to obtain the reference voltage.
3. The three-level neutral point clamped inverter control method according to claim 1, characterized in that: The step of selecting a target switching sequence from the candidate switching sequences according to the candidate vector, wherein the target switching sequence is used to keep the midpoint potential within a preset range, includes: Calculating the midpoint current of each of the candidate switching sequences according to the relationship between the midpoint current and the three-phase switching function; collecting capacitor voltages of the first capacitor and the second capacitor, and calculating a midpoint voltage deviation based on the capacitor voltages; According to the midpoint voltage deviation, the target switching sequence that satisfies a preset midpoint current is selected from the candidate switching sequences, where the preset midpoint current includes one of the midpoint current closest to 0 and the maximum midpoint current.
4. The three-level neutral point clamped inverter control method according to claim 1, characterized in that: Outputting a target three-phase current according to the target switching sequence includes: sending control harmonics to the inverter in a segmented manner according to the basic voltage vector and the virtual voltage vector of the target switching sequence; The output target three-phase current is measured and Clarke transformation is performed.
5. A three-level neutral point clamped inverter control device, characterized in that: include: A reference voltage module, configured to obtain a reference current and a feedback current, and determine a reference voltage according to the reference current and the feedback current; a virtual vector module, configured to determine a first sector in which the reference voltage is located based on a reference voltage vector phase angle, wherein the first sector is located in a three-level space voltage vector, the three-level space voltage vector including a virtual voltage vector and a basic voltage vector, the virtual voltage vector being synthesized by the basic voltage vector; an alternative module, configured to determine a phase to be clamped based on the relative magnitudes of the first sector and the three-phase current, and obtain an alternative vector and an alternative switching sequence; a midpoint balancing module, configured to select a target switching sequence from the candidate switching sequences according to the candidate vector, wherein the target switching sequence is configured to keep the midpoint potential within a preset range; an output module, configured to output a target three-phase current according to the target switching sequence; The virtual voltage vector is synthesized by the basic voltage vector, including: determining a basic voltage vector according to the reference voltage vector; synthesizing two adjacent basic voltage vectors according to a clamping principle, or synthesizing at least three basic voltage vectors located at vertices according to a clamping principle, to obtain the virtual voltage vector; The determining, according to the reference voltage vector phase angle, the first sector in which the reference voltage is located includes: Periodically sampling the reference voltage to obtain the amplitude and phase angle of the reference voltage; determining the first sector in which the reference voltage is located according to the amplitude and the phase angle; The determining of the phase to be clamped based on the relative magnitudes of the first sector and the three-phase current, and obtaining an alternative vector and an alternative switching sequence, includes: Sampling the three-phase currents in the first sector where the reference voltage is located, determining the maximum current among the three-phase currents, and using the phase where the maximum current is located as the clamping phase; searching, from the first sector according to the clamped phase, a second sector for representing a minimum sector formed by the basic voltage vector and the virtual voltage vector; At least one of the basic voltage vector and the virtual voltage vector constituting the second sector is used as a candidate vector, and the switching sequence is determined according to the candidate vector.
6. An electronic device, characterized in that: including a processor and a memory; The memory is used to store programs; The processor executes the program to implement the three-level neutral-point clamped inverter control method according to any one of claims 1 to 4.
7. A computer-readable storage medium, characterized in that The storage medium stores a program, and the program is executed by a processor to implement the three-level neutral point clamped inverter control method according to any one of claims 1 to 4.
Citation Information
Patent Citations
Direct power prediction control method of three-level grid-connected inverter model
CN107104604A
Improved virtual vector modulation method for NPC inverter under neutral point potential imbalance
CN111293915A