A table entry searching method and network device

Abstract

The specification provides a table entry searching method and a network device, and relates to the technical field of communication. The table entry searching method comprises the following steps: a processor issues a first forwarding table entry into a first forwarding table of a logic chip and issues a second forwarding table entry into a second forwarding table of the logic chip; the logic chip searches the first forwarding table according to a destination IP address of a received data packet to find a first target table entry matching a mask part and acquires a matching mark in the first target table entry; the logic chip searches the second forwarding table according to the destination IP address of the received data packet and the matching mark in the first target table entry to find a second target table entry matching a non-mask part and the matching mark in the first target table entry; and the logic chip encapsulates and forwards the data packet according to forwarding information in the second target table entry. Through the above method, the table entry scale of the logic chip in the network device can be improved.

Description

Technical Field

[0001] This specification relates to the field of communication technology, and in particular to a table lookup method and network device. Background Technology

[0002] With the continuous development of the Internet, the number of users accessing the Internet has also grown explosively. IPv4 (Internet Protocol Version 4) addresses are nearing exhaustion. Therefore, the entire Internet has begun to transition to IPv6 (Internet Protocol Version 6). Compared to IPv4 addresses, IPv6 addresses are longer and can identify more users.

[0003] However, since IPv6 addresses are several times longer than IPv4 addresses, storing entries containing IPv6 addresses requires significantly more storage space. How to more effectively record various entries to make more rational use of storage space in network devices is a technical problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0004] To overcome the problems existing in related technologies, this specification provides a method for looking up table entries and a network device.

[0005] In conjunction with the first aspect of the embodiments of this specification, this application provides a table lookup method applied to a network device, the network device including a processor and a logic chip;

[0006] The method includes:

[0007] The processor sends a first forwarding table entry to the first forwarding table of the logic chip and a second forwarding table entry to the second forwarding table of the logic chip. The first forwarding table entry contains the mask portion of the Internet Protocol IP address and a matching tag, and the second forwarding table entry contains at least the non-masked portion of the IP address, the same matching tag as the first forwarding table entry, and forwarding information.

[0008] The logic chip searches for a first target entry in the first forwarding table that matches the mask portion based on the destination IP address of the received data packet, and obtains the matching tag in the first target entry.

[0009] The logic chip searches the second forwarding table for a second target entry that matches the non-masked portion and the matching tag in the first target entry, based on the destination IP address of the received data packet and the matching tag in the first target entry.

[0010] The logic chip encapsulates and forwards data packets based on the forwarding information in the second target entry.

[0011] Optionally, the first forwarding table is a routing table, and the first forwarding table entries are routing table entries; the second forwarding table is an access control list (ACL), and the second forwarding table entries are ACL entries.

[0012] The processor sends a first forwarding table entry to the first forwarding table of the logic chip, and a second forwarding table entry to the second forwarding table of the logic chip, including:

[0013] The processor generates software forwarding table entries based on the received data packets;

[0014] The processor obtains the masked and unmasked portions of the destination IP address in the software forwarding table entry based on the preset mask length.

[0015] The processor sends routing table entries containing the mask portion and matching tags to the routing table of the logic chip, and sends ACL entries containing the non-mask portion, matching tags, and forwarding information to the ACL of the logic chip.

[0016] Furthermore, the match is marked as the next hop or stream type;

[0017] The destination IP address can be either an IPv6 address or an IPv4 address.

[0018] Optionally, the first forwarding table is the longest prefix matching (LPM) table, and the first forwarding table entries are LPM table entries; the second forwarding table is the neighbor discovery (ND) result table, and the second forwarding table entries are ND result table entries; the destination IP address is an IPv6 address.

[0019] The processor sends a first forwarding table entry to the first forwarding table of the logic chip, and a second forwarding table entry to the second forwarding table of the logic chip, including:

[0020] The processor sends an LPM entry containing the mask portion, matching flag, and destination interface to the logic chip's LPM table according to the preset network segment and mask length.

[0021] When the logic chip matches an LPM table entry but does not match an ND result table entry in the data packet, it sends the data packet through the destination interface.

[0022] The processor performs ND learning on the sent data packets and generates a software forwarding table;

[0023] The processor obtains the non-masked portion of the destination IP address in the software forwarding table entry based on the preset mask length;

[0024] The processor sends ND result entries containing the non-mask portion, matching flags, and forwarding information to the ND result table of the logic chip.

[0025] Furthermore, the preset mask length is 64 bits or 96 bits.

[0026] In conjunction with a second aspect of the embodiments described herein, this application provides a network device, a processor, and a logic chip, comprising:

[0027] The processor sends a first forwarding table entry to the first forwarding table of the logic chip and a second forwarding table entry to the second forwarding table of the logic chip. The first forwarding table entry contains the mask portion of the Internet Protocol IP address and a matching tag, and the second forwarding table entry contains at least the non-masked portion of the IP address, the same matching tag as the first forwarding table entry, and forwarding information.

[0028] The logic chip searches for a first destination entry in the first forwarding table that matches the mask portion based on the destination IP address of the received data packet, and obtains the matching flag in the first destination entry; based on the destination IP address of the received data packet and the matching flag in the first destination entry, it searches for a second destination entry in the second forwarding table that matches the non-mask portion and the matching flag in the first destination entry; and encapsulates and forwards the data packet based on the forwarding information in the second destination entry.

[0029] Optionally, the first forwarding table is a routing table, and the first forwarding table entries are routing table entries; the second forwarding table is an access control list (ACL), and the second forwarding table entries are ACL entries.

[0030] The processor is specifically used to generate software forwarding table entries based on the received data packets; to obtain the masked and unmasked portions of the destination IP address in the software forwarding table entries according to the preset mask length; to send routing table entries containing the masked portion and matching tags to the routing table of the logic chip; and to send ACL entries containing the unmasked portion, matching tags, and forwarding information to the ACL of the logic chip.

[0031] Furthermore, the match is marked as the next hop or stream type;

[0032] The destination IP address can be either an IPv6 address or an IPv4 address.

[0033] Optionally, the first forwarding table is the longest prefix matching (LPM) table, and the first forwarding table entries are LPM table entries; the second forwarding table is the neighbor discovery (ND) result table, and the second forwarding table entries are ND result table entries; the destination IP address is an IPv6 address.

[0034] The processor, specifically, is used to send LPM entries containing the mask portion, matching flags, and destination interface to the LPM table of the logic chip according to the preset network segment and mask length, so that the logic chip can send data packets through the destination interface when the data packet matches the LPM entry; perform ND learning on the sent data packet to generate a software forwarding table; obtain the non-masked portion of the destination IP address in the software forwarding table entry according to the preset mask length; and send ND result entries containing the non-masked portion, matching flags, and forwarding information to the ND result table of the logic chip.

[0035] Furthermore, the preset mask length is 64 bits or 96 bits.

[0036] In conjunction with a third aspect of the embodiments of this specification, this application provides a machine-readable storage medium storing machine-executable instructions, which, when invoked and executed by a processor and a logic chip respectively, cause the processor and the logic chip to implement the method steps of any of the above-described embodiments.

[0037] The technical solutions provided by the embodiments in this specification may include the following beneficial effects:

[0038] In this embodiment, the hardware forwarding table entries sent to the logic chip are decomposed into a first forwarding table entry containing the masked portion and a second forwarding table entry containing the non-masked portion by setting a mask. The first and second forwarding table entries are associated by a matching tag. When forwarding data packets, the forwarding information is determined by matching the first and second forwarding table entries respectively. This reduces the space occupied by each type of forwarding table, avoids the problem of insufficient storage space caused by the excessive size of one type of forwarding table, and improves the overall scale of the forwarding table that can accommodate forwarding table entries.

[0039] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this specification. Attached Figure Description

[0040] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this specification and, together with the description, serve to explain the principles of this specification.

[0041] Figure 1 This is a flowchart of a table lookup method involved in this application;

[0042] Figure 2 This is a schematic diagram of the structure of a network device involved in this application;

[0043] Figure 3This is a schematic diagram of the structure of a network device according to an embodiment of this application, wherein the storage space in the logic chip contains a routing table and an ACL table;

[0044] Figure 4 This is a schematic diagram of the structure of a network device according to an embodiment of this application, wherein the storage space in the logic chip stores several entries;

[0045] Figure 5 This is a schematic diagram of another network device according to an embodiment of this application, wherein memory and SRAM are formed in the logic chip;

[0046] Figure 6 This is a schematic diagram of another network device according to an embodiment of this application, wherein the memory and SRAM in the logic chip respectively store several entries. Detailed Implementation

[0047] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this specification.

[0048] This application provides a table lookup method applied to a network device, the network device including a processor and a logic chip;

[0049] This method, such as Figure 1 As shown, it includes:

[0050] S100: The processor sends a first forwarding table entry to the first forwarding table of the logic chip and a second forwarding table entry to the second forwarding table of the logic chip.

[0051] In such Figure 2 The network device shown includes at least a processor, a logic chip, a machine-readable storage medium, and a bus connecting these components to enable communication. When forwarding data packets, to improve forwarding speed, the processor can look up forwarding table entries learned by the processor in the logic chip, allowing the logic chip to encapsulate and forward data packets based on the forwarding information carried in these forwarding table entries. The forwarding table entries generated in the processor are software forwarding table entries, while the forwarding table entries stored in the logic chip are hardware forwarding table entries. The hardware forwarding table entries are processed by the processor based on the software forwarding table entries and then sent out, and are received and stored by the logic chip. The logic chip may include a processing unit for packet processing and forwarding, and a storage unit for storing data (forwarding table entries, etc.).

[0052] The network device can be a switch, router, or other network device with packet forwarding capabilities; there are no restrictions on this.

[0053] The logic chip can be an FPGA (Field Programmable Gate Array) or a CPLD (Complex Programmable Logic Device), etc., and there are no restrictions on this.

[0054] Depending on the network environment or the forwarding process of the network device, the software forwarding table entries generated by the processor will vary. For example, a forwarding table may contain applicable routing tables and ACL (Access Control List) tables, or applicable LPM (Longest Prefix Match) tables and ND (Neighbor Discovery Protocol) result tables. Of course, the method used for forwarding tables is not limited to these; it can also be implemented using other tables or combinations of other tables. In both different combinations, the routing table and LPM table can be referred to as the first forwarding table, and its entries can be called first forwarding table entries. The ACL table and ND result table can be referred to as the second forwarding table, and its entries can be called second forwarding table entries. It should be noted that the LPM table and the ND result table can be collectively referred to as the ND table, which indicates that the matching results in this table contain the forwarding information required for the packet.

[0055] The first forwarding entry contains the mask portion of the IP (Internet Protocol) address and a matching tag. The second forwarding entry contains at least the non-masked portion of the IP address, the same matching tag as the first forwarding entry, and forwarding information. During data packet forwarding, a mask is used to group multiple IP addresses within the same range into a single network segment.

[0056] To split the routing table and LPM table, reduce the capacity of a single forwarding entry in the first forwarding table, and allow the first forwarding table to accommodate more forwarding entries, the destination IP address in the first forwarding table can be split based on the mask, into a masked part and a non-masked part. The masked part is stored in the first forwarding table, while the forwarding information used for forwarding is not stored in the first forwarding table. This reduces the size of a single forwarding entry in the first forwarding table and improves the overall specifications of the first forwarding table. The non-masked part and the forwarding information are placed in the second forwarding table, and the first and second forwarding tables are associated through a matching tag. The association method is to record the information in the first and second forwarding tables respectively.

[0057] When the first forwarding table is a routing table and the first forwarding table entry is a routing table entry, and the second forwarding table is an access control list (ACL) and the second forwarding table entry is an ACL entry, step S100, where the processor sends the first forwarding table entry to the first forwarding table of the logic chip and sends the second forwarding table entry to the second forwarding table of the logic chip, includes:

[0058] S100A: The processor generates software forwarding table entries based on the received data packets.

[0059] S100B: The processor obtains the masked and unmasked portions of the destination IP address in the software forwarding table entry according to the preset mask length.

[0060] The S100C processor sends routing table entries containing masked portions and matching tags to the routing table of the logic chip, and sends ACL entries containing non-masked portions, matching tags, and forwarding information to the ACL of the logic chip.

[0061] By splitting the software forwarding table entries, they are distributed separately to the routing table and ACL table of the logic chip. These two types of forwarding tables are allocated to different storage spaces within the logic chip. Since the routing table and ACL table are allocated different storage spaces during logic chip planning, splitting some information from the original routing table into the ACL table and associating them using matching tags can reduce the size of a single routing table entry, increase the number of routing table entries, and improve the overall size of the forwarding table.

[0062] The destination IP address in the routing table can be either an IPv6 or IPv4 address, depending on the actual needs. Since the software forwarding table entries have undergone a route learning process, the parsing and learning of data packets sent to the processor can obtain information such as the next hop and flow type of the data packet. This information can be used as a matching tag to be appended to the routing table entry and ACL entry to establish their association. Alternatively, a hash value generated from the tuple information of the data packet can be used as the matching tag; however, this is not the only option, and the setting can be adjusted according to actual needs.

[0063] Additionally, when the first forwarding table is an LPM table, the first forwarding table entry is an LPM table entry, the second forwarding table is an ND result table, the second forwarding table entry is an ND result table entry, and the destination IP address is an IPv6 address, step S100, where the processor sends the first forwarding table entry to the first forwarding table of the logic chip and sends the second forwarding table entry to the second forwarding table of the logic chip, includes:

[0064] The S100D processor, based on the preset network segment and mask length, sends an LPM entry containing the mask portion, matching flag, and destination interface to the logic chip's LPM table.

[0065] When the S100E and logic chip match the LPM table entry but do not match the ND result table entry, they send the data message through the destination interface.

[0066] The S100F processor performs ND learning on the sent data packets and generates a software forwarding table.

[0067] The S100G processor obtains the non-masked portion of the destination IP address in the software forwarding table entry based on the preset mask length.

[0068] S100H: The processor sends the ND result table entries containing the non-mask portion, matching flags, and forwarding information to the ND result table of the logic chip.

[0069] When a network device is used as a gateway, staff can configure the network segment it manages. This network segment has a preset mask length, which is the range defined by the network segment managed by the network device.

[0070] Based on the network segment and mask length, the network device can determine the mask portion of the network segment and send an LPM entry containing the mask portion, matching flag, and destination interface to the LPM table of the logic chip. Through this LPM entry, when the logic chip receives a data packet that matches but does not match the ND result table, it can send the data packet to the processor for ND learning through the destination interface in the LPM entry.

[0071] After the processor learns the software forwarding table based on the data packet, it obtains the non-masked portion of the destination IP address based on the mask length, and sends the ND result table entry containing the non-masked portion, matching flag, and forwarding information to the ND result table recorded in the logic chip. This enables the logic chip to obtain forwarding information and forward the data packet when the received data packet matches the LPM table entry and the corresponding ND result table entry.

[0072] Since the specifications of the ND result table are limited, the preset mask length also needs to be limited. Optionally, the preset mask length is 64 bits or 96 bits, but the preset mask length is not limited to 64 bits or 96 bits. It can also be set to other lengths without restriction.

[0073] Of course, in addition to the two methods mentioned above, other forms and combinations of forwarding can also be included, which will not be elaborated here.

[0074] When implemented using the LPM table and the ND result table, the IP address length in the ND result table stored in SRAM is shortened (less than 128 bits), which saves space in the ND result table, allowing the specifications of the forwarding table stored in network devices to be improved and more rationally applied.

[0075] S101. The logic chip searches for the first target entry in the first forwarding table that matches the mask part based on the destination IP address of the received data packet, and obtains the matching tag in the first target entry.

[0076] After the first and second forwarding table entries are sent to the logic chip, for subsequent data packets received by the network device, the logic chip can first look up the first forwarding table entry based on the destination IP address of the data packet.

[0077] If a first target entry in the first forwarding entry can be matched, the matching flag in that first target entry can be obtained to facilitate the subsequent search for the second forwarding entry.

[0078] S102. The logic chip searches for a second target entry in the second forwarding table that matches the non-masked portion and the matching tag in the first target entry based on the destination IP address of the received data packet and the matching tag in the first target entry.

[0079] S103. Encapsulate and forward the data packets according to the forwarding information in the second target table entry.

[0080] After the logic chip finds a matching tag, it means that the data packet matches the first forwarding table entry, and the second forwarding table entry can be matched. Subsequently, the second forwarding table is searched based on the destination IP address and the matching tag to determine the second target entry containing the non-masked portion and the matching tag.

[0081] The second target entry also contains forwarding information, including the encapsulation method for the data packet and the outgoing interface. Based on the forwarding information in the second target entry, the logic chip can encapsulate and forward the data packet, thereby processing the data packet.

[0082] The following description uses a logic chip with separate routing tables and ACL tables as an example. Network devices, such as... Figure 3 As shown, it includes a processor, a logic chip, and a bus connecting the two. The storage space of the logic chip is divided into two segments, which are used to store the routing table and the ACL table, respectively.

[0083] A table lookup method includes:

[0084] S1A: The network device enables route learning, and the logic chip receives data packets.

[0085] The S2A and logic chip parse the data packets, obtain the tuple information carried in the data packets, and search the routing table based on the tuple information.

[0086] S3A: If the logic chip does not find a matching routing table entry in the routing table, the data packet is sent to the processor and the process jumps to step S4A. If the logic chip finds a matching routing table entry in the routing table, the process jumps to step S6A.

[0087] When looking up the routing table, the logic chip matches the destination IP address in the tuple information with the mask portion in the routing table. If the prefix of the destination IP address matches the mask portion, it means that the network device has previously received a packet with the same tuple information as this data packet (such as a data packet in the same data stream). It needs to obtain the matching tag in the routing table entry (such as the parsed flow type as the matching tag) and look up the ACL table using the matching tag and the destination IP address. If the prefix of the destination IP address does not match the mask portion, it means that the network device is receiving a data packet with this tuple information (such as a data packet in the same data stream) for the first time and needs to perform route learning.

[0088] S4A: The processor performs route learning based on the data packets, generates software routing table entries, and obtains the masked and unmasked portions of the destination IP address based on the mask length.

[0089] like Figure 3 As shown, the IPv6 address obtained by the logic chip from parsing the data packet is 2000:0000:0000:0000:0001:0001:0000:0000. Since it does not match in the stored routing table, it is sent to the processor for route learning, generating a software routing table entry. This entry includes the destination IP address, matching flag (flow classification), and forwarding information (outgoing interface and encapsulation method). Assuming the processor sets the mask length for route learning to 64 bits, the 96-bit IPv6 address can be split into a 64-bit mask portion (i.e., 2000:0000:0000:0000) and a 32-bit unmasked portion (i.e., 0001:0001). Afterward, the processor and logic chip cycle back to step S3A.

[0090] Subsequently, based on similar steps, the processor can also learn the software routing table entry with a destination IP address of 2000:0000:0000:0000:0001:0002:0000:0000. The processor can split this into a 64-bit masked part (i.e., 2000:0000:0000:0000) and a 32-bit unmasked part (i.e., 0001:0002).

[0091] The S5A and the processor respectively send routing table entries and ACL entries to the logic chip. The logic chip records routing table entries in the routing table and ACL entries in the ACL table.

[0092] like Figure 4 As shown, the routing table and ACL table in the logic chip receive two newly issued entries: routing table entry 1 and routing table entry 2, and ACL entry 1 and ACL entry 2, respectively. Since routing table entry 1 and routing table entry 2 have the same mask portion, during the actual storage process in the logic chip, they can be merged into a single routing table entry (denoted as routing table entry 1). In the ACL table, they are distinguished as non-mask portion 1 and non-mask portion 2. In the diagram, the mask portion and non-mask portion are represented by names, without showing the specific address information.

[0093] In this context, routing table entry 1 is associated with ACL entries 1 and ACL entries 2 through matching tag 2. ACL entry 1 also includes forwarding information 1, and ACL entry 2 also includes forwarding information 2.

[0094] S6A: The logic chip obtains the matching tag in the routing table entry and searches the ACL table based on the destination IP address and the matching tag. If an ACL entry is found, step S7A is executed. If no ACL entry is found, the default entry in the routing table is used for processing.

[0095] In the routing table entries of the logic chip, a default action can also be set, such as sending to the processor or dropping. This action has a lower priority than the action processed in the ACL entry. The processing in the ACL entry is to forward data packets according to the forwarding information. If the logic chip can find an ACL entry in the ACL table, that is, if the destination IP address matches the non-mask portion and matches the same matching flag 1, then... Figure 4 As can be seen, ACL entry 2 can be matched.

[0096] If no ACL entry is matched in the ACL table, the logic chip will process the data according to the processing action in the matched routing table entry, such as dropping it or sending it to the processor.

[0097] The S7A and logic chips encapsulate and forward data packets based on the forwarding information in the matched ACL entries.

[0098] After matching ACL entry 2, the logic chip can process the data packet and complete the forwarding based on the forwarding information contained therein, such as the outgoing interface and encapsulation method.

[0099] The following description uses a result table in a logic chip, which is divided into LPM and ND tables, as an example. Network devices, such as... Figure 5 As shown, it includes a processor, a logic chip, and a bus connecting the two. Memory is formed within the logic chip, and an SRAM (Static Random-Access Memory) is also included. LPM table lookups are implemented in the memory, and the result table of ND is stored in the SRAM.

[0100] A table lookup method includes:

[0101] S1B, when the network device enables ND learning, the processor sends LPM entries to the LPM table of the logic chip according to the network segment and mask length managed by the network device.

[0102] For example, the network managed by the network device contains three users, named 2000:0000:0000:0000:0000:0000:0000:0001 / 64-2000:0000:0000:0000:0000:0000:0000:0003 / 64. The processor generates an LPM entry containing the mask (2000:0000:0000:0000:0000:0000:0000:0000:0000 / 64), a match flag (default value 1), and the destination interface (pointing to the port connected to the processor). The logic chip receives this LPM entry and stores it in memory.

[0103] The S2B and logic chip parse the data packets, obtain the tuple information carried in the data packets, and search for it in the LPM table based on the tuple information.

[0104] The lookup is performed in the LPM table, which means the logic chip is searched through memory.

[0105] S3B: If the logic chip finds a matching LPM entry in the LPM table, it obtains the matching tag and destination interface, and proceeds to step S4B. If the logic chip does not find a matching LPM entry in the LPM table, it indicates that the data packet originated from the external network and needs to be directly sent to the processor for route learning.

[0106] In the LPM entry of the logic chip, a default processing action can also be set, such as sending to the processor or discarding. The priority of this processing action is lower than the priority of processing in the result entry of the ND. The processing in the result entry of the ND is to forward the data packet according to the forwarding information.

[0107] S4B: The logic chip continues to search the ND result table. If no corresponding ND result table entry is found, the destination interface in the LPM table is retrieved, the data packet is sent to the processor for ND learning, and after learning, the process jumps to S5B. If the ND result table entry is found, the process jumps to step S6B.

[0108] When the logic chip looks up the LPM table in memory, it matches the destination IP address in the tuple information with the mask part in the LPM table. If the prefix of the destination IP address can match the mask part, it means that the network device has previously received a packet with the same tuple information as this data packet (such as a data packet in the same data stream). It is necessary to obtain the matching flag in the LPM table entry and look up the ND result table through the matching flag and the destination IP address.

[0109] The processor performs ND learning based on the data packet, generates software ND entries, and obtains the non-masked portion of the destination IP address based on the mask length.

[0110] like Figure 6 As shown, two ND result entries have been recorded in the logic chip. The non-masked parts of the destination IP address are 0000:0000:0000:0001 and 0000:0000:0000:0002.

[0111] Because the destination IP addresses of these two ND result entries have the same prefix, they can share a single LPM entry, namely 2000:0000:0000:0000. In the diagram, the specific address information in the entry is replaced by the name.

[0112] Upon receiving a data packet from another user, the logic chip matches the LPM entry in its memory, retrieves the matching flag and destination interface, and then sends the data packet to the processor for ND learning via the destination interface, generating a software ND entry corresponding to 2000:0000:0000:0000:0000:0000:0000:0000:0003 / 64.

[0113] Then, based on the mask length, the non-masked portion of the destination IP address in the ND entry of the software is obtained, namely 0000:0000:0000:0003.

[0114] The S5B and the processor respectively send LPM entries and ND result entries to the logic chip. The logic chip records LPM entries in the LPM table and ND result entries in the ND result table.

[0115] like Figure 6As shown, three entries are received in the LPM table and the ND result table of the logic chip: LPM entry 1, LPM entry 2, and LPM entry 3, and ND result table 1, ND result table 2, and ND result table 3, respectively. Since LPM entries 1, 2, and 3 share the same mask portion, during the actual storage process of the logic chip, they can be merged into a single LPM entry (denoted as LPM entry 1) and distinguished in the ND result table. Afterward, the process jumps back to step S3B for execution.

[0116] The S6B logic chip processes data packets based on the forwarding information in the result table of ND.

[0117] If the destination IP address of the received data packet is 2000:0000:0000:0000:0000:0000:0000:0002, then after matching the result table entry 2 of ND, the logic chip can process the data packet and complete the forwarding based on the forwarding information such as the output interface and encapsulation method contained therein.

[0118] Correspondingly, this application provides a network device, such as Figure 2 As shown, it includes: processors and logic chips;

[0119] The processor sends a first forwarding table entry to the first forwarding table of the logic chip and a second forwarding table entry to the second forwarding table of the logic chip. The first forwarding table entry contains the mask portion of the Internet Protocol IP address and a matching tag, and the second forwarding table entry contains at least the non-masked portion of the IP address, the same matching tag as the first forwarding table entry, and forwarding information.

[0120] The logic chip searches for a first destination entry in the first forwarding table that matches the mask portion based on the destination IP address of the received data packet, and obtains the matching flag in the first destination entry; based on the destination IP address of the received data packet and the matching flag in the first destination entry, it searches for a second destination entry in the second forwarding table that matches the non-mask portion and the matching flag in the first destination entry; and encapsulates and forwards the data packet based on the forwarding information in the second destination entry.

[0121] Optionally, the first forwarding table is a routing table, and the first forwarding table entries are routing table entries; the second forwarding table is an access control list (ACL), and the second forwarding table entries are ACL entries.

[0122] The processor is specifically used to generate software forwarding table entries based on the received data packets; to obtain the masked and unmasked portions of the destination IP address in the software forwarding table entries according to the preset mask length; to send routing table entries containing the masked portion and matching tags to the routing table of the logic chip; and to send ACL entries containing the unmasked portion, matching tags, and forwarding information to the ACL of the logic chip.

[0123] Optionally, the match can be marked as the next hop or stream type;

[0124] The destination IP address can be either an IPv6 address or an IPv4 address.

[0125] Optionally, the first forwarding table is the longest prefix matching (LPM) table, and the first forwarding table entries are LPM table entries; the second forwarding table is the neighbor discovery (ND) result table, and the second forwarding table entries are ND result table entries; the destination IP address is an IPv6 address.

[0126] The processor, based on the preset network segment and mask length, sends an LPM entry containing the mask part, matching flag, and destination interface to the LPM table of the logic chip;

[0127] When the logic chip matches an LPM table entry but does not match an ND result table entry in the data packet, it sends the data packet through the destination interface.

[0128] The processor performs ND result learning on the sent data packets and generates a software forwarding table; according to the preset mask length, it obtains the non-masked portion of the destination IP address in the software forwarding table entry; and sends the ND result table entry containing the non-masked portion, matching flag, and forwarding information to the ND result table of the logic chip.

[0129] Optionally, the preset mask length is 64 bits or 96 bits.

[0130] Correspondingly, this application provides a machine-readable storage medium storing machine-executable instructions, which, when called and executed by a processor and a logic chip respectively, cause the processor and the logic chip to implement the method steps of any of the above.

[0131] In other words, different machine-readable storage media can be set in the processor and the logic chip respectively. The processor calls the machine-executable instructions in them to implement the method steps executed by the processor, and the logic chip calls the machine-executable instructions in them to implement the method steps executed by the logic chip.

[0132] In this embodiment, the hardware forwarding table entries sent to the logic chip are decomposed into a first forwarding table entry containing the masked portion and a second forwarding table entry containing the non-masked portion by setting a mask. The first and second forwarding table entries are associated by a matching tag. When forwarding data packets, the forwarding information is determined by matching the first and second forwarding table entries respectively. This reduces the space occupied by each type of forwarding table, avoids the problem of insufficient storage space caused by the excessive size of one type of forwarding table, and improves the overall scale of the forwarding table that can accommodate forwarding table entries.

[0133] It should be understood that this specification is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope.

[0134] The above description is merely a preferred embodiment of this specification and is not intended to limit this specification. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this specification shall be included within the scope of protection of this specification.

Claims

1. A method for searching table entries, characterized in that, Applied to network devices, the network devices including processors and logic chips; The method includes: The processor performs route learning based on the data packets sent by the logic chip, sends a first forwarding table entry to the first forwarding table of the logic chip, merges first forwarding table entries with the same mask portion into a single forwarding table entry, and sends a second forwarding table entry to the second forwarding table of the logic chip. The first forwarding table entry contains the mask portion of the Internet Protocol IP address and a matching tag, and the second forwarding table entry contains at least the non-mask portion of the IP address, the same matching tag as the first forwarding table entry, and forwarding information. The first and second forwarding table entries are obtained based on route learning. The logic chip searches for a first target entry in the first forwarding table that matches the mask portion based on the destination IP address of the received data packet, and obtains the matching tag in the first target entry. The logic chip searches the second forwarding table for a second target entry that matches the non-masked portion and the matching tag in the first target entry, based on the destination IP address of the received data packet and the matching tag in the first target entry. The logic chip encapsulates and forwards the data packet according to the forwarding information in the second target entry; Wherein, the first forwarding table is a routing table, the first forwarding table entry is a routing table entry, the second forwarding table is an access control list (ACL), and the second forwarding table entry is an ACL entry; or, the first forwarding table is a longest prefix match (LPM) table, the first forwarding table entry is an LPM entry, the second forwarding table is a neighbor discovery (ND) result table, and the second forwarding table entry is an ND result table entry, and the destination IP address is an IPv6 address.

2. The method according to claim 1, characterized in that, The processor sends a first forwarding table entry to the first forwarding table of the logic chip and a second forwarding table entry to the second forwarding table of the logic chip, including: The processor generates software forwarding table entries based on the received data packets; The processor obtains the masked portion and the non-masked portion of the destination IP address in the software forwarding table entry according to the preset mask length; The processor sends routing table entries containing the mask portion and matching tags to the routing table of the logic chip, and sends ACL entries containing the non-mask portion, matching tags, and forwarding information to the ACL of the logic chip.

3. The method according to claim 2, characterized in that, The matching marker is either the next hop or the stream type; The destination IP address is either an IPv6 address or an IPv4 address.

4. The method according to claim 1, characterized in that, The processor sends a first forwarding table entry to the first forwarding table of the logic chip and a second forwarding table entry to the second forwarding table of the logic chip, including: The processor sends an LPM entry containing the mask portion, matching flag, and destination interface to the logic chip's LPM table according to the preset network segment and mask length. When the data packet matches the LPM table entry but does not match the ND result table entry, the logic chip sends the data packet through the destination interface. The processor performs ND learning on the sent data packets and generates a software forwarding table; The processor obtains the non-masked portion of the destination IP address in the software forwarding table entry according to the preset mask length; The processor sends ND result entries containing the non-mask portion, matching flags, and forwarding information to the ND result table of the logic chip.

5. The method according to claim 4, characterized in that, The preset mask length is 64 bits or 96 bits.

6. A network device, characterized in that, Processors and logic chips, including: The processor performs route learning based on the data packets sent by the logic chip, sends a first forwarding table entry to the first forwarding table of the logic chip, merges first forwarding table entries with the same mask portion into a single forwarding table entry, and sends a second forwarding table entry to the second forwarding table of the logic chip. The first forwarding table entry contains the mask portion of the Internet Protocol IP address and a matching tag, and the second forwarding table entry contains at least the non-mask portion of the IP address, the same matching tag as the first forwarding table entry, and forwarding information. The first and second forwarding table entries are obtained based on route learning. The logic chip searches for a first target entry in the first forwarding table that matches the masked portion based on the destination IP address of the received data packet, and obtains the matching tag in the first target entry; based on the destination IP address of the received data packet and the matching tag in the first target entry, it searches for a second target entry in the second forwarding table that matches the non-masked portion and the matching tag in the first target entry; and encapsulates and forwards the data packet according to the forwarding information in the second target entry. Wherein, the first forwarding table is a routing table, the first forwarding table entry is a routing table entry, the second forwarding table is an access control list (ACL), and the second forwarding table entry is an ACL entry; or, the first forwarding table is a longest prefix match (LPM) table, the first forwarding table entry is an LPM entry, the second forwarding table is a neighbor discovery (ND) result table, and the second forwarding table entry is an ND result table entry, and the destination IP address is an IPv6 address.

7. The network device according to claim 6, characterized in that, The processor is specifically configured to generate software forwarding table entries based on the received data packets; obtain the masked portion and the unmasked portion of the destination IP address in the software forwarding table entries according to a preset mask length; send routing table entries containing the masked portion and matching tags to the routing table of the logic chip; and send ACL entries containing the unmasked portion, matching tags, and forwarding information to the ACL of the logic chip.

8. The network device according to claim 7, characterized in that, The matching marker is either the next hop or the stream type; The destination IP address is either an IPv6 address or an IPv4 address.

9. The network device according to claim 6, characterized in that, The processor is specifically configured to send an LPM table entry containing a mask portion, a matching flag, and a destination interface to the LPM table of the logic chip according to a preset network segment and mask length, so that the logic chip can send the data packet through the destination interface when the data packet matches the LPM table entry. The data packets are subjected to ND learning to generate a software forwarding table; the non-masked portion of the destination IP address in the software forwarding table is obtained according to the preset mask length; and the ND result table entries containing the non-masked portion, matching tags, and forwarding information are sent to the ND result table of the logic chip.

10. The network device according to claim 9, characterized in that, The preset mask length is 64 bits or 96 bits.

11. A machine-readable storage medium, characterized in that, The device stores machine-executable instructions, which, when invoked and executed by a processor and a logic chip respectively, cause the processor and the logic chip to: implement the steps of the method described in any one of claims 1-5.

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