Array substrate and display device

Abstract

An array substrate and a display device. The array substrate comprises a substrate, an anode layer, an encapsulation layer and a touch electrode layer; the substrate comprises a transparent display area; the anode layer is located on the substrate and comprises a plurality of anodes; the encapsulation layer is located on a side of the anode layer away from the substrate; the touch electrode layer is located on a side of the encapsulation layer away from the anode layer and comprises a conductive mesh line, and in the transparent display area, a normal projection of the conductive mesh line on the substrate and a normal projection of at least one of the plurality of anodes on the substrate are connected or partially overlapped. The array substrate can effectively avoid forming a gap between the anode and the conductive mesh line, thereby avoiding the diffraction or interference phenomenon of light when passing through the transparent display area.

Description

[0001] This application is a divisional application of Chinese Invention Patent Application No. 202080000053.7, filed on January 21, 2020, which is the Chinese national phase patent application of PCT International Application PCT / CN2020 / 073237 filed on January 20, 2020. The contents of the aforementioned patent application are incorporated herein by reference in their entirety as part of this application. Technical Field

[0002] Embodiments of this disclosure relate to an array substrate and a display device. Background Technology

[0003] With the continuous development of display technology, compared with traditional liquid crystal display (LCD) display technology, organic light-emitting diode (OLED) display technology has been widely used in smart electronic products such as smartphones and wearable smart devices because of its advantages such as self-illumination, wide color gamut, high contrast, and thinness.

[0004] Currently, smart electronic products with high screen-to-body ratios are gradually becoming mainstream in the market due to their aesthetic appeal and superior user experience. However, with continuous technological and market development, high screen-to-body ratio smart electronic products can no longer meet people's needs, and full-screen smart electronic products have become the future development trend.

[0005] On the other hand, to achieve a thinner and lighter design for display devices (e.g., organic light-emitting diode display devices), the display panel and touch structure can be integrated together. Therefore, FMLOC (Flexible Multiple Layer On Cell) touch technology has emerged. FMLOC touch technology directly fabricates various electrode layers and traces of the touch structure on the encapsulation layer, thereby integrating the touch structure onto the display panel. Thus, display devices using FMLOC touch technology can not only achieve a thinner and lighter design but also enable flexible displays and flexible touch. Summary of the Invention

[0006] This disclosure provides an array substrate and a display device. The array substrate includes a substrate, an anode layer, an encapsulation layer, and a touch electrode layer. The substrate includes a transparent display area. The anode layer is located on the substrate and includes a plurality of anodes. The encapsulation layer is located on the side of the anode layer away from the substrate. The touch electrode layer is located on the side of the encapsulation layer away from the anode layer and includes conductive grid lines. Within the transparent display area, the orthographic projection of the conductive grid lines on the substrate is adjacent to or partially overlaps with the orthographic projection of at least one of the plurality of anodes on the substrate. In this array substrate, since the orthographic projection of the conductive grid lines on the substrate is adjacent to or partially overlaps with the orthographic projection of at least one of the plurality of anodes on the substrate, the formation of slits between the anodes and the conductive grid lines can be effectively avoided, thereby preventing diffraction or interference of light when passing through the transparent display area. Therefore, when this array substrate is used in a display device, the imaging quality of the camera assembly below the screen can be guaranteed.

[0007] At least one embodiment of this disclosure also provides an array substrate, comprising: a substrate including a transparent display area; an anode layer located on the substrate and including a plurality of anodes; an encapsulation layer located on the side of the anode layer away from the substrate; and a touch electrode layer located on the side of the encapsulation layer away from the anode layer and including conductive grid lines within the transparent display area, wherein the orthographic projection of the conductive grid lines on the substrate is connected to or partially overlaps with the orthographic projection of at least one of the plurality of anodes on the substrate.

[0008] For example, in an embodiment of the present disclosure, within the transparent display area, the orthographic projection of the conductive grid lines on the substrate overlaps with the orthographic projection of at least one of the plurality of anodes on the substrate, and the width of the overlapping area ranges from 0 to 3.5 micrometers.

[0009] For example, in an embodiment of the present disclosure, within the transparent display area, the orthographic projection of the conductive grid lines on the substrate is connected to or partially overlaps with the orthographic projection of each of the plurality of anodes on the substrate.

[0010] For example, in an array substrate provided in one embodiment of this disclosure, within the transparent display area, the conductive grid lines are arranged along the edge of the corresponding anode.

[0011] For example, in an embodiment of the present disclosure, the array substrate further includes a non-transparent display area, the plurality of anodes include a plurality of anode groups, the density of the anode groups in the non-transparent display area is greater than the density of the anode groups in the transparent display area, the transparent display area includes an anode area and a transparent area, the anode area is provided with at least one anode group, and the transparent area is not provided with the anode group.

[0012] For example, in an embodiment of the present disclosure, each of the anode groups includes a first anode, two second anodes and a third anode. Within the transparent display area, the orthographic projection of the conductive grid lines on the substrate is connected to or partially overlaps with the orthographic projections of the first anode, the second anode and the third anode in the anode group on the substrate.

[0013] For example, in an embodiment of the array substrate provided in this disclosure, within the transparent display area, the conductive grid line includes a first conductor located in the anode area and a second conductor located in the transparent area, wherein the first conductor is formed as a first grid that is connected to or partially overlaps with each anode in the anode group.

[0014] For example, in an array substrate provided in one embodiment of this disclosure, the second conductor is formed as a straight line connecting two adjacent first conductors.

[0015] For example, in an array substrate provided in one embodiment of this disclosure, the second conductor is formed as a second grid connecting two adjacent first conductors.

[0016] For example, in an embodiment of the present disclosure, the touch electrode layer includes a plurality of metal mesh electrodes, the conductive mesh lines include metal mesh lines, and the metal mesh lines form the metal mesh electrodes.

[0017] For example, in an embodiment of the present disclosure, the linewidth of the conductive grid lines ranges from 2 to 5 micrometers, and the size of the anode ranges from 10 to 80 micrometers.

[0018] For example, an embodiment of the present disclosure provides an array substrate that further includes a pixel defining layer disposed on the side of the anode layer away from the substrate, and includes a plurality of openings, the plurality of openings being disposed one-to-one with the plurality of anodes, within the transparent display area, the orthographic projection of the conductive grid lines on the substrate falling within the orthographic projection of the pixel defining layer on the substrate, and being spaced from the orthographic projection of the edge of the opening on the substrate.

[0019] For example, in an array substrate provided in one embodiment of this disclosure, within the non-transparent display area, the conductive grid lines are connected to or partially overlap with at least one of the plurality of anodes.

[0020] For example, in an array substrate provided in one embodiment of this disclosure, within the non-transparent display area, the conductive grid lines are located between two adjacent anodes and are spaced apart from each of the two adjacent anodes.

[0021] For example, an array substrate provided in one embodiment of this disclosure further includes: a pixel driving layer located between the substrate and the anode layer; a planarization layer located between the pixel driving layer and the anode layer; a light-emitting layer located on the side of the anode layer away from the planarization layer; and a cathode layer located between the light-emitting layer and the encapsulation layer.

[0022] For example, an array substrate provided in one embodiment of this disclosure further includes: an optical functional component configured to receive or emit light, the optical functional component being located on the side of the substrate away from the anode layer and within the transparent display area.

[0023] For example, in an embodiment of the present disclosure, the optical functional components include at least one of a camera component, a face recognition component, and an optical fingerprint recognition component.

[0024] At least one embodiment of this disclosure also provides a display device including the array substrate described in any of the above claims.

[0025] For example, a display device provided in one embodiment of this disclosure further includes: an optical functional component configured to receive or emit light, the optical functional component being located on the side of the substrate away from the anode layer and within the transparent display area.

[0026] At least one embodiment of this disclosure also provides an array substrate, comprising: a substrate including a transparent display area; an anode layer located on the substrate and including a plurality of anodes; an encapsulation layer located on the side of the anode layer away from the substrate; and a touch electrode layer located on the side of the encapsulation layer away from the anode layer and including conductive grid lines. The transparent display area includes an anode area and a transparent area. The anode area is provided with at least one anode, and the transparent area is not provided with an anode. Within the transparent display area, the conductive grid lines include a first conductor located in the anode area and a second conductor located in the transparent area. The second conductor is formed as a non-grid line connecting two adjacent first conductors.

[0027] For example, in an array substrate provided in one embodiment of this disclosure, the second conductor is formed as a straight line connecting two adjacent first conductors.

[0028] For example, in an array substrate provided in one embodiment of this disclosure, the first wire is formed as a first grid that is connected to or partially overlaps with at least one of the plurality of anodes.

[0029] For example, in an array substrate provided in one embodiment of this disclosure, the first conductor is located between two adjacent anodes and is spaced apart from each of the two adjacent anodes. Attached Figure Description

[0030] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments will be briefly described below. Obviously, the drawings described below only relate to some embodiments of this disclosure and are not intended to limit this disclosure.

[0031] Figure 1 A planar schematic diagram of an array substrate is shown;

[0032] Figure 2 This is a planar schematic diagram of an array substrate provided according to an embodiment of the present disclosure;

[0033] Figure 3 This is a planar schematic diagram of another array substrate provided according to an embodiment of the present disclosure;

[0034] Figure 4 This is a planar schematic diagram of another array substrate provided according to an embodiment of the present disclosure;

[0035] Figure 5 An array substrate is provided according to an embodiment of the present disclosure. Figure 2 A cross-sectional view along the AA direction;

[0036] Figure 6 This is a planar schematic diagram of another array substrate provided according to an embodiment of the present disclosure;

[0037] Figure 7 A plan view of another array substrate provided according to an embodiment of the present disclosure; and

[0038] Figure 8 This is a schematic diagram of a display device provided according to an embodiment of the present disclosure. Detailed Implementation

[0039] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0040] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that an element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as “connected” or “linked” are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect.

[0041] To further improve screen-to-body ratio and achieve a full-screen design, the camera component can be placed below the screen. However, the inventors of this application have discovered that in display devices using FMLOC technology, since the metal mesh line is placed between two adjacent anodes, and both the metal mesh line and the anodes are opaque structures, a slit is formed between the metal mesh line and the two adjacent anodes. When visible light passes through the aforementioned slit, diffraction or interference phenomena easily occur, resulting in a deterioration in the image quality of the camera component below.

[0042] For example, Figure 1 A schematic planar view of an array substrate is shown; as follows: Figure 1 As shown, the array substrate includes a substrate 01, an anode layer 02, and a touch electrode layer 03. The anode layer 02 is disposed on the substrate 01, and the touch electrode layer 03 is disposed on the side of the anode layer 02 away from the substrate 01. An insulating layer or passivation layer (not shown) is also disposed between the anode layer 02 and the touch electrode layer 03. The anode layer 02 includes a plurality of anodes 022; the touch electrode layer 03 includes metal mesh electrodes 032, which are formed by metal mesh lines 034. Some of the metal mesh lines 034 are disposed between two adjacent anodes 022. Both the metal mesh lines 034 and the anodes 022 are non-transparent structures, thereby forming a slit 09 between the metal mesh lines 034 and two adjacent anodes 022. When visible light passes through the slit 09, diffraction or interference is likely to occur, resulting in a deterioration in the imaging quality of the camera component under the screen. In response, the inventors of this application devised an optimized design for the metal mesh lines to avoid the aforementioned slits, thereby ensuring the imaging quality of the camera component under the screen.

[0043] This disclosure provides an array substrate and a display device. The array substrate includes a substrate, an anode layer, an encapsulation layer, and a touch electrode layer. The substrate includes a transparent display area. The anode layer is located on the substrate and includes a plurality of anodes. The encapsulation layer is located on the side of the anode layer away from the substrate. The touch electrode layer is located on the side of the encapsulation layer away from the anode layer and includes conductive grid lines. Within the transparent display area, the orthographic projection of the conductive grid lines on the substrate is adjacent to or partially overlaps with the orthographic projection of at least one of the plurality of anodes on the substrate. In this array substrate, since the orthographic projection of the conductive grid lines on the substrate is adjacent to or partially overlaps with the orthographic projection of at least one of the plurality of anodes on the substrate, the formation of slits between the anodes and the conductive grid lines can be effectively avoided, thereby preventing diffraction or interference of light when passing through the transparent display area. Therefore, when this array substrate is used in a display device, the imaging quality of the camera assembly below the screen can be guaranteed.

[0044] The array substrate and display device provided in the embodiments of this disclosure will now be described in detail with reference to the accompanying drawings.

[0045] Figure 2 This is a planar schematic diagram of an array substrate provided according to an embodiment of the present disclosure. Figure 2 As shown, the array substrate 100 includes a substrate 110, an anode layer 120, and an encapsulation layer (…). Figure 2 (Not shown) and a touch electrode layer 140; a substrate 110 includes a transparent display area 112; an anode layer 120 is located on the substrate 110 and includes a plurality of anodes 122; an encapsulation layer is located on the side of the anode layer 120 away from the substrate 110; the touch electrode layer 140 is located on the side of the encapsulation layer away from the anode layer 120 and includes conductive grid lines 142. Within the transparent display area 112, the orthographic projection of the conductive grid lines 142 on the substrate 110 is connected to or partially overlaps with the orthographic projection of at least one of the plurality of anodes 122 on the substrate 110. It should be noted that, the above-mentioned connection between the orthographic projection of the conductive grid lines on the substrate and the orthographic projection of at least one of the plurality of anodes on the substrate means that there is no gap between the edges of the two orthographic projections, that is, the distance between the edges of the two orthographic projections is zero; the above-mentioned partial overlap between the orthographic projection of the conductive grid lines on the substrate and the orthographic projection of at least one of the plurality of anodes on the substrate means that the two orthographic projections have an overlapping area.

[0046] In the array substrate provided in this embodiment, since the orthographic projection of the conductive grid lines on the substrate is adjacent to or partially overlaps with the orthographic projection of at least one of the plurality of anodes on the substrate, the formation of a slit between the anodes and the conductive grid lines can be effectively avoided, thereby preventing diffraction or interference of light when passing through the transparent display area. Therefore, when this array substrate is applied to a display device, the function of the optical components located in the transparent display area can be guaranteed to remain unaffected. For example, when the aforementioned optical component is a camera component, the array substrate can guarantee the imaging quality of the camera component; as another example, when the aforementioned optical component is an optical fingerprint recognition component, the array substrate can guarantee the fingerprint recognition accuracy of the optical fingerprint recognition component. It should be noted that, although... Figure 1 The array substrate shown employs a GGRB pixel arrangement; however, the array substrate provided in this embodiment can also employ other pixel arrangements, and the wire grid lines can be set according to the specific pixel arrangement. In some examples, such as Figure 2 As shown, within the transparent display area 112, the orthographic projection of the conductive grid line 142 on the substrate 110 is adjacent to or partially overlaps with the orthographic projection of each of the plurality of anodes 122 on the substrate 110. This arrangement ensures that no gaps are formed between the anodes and the conductive grid line, and also increases the distribution density of the conductive grid line, thereby reducing touch blind spots, increasing touch accuracy, and reducing the overall resistance of the conductive grid line.

[0047] In some examples, such as Figure 2 As shown, within the transparent display area 112, conductive grid lines 142 are arranged along the edge of the corresponding anode 122. This arrangement allows the conductive grid lines to surround the edge of the anode, further ensuring that no gaps are formed between the anode and the conductive grid lines, and increasing the distribution density of the conductive grid lines.

[0048] It is worth noting that the planar shape of a typical anode is not a regular hexagon or pentagon, but rather includes a main body for driving the light-emitting layer to emit light and a connection portion for connecting to the driving circuit via vias (e.g., as shown in the image). Figure 2 (The protrusion 1225 at the edge of the anode shown). In the array substrate provided in the embodiments of this disclosure, the conductive grid lines are provided along or around the main body of the anode, but do not include the connecting portion of the anode. Therefore, the orthographic projection of the aforementioned conductive grid lines on the substrate may be connected to or partially overlap with the orthographic projection of a portion of the edge of at least one of the plurality of anodes on the substrate, and is not necessarily all the edges of the anode.

[0049] Figure 3 This is a planar schematic diagram of an array substrate provided according to an embodiment of the present disclosure. Figure 3As shown, the substrate 110 also includes a non-transparent display area 114; as Figure 2 and Figure 3 As shown, the multiple anodes 122 include multiple anode groups 124, that is, the multiple anodes 122 are divided into multiple anode groups 124; the density of anode groups 124 in the non-transparent display area 114 is greater than the density of anode groups 124 in the transparent display area 112; the transparent display area 112 includes an anode area 1124 and a transparent area 1126, the anode area 1124 is provided with at least one anode group 124, and the transparent area 1126 is not provided with an anode group 124. With this configuration, the array substrate simultaneously has a transparent display area 112 and a non-transparent display area 114. The transparent display area 112 can display and house optical functional components, while the non-transparent display area 114 can display at high resolution. Therefore, when this array substrate is applied to a display device, it can achieve a full-screen design while providing a high-quality display image. Of course, embodiments of this disclosure include, but are not limited to, the substrate may only include a transparent display area and not a non-transparent display area; in this case, optical functional components can be disposed under all display areas of the array substrate.

[0050] It should be noted that, in order to concisely illustrate the difference between transparent and non-transparent display areas, Figure 3 Each small rectangle in the diagram represents an anode group; furthermore, each of the aforementioned anodes can be used to drive the light-emitting layer to emit light of a single color, corresponding to a sub-pixel in the display device; the aforementioned anode group may include multiple anodes, each driving a different light-emitting layer to emit light of a different color, corresponding to a pixel in the display device.

[0051] In some examples, such as Figure 2 and Figure 3 As shown, each anode group 124 includes a first anode 1221, two second anodes 1222, and a third anode 1223. Within the transparent display area 112, the orthographic projection of the conductive grid line 142 onto the substrate 110 is adjacent to or partially overlaps with the orthographic projections of the first anode 1221, second anode 1222, and third anode 1223 onto the substrate 110. This arrangement ensures that no slits are formed between the first anode, second anode, and third anode and the conductive grid line, while also increasing the distribution density of the conductive grid line. This reduces touch blind spots, increases touch accuracy, and lowers the overall resistance of the conductive grid line.

[0052] For example, the first anode can be the anode of a first color sub-pixel, the second anode can be the anode of a second color sub-pixel, and the third anode can be the anode of a third color sub-pixel. For example, the first color sub-pixel can be a red sub-pixel, the second color sub-pixel can be a green sub-pixel, and the third color sub-pixel can be a blue sub-pixel. Of course, the embodiments of this disclosure are not limited to these, and the above three color sub-pixels can also be sub-pixels of other colors.

[0053] In some examples, such as Figure 2 As shown, within the transparent display area 112, the conductive grid line 142 includes a first conductor 1421 located in the anode area 1124 and a second conductor 1422 located in the transparent area 1126. The first conductor 1421 is formed as a first grid that connects to or partially overlaps with each anode 122 in the anode group 124. With this configuration, since no anode is present in the transparent area, the second conductor will not form a slit with the anode; and the first conductor being formed as a first grid that connects to or partially overlaps with each anode in the anode group effectively avoids the formation of a slit between the anode and the first conductor, thereby preventing diffraction or interference of light when passing through the anode area.

[0054] In some examples, such as Figure 2 As shown, the second conductor 1422 is formed as a non-grid line, such as a straight line, connecting two adjacent first conductors 1421. Since there is no anode in the transparent area, setting the second conductor as a straight line increases the aperture ratio of the transparent area, thereby increasing the amount of light transmitted through the transparent area and improving the performance and accuracy of the optical functional components set in the transparent display area. In addition, setting the second conductor as a straight line also reduces the risk of diffraction at the anode chamfer.

[0055] In some examples, within the non-transparent display area, the conductive grid lines are connected to or partially overlap with at least one of the multiple anodes. That is, in the non-transparent display area, the conductive grid lines can adopt the same configuration as in the transparent display area; for example, the specific shape and location of the conductive grid lines within the non-transparent display area can be found in [reference needed]. Figure 2 The first conductor in the process. Of course, embodiments of this disclosure include, but are not limited to, conductive grid lines in the non-transparent display area may also be located between two adjacent anodes and spaced apart from each of the two adjacent anodes.

[0056] In some examples, the touch electrode layer 140 includes a plurality of metal mesh electrodes, and the conductive mesh lines 142 include metal mesh lines that form the aforementioned metal mesh electrodes. In other words, the aforementioned touch electrode layer is formed using a metal mesh.

[0057] Figure 4 This is a planar schematic diagram of another array substrate provided according to an embodiment of the present disclosure. For example... Figure 4As shown, within the non-transparent display area 114, conductive grid lines 142 are located between two adjacent anodes 122 and are spaced apart from each of the two adjacent anodes 122. Since the non-transparent display area does not require light transmission, the slits formed between the conductive grid lines and the two adjacent anodes do not cause the aforementioned problems caused by diffraction or interference.

[0058] Figure 5 An array substrate is provided according to an embodiment of the present disclosure. Figure 2 A cross-sectional view along the AA direction. (See diagram.) Figure 5 As shown, the array substrate 100 includes the aforementioned substrate 110, anode layer 120, encapsulation layer 130, and touch electrode layer 140; furthermore, the array substrate 100 also includes a pixel defining layer 150. The pixel defining layer 150 is located on the side of the anode layer 120 away from the substrate 110, and includes a plurality of openings 152, each corresponding to a plurality of anodes 122. Within the transparent display area 112, the orthographic projection of the conductive grid lines 142 on the substrate 110 falls within the orthographic projection of the pixel defining layer 150 on the substrate 110, and is spaced from the orthographic projection of the edges of the openings 152 on the substrate 110. That is, the conductive grid lines are at a certain distance from the edges of the openings, thereby preventing the conductive grid lines from affecting the light emission angle, thus ensuring a certain opening viewing angle. In some examples, such as Figure 5 As shown, within the transparent display area 112, the orthographic projection of the conductive grid line 142 onto the substrate 110 overlaps with the orthographic projection of at least one of the plurality of anodes 122 onto the substrate 110, and the width d of the overlapping area ranges from 0 to 3.5 micrometers. This arrangement ensures that no slits are formed between the anodes and the conductive grid line under certain process tolerances, thereby further effectively preventing diffraction or interference of light when passing through the transparent display area.

[0059] In some examples, the linewidth of the conductive mesh lines ranges from 2 to 5 micrometers, and the size of the anode ranges from 10 to 80 micrometers.

[0060] In some examples, such as Figure 5 As shown, the array substrate 100 further includes a pixel driving layer 160, a planarization layer 170, a light-emitting layer 180, and a cathode layer 190. The pixel driving layer 160 is located between the substrate 110 and the anode layer 120, the planarization layer 170 is located between the pixel driving layer 160 and the anode layer 120, the light-emitting layer 180 is located on the side of the anode layer 120 away from the planarization layer 170, and the cathode layer 190 is located between the light-emitting layer 180 and the encapsulation layer 130. It should be noted that the array substrate may also include other layer structures for realizing display functions, such as hole injection layers, hole transport layers, electron injection layers, and electron transport layers; however, this embodiment is not limited thereto.

[0061] In some examples, such as Figure 5 As shown, the array substrate 100 also includes an optical functional component 200 configured to receive or emit light. The optical functional component 200 is located on the side of the substrate 110 away from the anode layer 120 and within the transparent display area 112. This configuration allows light to pass through the transparent display area of ​​the substrate and enter the optical functional component, or light emitted by the optical functional component can exit through the transparent display area of ​​the substrate. Thus, the array substrate can perform the functions corresponding to the optical functional component while displaying a picture.

[0062] For example, the optical functional component 200 includes at least one of a camera component, a face recognition component, and an optical fingerprint recognition component, thereby enabling at least one of the camera function and fingerprint recognition function. It should be noted that the aforementioned face recognition component may include an ambient light sensor, a distance sensor, an infrared lens, a flood illuminator, and a dot projector, etc. Of course, the embodiments disclosed herein are not limited to this, and the aforementioned face recognition component may also include other functional components.

[0063] For example, the aforementioned substrate can be a transparent substrate, such as a glass substrate, a quartz substrate, or a plastic substrate. Alternatively, the aforementioned substrate can also be a flexible transparent substrate, such as a polyimide (PI) substrate. Embodiments of this disclosure include, but are not limited to, those described herein.

[0064] For example, the anode layer described above can be made of metal, and the touch electrode layer described above can also be made of metal.

[0065] For example, the aforementioned encapsulation layer may include a stacked structure of an organic encapsulation layer and an inorganic encapsulation layer; the material of the inorganic encapsulation layer may be one or more of silicon oxide, silicon nitride, or silicon oxynitride; the material of the organic encapsulation layer may be an organic resin, polyimide, polyacrylate, etc. Of course, the embodiments disclosed herein include, but are not limited to, these.

[0066] For example, the pixel driving layer described above may include a pixel driving circuit. The pixel driving circuit provided in this embodiment can be found in a typical design. For example, the pixel driving circuit may also include structures such as thin-film transistors and capacitors, which will not be described in detail here.

[0067] Figure 6 This is a planar schematic diagram of another array substrate provided according to an embodiment of the present disclosure. For example... Figure 6As shown, the array substrate 100 includes a substrate 110, an anode layer 120, an encapsulation layer 130, and a touch electrode layer 140. The substrate 110 includes a transparent display area 112. The anode layer 120 is located on the substrate 110 and includes a plurality of anodes 122. The encapsulation layer 130 is located on the side of the anode layer 120 away from the substrate 110. The touch electrode layer 140 is located on the side of the encapsulation layer 130 away from the anode layer 120 and includes conductive grid lines 142. The transparent display area 112 includes an anode area 1124 and a transparent area 1126. The anode area 1124 is provided with at least one anode group 124, and the transparent area 1126 is not provided with an anode group 124. Within the transparent display area 112, the conductive grid line 142 includes a first conductor 1421 located in the anode area 1124 and a second conductor 1422 located in the transparent area 1126. The first conductor 1421 is formed as a first grid that connects to or partially overlaps with each anode 122 in the anode group 124, and the second conductor 1422 is formed as a second grid that connects two adjacent first conductors 1421. With this configuration, since no anode is present in the transparent area, the second conductor will not form a slit with the anode; and the first conductor being formed as a first grid that connects to or partially overlaps with each anode in the anode group effectively avoids the formation of a slit between the anode and the first conductor, thereby preventing diffraction or interference of light when passing through the anode area.

[0068] Figure 7 This is a planar schematic diagram of another array substrate provided according to an embodiment of the present disclosure. For example... Figure 7 As shown, the array substrate 100 includes a substrate 110, an anode layer 120, an encapsulation layer 130, and a touch electrode layer 140. The substrate 110 includes a transparent display area 112. The anode layer 120 is located on the substrate 110 and includes a plurality of anodes 122. The encapsulation layer 130 is located on the side of the anode layer 120 away from the substrate 110. The touch electrode layer 140 is located on the side of the encapsulation layer 130 away from the anode layer 120 and includes conductive grid lines 142. The transparent display area 112 includes an anode area 1124 and a transparent area 1126. The anode area 1124 is provided with at least one anode group 124, and the transparent area 1126 is not provided with an anode group 124. Within the transparent display area 112, the conductive grid lines 142 include a first conductor 1421 located in the anode area 1124 and a second conductor 1422 located in the transparent area 1126. The second conductor 1422 is formed as a non-grid line connecting two adjacent first conductors 1421, for example, a straight line or a bent line. With this configuration, since there is no anode in the transparent area, the aperture ratio of the transparent area can be increased by setting the second conductor to a non-grid line, thereby increasing the amount of light transmitted through the transparent area and thus improving the performance and accuracy of the optical functional components set in the transparent display area.

[0069] In some examples, such as Figure 7As shown, the second conductor 1422 is formed as a straight line connecting two adjacent first conductors 1421. By setting the second conductor as a straight line, the aperture ratio of the transparent area can be further increased, thereby increasing the amount of light transmitted through the transparent area, and thus improving the performance and accuracy of the optical functional components set in the transparent display area. In some examples, the first conductor 1421 is located between two adjacent anodes 122 and is spaced apart from each of the two adjacent anodes 122; that is, the first conductor 1421 does not employ... Figure 2 The illustrated embodiment shows the relevant arrangement of the first conductor. Of course, embodiments of this disclosure include, but are not limited to, the first conductor may also be formed as a first grid that connects to or partially overlaps with each anode in the anode group, thereby avoiding the formation of slits between the first conductor and adjacent anodes. See [link to relevant documentation] for details. Figure 2 The relevant description of the illustrated embodiment.

[0070] Figure 8 This is a schematic diagram of a display device provided according to an embodiment of the present disclosure. Figure 8 As shown, the display device 300 includes the array substrate 100 provided in any of the above embodiments. Therefore, the display device can effectively avoid the formation of slits between the anode and the conductive grid lines, thereby preventing diffraction or interference of light when passing through the transparent display area. Thus, the display device can ensure that the function of the optical components located in the transparent display area is not affected. For example, when the optical component is a camera component, the display device can ensure the imaging quality of the camera component; or, for example, when the optical component is an optical fingerprint recognition component, the display device can ensure the fingerprint recognition accuracy of the optical fingerprint recognition component. Alternatively, by setting the second guide wire to a straight line, the display device can increase the aperture ratio of the transparent area, thereby increasing the amount of light transmitted through the transparent area, and thus improving the performance and accuracy of the optical components provided in the transparent display area.

[0071] In some examples, such as Figure 8 As shown, the display device 300 also includes an optical functional component 200 configured to receive or emit light. The optical functional component 200 is located on the side of the substrate 110 away from the anode layer 120 and within the transparent display area 112. This arrangement allows light to pass through the transparent display area of ​​the substrate and enter the optical functional component, or light emitted by the optical functional component can exit through the transparent display area of ​​the substrate. Thus, the array substrate can simultaneously display and perform the functions corresponding to the optical functional component.

[0072] For example, the optical functional component 200 includes at least one of a camera component, a face recognition component, and an optical fingerprint recognition component, thereby enabling at least one of the camera function and the fingerprint recognition function.

[0073] For example, the display device can be a smart display device, such as a smartphone, tablet computer, or smartwatch. Of course, the embodiments disclosed herein are not limited to this; the display device can also be any product or component with display function, such as a digital camera, a large-area screen, an advertising screen, a television, a monitor, a laptop computer, a digital photo frame, or a navigator.

[0074] The following points need to be explained:

[0075] (1) The accompanying drawings of the embodiments of this disclosure only involve the structures involved in the embodiments of this disclosure. Other structures can be referred to the general design.

[0076] (2) Where there is no conflict, features of the same embodiment and different embodiments of this disclosure can be combined with each other.

[0077] The above are merely specific embodiments of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. An array substrate, comprising: A substrate includes a transparent display area and a non-transparent display area located on one side of the transparent display area, wherein the transparent display area includes a plurality of anode areas and transparent areas; A pixel driving layer is located on one side of the substrate and at least in the plurality of anode regions; Multiple anode groups are located on the side of the pixel driving layer away from the substrate and in the multiple anode regions. Each anode group includes multiple anodes, and the pixel driving layer is connected to the multiple anodes. A touch electrode layer is located on the side of the plurality of anode groups away from the substrate, and the touch electrode layer includes conductive grid lines. Within the transparent display area, at least a portion of the conductive grid lines are projected onto the substrate along the orthogonal projection of the edges of the plurality of anode groups onto the substrate, and the at least a portion of the conductive grid lines that are projected onto the substrate along the edges of the plurality of anode groups are located in the anode region.

2. The array substrate according to claim 1, wherein, The plurality of anodes includes a first anode, a second anode, and a third anode, and the at least partial conductive grid lines are projected onto the substrate along the edge of the first anode away from the second and third anodes in the projection onto the substrate. or The at least partial conductive grid lines are projected onto the substrate along the edge of the second anode away from the first and third anodes. or The at least partial conductive grid lines are projected onto the substrate along the edge of the third anode away from the first and second anodes.

3. The array substrate according to claim 2, wherein, The at least partial conductive grid lines are projected onto the substrate at least along the edge of the first anode away from the second and third anodes in the projection onto the substrate. and The at least partial conductive grid lines are projected onto the substrate at least along the edge of the second anode away from the first and third anodes in the projection onto the substrate. and The at least partial conductive grid line is projected onto the substrate at least along the edge of the third anode away from the first and second anodes in the projection onto the substrate.

4. The array substrate according to claim 1, wherein, The conductive grid line includes a first conductor located in the anode region, the first conductor including a first grid, the orthographic projection of the first grid on the substrate at least surrounding the orthographic projection of the edge of the anode group on the substrate.

5. The array substrate according to claim 4, wherein, The conductive grid line also includes a second conductor located in the transparent area, the second conductor being formed as a non-grid line connecting two adjacent first conductors.

6. The array substrate according to claim 5, wherein, The non-grid lines are straight lines or bends.

7. The array substrate according to claim 5, wherein, The second conductor is formed as a second grid that connects two adjacent first conductors.

8. The array substrate according to any one of claims 1-7, wherein, Each of the anode regions is provided with an anode group, while the transparent region is not provided with an anode group.

9. The array substrate according to any one of claims 1-7, wherein, Within the transparent display area, the orthographic projection of the conductive grid lines on the substrate overlaps with the orthographic projection of at least one of the plurality of anodes on the substrate, and the width of the overlapping area ranges from 0 to 3.5 micrometers.

10. The array substrate according to any one of claims 1-7, wherein, Within the transparent display area, the orthographic projection of the conductive grid lines on the substrate winds around the orthographic projection of the edge of each of the plurality of anode groups on the substrate.

11. The array substrate according to any one of claims 1-7, wherein, Within the transparent display area, the conductive grid lines are arranged along the edge of each anode in each anode group.

12. The array substrate according to any one of claims 1-7, wherein, Multiple anode groups are also located in the non-transparent display area. The density of the anode group in the non-transparent display area is greater than the density of the anode group in the transparent display area.

13. The array substrate according to any one of claims 1-7, wherein, The touch electrode layer includes a plurality of metal mesh electrodes, and the conductive mesh lines include metal mesh lines configured to form the metal mesh electrodes.

14. The array substrate according to any one of claims 1-7, wherein, The linewidth of the conductive mesh line ranges from 2 to 5 micrometers, and the size of the anode ranges from 10 to 80 micrometers.

15. The array substrate according to any one of claims 1-7, further comprising: A pixel defining layer is disposed on the side of the plurality of anode groups away from the substrate, and includes a plurality of openings, each opening corresponding to one of the plurality of anodes. Within the transparent display area, the orthographic projection of the conductive grid lines on the substrate falls within the orthographic projection of the pixel defining layer on the substrate, and is spaced from the orthographic projection of the edge of the opening on the substrate.

16. The array substrate according to any one of claims 1-7, wherein, Within the non-transparent display area, the conductive grid lines are connected to or partially overlap with at least one of the plurality of anodes.

17. The array substrate according to any one of claims 1-7, wherein, Within the non-transparent display area, the conductive grid lines are located between two adjacent anodes and are spaced apart from each of the two adjacent anodes.

18. The array substrate according to any one of claims 1-7, further comprising: A planarization layer is located between the pixel driving layer and the plurality of anode groups; A light-emitting layer is located on the side of the plurality of anode groups away from the planar layer; as well as The cathode layer is located on the side of the light-emitting layer away from the substrate.

19. A display device, comprising: The array substrate according to any one of claims 1-18; as well as Optical functional components are configured to receive or emit light. The optical functional components are located on the side of the substrate away from the plurality of anode groups and within the transparent display area.

20. The display device according to claim 19, wherein, The optical functional components include at least one of a camera component, a face recognition component, and an optical fingerprint recognition component.

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