Multilayer ceramic capacitor

Abstract

The present application provides a laminated ceramic capacitor that ensures sufficient performance. The laminated ceramic capacitor (1) of the present application includes: a laminate (2) in which a plurality of internal electrode layers (15) and internal dielectric layers (14) are alternately laminated, has main surfaces on both sides in a lamination direction, has end surfaces on both sides in a length direction that intersects the lamination direction, and has side surfaces on both sides in a width direction that intersects the lamination direction and the length direction; and two external electrodes (3) disposed on the end surfaces of the laminate (2), respectively, the external electrodes (3) having: a central portion (30M) having a thickness L1, which is the center in the lamination direction and the center in the width direction; and an outer peripheral portion (30S) having a thickness L2, which surrounds the central portion (30M), and L1 < L2.

Description

TECHNICAL FIELD

[0001] The present application relates to a multilayer ceramic capacitor. BACKGROUND

[0002] A multilayer ceramic capacitor is provided with an external electrode on an end surface of a laminate in which internal electrode layers and dielectric layers are alternately stacked. The external electrode has a base electrode layer and a plating layer. The base electrode layer is formed by performing firing after applying a paste containing Cu and glass. Then, the laminate on which the base electrode layer is fired is subjected to drum processing (see Patent Document 1).

[0003] PRIOR ART DOCUMENT

[0004] PATENT DOCUMENT

[0005] Patent Document 1: Japanese Patent Application Publication No. 2021-019010

[0006] However, if the laminate on which the base electrode layer is fired is subjected to drum processing, the outer peripheral portion of the base electrode layer formed on the end surface can be shaved off to expose the end surface of the laminate. As a result, there is a possibility that plating solution intrudes into the inside of the laminate and the like, and sufficient performance as a multilayer ceramic capacitor cannot be obtained. SUMMARY

[0007] PROBLEMS TO BE SOLVED BY THE INVENTION

[0008] An object of the present application is to provide a multilayer ceramic capacitor that ensures sufficient performance.

[0009] TECHNICAL SOLUTION FOR SOLVING THE PROBLEMS

[0010] To solve the above problems, the present application provides a multilayer ceramic capacitor including: a laminate in which a plurality of internal electrode layers and internal dielectric layers are alternately stacked, the laminate having main surfaces on both sides in a stacking direction, end surfaces on both sides in a length direction intersecting the stacking direction, and side surfaces on both sides in a width direction intersecting the stacking direction and the length direction; and two external electrodes respectively disposed on the end surfaces of the laminate, the external electrodes each having: a central portion having a thickness L1, the central portion being at the center in the stacking direction and at the center in the width direction; and an outer peripheral portion having a thickness L2, the outer peripheral portion surrounding the central portion, and L1 < L2.

[0011] EFFECT OF THE INVENTION

[0012] According to the present application, it is possible to provide a multilayer ceramic capacitor that ensures sufficient performance. BRIEF DESCRIPTION OF DRAWINGS

[0013] Figure 1 is a schematic perspective view of a multilayer ceramic capacitor 1 according to an embodiment.

[0014] Figure 2 is Figure 1 a cross-sectional view of the multilayer ceramic capacitor 1 along the direction of line II-II.

[0015] Figure 3 is Figure 1 a cross-sectional view of the multilayer ceramic capacitor 1 along the direction of line III-III.

[0016] Figure 4 is an example of an enlarged image of a cross section of the exposed inner layer portion 11.

[0017] Figure 5 is a flowchart illustrating a manufacturing method of the multilayer ceramic capacitor 1.

[0018] Figure 6 is a view showing a state before a drum process in which the base electrode layer 31 is sintered on the surface of the laminate 2.

[0019] Figure 7 is a view showing a state after the drum process is performed on the laminate 2 shown in Figure 6

[0020] BRIEF DESCRIPTION OF THE DRAWINGS

[0021] P: end surface portion;

[0022] Q: outer peripheral surface portion;

[0023] R: edge surface portion;

[0024] R1: edge line;

[0025] 1: multilayer ceramic capacitor;

[0026] 2: laminate;

[0027] 14: internal dielectric layer;

[0028] 15: internal electrode layer;

[0029] 3: external electrode;

[0030] 30M: central portion;

[0031] 30S: outer peripheral portion;

[0032] 31: base electrode layer;

[0033] 31a: Cu region;

[0034] 31b: glass region;

[0035] 31c: Cu-containing glass region;

[0036] 311: 1st portion;​

[0037] 312: 2nd portion;

[0038] 313: 3rd portion;

[0039] 32: plating layer;

[0040] 321: Cu plating layer;

[0041] 322: Ni plating layer;

[0042] 323: Sn plating layer. DETAILED DESCRIPTION

[0043] (Laminated ceramic capacitor 1)

[0044] Hereinafter, a laminated ceramic capacitor 1 related to an embodiment of the present application will be described. The laminated ceramic capacitor 1 is substantially rectangular parallelepiped-shaped, and has a laminate 2 and a pair of external electrodes 3 provided at both ends of the laminate 2. The laminate 2 includes an inner layer portion 11 in which internal dielectric layers 14 and internal electrode layers 15 are laminated.

[0045] As for the size of the laminated ceramic capacitor 1, for example, the width direction W is 0.1 mm or more and 0.5 mm or less, the thickness direction is 0.1 mm or more and 0.6 mm or less, and the length direction L is 0.3 mm or more and 1.0 mm or less.

[0046] In the following description, as a term representing the orientation of the laminated ceramic capacitor 1, in the laminated ceramic capacitor 1, the direction in which the pair of external electrodes 3 is provided is set as the length direction L. The direction in which the internal dielectric layers 14 and the internal electrode layers 15 are laminated is set as the lamination direction T. The direction intersecting both the length direction L and the lamination direction T is set as the width direction W. In addition, in the embodiment, the width direction W is orthogonal to both the length direction L and the lamination direction T. As for the laminated ceramic capacitor 1 of the embodiment, although the size in the length direction L is longer than the size in the width direction W and the size in the lamination direction T, it is not limited thereto, and the size in the length direction L can be not longer than the size in the width direction W and the size in the lamination direction T.

[0047] Further, in the following description, among the six outer surfaces of the laminate 2, a pair of outer surfaces opposite in the stacking direction T are set as the first main surface Al and the second main surface A2, a pair of outer surfaces opposite in the width direction W are set as the first side surface Bl and the second side surface B2, and a pair of outer surfaces opposite in the length direction L are set as the first end surface Cl and the second end surface C2. In addition, in cases where the first main surface Al and the second main surface A2 do not need to be distinguished particularly for explanation, they are explained uniformly as the main surface A, in cases where the first side surface Bl and the second side surface B2 do not need to be distinguished particularly for explanation, they are explained uniformly as the side surface B, and in cases where the first end surface Cl and the second end surface C2 do not need to be distinguished particularly for explanation, they are explained uniformly as the end surface C.

[0048] (Laminate 2)

[0049] The laminate 2 includes: a laminate chip 10; and side edge portions 21 disposed on both sides in the width direction W of the laminate chip 10. The laminate chip 10 includes: an inner layer portion 11 in which an internal dielectric layer 14 and an internal electrode layer 15 are alternately stacked; and two outer layer portions 22 disposed on both sides in the stacking direction T of the inner layer portion 11.

[0050] The laminate 2 is substantially rectangular parallelepiped-shaped, but a certain region including a ridge line portion Rl has a roundness and becomes a curved surface. The ridge line portion Rl is a portion between two surfaces of the laminate 2, that is, a portion between the main surface A and the side surface B, the main surface A and the end surface C, or the side surface B and the end surface C, and also includes a corner portion between the main surface A, the side surface B, and the end surface C.

[0051] (Inner layer portion 11)

[0052] The inner layer portion 11 is a portion in which the internal dielectric layer 14 and the internal electrode layer 15 are alternately stacked in the stacking direction T.

[0053] (Internal electrode layer 15)

[0054] The internal electrode layer 15 includes a plurality of first internal electrode layers 15A and a plurality of second internal electrode layers 15B. The first internal electrode layers 15A and the second internal electrode layers 15B are alternately disposed. In addition, in cases where the first internal electrode layers 15A and the second internal electrode layers 15B do not need to be distinguished particularly for explanation, they are explained uniformly as the internal electrode layer 15.

[0055] The internal electrode layer 15 contains, for example, Ni (nickel) as a main component. The internal electrode layer 15 can further include a dielectric particle of the same composition system as a ceramic included in the internal dielectric layer 14.

[0056] The first internal electrode layer 15A includes a first opposing portion 15Aa opposite to the second internal electrode layer 15B, and a first lead-out portion 15Ab extending from the first opposing portion 15Aa to the first end face C1 side. The end of the first lead-out portion 15Ab is exposed at the first end face C1 and is electrically connected to the first external electrode 3A described later.

[0057] The second internal electrode layer 15B includes a second opposing portion 15Ba opposite to the first internal electrode layer 15A, and a second lead-out portion (not shown) extending from the second opposing portion 15Ba to the second end face C2 side. The end of the second lead-out portion is electrically connected to the second external electrode 3B, which will be described later. The internal electrode layer 15, sandwiching the internal dielectric layer 14, stores charge between the first opposing portion 15Aa of the first internal electrode layer 15A and the second opposing portion 15Ba of the second internal electrode layer 15B, thus functioning as a capacitor.

[0058] like Figure 3 As shown, in the cross-section WT passing through the center of the laminate 2 in the width direction W and the stacking direction T, the deviation d of the ends of the two adjacent first internal electrode layers 15A and second internal electrode layers 15B in the width direction W in the stacking direction T is preferably 5 μm or less, more preferably 0.5 μm or less. That is, the ends of the adjacent first internal electrode layers 15A and second internal electrode layers 15B in the width direction W are at approximately the same position in the width direction W, and the positions of the ends are aligned in the stacking direction T.

[0059] The number of internal electrode layers 15 is preferably 10 or more and 1000 or less. In addition, the thickness of the internal electrode layer 15 is preferably 0.3 μm or more and 0.4 μm or less, more preferably 0.3 μm or more and 0.35 μm or less.

[0060] The thickness of the internal electrode layer 15 is measured, for example, as follows. First, the inner layer 11 is exposed by grinding a cross-section LT passing through the center of the multilayer ceramic capacitor 1. If necessary, the exposed cross-section is etched at the observation position to remove the conductive layer that has been stretched by grinding.

[0061] Figure 4 This is an example of a magnified image of a cross-section of the exposed inner layer 11. In the magnified image shown, for example, multiple straight lines La, Lb, Lc, Ld, and Le extending in the stacking direction T are drawn at equal intervals with a spacing S. The spacing S is preferably 5 to 10 times the thickness of the inner electrode layer 15 to be measured. For example, when measuring an inner electrode layer 15 with a thickness of approximately 1 μm, the spacing S is set to 5 μm.

[0062] Next, the thickness da, db, dc, dd, de of each internal electrode layer 15 is measured on each of the five straight lines La, Lb, Lc, Ld, Le. However, in the case where the internal electrode layer 15 is missing and the internal dielectric layers 14 sandwiching the internal electrode layer 15 are connected to each other on the straight lines La, Lb, Lc, Ld, Le, or in the case where the enlarged view of the measurement position is unclear, a new straight line is drawn and the thickness of the internal electrode layer 15 is measured.

[0063] Then, the thickness is measured by the above-described method for the internal electrode layers 15 of five or more layers, for example, for the internal electrode layers 15 of five layers, and in the case where the number of layers of the internal electrode layers 15 is less than five, the thickness is measured by the above-described method for all of the internal electrode layers 15, and the average value thereof is taken as the average thickness of the plurality of internal electrode layers 15.

[0064] (internal dielectric layer 14)

[0065] The internal dielectric layer 14 is, for example, a dielectric ceramic containing Ba and Ti components, and contains Si. In addition, a dielectric ceramic in which a compound of Mn, a compound of Fe, a compound of Cr, a compound of Co, a compound of Ni, or the like is added in an amount smaller than the main components can also be used.

[0066] The number of sheets in which the internal dielectric layer 14 and the outer layer portion 22 are combined together is preferably 100 sheets or more and 2000 sheets or less.

[0067] The thickness of the internal dielectric layer 14 is preferably 0.4 μm or more and 0.5 μm or less, and more preferably 0.4 μm or more and 0.45 μm or less. In addition, as described above, the thickness of the internal dielectric layer 14 can also be obtained by measuring the thickness Da, Db, Dc, Dd, De of each internal dielectric layer 14 on each of the five straight lines La, Lb, Lc, Ld, Le and taking the average, as with the internal electrode layer 15.

[0068] (outer layer portion 22)

[0069] The outer layer portion 22 is a dielectric layer located on the both main surfaces A side of the laminate 2.

[0070] (side edge portion 21)

[0071] The side edge portion 21 is disposed on the both side surfaces B side of the laminate chip 10, that is, on the both side surfaces B side of the outer layer portion 22 and the inner layer portion 11, and covers the side surfaces B side of the outer layer portion 22 and the inner layer portion 11. A certain width range of the side surface B side of the laminate chip 10 is the side edge portion 21.

[0072] In this embodiment, the side edge portion 21 has a single-layer structure, but it is not limited to this and may have two or more layers. In addition, if the side edge portion 21 has multiple layers, it can be confirmed that there are multiple layers by using a dark-field optical microscope, and it can also be determined by the additives that segregate into the interlayer.

[0073] The thickness of the side edge portion 21 is preferably 5 μm or more and 20 μm or less. That is, the distance from the end of the width direction W of the inner electrode layer 15 to the side surface B of the laminate is preferably 5 μm or more and 20 μm or less.

[0074] (External electrode 3)

[0075] The external electrode 3 includes: a first external electrode 3A disposed on the first end face C1 of the laminate 2; and a second external electrode 3B disposed on the second end face C2 of the laminate 2. Furthermore, unless it is necessary to specifically distinguish between the first external electrode 3A and the second external electrode 3B in the description, they will be uniformly referred to as external electrode 3.

[0076] As described above, the end of the first lead 15Ab of the first inner electrode layer 15A is exposed on the first end face C1 and electrically connected to the first outer electrode 3A. Furthermore, the end of the second lead of the second inner electrode layer 15B is exposed on the second end face C2 and electrically connected to the second outer electrode 3B. Thus, the first outer electrode 3A and the second outer electrode 3B form a configuration where multiple capacitor elements are electrically connected in parallel.

[0077] The external electrode 3 includes a base electrode layer 31 and a plating layer 32 disposed on the base electrode layer 31. The plating layer 32 includes a Cu (copper) plating layer 321 disposed on the base electrode layer 31, a Ni (nickel) plating layer 322 disposed on the Cu plating layer 321, and a Sn (tin) plating layer 323 disposed on the Ni plating layer 322.

[0078] like Figure 2 As shown, the external electrode 3 covers not only end face C, but also a portion of end face C on the main surface A and side surface B. Specifically, whether the external electrode 3 is the entirety comprising the base electrode layer 31 and the plating layer 32, or in each of the base electrode layer 31 and the Cu plating layer 321, Ni plating layer 322, and Sn plating layer 323, the external electrode 3 not only has an end face P disposed on end face C, but also an outer peripheral face Q disposed on the main surface A and side surface B, and a ridge face R disposed between end face P and outer peripheral face Q. The ridge face R is the outer portion of the rounded curved surface in the laminate 2, including the ridge portion R1 containing the corners between end face C and main surface A, and between end face C and side surface B.

[0079] The outer electrode 3 has an outer peripheral portion 30S that surrounds a central portion 30M which is the center in the stacking direction T and the center in the width direction W, more protruding outward than the central portion 30M, regardless of the entire outer electrode 3 including the base electrode layer 31 and the plating layer 32 or the base electrode layer 31 alone. If the thickness of the central portion 30M is L1 and the thickness of the outer peripheral portion 30S is L2, L1 < L2. Preferably, L1 is 3 μm or more and 15 μm or less, and L2 is 5 μm or more and 20 μm or less.

[0080] (Central portion 30M)

[0081] The central portion 30M is the thinnest portion in the end surface portion P of the end surface C, regardless of the entire outer electrode 3 including the base electrode layer 31 and the plating layer 32 or the base electrode layer 31 alone. The central portion 30M can not be a point but a region including a certain range of the center in the stacking direction T and the center in the width direction W.

[0082] (Outer peripheral portion 30S)

[0083] The outer peripheral portion 30S is the thickest portion in the end surface portion P of the end surface C, regardless of the entire outer electrode 3 including the base electrode layer 31 and the plating layer 32 or the base electrode layer 31 alone. The outer peripheral portion 30S surrounds both sides in the stacking direction T and the width direction W of the central portion 30M in the end surface C, inward from the main surface A by a distance T1 in the stacking direction T and from the side surface B by a distance T1 in the width direction W. The outer peripheral portion 30S is the highest portion along the ridge line of the protruding portion of the central portion 30M in the end surface C. The distance T1 is preferably 5 μm or more and 20 μm or less, more preferably 15 μm.

[0084] Further, as shown in FIG. 1, the outer peripheral portion 30S is disposed at a position closer to the center in the stacking direction T than the inner electrode layer 15 closest to the main surface A. Figure 2

[0085] (Base electrode layer 31)

[0086] The base electrode layer 31 is a so-called fired-on electrode that is fired after the process of applying and drying the conductive paste described later is performed three times in the embodiment. Note that the base electrode layer 31 is fired at the same time as the inner electrode layer 15 in the embodiment, but is not limited thereto and can be fired after the inner electrode layer 15 is fired.

[0087] As described above, the outer peripheral portion 30S that surrounds the central portion 30M which is the center in the stacking direction T and the center in the width direction W protrudes more than the central portion 30M, with respect to the base electrode layer 31.

[0088] ​Further, the base electrode layer 31 has an end surface portion P disposed on the end surface C, an outer peripheral surface portion Q disposed on the main surface A and the side surface B, and a ridge surface portion R disposed between the end surface portion P and the outer peripheral surface portion Q.

[0089] Further, the portion of the base electrode layer 31 disposed on the outer peripheral surface portion Q includes, from the end surface C side toward the center of the length direction L, a first portion 311 having a first thickness t1, a second portion 312 having a second thickness t2, and a third portion 313 having a third thickness t3, in this order, and t1 > t2 > t3. Thus, the portion of the base electrode layer 31 disposed on the outer peripheral surface portion Q is provided with steps between the first portion 311 and the second portion 312 and between the second portion 312 and the third portion 313.

[0090] Further, the length of the first portion 311 in the length direction L is m1, the length of the second portion 312 in the length direction L is m2, and the length of the third portion 313 in the length direction L is m3, and m2 is shorter than m3 and m1.

[0091] That is, the second portion 312, which is the shortest in the length direction L, is surrounded by the first portion 311 and the third portion 313, which are longer in the length direction L, with the steps therebetween.

[0092] Further, Figure 3 The length W1 of the first portion 311 in the width direction W of the base electrode layer 31 illustrated in the drawing is 1.01 times or more the length W2 of the second portion 312 in the width direction W.

[0093] Further, as described above, the third portion 313 of the base electrode layer 31 has the thickness t3, but has a region V in which the thickness is thin at the boundary with the second portion 312.

[0094] The base electrode layer 31 includes a Cu region 31a in which Cu is the main component and a glass region 31b in which Si is the main component. The glass region 31b includes a Cu-containing glass region 31c containing Cu.

[0095] The Cu-containing glass region 31c is present on the outer surface side of the base electrode layer 31, that is, on the Cu plating layer 321 side. The Cu-containing glass region 31c is a region in which Cu has entered a Si low-density glass region in the base electrode layer 31, and the density of Si in the Si low-density glass region is lower than that in the glass region 31b present on the end surface C side.

[0096] The detection of the Cu region 31a in which Cu is the main component and the glass region 31b in which Si is the main component can be performed by EDX analysis (Energy Dispersive X-ray Analysis). The region in which silicon dioxide (glass) is detected by the EDX analysis is regarded as the glass region 31b in which Si is the main component. Further, in the region detected as the glass region 31b, the region in which Si is low in density and Cu is further detected is regarded as the Cu-containing glass region 31c which is the Si low-density glass region.

[0097] In the second portion 312 of the base electrode layer 31, which is in the portion of the outer peripheral surface portion Q of the base electrode layer 31, the glass region 31b protrudes from the surface and is recessed into the inside of the Cu plating layer 321 described later, which is disposed outside the base electrode layer 31.

[0098] (Cu plating layer 321)

[0099] The Cu plating layer 321 is formed so as to cover the surface of the base electrode layer 31 outside the base electrode layer 31.

[0100] The Cu plating layer 321 prevents a part of hydrogen generated by the process of Ni electrolytic plating in which the Ni plating layer 322 is formed on the Cu plating layer 321 from entering the inside of the laminate 2 through the base electrode layer 31 to reach the internal electrode layer 15. Thus, it is possible to reduce the amount of hydrogen contained in the multilayer ceramic capacitor 1, and therefore it is possible to suppress the diffusion of hydrogen to the internal dielectric layer 14 and to prevent the deterioration of the insulation resistance.

[0101] As described above, the base electrode layer 31 and the Cu plating layer 321 include the end surface portion P disposed at the end surface C, the outer peripheral surface portion Q disposed at the main surface A and the side surface B, and the ridge surface portion R disposed between the end surface portion P and the outer peripheral surface portion Q.

[0102] When the thickness of the central portion 30M of the portion of the Cu plating layer 321 extending along the end surface C is set to c1 and the thickness of the thinnest portion in the ridge surface portion R is set to c2, and the thickness of the central portion 30M of the portion of the base electrode layer 31 extending along the end surface C is set to u1 and the thickness of the thinnest portion in the ridge surface portion R is set to u2, c1-c2

[0103] Further, the thickness u2 of the base electrode layer 31 in the ridge surface portion R is thinner than the thickness c2 of the Cu plating layer 321 in the ridge surface portion R.

[0104] The ridge portion R of the base electrode layer 31 has a tendency to be thinned by polishing in the later-described drum process. If the base electrode layer 31 is thinned, the moisture resistance is deteriorated. However, in the embodiment, the Cu plating layer 321 is attached with a substantially uniform thickness throughout the entirety, and thus the sealing property can be ensured. With respect to the base electrode layer 31, if it is made to be further outside than the outer peripheral portion 30S of the thickness L2, the thickness is sharply reduced, and the thickness u2 of the thinnest portion in the ridge portion R becomes thinner than the thickness c2 of the Cu plating layer 321. In addition, the "thickness" is the length of the normal line drawn from the interface on the inside of each layer toward the interface on the outside.

[0105] (Ni plating layer 322)

[0106] The Ni plating layer 322 is formed so as to cover the surface of the Cu plating layer 321 on the outside of the Cu plating layer 321. The thickness of the Ni plating layer 322 is not particularly restricted, and is, for example, 3 μm to 5 μm.

[0107] The Ni plating layer 322 prevents solder corrosion of the base electrode layer 31 and the Cu plating layer 321 at the time of mounting the multilayer ceramic capacitor 1.

[0108] (Sn plating layer 323)

[0109] The Sn plating layer 323 is formed so as to cover the surface of the Ni plating layer 322 on the outside of the Ni plating layer 322. The thickness of the Sn plating layer 323 is also not particularly restricted, and is, for example, 3 μm to 5 μm.

[0110] The Sn plating layer 323 can improve the wettability of solder at the time of mounting the multilayer ceramic capacitor, and can be easily mounted.

[0111] In addition, the thickness Ll of the central portion 30M and the thickness L2 of the outer peripheral portion 30S in the external electrode 3, the distance Tl of the outer peripheral portion 30S from the outer periphery of the end surface C, the first thickness tl of the first portion 311, the second thickness t2 of the second portion 312, the third thickness t3 of the third portion 313, the length m3 of the third portion 313, the length m2 of the second portion 312, the length ml of the first portion 311, the length Wl of the first portion 311, the length W2 of the second portion 312, the thickness ul of the central portion 30M, the thickness u2 of the ridge portion R, the thickness cl of the central portion 30M, the thickness c2 of the ridge portion R, the thickness of the Ni plating layer 322, the thickness of the Sn plating layer 323, and the like in the external electrode 3 can be measured in the same manner as the measurement method of the thickness of the internal electrode layer 15.

[0112] That is, the length of a plurality of places can be measured by polishing the multilayer ceramic capacitor 1 to expose a given cross section, and magnifying it with a microscope or the like, and taking an average value.

[0113] Further, the step between the first portion 311 and the second portion 312 in the base electrode layer 31, the step between the second portion 312 and the third portion 313, and the like can be detected from the appearance. The glass region protruding in the second portion 312 can also be detected by a magnified image of a cross section exposed by polishing the cross section.

[0114] (Method for manufacturing laminated ceramic capacitor 1)

[0115] (Manufacturing process of raw material sheet S1)

[0116] Figure 5 is a flowchart illustrating a method for manufacturing a laminated ceramic capacitor 1.

[0117] First, a ceramic slurry for an internal dielectric layer containing a ceramic powder containing Ba and Ti components, a binder, a solvent, and Si is prepared.

[0118] The ceramic slurry is molded into a sheet shape on a placement film using a die coater, a gravure coater, a microgravure coater, or the like, thereby manufacturing a ceramic green sheet.

[0119] Next, a conductive paste containing Ni is printed by screen printing, inkjet printing, gravure printing, or the like on the ceramic green sheet so as to have a band-like pattern, thereby forming a conductive pattern. Thus, a raw material sheet on which the conductive pattern that becomes the internal electrode layer 15 is printed on the surface of the ceramic green sheet for an internal dielectric layer that becomes the internal dielectric layer 14 is manufactured.

[0120] Further, similarly to the ceramic slurry for an internal dielectric layer, a ceramic slurry for an outer layer portion containing a ceramic powder containing Ba and Ti components, a binder, a solvent, and Si is prepared. The ceramic slurry for an outer layer portion is molded into a sheet shape on a placement film using a die coater, a gravure coater, a microgravure coater, or the like, thereby manufacturing a ceramic green sheet for an outer layer portion.

[0121] (Laminating process S2)

[0122] Next, a plurality of raw material sheets are laminated. At this time, a plurality of raw material sheets are stacked so that the conductive patterns that become band-like are oriented in the same direction and the band-like conductive patterns are each offset by half a pitch in the width direction W between adjacent raw material sheets. Further, a ceramic green sheet for an outer layer portion that becomes the outer layer portion 22 is stacked on both sides of the plurality of raw material sheets that are laminated.

[0123] (Mother block cutting process S3)

[0124] Next, the mother block formed of the stacked raw material sheets and the ceramic green sheets for an outer layer portion that are overlapped on both sides thereof is cut to a given size, thereby manufacturing a plurality of laminated body pieces 10.

[0125] (Side edge portion ceramic green sheet adhesion step S4)

[0126] A ceramic slurry for a side edge portion containing a ceramic powder containing Ba and Ti components, a binder, a solvent, and Si is prepared. The ceramic slurry for a side edge portion is applied to the surface of the support film and dried to produce a ceramic green sheet for a side edge portion. Then, the ceramic green sheet for a side edge portion is peeled from the support film and placed so as to oppose the side surface B of the layered piece 10, and the ceramic green sheet for a side edge portion is adhered to the side surface B of the layered piece 10 by pressing and punching to produce the layered body 2 before firing.

[0127] (Base electrode material application step S5)

[0128] A paste for a base electrode is applied to both end surfaces C of the layered body 2 to which the ceramic green sheet for a side edge portion is adhered.

[0129] (Paste for a base electrode)

[0130] The paste for a base electrode is a conductive paste including a metal powder which is a Cu powder, a glass, a resin containing at least one of an ETHOCEL-based resin and an acrylic resin which are copolymerized in part, and a solvent.

[0131] The Cu powder is a particle containing at least one of Cu and a Cu alloy.

[0132] The glass contains Si and is in the form of a glass frit.

[0133] The ETHOCEL-based resin is, for example, at least one of ethyl cellulose, methyl cellulose, hydroxypropyl cellulose, trityl cellulose, acetyl cellulose, carboxymethyl cellulose, and nitrocellulose.

[0134] The acrylic resin is, for example, at least one of isobutyl methacrylate, methyl methacrylate, hydroxyethyl methacrylate, hydroxypropyl methacrylate, n-butyl methacrylate, and 2-ethylhexyl methacrylate.

[0135] The solvent contains, for example, at least one of terpineol, dihydroterpineol, dihydroterpineyl acetate, propylene glycol phenyl ether, benzyl alcohol,Ester alcohol, and butyl carbitol acetate.

[0136] The ETHOCEL-based resin and the acrylic resin are copolymerized in part. As an example, the OH group of the ETHOCEL-based resin is replaced with a vinyl group, and the ETHOCEL-based resin and the acrylic resin are combined via the replaced vinyl group.

[0137] The base electrode layer 31 is formed by repeating the process of dipping both end surfaces C of the laminate 2 in the paste for base electrode and then lifting and drying it 3 times in the embodiment.

[0138] Here, the paste for base electrode applied to the laminate 2 is thinner at the end portions than at the central portion, and thus the end portions are more easily dried. Therefore, the proportion of the resin in the paste for external electrode is higher at the end portions than at the central portion, and becomes unstable in energy, and thus a so-called Marangoni convection occurs in which the paste for external electrode flows from the central portion to the end portions.

[0139] The ETHOCEL-based resin has rigidity and high heat storage properties. Therefore, the paste for external electrode is prevented from solidifying midway through the flow in the drying process, and functions to promote the Marangoni convection. Therefore, by adjusting the amount of the ETHOCEL-based resin, it is possible to adjust the strength of the Marangoni convection, and to make the paste for external electrode take the shape in which the outer peripheral portion of the end surface C protrudes at the time of drying. With this protruding shape, a part corresponds to the outer peripheral portion 30S. In this way, by adjusting the amount of the ETHOCEL-based resin, it is possible to adjust the thickness LI of the central portion 30M and the thickness L2 of the outer peripheral portion 30S, and to adjust them so that LI < L2. Furthermore, by adjusting the amount of the ETHOCEL-based resin, it is also possible to adjust the distance Tl of the outer peripheral portion 30S from the outer periphery of the end surface C.

[0140] Furthermore, when the process of dipping both end surfaces C of the laminate 2 in the paste for base electrode and then lifting and drying it is repeated 3 times in the embodiment, the third portion 313 is formed by the first dipping. The dipping depth at this time is the depth that becomes m1+m2+m3. Next, when the second dipping is performed, the dipping depth is made shallower than the first dipping by m3. Then, when the third dipping is performed, the dipping depth is made shallower than the second dipping by m2. m2 is shorter than m3 and m1.

[0141] Thus, the third portion 313 having a length of m3 in the length direction L, the second portion 312 having a length of m2 in the length direction L, and the first portion 311 having a length of m1 in the length direction L are formed.

[0142] Then, in the outer peripheral surface portion Q of the base electrode layer 31, the first portion 311 of the first thickness tl, the second portion 312 of the second thickness t2, and the third portion 313 of the third thickness t3 are arranged in order from the end surface C side toward the central portion in the length direction L so that tl > t2 > t3. Then, the base electrode layer 31 in the outer peripheral surface portion Q forms steps between the first portion 311 and the second portion 312 and between the second portion 312 and the third portion 313.

[0143] (Firing process S6)

[0144] After the lamination 2 to which the base electrode paste is attached is subjected to debinding treatment in a nitrogen atmosphere at given conditions after drying, it is fired at a given temperature in a nitrogen-hydrogen-water vapor mixed atmosphere, thereby being sintered.

[0145] At this time, by adjusting the firing conditions, and the amounts of Cu powder, solvent, resin, glass, etc. contained in the base electrode paste, the glass region 31b is made to float on the surface of the base electrode layer 31.

[0146] Figure 6 is a view showing a state before the drum process, in which the base electrode layer 31 is sintered on the surface of the lamination 2. In Figure 6 In the state shown in

[0147] The glass region 31b preferably has a circle-equivalent diameter of 1 μm or less. This is because, if it exceeds 1 μm, a large amount of time will be taken for Cu plating to grow in the subsequent Cu plating process. Further, if it is 0.5 μm or less, sealing performance cannot be expected.

[0148] (Drum Process S7)

[0149] In the subsequent drum process S7, drum processing is performed in which, for example, the lamination 2 in which the base electrode layer 31 is formed and a medium are stirred in a stirring tank, whereby the medium collides against the surface of the base electrode layer 31 while grinding the surface of the base electrode layer 31. Figure 7 is a view showing a state after the lamination 2 shown in Figure 6 is subjected to drum processing.

[0150] If the medium collides against the surface of the base electrode layer 31, the glass region 31b protruding from the surface of the base electrode layer 31 becomes flat except for the second portion 312, the Cu region 31a is stretched, and the surface of the base electrode layer 31 becomes smooth. In Figure 7 The glass region 31b shown by reference numeral 31bb in

[0151] In Figure 7 , 31A shown by a dotted line is the profile of the base electrode layer 31 Figure 6 before the drum process S7. 31B shown by a solid line is the profile of the base electrode layer 31 after the drum processing. As illustrated, if the drum processing is performed, the outer peripheral portion of the base electrode layer 31 is ground by the medium. However, in the embodiment, in Figure 6In the state of the drum before the treatment, the outer peripheral portion of the end surface C of the base electrode layer 31 is in a protruding shape. In the drum process S7, in particular, the outer peripheral portion of the end surface C of the base electrode layer 31 is easily shaved, but since the outer peripheral portion is protruding, the possibility that the base electrode layer 31 is shaved entirely is low, and the laminate 2 is not exposed.

[0152] Further, the length m2 of the second portion 312 is shorter than the first portion 311 and the third portion 313, and is surrounded by the first portion 311 and the third portion 313 and the step. Therefore, the surface of the second portion 312 is less likely to collide with the medium, and the glass region 31b protruding from the surface in the second portion 312 is maintained in a state of protruding from the surface. In Figure 7 The glass region 31b shown by reference numeral 31ba is a glass region 31ba that is maintained in a state of protruding from the surface of the base electrode layer 31 even after the drum process S7. As such, the glass region 31ba that is maintained in a state of protruding from the surface remains more on the surface of the second portion 312, and thus a state in which the hardness of the surface is high is maintained, and the bending strength as the laminate ceramic capacitor 1 is increased.

[0153] (Cu plating layer forming process S8)

[0154] Next, the Cu plating layer 321 is formed on the base electrode layer 31. Here, the glass region 31b exposed on the surface of the base electrode layer 31, whether it is the glass region 31bb that is made flat in the drum process S7 or the glass region 31ba that is maintained in a state of protruding from the surface like the second portion 312 of the outer peripheral surface portion Q, contains Si at the same density as the glass region 31b contained in the inside of the base electrode layer 31 before Cu plating is performed.

[0155] However, in the Cu plating layer forming process S8, a part of the plating solution erodes the glass region 31ba and the glass region 31bb on the surface of the base electrode layer 31.

[0156] Therefore, the density of the glass, that is, Si, contained in the glass region 31ba and the glass region 31bb on the surface of the base electrode layer 31 decreases, a plurality of voids are generated, and thus the Si low-density glass region is generated. Cu contained in the Cu plating solution enters the inside of the voids, and thus the Si low-density glass region becomes the Cu-containing glass region 31c.

[0157] As such, Cu contained in the Cu plating solution enters the glass region 31ba and the glass region 31bb that become the Si low-density glass region, and thus the adhesion strength of the base electrode layer 31 and the Cu plating layer 321 is increased. Therefore, the Cu plating layer 321 can completely cover the base electrode layer 31 without a gap, and high sealing properties can be obtained.

[0158] Further, the glass region 31ba of the surface of the 2nd part 312 is not easily polished even in the drum process S7, and maintains a state of protruding more than the Cu region. Therefore, it sinks into the Cu plating layer 321, and the adhesiveness to the Cu plating layer 321 is improved.

[0159] (Ni plating layer forming process S9)

[0160] Next, the Ni plating layer 322 is formed to cover the surface of the Cu plating layer 321 on the outside of the Cu plating layer 321. The Ni plating layer 322 can prevent the base electrode layer 31 and the Cu plating layer 321 from being corroded by solder when the mounting multilayer ceramic capacitor 1 is mounted.

[0161] (Sn plating layer forming process S10)

[0162] The Sn plating layer 323 is formed to cover the surface of the Ni plating layer 322 on the outside of the Ni plating layer 322. The Sn plating layer 323 can improve the wettability of solder when the mounting multilayer ceramic capacitor is mounted, and can be easily mounted.

[0163] The above describes the embodiment of the present application, but is not limited to the embodiment, and various modifications can be made within the scope of the gist thereof.

Claims

1. A multilayer ceramic capacitor, comprising: A laminate, comprising alternating layers of internal electrode layers and internal dielectric layers, having main faces on both sides of the lamination direction, end faces on both sides of the length direction intersecting the lamination direction, and side faces on both sides of the width direction intersecting the lamination direction and the length direction; and Two external electrodes are respectively disposed on the end face of the laminate. The external electrode has: The central portion with thickness L1 is the center of both the stacking direction and the width direction; and An outer periphery of thickness L2 surrounds the central portion, where L1 < L2. The laminate has a base electrode layer. The base electrode layer has an outer peripheral surface disposed on the main surface and the side surface. The outer peripheral surface of the substrate electrode layer includes a first portion, a second portion, and a third portion starting from the end face of the substrate electrode layer. Steps are provided between the first part and the second part, and between the second part and the third part. The second part has more glass protruding from the base electrode layer compared to the first and third parts.

2. The multilayer ceramic capacitor according to claim 1, wherein, The outer periphery is a roughly rectangular region that surrounds the central portion at a distance of 5 μm or more but less than 20 μm from the outer periphery of the end face.

3. The multilayer ceramic capacitor according to claim 1 or claim 2, wherein, The outer periphery is a roughly rectangular region that surrounds the central portion at a distance of 15 μm from the outer periphery of the end face.

4. The multilayer ceramic capacitor according to claim 1 or claim 2, wherein, The L1 is greater than 3 μm and less than 15 μm. The L2 is greater than 5 μm and less than 20 μm.

5. The multilayer ceramic capacitor according to claim 1 or claim 2, wherein, The deviation of the end position of the side side between two adjacent internal electrode layers in the stacking direction is within 5 μm. The distance from the end of the inner electrode layer in the width direction to the side of the laminate is more than 5 μm and less than 20 μm.

6. The multilayer ceramic capacitor according to claim 1 or claim 2, wherein, The outer periphery with a thickness of L2 is the thickest part of the external electrode. Compared to the internal electrode layer closest to the main surface, it is disposed in the center in the stacking direction.

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