A gallium oxide stacked gate all-around field effect transistor and a method of manufacturing the same

Abstract

The application discloses a gallium oxide stacked full-surrounding gate field effect transistor and a preparation method thereof, and belongs to the field of semiconductor devices. The transistor mainly solves the problems of weak gate control ability, low on-off ratio and large threshold swing of the current gallium oxide MOS device. The transistor comprises, from bottom to top, an insulating substrate, a gallium oxide channel layer, a two-dimensional material dielectric layer and a gate surrounding the gallium oxide channel, an insulating layer and a repeated stacking structure above. The gate surrounding the channel is realized in the form of a peeled film, solving the problem of difficult process realization of the GAA structure. The four-side contact of the gate brings good channel control ability to the device. The application improves the on-off ratio of the device and can be used for manufacturing a gallium oxide MOSFET device with high switching characteristics.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of semiconductor devices, and particularly relates to a gallium oxide stacked gate-all-around field effect transistor and a preparation method thereof. BACKGROUND

[0002] As a new semiconductor material, gallium oxide has an ultra-wide band gap of 4.5eV-4.9eV, and thus has a high critical breakdown field strength of about 8MV / cm. Meanwhile, there are five crystal forms of gallium oxide crystals, i.e. alpha, beta, gamma, delta and epsilon, and the beta phase Ga2O3 is widely studied and applied due to its chemical stability and direct band gap. Considering the ultra-wide band gap, the critical breakdown field strength of 8MV / cm and the Baliga figure which is more than twenty times higher than that of traditional silicon material, gallium oxide devices are considered as a promising material in the field of power devices.

[0003] Although gallium oxide material has high theoretical material performance and relatively low production cost, it has not been widely used in practical applications. In the world, the factors hindering the large-scale application of gallium oxide include the difficulty in realizing p-type doping, the self-heating effect and heat dissipation problem of gallium oxide material itself with low thermal conductivity; in addition, in the implementation of devices in engineering, the production of enhancement mode devices faces great difficulties. The depletion of the gallium oxide channel is difficult to achieve in practice, and most of the existing enhancement mode implementation methods rely on the recessed gate formed by etching to produce devices. However, such implementation methods often have problems such as complex and difficult production process, obvious damage to the device after completion, unclear boundary, increased defect density, uncontrollable leakage channel and other problems; at the same time, the sinking of the gate can only improve the control ability of the gate on the Ga2O3 channel to a certain extent; the weak gate control ability also brings about the problems of reduced frequency response of the switch and sub-threshold swing, etc.

[0004] Under such background, the gate-all-around (GAA) device as a new structure device continuing the existing semiconductor technology route, the entire channel outline of GAA is completely wrapped by the gate, and compared with the traditional three-terminal surrounding channel, the four-side control of the full-enclosure structure means better gate control ability. GAA device has many advantages, and the superior performance in electrostatic performance is called "ultimate device", but there are difficulties such as difficult process implementation and complex production process. SUMMARY

[0005] The present application is directed to the problems of weak gate control ability of gallium oxide devices, difficulty in realizing enhancement mode, and difficulty in realizing device process, and provides a gallium oxide stacked full-surrounding gate field effect transistor which relies on exfoliation of two-dimensional materials and exfoliation of gallium oxide nanofilm stacking to build a full-surrounding gate, so as to reduce device damage and improve device performance.

[0006] To achieve the above object, the present application provides a gallium oxide stacked full-surrounding gate field effect transistor, comprising an insulating substrate (1), a source electrode (9) and a drain electrode (10) arranged on the insulating substrate (1), and a stacked full-surrounding gate structure arranged between the source electrode (9) and the drain electrode (10).

[0007] The stacked full-surrounding gate structure comprises a back gate (2), a first β-Ga2O3 channel layer (4), a first dielectric layer (3) surrounding the first β-Ga2O3 channel layer (4), a first top gate (5), a second β-Ga2O3 channel layer (7), a second dielectric layer (6) surrounding the second β-Ga2O3 channel layer (7), and a second top gate (8); the back gate (2) is arranged at the bottom of the stacked full-surrounding gate structure and connected with the edge of the first top gate (5) to surround the first dielectric layer (3); the second top gate (8) is arranged at the top of the stacked full-surrounding gate structure and connected with the edge of the first top gate (5) to surround the second dielectric layer (6).

[0008] The materials of the back gate (2), the first top gate (5) and the second top gate (8) are two-dimensional materials; and the channel material is Ga2O3 nanosheet or nanowire.

[0009] Further, the β-Ga2O3 crystal material of the first β-Ga2O3 channel layer (4) and the second β-Ga2O3 channel layer (7) has a doping concentration of 1×10 16 ~2×10 18 cm -3 and a thickness of 100nm~200nm.

[0010] Further, the back gate (2), the first top gate (5) and the second top gate (8) all adopt exfoliated graphene with a thickness of 5-20nm.

[0011] Further, the insulating substrate (1) is one of diamond, SiO2 / p + Si, sapphire or Fe-doped Ga2O3 insulating or semi-insulating substrate.

[0012] To achieve the above object, the present application further provides a preparation method of a gallium oxide full-surrounding gate stacked field effect transistor, specifically comprising the following steps:

[0013] Step s1: Preparation of β-Ga2O3 film. A β-Ga2O3 substrate material with a doping concentration of 1 x 10 16 ~2 x 10 18 cm -3 , a crystal direction of , was found to have a (100) crystal direction, found to have a (100) crystal direction, placed on a Nittro blue tape and repeatedly torn to obtain a β-Ga2O3 film, and the Ga2O3 film on the blue tape was transferred by PDMS glue, and the film material with a suitable thickness was selected under an optical microscope during the transfer;

[0014] Step s2: Pretreatment of substrate material. Select the target substrate, and treat the surface with acetone, isopropyl alcohol, and deionized water for 15 min, 15 min, and 5 min, respectively, and dry with nitrogen to obtain a clean substrate material;

[0015] Step s3: Preparation of h-BN two-dimensional material. Select h-BN crystals and place them on a blue tape, repeatedly tear the crystal material to obtain h-BN two-dimensional material, and then transfer it to PDMS glue, and use an optical microscope and an atomic force microscope to select and mark the h-BN two-dimensional material with a thickness of 15-60 nm;

[0016] Step s4: Preparation of transfer mold for transferring graphene. Use a mechanical solid transparent peeling with a thickness of about 2 μm, and adhere the adhesive side of the Pritt tape to the glass plate; then spin-coat 1 μm of a methacrylate copolymer dissolved in methyl isobutyl ketone (MIBK solvent), and then bake the transfer film at 120°C for 10 min to remove the MIBK solvent from the copolymer;

[0017] Step s5: Preparation and transfer of graphene nanofilm to the transfer mold. Use a mechanical peeling method to peel a certain number of layers of graphene nanofilm from a highly oriented pyrolytic graphite crystal, and then deposit the graphene nanofilm on the methacrylate copolymer layer prepared in the previous step;

[0018] Step s6: Transfer of graphene to the target substrate using the methacrylate copolymer transfer film. Place the substrate sample on a support, set the environmental temperature to 75-100°C, and then align the copolymer with the graphene nanofilm to the surface of the substrate, lower the mask on the polymer side to the heated substrate, and make the polymer contact the substrate surface and melt to adhere to the substrate.

[0019] Step s7: Removal of the copolymer attached to the substrate. After the transfer step is completed, soak the methacrylate polymer in acetone solution for 30 min, and then rinse with isopropyl alcohol to obtain a large-area transferred graphene nanofilm as the bottom gate of the GAA device;

[0020] Step s8: Transfer the h-BN two-dimensional material. The prepared h-BN two-dimensional material is dry-transferred to the substrate sheet with the graphene nanofilm using a transfer platform;

[0021] Step s9: Fabricate the gallium oxide channel layer. The prepared β-Ga2O3 is transferred to the substrate above the h-BN two-dimensional material using PDMS glue under an optical microscope to select an appropriate size;

[0022] Step s10: Transfer the gate medium and graphene gate to the channel layer. After confirming the thickness of the 20 nm h-BN two-dimensional material, the h-BN is contacted with the target substrate after aligning the position of the mark and is left for 5 min, and the h-BN gate medium is deposited above the channel layer. Then, the transfer film is adhered to the substrate under the condition that the temperature is set to 80°C using the methacrylate polymer transfer mold with a mechanically peeled 20 nm thick graphene nanofilm. After cooling, the methacrylate polymer is removed by soaking and flushing with acetone and isopropyl alcohol, respectively, and the fabrication of a full-encircling gate structure is completed;

[0023] Step s11: Transfer the h-BN two-dimensional material to the top gate. The 50 nm h-BN two-dimensional material is selected and transferred to the first layer of full-encircling structure of the bottom gate-gate medium-channel-medium-top gate of the device using a transfer platform;

[0024] Step s12: Fabricate the second layer of full-encircling gate. The above steps (9)-(10) are repeated to build a layer of the same repeated stack structure on the basis of the full-encircling gate device of the single-layer gallium oxide channel;

[0025] Step s13: Transfer the metal electrode and anneal to form ohmic contact. The evaporated Au / Ti 20:80 nm metal electrode is transferred, and then annealed at 480°C for 60 min in an N2 atmosphere to form a good ohmic contact, and the device fabrication is completed.

[0026] Further, in the step s1 of preparing the β-Ga2O3 film, the β-Ga2O3 crystal has an n-type doping type, and the doping concentration is 1×10 16 ~2×10 18 cm -3 , and the thickness is 100 nm-200 nm.

[0027] Further, in the step s13 of transferring the source and drain metal electrodes and annealing to form ohmic contact, the metal electrode fabrication method uses the method of transferring after evaporation using a transfer tape, or the electrodes are fabricated on the substrate material using photolithography, and then the stacked device is built.

[0028] Further, the step s6 of transferring the graphene nanofilm into the target substrate is achieved by a transfer mode of a methyl methacrylate copolymer, a tape and a mechanical transparent glass, the graphene thin film is attached to the target substrate together with the transfer mode, and then the copolymer is dissolved and washed away to obtain a high-integrity graphene nanofilm.

[0029] The present application has the following advantages:

[0030] 1. The gallium oxide stacked full-surrounding gate field effect transistor is based on the existing back-gate field effect transistor, combined with a two-dimensional material nanolayer, stacked to form a nanolayer full-surrounding gate device, effectively enhancing the control ability of the gate to the channel, increasing the current on-off ratio of the device, and optimizing the electrostatic characteristics of the device; the control of the four-channel optimizes the switching characteristics of the device and reduces the subthreshold swing.

[0031] 2. In the preparation method of the gallium oxide full-surrounding gate field effect transistor, the mechanical exfoliation method is used to prepare the gallium oxide channel layer and the two-dimensional material nanolayer, which is simple to operate, low in cost, and high in lattice integrity and film quality compared with the multiple selective etching and epitaxial growth of the conventional prior art; the prepared film can be selected from the prepared sample to select a film material with appropriate thickness for device production, and the operation of transferring to the substrate is simple and easy to implement.

[0032] 3. The graphene electrode used in the preparation method of the gallium oxide full-surrounding gate field effect transistor has the advantages of being combined with other two-dimensional materials and nanometer gallium oxide channels as gate dielectric and wrapping the channel; at the same time, graphene has excellent electrical conductivity and the unique advantage of adjustable energy band, and forms a potential barrier with the contact material to control the channel carriers.

[0033] 4. The preparation method used in the present application can complete the process production on any substrate, and can prepare the device on a diamond substrate to solve the problems of low thermal conductivity and poor heat dissipation of gallium oxide. BRIEF DESCRIPTION OF DRAWINGS

[0034] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative labor.

[0035] Figure 1 It is a structure schematic diagram of the gallium oxide stacked full-surrounding gate field effect transistor.

[0036] Figure 2 It is a channel direction cross-sectional view of the gallium oxide stacked full-surrounding gate field effect transistor.

[0037] The components are: 1. Insulating substrate; 2. Back gate; 3. First dielectric layer; 4. First β-Ga2O3 channel layer; 5. First top gate; 6. Second dielectric layer; 7. Second β-Ga2O3 channel layer; 8. Second top gate; 9. Source electrode; 10. Drain electrode. Detailed Implementation

[0038] The technical solution of the present invention will be clearly and completely described below with reference to the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0039] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other.

[0040] Unless otherwise specified, the experimental methods described in the following examples are conventional methods; the reagents and materials described are commercially available unless otherwise specified.

[0041] The following describes the fully surrounding gate gallium oxide stacked field-effect transistor and its fabrication process in further detail with reference to the accompanying drawings.

[0042] Please see Figure 1 and Figure 2 The gallium oxide stacked all-around gate field-effect transistor of the present invention comprises an insulating substrate, source and drain electrodes, a source electrode 9 and a drain electrode 10 disposed on the insulating substrate 1, and a stacked all-around gate structure disposed between the source electrode 9 and the drain electrode 10; the stacked all-around gate structure comprises a back gate 2, a first β-Ga2O3 channel layer 4, a first dielectric layer 3 surrounding the first β-Ga2O3 channel layer 4, a first top gate 5, a second β-Ga2O3 channel layer 7, a second dielectric layer 6 surrounding the second β-Ga2O3 channel layer 7, and a second top gate 8; the back gate 2 is disposed at the bottom of the stacked all-around gate structure and is connected to the edge of the first top gate 5 surrounding the first dielectric layer 3; the second top gate 8 is disposed at the top of the stacked all-around gate structure and is connected to the edge of the first top gate 5 surrounding the second dielectric layer 6; the β-Ga2O3 crystal material used has a doping concentration of 1×10⁻⁶. 16 ~2×10 18 cm -3 The thickness is 100nm~200nm; the insulating substrate 1 is diamond, SiO2 / p +The gate dielectric is one of Si, sapphire, or Fe-doped Ga2O3; it is located between the gallium oxide channel and the gate, and is made of exfoliated hexagonal boron nitride to achieve high dielectric performance and meet the requirements of device fabrication; the gate in the all-around structure is made of graphene material, which is obtained by exfoliation and has a thickness of 5-20 nm. It completely wraps around the two channel layers, making the gate voltage sensitive to the switching of the channel, and has good electrostatic characteristics and a lower subthreshold swing in the subthreshold region when turned off, thereby improving the switching ratio of the device.

[0043] Example 1

[0044] The fabrication method of a gallium oxide stacked all-around gate field-effect transistor using a transferred metal electrode is as follows:

[0045] Step 1: Preparation of β-Ga2O3 thin films

[0046] Choose a doping concentration of 1.8 × 10⁻⁶ 17 cm -3 of A β-Ga₂O₃ single crystal substrate with an n-type crystal orientation was prepared and then ultrasonically cleaned for 5 minutes each in acetone solution, anhydrous ethanol, and deionized water, and then dried with nitrogen gas. The (100) crystal orientation with weaker bonding of the gallium oxide single crystal was found, and the cleaned β-Ga₂O₃ single crystal was cleaved along the (100) direction using tweezers or a blade to obtain a micron-sized β-Ga₂O₃ thin film. The prepared micron-sized β-Ga₂O₃ thin film was bonded to an adhesive tape. The adhesive tape containing the micron-sized β-Ga₂O₃ thin film was folded and bonded multiple times. After the two layers of adhesive tape were bonded, the material could be squeezed from one side to remove air bubbles. Through multiple mechanical peeling, a β-Ga₂O₃ thin film with a thickness of nanometer scale was obtained and adhered to a transfer tape for later use.

[0047] Step 2: Clean SiO2 / p + Si insulating substrate

[0048] Select SiO2 / p + A Si insulating substrate, wherein the SiO2 layer is 270 nm thick, is immersed in acetone solution for 8 hours, and then rinsed with isoacetone and deionized water for 5 min each to remove organic contaminants. After that, it is dried with nitrogen to obtain a target substrate with good interface.

[0049] Step 3: Peel off the h-BN two-dimensional material dielectric layer

[0050] Select h-BN crystal on the blue tape repeatedly tear the crystal material to obtain h-BN nanoscale film, then cut a small piece of transparent PDMS glue from the blue tape to stick the h-BN two-dimensional material on the electron microscope to find the film with a thickness of nanometer, mark the position after determination and select the film with a thickness of 20 nm by atomic force microscope AFM.

[0051] Step 4: making graphene transfer mold

[0052] Use a mechanical solid transparent glass with a thickness of 2 μm, and adhere the adhesive side of the Pritt tape to the glass plate; then spin-coat 1 μm of a methacrylate copolymer dissolved in methyl isobutyl ketone solution (MIBK solvent), and then bake the transfer film at 120°C for 10 min to remove the MIBK solvent from the copolymer. Obtain a glass-methacrylate copolymer transfer mold.

[0053] Step 5: exfoliate and transfer graphene nanofilm to the transfer mold

[0054] Use the mechanical exfoliation method to repeatedly tear the highly oriented pyrolytic graphene using the blue tape to obtain a nanoscale graphene film layer. After transfer to the PDMS glue, use an optical microscope and an atomic force microscope to select a graphene layer with a thickness of about 5 nm, and deposit the exfoliated graphene film on the methacrylate copolymer transfer mold for subsequent transfer.

[0055] Step 6: transfer graphene film to the target substrate using methacrylate copolymer

[0056] Place the substrate sample containing h-BN on a support, set the ambient temperature to 75-100°C, then align the copolymer with graphene sheets to the surface of the substrate, lower the mask on the polymer side to the heated substrate, and make the polymer contact the substrate surface and melt and adhere to the substrate. Obtain a substrate-bottom gate-copolymer structure with a graphene bottom gate.

[0057] Step 7: remove the methacrylate attached to the substrate

[0058] Soak the substrate-bottom gate-copolymer structure in acetone solution for 30 min to remove the methacrylate polymer, then rinse with isopropyl alcohol to obtain a large-area transferred graphene nanosheet as the bottom gate of the GAA device.

[0059] Step 8: transfer h-BN dielectric layer

[0060] The thickness of the h-BN two-dimensional material peeled off in step 5 is confirmed to be 20 nm by an atomic force microscope before being transferred using a transfer tape. The air pump is turned on, the substrate and a clean glass sheet are adsorbed, and the material is placed on the transfer platform. After aligning the target substrate with the marked position, the knob is slowly adjusted to make the h-BN contact the target substrate. After waiting for 5 minutes, the knob is slowly adjusted to separate the substrate and the target substrate. It is ensured that the h-BN is well attached between the graphene gate under the action of van der Waals force, and a transistor bottom gate structure is obtained.

[0061] Step 9: Transfer of β-Ga2O3 film

[0062] The β-Ga2O3 film on the blue tape is transferred using PDMS glue. Under an optical microscope, the material has a thickness of about 100 nm and is uniformly thin. The transfer platform cantilever is slowly lowered to the area above the insulating substrate where the back gate and gate dielectric have been deposited. A pressure of 1200 g / cm2 is applied to the adhesive tape area, and after 40 seconds, the tape is peeled off, transferring the nano β-Ga2O3 film to the substrate and h-BN dielectric, obtaining a full-encircling gate channel.

[0063] Step 10: Transfer of gate dielectric and graphene gate above the channel layer

[0064] The same process in step 8 is used to confirm the thickness of the h-BN nanolayer to be 20 nm. After aligning the marked position, the knob is slowly adjusted to make the h-BN contact the target substrate. After waiting for 5 minutes, the knob is slowly adjusted to separate the substrate and the target substrate. The h-BN gate dielectric is deposited above the channel layer. Then, the methacrylate polymer with a mechanically peeled 20 nm thick graphene material is again used to cover the gallium oxide channel and gate dielectric. The polymer covers part of the gate dielectric and has a certain area of contact with the bottom gate. Then, the transfer film is placed close to the sample at a substrate temperature of 80°C, allowing the copolymer to adhere to the substrate. After cooling, the methacrylate polymer is removed by soaking and rinsing with acetone and isopropyl alcohol, respectively, completing the fabrication of a full-encircling gate structure.

[0065] Step 11: Transfer of h-BN gate dielectric to the top gate

[0066] First, the h-BN thin film material on the transfer glue is observed using an atomic force microscope. The h-BN two-dimensional material with an area sufficient to cover the graphene gate and a thickness of about 50 nm is found. Then, the transfer platform aligner is used to align the device fabrication area. The mechanical cantilever is slowly lowered to the surface to adhere. A pressure is applied to transfer the h-BN to the first full-encircling structure of the bottom gate-gate dielectric-channel-dielectric-top gate of the device, obtaining a dielectric layer that isolates the upper and lower channels.

[0067] Step 12: Fabrication of the second layer of full-encircling gate

[0068] Repeat steps 9-10 above, and build a layer of the same repeating stack on top of the GAA device with a single layer of gallium oxide channel. Use the transfer platform to slowly place the PDMS with the β-Ga2O3 film layer on top of the area of the insulating substrate where the back gate and gate dielectric have been deposited, apply pressure to the adhesive tape area, and after 40 seconds, peel off the tape. Then, align the 20 nm thick h-BN determined by atomic force microscopy to be in contact with the gallium oxide channel layer 2 using the transfer platform, wait for 5 minutes, and then slowly separate the slide and the tape to obtain the gate dielectric covering the channel. Again, cover the gallium oxide channel and the gate dielectric with the methacrylate polymer with mechanically exfoliated graphene material, and set the substrate temperature to 80°C. Place the transfer film next to the sample so that the copolymer adheres to the substrate. After cooling, soak and rinse with acetone and isopropanol to remove the methacrylate polymer, and obtain the second layer of gallium oxide full wrap-around structure.

[0069] Step 13: Transfer of metal electrode and formation of ohmic contact

[0070] Transfer the evaporated Ti / Au metal electrode to the substrate material and the gallium oxide channel, and the top gate and back gate using the transfer platform, and the graphene material in contact with each other. Place the device with the completed electrode into an annealing instrument, set the annealing temperature to 480°C, and anneal for 60 minutes in an N2 atmosphere to form a good ohmic contact between the metal electrode and the material, and complete the device.

[0071] Example Two

[0072] The gallium oxide stacked full wrap-around gate field effect transistor with a metal electrode produced using a photolithography process has the following steps in the preparation method:

[0073] Step 1: Preparation of β-Ga2O3 film

[0074] Select a β-Ga2O3 single crystal substrate with a doping concentration of 1.8 x 10 17 cm -3 n-type β-Ga2O3 single crystal substrate, and then sequentially ultrasonically clean it in acetone solution, anhydrous ethanol, and deionized water for 5 minutes each, and then dry it with nitrogen. Find the (100) crystal orientation of the β-Ga2O3 single crystal with weak bonding, and use tweezers or a blade to cleave the cleaned β-Ga2O3 single crystal in the (100) direction to obtain a micron-sized β-Ga2O3 film. Adhere the prepared micron-sized β-Ga2O3 film to the adhesive tape, fold the adhesive tape with the micron-sized β-Ga2O3 film multiple times, and press the material on one side to remove air bubbles after the two layers of adhesive tape are attached. Obtain a nanometer-thick β-Ga2O3 film adhered to the transfer tape by multiple mechanical exfoliations.

[0075] Step 2: cleaning SiO2 / p + Si insulating substrate sheet

[0076] Select SiO2 / p + Si insulating substrate sheet, wherein the thickness of the SiO2 layer is 270 nm, is immersed in an acetone solution for 8 hours, then is washed with isopropyl alcohol and deionized water for 5 minutes, respectively, to remove organic contaminants, and then is dried with nitrogen to obtain a target substrate with a good interface.

[0077] Step 3: photoetching process to make substrate cross mark array

[0078] First, the photoresist is uniformly coated on the cleaned substrate using a spin coater, and then the substrate is placed on a heating table for 100°C, 90s pre-baking; the substrate after pre-baking to eliminate bubbles is placed in a photoetching machine for exposure, adjusting the photoetching machine to Hard contact mode for 1.2s exposure. Then the substrate is developed for 40s using a developing solution. When using NMD-3 developing solution, attention should be paid to that the device cannot be exposed to yellow light.

[0079] Step 4: metal electrode evaporation

[0080] The developed substrate is placed in an e-beam for evaporation, and the evaporation metal is 10 / 80nm Ti / Au electrode as the source-drain electrode of the device; then the device is placed in an acetone solution for metal stripping, and ultrasonic is used in the ultrasonic machine during the stripping process to quickly complete the stripping. A plurality of source-drain metal electrode groups with different spacings are made on the same substrate material at one time, including 20μm, 30μm, 40μm, 50μm, to facilitate the selection of appropriate spacing according to the size of the stripped material.

[0081] Step 5: stripping h-BN two-dimensional material dielectric layer

[0082] Select h-BN crystal and place it on the blue tape, repeatedly tear the crystal material to obtain h-BN two-dimensional material, then cut a small piece of transparent PDMS glue to stick the h-BN film from the blue tape and place it under an electron microscope to find the film with a thickness of nanometers, mark the h-BN position after determination and select the film with a thickness of 20nm using atomic force microscope AFM.

[0083] Step 6: making graphene transfer mold

[0084] A mechanical solid transparent glass with a thickness of 2μm is used, and the adhesive surface of the Pritt tape is attached to the glass plate; then 1μm of methyl methacrylate copolymer dissolved in methyl isobutyl ketone solution (MIBK solvent) is spin-coated, and then the transfer film is baked at 120°C for 10min to remove the MIBK solvent from the copolymer. A glass-methyl methacrylate copolymer transfer mold is obtained.

[0085] Step 7: Peeling and transferring graphene film to transfer mold

[0086] Using mechanical exfoliation method, nanometer scale graphene film layers were obtained by repeatedly peeling and tearing highly oriented pyrolytic graphite with blue tape. After transferring to PDMS glue, the graphene layer with a thickness of about 5 nm was selected by optical microscope and atomic force microscope, and the exfoliated graphene film was deposited on the methacrylate copolymer transfer mold.

[0087] Step 8: Transferring graphene film to target substrate using methacrylate copolymer

[0088] The substrate sample containing boron nitride was placed on a support, the ambient temperature was set to 75-100°C, and the source-drain metal electrode group with a pitch of 40 μm prepared in step 4: metal electrode evaporation was selected. Then the copolymer with graphene sheet was aligned to the selected metal electrode group, the mask on the polymer side was lowered onto the heated substrate, and the polymer was contacted with the substrate surface and melted to adhere to the substrate. A substrate-bottom gate-copolymer structure with graphene bottom gate was obtained.

[0089] Step 9: Removing methacrylate attached to the substrate

[0090] The substrate-bottom gate-copolymer structure was soaked in acetone solution for 30 min to remove the methacrylate polymer, and then washed with isopropanol to obtain a large-area transferred graphene sheet as the bottom gate of the GAA device.

[0091] Step 10: Transferring h-BN dielectric layer

[0092] The h-BN two-dimensional material peeled off in step 5 was transferred using a transfer tape. The thickness of the layer was confirmed to be 20 nm by atomic force microscope before transfer. The air pump was turned on, the carrier and clean glass sheet were adsorbed, and the material was placed down on the transfer platform. After aligning the target substrate to the marked position, the knob was slowly adjusted to make the h-BN contact with the target substrate. After waiting for 5 min, the knob was slowly adjusted to separate the carrier and the target substrate, ensuring that the h-BN was well attached between the graphene gate under the action of van der Waals force. A transistor bottom gate structure was obtained.

[0093] Step 11: Transferring β-Ga2O3 film

[0094] The β-Ga2O3 film on the blue tape was transferred with PDMS glue. Under the optical microscope, the material with a thickness of about 100 nm and uniform thickness was slowly attached to the area above the deposited back gate and gate dielectric on the insulating substrate using the cantilever beam of the transfer platform. A pressure of 1200 g / cm2 was applied to the adhesive tape part, and after 40 s, the tape was peeled off, transferring the nano β-Ga2O3 film to the substrate and boron nitride dielectric.

[0095] Step 12: Transferring gate dielectric and graphene gate over the channel layer

[0096] By the same process in step 8, the thickness of the h-BN two-dimensional material is confirmed to be 20 nm by atomic force microscopy. After aligning the position of the mark, slowly adjust the knob to make the h-BN contact the target substrate, wait for 5 min, slowly adjust the knob to separate the carrier and the target substrate, and deposit hexagonal boron nitride gate dielectric over the channel layer. Then, again use the methyl methacrylate polymer with mechanically exfoliated graphene material of 20 nm thickness to cover the gallium oxide channel and the gate dielectric, keep the graphene covered part of the gate dielectric and have a certain area of contact with the bottom gate, then set the substrate temperature at 80°C, and place the transfer film close to the sample, so that the copolymer adheres to the substrate. After cooling, soak and rinse with acetone and isopropanol respectively to remove the methyl methacrylate polymer, and complete the fabrication of a layer of GAA structure.

[0097] Step 13: Transferring h-BN gate dielectric to the top gate

[0098] First, use atomic force microscopy to observe the h-BN thin film material on the transfer glue, find the h-BN two-dimensional material with an area sufficient to cover the graphene gate and a thickness of about 50 nm, then use the transfer platform to align the device fabrication area, slowly lower the mechanical cantilever to the surface, apply pressure to transfer the boron nitride to the first layer of full-encircling structure of the device, which is the bottom gate-gate dielectric-channel-dielectric-top gate.

[0099] Step 14: Fabricating the second layer of stacked full-encircling gate

[0100] Repeat steps 9-10 above to build another layer of the same repeated stacked structure on the basis of the single-layer gallium oxide channel GAA device. Use the transfer platform to slowly place the PDMS with the β-Ga2O3 thin film layer close to the area above the insulating substrate where the back gate and gate dielectric have been deposited, apply pressure to the adhesive tape area, and after 40 s, peel off the tape. Then, align the 20 nm thick h-BN determined by atomic force microscopy to contact the gallium oxide channel layer 2 through the transfer platform, wait for 5 min, slowly separate the carrier and the tape to obtain the gate dielectric covering the channel, and then again cover the methyl methacrylate polymer with mechanically exfoliated graphene material on the gallium oxide channel and the gate dielectric. Set the substrate temperature at 80°C, place the transfer film close to the sample, and make the copolymer adhere to the substrate. After cooling, soak and rinse with acetone and isopropanol respectively to remove the methyl methacrylate polymer, and obtain the second layer of gallium oxide full-encircling structure.

[0101] Step 15: Annealing to form ohmic contact

[0102] The prepared gallium oxide laminated full-encircling gate field effect tube is placed into an annealing instrument, an annealing temperature is set as 480 ℃, annealing is performed for 60 min under N2 atmosphere, so that the metal electrode and the material form a good ohmic contact, and the device is completed.

[0103] The above merely illustrates and describes the structure of the present application, and those skilled in the art can make various modifications or supplements to the described specific embodiments or adopt similar ways to replace, as long as the modifications or supplements do not deviate from the structure of the present application or exceed the range defined by the present application, and all of them shall belong to the protection scope of the present application.

Claims

1. A method for fabricating a gallium oxide stacked gate all-around gate field effect transistor, the method comprising: Specifically comprising the following steps: ​ Step s1: Preparation of β-Ga2O3 film; β-Ga2O3 substrate material is repeatedly torn to obtain β-Ga2O3 film, and then the β-Ga2O3 film is transferred by PDMS glue; Step s2: Pretreatment of substrate material; the surface of the target substrate is treated to obtain a substrate material with a clean surface; Step s3: Preparation of h-BN two-dimensional material; Select h-BN crystal and repeatedly tear it, transfer the obtained nanoscale h-BN two-dimensional material to the PDMS glue, select and mark the h-BN two-dimensional material with a thickness of 15-60 nm; Step s4: Preparation of transfer mold for transferring graphene; use transparent glass, and paste the adhesive side of the Pritt tape to the glass; spin coat methacrylate copolymer dissolved in methyl isobutyl ketone solution, and the solvent of the methyl isobutyl ketone solution is MIBK solvent; bake the transfer film to remove the MIBK solvent from the copolymer; Step s5: Preparation and transfer of graphene nanofilm to the transfer mold; Use a mechanical exfoliation method to exfoliate a certain number of graphene layers, and deposit the graphene layers on the methacrylate copolymer layer; Step s6: Transfer of graphene nanofilm to the target substrate; place the substrate sample on a support, align the copolymer with the graphene nanofilm to the substrate surface, lower the mask on the copolymer side to the heated substrate, and make the copolymer contact the substrate surface and melt to adhere to the substrate; Step s7: Remove the copolymer attached to the substrate; remove the methacrylate copolymer, then rinse with isopropyl alcohol, and obtain a large-area transferred graphene nanofilm as a bottom gate; Step s8: Transfer of h-BN two-dimensional material; use the transfer platform to transfer the prepared h-BN two-dimensional material to the substrate sheet with the graphene nanofilm; Step s9: Fabrication of β-Ga2O3 channel layer; in the transfer platform, select a β-Ga2O3 film of appropriate size, and transfer the stack to the top of the h-BN two-dimensional material; Step s10: Transfer of gate dielectric and graphene gate to the top of the channel layer; contact the h-BN two-dimensional material with the target substrate and stand still, deposit h-BN gate dielectric on the channel layer, then adhere the transfer film with the graphene nanofilm to the substrate close to the sample, and after cooling, soak and rinse to remove the methacrylate copolymer, and complete the fabrication of a full-encircling gate structure; Step s11: Transfer of h-BN two-dimensional material to the top gate; select h-BN two-dimensional material, and use the transfer platform to transfer it to the top of the first full-encircling structure of the bottom gate-gate dielectric-channel-dielectric-top gate of the device; Step s12: Fabrication of second layer of full-encircling gate; repeat the steps s9 and s10 to build a layer of the same repeated stack structure on the basis of the full-encircling gate device of the single-layer β-Ga2O3 channel; Step s13: Transfer of source and drain metal electrodes and annealing to form ohmic contact; transfer the evaporated Au / Ti metal electrodes, and then perform annealing to form a good ohmic contact.

2. The method of claim 1, wherein: The β-Ga2O3 film in the step s1 is of n type, with a doping concentration of 1×10 16 2×10 18 cm -3 -3 and a thickness of 100-200 nm.

3. The method of claim 1, wherein: The step s13, the metal electrode manufacturing method adopts evaporation and then uses transfer tape transfer method, or uses photoetching method to manufacture electrode on the substrate material, and then builds the laminated device.

4. The method of claim 1, wherein: In the step s6, the transfer mode is realized by the transfer mode composed of methyl methacrylate copolymer, adhesive tape and transparent glass, the graphene film and the transfer mode are attached to the target substrate, and then the copolymer is dissolved and washed to obtain a high-integrity graphene nanofilm.

5. A gallium oxide stacked all-around gate field effect transistor, prepared by the method of any one of claims 1-4, characterized in that: The application relates to a graphene transistor, comprising an insulating substrate (1), a source electrode (9) and a drain electrode (10) arranged on the insulating substrate (1), and a laminated full-encircling gate structure arranged between the source electrode (9) and the drain electrode (10). The laminated full-encircling gate structure comprises a back gate (2), a first beta-Ga2O3 channel layer (4), a first dielectric layer (3) surrounding the first beta-Ga2O3 channel layer (4), a first top gate (5), a second beta-Ga2O3 channel layer (7), a second dielectric layer (6) surrounding the second beta-Ga2O3 channel layer (7), and a second top gate (8); the back gate (2) is arranged at the bottom of the laminated full-encircling gate structure and is connected with the edge of the first top gate (5) to surround the first dielectric layer (3); and the second top gate (8) is arranged at the top of the laminated full-encircling gate structure and is connected with the edge of the first top gate (5) to surround the second dielectric layer (6). The materials of the back gate (2), the first top gate (5) and the second top gate (8) are two-dimensional materials; and the materials of the first beta-Ga2O3 channel layer (4) and the second beta-Ga2O3 channel layer (7) are Ga2O3 nanosheets or nanowires.

6. The transistor of claim 5, wherein: The first β-Ga2O3 channel layer (4) and the second β-Ga2O3 channel layer (7) are β-Ga2O3 crystal materials, the doping concentration is 1×10 16 2×10 18 cm -3 , and the thickness is 100nm~200nm.

7. The transistor of claim 5, wherein: The back gate (2), the first top gate (5) and the second top gate (8) all adopt exfoliated graphene, and the thickness is 5-20 nm.

8. The transistor of claim 5, wherein: The insulating substrate (1) is one of diamond, SiO2 / p + Si, sapphire, Fe-doped Ga2O3 insulating substrate or Fe-doped Ga2O3 semi-insulating substrate.

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