A method and circuit for converting PWM signals to analog signals

Abstract

This invention provides a method and circuit for converting a PWM signal to an analog signal. It includes: generating a reference signal based on the phase difference between the PWM signal and a feedback signal; comparing the reference signal with an analog signal of the PWM signal to adjust the phase and frequency of the feedback signal, ensuring that the feedback signal and the PWM signal have consistent phase and frequency; comparing the PWM signal with the feedback signal, and converting the PWM signal into an analog signal based on the comparison result. This invention achieves error self-calibration, has a simple circuit structure, makes error reduction relatively easy, solves the ripple problem in existing technologies, and improves accuracy and linearity.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit design, and in particular to a method and circuit for converting PWM signals to analog signals. Background Technology

[0002] In circuit design, loop designs often result in significant ripple in the output analog signal, sometimes reaching 10%, leading to inaccuracy. Furthermore, the comparator module in a loop, due to its analog circuit structure, becomes overly reliant on process precision and circuit layout, introducing substantial errors and impacting overall circuit accuracy. Secondly, while RC filters are typically used to eliminate ripple in loop designs, they increase the overall circuit area. Finally, without a loop design, the final output analog signal suffers from the cumulative errors of each circuit stage, resulting in a substantial decrease in circuit accuracy, which cannot be effectively compensated for even with added accuracy adjustment units. Summary of the Invention

[0003] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a method and circuit for converting PWM signals into analog signals, which solves the problem in the prior art that the circuit generates ripple due to changes in the frequency and duty cycle of the input PWM signal, thereby affecting the large error and low accuracy of the generated analog signal.

[0004] To achieve the above and other related objectives, the present invention provides a method for converting a PWM signal to an analog signal, the method comprising at least:

[0005] A reference signal is generated based on the phase difference between the PWM signal and the feedback signal. The reference signal is adjusted according to the phase difference to make the phase and frequency of the reference signal consistent with those of the PWM signal. The feedback signal is generated based on the comparison result between the analog signal of the PWM signal and the reference signal.

[0006] The PWM signal is compared with the feedback signal, and the analog signal of the PWM signal is obtained based on the comparison result.

[0007] Optionally, the method for generating the reference signal includes: obtaining the phase difference between the PWM signal and the feedback signal through phase detection; filtering the phase difference; converting the filtered output signal into a current signal; generating the reference signal through the current signal; and adjusting the slope and frequency of the reference signal based on the current signal.

[0008] Optionally, the reference signal is a sawtooth wave signal or a triangular wave signal.

[0009] Optionally, the method for converting the PWM signal into an analog signal includes: comparing the PWM signal with the feedback signal, counting based on the comparison result, and generating an analog signal of the PWM signal based on the counting result via digital-to-analog conversion.

[0010] Alternatively, counting can be performed on the rising edge of the clock signal or on the falling edge of the clock signal.

[0011] Optionally, when the logic value of the PWM signal is less than the logic value of the feedback signal, the result of the counting operation is a shift (borrow); when the logic value of the PWM signal is greater than the logic value of the feedback signal, the result of the counting operation is a carry; and when the logic value of the PWM signal is equal to the logic value of the feedback signal, the result of the counting operation is a hold.

[0012] This invention proposes a PWM signal to analog signal conversion circuit, which includes at least:

[0013] The unit includes a conversion unit, a comparison unit, and a reference unit, wherein:

[0014] The reference unit receives a PWM signal and a feedback signal, generates a reference signal based on the phase difference between the PWM signal and the feedback signal, and adjusts the reference signal according to the phase difference to make the phase and frequency of the reference signal consistent with those of the PWM signal.

[0015] The comparison unit is connected to the output of the reference unit and receives the analog signal of the PWM signal. It compares the reference signal with the analog signal of the PWM signal to generate the feedback signal.

[0016] The conversion unit is connected to the output of the comparison unit and receives the PWM signal. Based on the comparison result between the PWM signal and the feedback signal, it converts the PWM signal into an analog signal.

[0017] The conversion unit is connected to the output of the comparison unit and receives the PWM signal. Based on the comparison result between the PWM signal and the feedback signal, it converts the PWM signal into an analog signal.

[0018] Optionally, the reference unit includes: a phase detection module, a loop filter module, a control current module, and a signal generation module, wherein the phase detection module receives the PWM signal and the feedback signal, the loop filter module is connected to the output terminal of the phase detection module, the control current module is connected to the output terminal of the loop filter module, and the signal generation module is connected to the output terminal of the control current module.

[0019] Optionally, the conversion unit includes: a logic control module, a counting module, and a digital-to-analog conversion module, wherein the logic control module receives the PWM signal and the feedback signal, the counting module is connected to the output terminal of the logic control module, and the digital-to-analog conversion module is connected to the output terminal of the counting module.

[0020] As described above, the PWM signal to analog signal conversion method and circuit of the present invention have the following beneficial effects:

[0021] 1) The circuit of this application adopts a dual-loop structure of "PWM signal - reference signal - feedback signal" and "PWM signal - analog signal of PWM signal - feedback signal" to realize the error self-calibration of each device. The overall error is small, so the structure is simple, it is relatively easy to reduce the error, and the accuracy is improved.

[0022] 2) The dual-loop structure keeps the phase and frequency of the feedback signal and the PWM signal consistent, thus solving the ripple problem in the existing technology.

[0023] 3) By not using analog PWM comparators or analog phase detectors, the uncorrectable error caused by offset at the system input is reduced, thus improving the linearity of the overall circuit. Attached Figure Description

[0024] Figure 1 The diagram shown is an exemplary circuit structure for converting a PWM signal to an analog signal according to this application.

[0025] Figure 2 The diagram shown is a flowchart of the PWM signal to analog signal conversion method provided in Embodiment 1 of this application.

[0026] Figure 3 The diagram shown is a schematic diagram of the PWM signal to analog signal circuit structure provided in Embodiment 2 of this application.

[0027] Figure 4 The diagram shown is a schematic diagram of the reference unit circuit structure provided in Embodiment 2 of this application.

[0028] Figure 5 The diagram shown is a schematic diagram of the conversion unit circuit structure provided in Embodiment 2 of this application.

[0029] Component designation explanation

[0030] 210 Conversion Unit

[0031] 211 Logic Control Module

[0032] 212 Counting Module

[0033] 213 Digital-to-Analog Conversion Module

[0034] 220 Comparison Units

[0035] 230 Reference Unit

[0036] 231 Phase Detection Module

[0037] 232 Loop Filter Module

[0038] 233 Control Current Module

[0039] 234 Signal Generation Module

[0040] Steps S1 to S2 Detailed Implementation

[0041] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.

[0042] Please see Figures 2 to 5 It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0043] Figure 1 This paper demonstrates a solution using a loop design to obtain an analog signal. The high level in the PWM signal is converted from the power supply voltage to an analog voltage. This analog voltage is then fed back to a delta-sigma ADC (delta stands for differential, sigma for integral, and ADC for analog-to-digital converter) for comparison. The comparison result is output to a counter, and the counting result is then output to a DAC (digital-to-analog converter). The DAC output is further processed through driving and filtering to generate the desired analog signal. The limitation of this solution is:

[0044] 1) For loop structures: analog signals rely excessively on the accuracy of sigma-delta ADCs and require large RC filter capacitors to eliminate errors and ripple, but this increases the circuit area.

[0045] 2) Simultaneously, the circuit error originates from the sigma-delta ADC, DAC, and driver. Due to the characteristics of the loop design, the errors of the DAC and driver can be eliminated through loop adjustment, but the matching error of the sigma-delta ADC cannot be eliminated. Therefore, designing a loop-structured circuit requires additional error compensation for the sigma-delta ADC, resulting in limited accuracy.

[0046] 3) Comparing analog voltage with PWM signal can cause large ripples when the PWM signal is operating at low frequency and the duty cycle is close to 50%, thereby reducing the overall linearity of the circuit.

[0047] Therefore, this invention proposes a method and circuit for converting PWM signals to analog signals, as detailed below:

[0048] Example 1

[0049] like Figure 2 As shown, this embodiment provides a method for converting a PWM signal to an analog signal, which includes at least:

[0050] S1: As Figure 2 As shown, a reference signal is generated based on the phase difference between the PWM signal and the feedback signal. The reference signal is adjusted according to the phase difference to make the phase and frequency of the reference signal consistent with those of the PWM signal. The feedback signal is generated based on the comparison result between the analog signal of the PWM signal and the reference signal.

[0051] Specifically, as an example, such as Figure 2 As shown, the method for generating the reference signal includes: obtaining the phase difference between the PWM signal and the feedback signal through phase detection; filtering the phase difference, noting that the filtering removes high-frequency noise; converting the filtered output signal into a current signal; generating a reference signal; and adjusting the slope and frequency of the reference signal based on the current signal. More specifically, as an example, such as... Figure 2 As shown, the reference signal has the same phase and frequency as the PWM signal, thus better reflecting the difference in duty cycle between the feedback signal and the PWM signal. It should be noted that the phase detection, filtering, and current signal adjustment processes for the slope and frequency of the reference signal improve error calibration and ensure effectiveness.

[0052] More specifically, as an example, such as Figure 2 As shown, the reference signal is a sawtooth wave signal or a triangular wave signal. It should be noted that the reference signal includes, but is not limited to, sawtooth wave signals or triangular wave signals. As long as the phase and frequency of the feedback signal are consistent with those of the PWM signal, any waveform reference signal is applicable and is not limited to this embodiment.

[0053] S2: As Figure 2 As shown, the PWM signal is compared with the feedback signal, and the analog signal of the PWM signal is obtained based on the comparison result.

[0054] Specifically, as an example, such as Figure 2 As shown, the method for converting the PWM signal into an analog signal includes: comparing the PWM signal with the feedback signal, counting based on the comparison result, and generating the analog signal of the PWM signal through digital-to-analog conversion based on the counting result.

[0055] More specifically, as an example, such as Figure 2 As shown, counting occurs either on the rising edge of the clock signal or on the falling edge of the clock signal. More specifically, as an example, such as Figure 2 As shown, when the logic value of the PWM signal is less than the logic value of the feedback signal, the result of the counting operation is a borrow; when the logic value of the PWM signal is greater than the logic value of the feedback signal, the result of the counting operation is a carry; and when the logic value of the PWM signal is equal to the logic value of the feedback signal, the result of the counting operation is a hold. It should be noted that the counting operation is an error handling action, ensuring that the analog signal voltage of the PWM signal is stable and ripple-free when the phase and frequency of the PWM signal and the feedback signal remain consistent.

[0056] Furthermore, as an example, such as Figure 2 As shown, the PWM signal to analog signal conversion method provided in this embodiment adopts a dual feedback structure of "PWM signal - reference signal - feedback signal" and "PWM signal - analog signal of PWM signal - feedback signal" to achieve error self-calibration of each device. The overall error is small, so the structure is simple, it is relatively easy to reduce the error, and the accuracy is improved.

[0057] Example 2

[0058] like Figures 3 to 5 As shown, this embodiment provides a PWM signal to analog signal conversion circuit, which includes at least: a conversion unit 210, a comparison unit 220, and a reference unit 230, wherein:

[0059] like Figure 2 As shown, the reference unit 230 receives a PWM signal and a feedback signal, and generates a reference signal based on the phase difference between the PWM signal and the feedback signal.

[0060] Specifically, as an example, such as Figure 4As shown, the reference unit 230 includes: a phase detection module 231, a loop filter module 232, a control current module 233, and a signal generation module 234. The phase detection module 231 receives the PWM signal and the feedback signal. The loop filter module 232 is connected to the output terminal of the phase detection module 231. The control current module 233 is connected to the output terminal of the loop filter module 232. The signal generation module 234 is connected to the output terminal of the control current module 233. More specifically, as an example, such as... Figure 4 As shown, the phase detection module 231 uses digital circuitry. Compared to an analog phase detector, the error generated by the phase detection module 231 is negligible. It should be noted that the configuration of the phase detection module 231 should be based on the actual usage scenario; any configuration that minimizes error is applicable and is not limited to this embodiment. More specifically, as an example, such as... Figure 4 As shown, the loop filter module 232 adopts a digital low-pass filter structure. This structure passes low frequencies and filters high frequencies. It is simple in structure, does not require additional RC filter components, reduces the overall circuit area, and ensures the error processing effect. It should be noted that the setting of the loop filter module 232 should consider the actual use scenario. Any form that can filter noise, reduce the overall circuit area, and is simple to operate is applicable and is not limited to this embodiment. More specifically, as an example, such as Figure 4 As shown, the control current module 233 is used to generate a current signal for use by the signal generation module 234. It should be noted that the configuration of the control current module 233 should consider the actual usage scenario; any solution that can satisfy the requirement of generating a current signal is applicable and not limited to this embodiment. More specifically, as an example, such as... Figure 4 As shown, the signal generation module 234 uses frequency synthesis technology to adjust the slope and frequency of the reference signal based on the current signal generated by the control current module 233. It should be noted that the implementation scheme of the signal generation module 234 should be set according to the actual use scenario. Any scheme that can generate a reference signal is applicable and is not limited to this embodiment.

[0061] Furthermore, as an example, such as Figure 4 As shown, the reference unit 230 is operated by the phase detection module 231, the loop filter module 232, the control current module 233, and the signal generation module 234 to minimize errors and ensure the consistency of frequency and phase between the reference signal and the PWM signal.

[0062] Furthermore, such as Figure 3As shown, in this embodiment, the PWM signal and the feedback signal are passed through the reference unit 230 to obtain the reference signal, and the reference signal and the analog signal of the PWM signal are passed through the comparison unit to obtain the feedback signal, forming the first loop.

[0063] The comparison unit 220 is connected to the output of the reference unit 230 and receives an analog signal of the PWM signal. It compares the reference signal with the analog signal of the PWM signal to generate the feedback signal. Specifically, as an example, such as... Figure 3 As shown, the comparison unit 220 is implemented using, but is not limited to, digital circuitry to ensure that the input and output voltages are not offset. It can also be implemented using other methods, such as recording the mismatch voltage using a capacitor before circuit startup and compensating across the amplifier. Theoretically, this can improve the offset voltage of the comparison unit 220 to within 1mV. Compared to the delta-sigma ADC used in existing technology, the resulting mismatch error is negligible, and the accuracy is higher than that of a delta-sigma ADC. It should be noted that the implementation scheme of the comparison unit 220 should be set according to the actual applicable scenario. Any implementation scheme that can ensure that the phase and frequency of the feedback signal and the PWM signal remain consistent is applicable and is not limited to this embodiment.

[0064] The conversion unit 210 is connected to the output terminal of the comparison unit 220 and receives the PWM signal. Based on the comparison result between the PWM signal and the feedback signal, it converts the PWM signal into an analog signal.

[0065] Specifically, as an example, such as Figure 5 As shown, the conversion unit 210 includes a logic control module 211, a counting module 212, and a digital-to-analog converter 213. The logic control module 211 receives the PWM signal and the feedback signal. The counting module 212 is connected to the output terminal of the logic control module 211, and the digital-to-analog converter 213 is connected to the output terminal of the counting module 212. More specifically, as an example, such as... Figure 5 As shown, the logic control module 211 receives the PWM signal and the feedback signal, and uses a digital circuit structure (including but not limited to AND gates) to generate the next-level control signal based on the comparison result. It should be noted that the configuration of the logic control module 211 should consider the actual usage scenario; any implementation scheme that can generate the next-level control signal based on the comparison result is applicable and not limited to this embodiment. More specifically, as an example, such as... Figure 5As shown, the counting module 212 is connected to the output of the logic control module 211 and performs a counting operation based on the control signal of the logic control module 211. When the logic value of the PWM signal is less than the logic value of the feedback signal, the result of the counting operation is a shift; when the logic value of the PWM signal is greater than the logic value of the feedback signal, the result of the counting operation is a carry; when the logic value of the PWM signal is equal to the logic value of the feedback signal, the result of the counting operation is a hold, thus enabling the counting module 212 to perform an accumulation function similar to an analog integrator. As known from Embodiment 1, the counting operation is performed on the rising edge or falling edge of the clock signal. More specifically, as an example, such as... Figure 5 As shown, the digital-to-analog conversion module 213 receives the result of the counting operation and generates the analog signal of the PWM signal through the digital-to-analog conversion operation.

[0066] Furthermore, as an example, such as Figure 3 As shown, in this embodiment, the PWM signal and the feedback signal are converted into an analog signal of the PWM signal by the conversion unit 210. This analog signal and the reference signal are then converted into the feedback signal by the comparison unit, forming a second loop. It should be noted that, as an example, due to design, circuit layout, or manufacturing issues, the result of the digital-to-analog conversion may be 20mV smaller than the theoretical value. If the duty cycle of the PWM signal is 50%, the theoretical analog voltage of the PWM signal should be 300mV. However, due to the error, the analog voltage of the PWM signal is 280mV, causing the duty cycle of the feedback signal to become 46%, resulting in an inconsistency between the duty cycles of the feedback signal and the PWM signal. The second loop is adjusted until the duty cycle of the feedback signal reaches 50%, ensuring that the analog signal voltage of the PWM signal is 300mV. Therefore, the error caused by the digital-to-analog conversion does not affect the accuracy or linearity of the PWM signal to analog signal conversion circuit. It should be further noted that, as an example, the result of the digital-to-analog conversion is 20mV smaller than the theoretical value. If the duty cycle of the PWM signal is 50%, the analog signal voltage of the PWM signal is 300mV. Thus, the error caused by the digital-to-analog conversion does not affect the accuracy or linearity of the PWM signal to analog signal conversion circuit. Figure 3 , Figure 4 and Figure 5 As shown, the PWM signal to analog signal circuit provided in this embodiment adopts a dual-loop structure to achieve error self-calibration of each module. The error of the first loop is distributed as follows: Figure 4 The phase detection module 231 shown Figure 3 On the comparison unit 220 in the middle; the error of the second loop is distributed as follows: Figure 5The logic comparison module 211 and the counting module 212 shown herein achieve error self-calibration and reduce mismatch error; the RC filter structure is no longer used, reducing the circuit area; the PWM signal and the feedback signal are kept in phase and frequency consistency, so that the analog signal voltage of the PWM signal is stable and ripple-free, improving the linearity of the circuit.

[0067] In summary, the present invention provides a method and circuit for converting a PWM signal to an analog signal, comprising: generating a reference signal based on the phase difference between the PWM signal and a feedback signal; comparing the reference signal with an analog signal of the PWM signal to adjust the phase and frequency of the feedback signal, so that the phase and frequency of the feedback signal are consistent with those of the PWM signal; comparing the PWM signal with the feedback signal, and converting the PWM signal into an analog signal based on the comparison result. The present invention employs a dual-loop structure of "PWM signal—reference signal—feedback signal" and "PWM signal—analog signal of PWM signal—feedback signal" to achieve error self-calibration of each device, resulting in smaller overall error, simpler structure, easier error reduction, and improved accuracy. The dual-loop structure ensures that the phase and frequency of the feedback signal are consistent with those of the PWM signal, solving the ripple problem in the prior art. The present invention does not use an analog PWM comparator or analog phase detector, thereby reducing the uncorrectable error caused by offset at the system input and improving the linearity of the overall circuit. Therefore, the present invention effectively overcomes the various shortcomings of the prior art and has high industrial applicability.

[0068] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method of converting a PWM signal to an analog signal, the method comprising: The PWM signal to analog signal method at least comprises: generating a reference signal based on the phase difference between the PWM signal and the feedback signal, adjusting the reference signal according to the phase difference to keep the reference signal consistent with the phase and frequency of the PWM signal, and generating the feedback signal based on the comparison result between the analog signal of the PWM signal and the reference signal, the generated feedback signal being consistent with the phase and frequency of the PWM signal; comparing the PWM signal and the feedback signal, and converting the analog signal of the PWM signal based on the comparison result; the method for converting the analog signal of the PWM signal comprises: comparing the PWM signal and the feedback signal, counting according to the comparison result, and generating the analog signal of the PWM signal through digital-to-analog conversion based on the counting result; when the logic value of the PWM signal is less than the logic value of the feedback signal, the counting result is a borrow; when the logic value of the PWM signal is greater than the logic value of the feedback signal, the counting result is a carry; and when the logic value of the PWM signal is equal to the logic value of the feedback signal, the counting result is a hold.

2. The method of claim 1, wherein: The method for generating the reference signal comprises: obtaining the phase difference between the PWM signal and the feedback signal through phase detection; filtering the phase difference; converting the filtered output signal into a current signal; generating the reference signal through the current signal, and adjusting the slope and frequency of the reference signal based on the current signal.

3. The PWM signal to analog signal method of claim 1 or 2, wherein: The reference signal is a sawtooth wave signal or a triangular wave signal.

4. The method of claim 1, wherein: The counting is performed at the rising edge of a clock signal, or the counting is performed at the falling edge of a clock signal.

5. A PWM signal to analog signal circuit, characterized by, The PWM signal to analog signal circuit at least comprises: a conversion unit, a comparison unit and a reference unit, wherein: the reference unit receives the PWM signal and the feedback signal, generates a reference signal based on the phase difference between the PWM signal and the feedback signal, and adjusts the reference signal according to the phase difference to keep the reference signal consistent with the phase and frequency of the PWM signal; the comparison unit is connected to the output end of the reference unit and receives the analog signal of the PWM signal, compares the reference signal and the analog signal of the PWM signal to generate the feedback signal, and the generated feedback signal is consistent with the phase and frequency of the PWM signal; the conversion unit is connected to the output end of the comparison unit and receives the PWM signal, and converts the analog signal of the PWM signal based on the comparison result between the PWM signal and the feedback signal. The conversion unit comprises a logic control module, a counting module and a digital-to-analog conversion module; the logic control module receives the PWM signal and the feedback signal and generates a next-stage control signal based on the comparison result; the counting module is connected to the output end of the logic control module and performs counting operation based on the control signal of the logic control module; when the logic value of the PWM signal is less than the logic value of the feedback signal, the result of the counting operation is a borrow; when the logic value of the PWM signal is greater than the logic value of the feedback signal, the result of the counting operation is a carry; when the logic value of the PWM signal is equal to the logic value of the feedback signal, the result of the counting operation is a hold; the digital-to-analog conversion module is connected to the output end of the counting module and receives the result of the counting operation and generates an analog signal of the PWM signal through digital-to-analog conversion operation.

6. The PWM to analog signal circuit of claim 5, wherein: The reference unit comprises a phase discrimination module, a loop filter module, a control current module and a signal generation module; the phase discrimination module receives the PWM signal and the feedback signal; the loop filter module is connected to the output end of the phase discrimination module; the control current module is connected to the output end of the loop filter module; and the signal generation module is connected to the output end of the control current module.

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