Circuit board and method for manufacturing a circuit board

Abstract

A circuit board and a manufacturing method thereof. The manufacturing method includes providing a first substrate and a second substrate. The first substrate includes a first base material layer and a first copper layer, and the first copper layer is located on a first surface of the first base material layer. The second substrate includes a second base material layer and a second copper layer, and the second copper layer is located on a third surface of the second base material layer. A pretreatment is performed to form a first fluff layer on the first copper layer and a second fluff layer on the second copper layer. The first fluff layer has a plurality of first fluffs and a plurality of first accommodation portions, and the first accommodation portions are formed between the first fluffs. The second fluff layer has a plurality of second fluffs and a plurality of second accommodation portions, and the second accommodation portions are formed between the second fluffs. The first substrate and the second substrate are butted to make the first fluff layer and the second fluff layer interfit.

Description

Technical Field

[0001] This application relates to a circuit board and a method for manufacturing the circuit board, particularly a circuit board with high-density interconnection. Background Technology

[0002] Traditional flexible printed circuits (FPCs) are typically manufactured in multi-layered forms, such as ten to twenty layers, which is generally quite complex and difficult to produce.

[0003] Furthermore, traditional FPCs are made by stacking multiple layers of adhesive, which is time-consuming and energy-intensive. Moreover, when using adhesive layers for bonding, conductive pillars need to be created to establish electrical connections between layers, making the process more complex and affecting yield. In addition, FPCs often require welding or lamination at high temperatures, which can affect their properties. Summary of the Invention

[0004] In view of the above, according to one embodiment, a method for manufacturing a circuit board is provided, including providing a first substrate and a second substrate. The first substrate includes a first substrate layer and a first copper layer, the first substrate layer having opposing first surfaces and a second surface, and the first copper layer being located on the first surface. The second substrate includes a second substrate layer and a second copper layer, the second substrate layer having opposing third surfaces and a fourth surface, and the second copper layer being located on the third surface. A pretreatment is performed to form a first textured layer on the surface of the first copper layer of the first substrate, and a second textured layer on the surface of the second copper layer of the second substrate. The first textured layer has a plurality of first textured fibers and a plurality of first receiving portions, with first receiving portions formed between each first textured fiber. The second textured layer has a plurality of second textured fibers and a plurality of second receiving portions, with second receiving portions formed between each second textured fiber. The first substrate and the second substrate are mated, such that the first textured fibers of the first substrate and the second receiving portions of the second substrate are mutually engaged.

[0005] In some embodiments, prior to the steps of providing the first substrate and the second substrate, electroplating deposition is performed to form a first metal layer on a first surface of the first substrate layer and a second metal layer on a third surface of the second substrate layer. Electroplating is then performed to form a first copper layer on the first metal layer and a second copper layer on the second metal layer.

[0006] In some embodiments, prior to the steps of providing the first substrate and the second substrate, metal coating is performed to form a first metal layer on a first surface of the first substrate layer. A second metal layer is formed on a third surface of the second substrate layer. A redox reaction is performed to form a first copper layer on the first metal layer and a second copper layer on the second metal layer.

[0007] In some embodiments, prior to the steps of providing the first substrate and the second substrate, metallization is performed to form a first metal layer on a first surface of the first substrate layer. A second metal layer is formed on a third surface of the second substrate layer. Electroplating is then performed to form a first copper layer on the first metal layer and a second copper layer on the second metal layer.

[0008] In some embodiments, the first substrate layer and the second substrate layer are made of polyimide, modified polyimide, liquid crystal polymer, fluorine polymer or ceramic material.

[0009] In some embodiments, the first substrate includes a third copper layer located on a second surface. The second substrate includes a fourth copper layer located on a fourth surface. A pretreatment is performed to form a third textured layer on the surface of the third copper layer of the first substrate and a fourth textured layer on the surface of the fourth copper layer of the second substrate. The third textured layer has a plurality of third textures and a plurality of third receiving portions, with third receiving portions formed between each third texture. The fourth textured layer has a plurality of fourth textures and a plurality of fourth receiving portions, with fourth receiving portions formed between each fourth texture.

[0010] In some embodiments, the thickness of the first copper layer, the second copper layer, the third copper layer, and the fourth copper layer is 2 to 150 μm.

[0011] According to one embodiment, a circuit board is provided, including a first substrate and a second substrate. The first substrate includes a first substrate layer and a first copper layer. The first substrate layer has opposing first surfaces and a second surface, and the first copper layer is located on the first surface. A first textured layer is provided on the surface of the first copper layer of the first substrate. The first textured layer has a plurality of first textures and a plurality of first receiving portions, with each first texture forming a first receiving portion. The second substrate has a second substrate layer and a second copper layer. The second substrate layer has opposing third surfaces and a fourth surface, and the second copper layer is located on the third surface. A second textured layer is provided on the surface of the second copper layer of the second substrate. The second textured layer has a plurality of second textures and a plurality of second receiving portions, with each second texture forming a second receiving portion. The first substrate and the second substrate are mated such that the first textures of the first substrate and the second receiving portions of the second substrate interlock, and the second textures of the second substrate and the first receiving portions of the first substrate interlock.

[0012] In some embodiments, the system further includes a third substrate, which includes a third substrate layer and a fifth copper layer. The third substrate layer has opposing fifth and sixth surfaces, and the fifth copper layer is located on the fifth surface. A fifth textured layer is formed on the surface of the fifth copper layer of the third substrate. The fifth textured layer has a plurality of fifth textures and a plurality of fifth receiving portions, with fifth receiving portions formed between the fifth textures. The first substrate and the third substrate are mated such that the first textures of the first substrate and the fifth receiving portions of the third substrate are mutually engaged, and the fifth textures of the third substrate and the first receiving portions of the first substrate are mutually engaged, and the third substrate and the second substrate are parallel to each other.

[0013] In some embodiments, the first substrate layer includes at least one substrate, at least two metal lines, and at least one via. The at least two metal lines are formed on opposite sides of the at least one substrate, and the at least one via penetrates the at least one substrate and is electrically connected to the at least two metal lines.

[0014] In summary, a circuit board fabrication method is used to create a substrate with a textured copper surface structure. By modularizing this substrate, the textured layers of the substrate can be interlocked with the textured layers of other substrates, achieving a rapid lamination and bonding effect. Furthermore, since the interlocking of the substrates with other substrates can be performed at a lower temperature, the characteristics of the circuit board can be avoided due to the high-temperature operating environment. Attached Figure Description

[0015] Figure 1 This is a three-dimensional schematic diagram of a substrate having a copper layer according to a method for manufacturing a circuit board according to a first embodiment;

[0016] Figure 2 This is a three-dimensional schematic diagram of a substrate with a textured copper layer according to a method for manufacturing a circuit board according to a first embodiment.

[0017] Figure 3A for Figure 2 Enlarged view of part number 3A;

[0018] Figure 3B for Figure 2 Enlarged view of part number 3B;

[0019] Figure 4 This is a perspective view of a circuit board according to a first embodiment;

[0020] Figure 5 for Figure 4 Enlarged view of part number 5;

[0021] Figure 6A A side view of a substrate according to a method for manufacturing a circuit board according to a first embodiment;

[0022] Figure 6BThis is a schematic diagram of the substrate structure of a circuit board according to a first embodiment;

[0023] Figure 7 This is a three-dimensional schematic diagram of a substrate according to a method for manufacturing a circuit board according to a second embodiment;

[0024] Figure 8 This is a schematic diagram of a substrate having a metal layer according to a method for manufacturing a circuit board according to a second embodiment;

[0025] Figure 9 This is a three-dimensional schematic diagram of a substrate having a metal layer according to a circuit board of a third embodiment and a manufacturing method of a fourth embodiment;

[0026] Figure 10A This is a perspective view of a circuit board according to a fifth embodiment;

[0027] Figure 10B This is a perspective view of a circuit board according to a sixth embodiment;

[0028] Figure 10C for Figure 10B Enlarged view of part number 10C;

[0029] Figure 11 A flowchart illustrating a method for manufacturing a circuit board according to a first embodiment;

[0030] Figure 12 This is a flowchart illustrating the copper layer formation process of a circuit board fabrication method according to a second embodiment.

[0031] Figure 13 This is a flowchart illustrating the copper layer formation process of a circuit board fabrication method according to a third embodiment.

[0032] Figure 14 This is a flowchart illustrating the copper layer formation process of a circuit board fabrication method according to a fourth embodiment.

[0033] Figure 15 This is a flowchart of a method for manufacturing a circuit board according to a fifth embodiment.

[0034] [Symbol Explanation]

[0035] 100: Circuit board

[0036] 110: First substrate

[0037] 111: First substrate layer; 111a: First surface

[0038] 111b: Second surface

[0039] 1111: Through hole

[0040] 1112: Substrate

[0041] 1113: Metal circuit

[0042] 112: First copper layer

[0043] 113: First villous layer

[0044] 1131: First down

[0045] 1132: First Reception Section

[0046] 114a, 114b: First metal layer

[0047] 115: Third copper layer

[0048] 116: Third villous layer

[0049] 1161: Third down

[0050] 1162: Third Reception Section

[0051] 130: Second substrate

[0052] 131: Second substrate layer

[0053] 131a: Third surface

[0054] 131b: Fourth surface

[0055] 132: Second copper layer

[0056] 133: Second villous layer

[0057] 1331: Second down

[0058] 1332: Second Reception Section

[0059] 134a, 134b: Second metal layer

[0060] 135: Fourth Copper Layer

[0061] 136: Fourth villous layer

[0062] 1361: Fourth villi

[0063] 1362: Fourth Reception Section

[0064] 150: Third substrate

[0065] 151: Third substrate layer

[0066] 151a: Fifth Surface

[0067] 151b: Sixth Surface

[0068] 152: Fifth Copper Layer

[0069] 153: Fifth villous layer

[0070] 1531: Fifth Down

[0071] 1532: Fifth Accommodation Department

[0072] Step S8A: Perform electroplating deposition to form a first metal layer on the first surface of the first substrate layer and a second metal layer on the third surface of the second substrate layer.

[0073] Step S8B: Perform metal coating to form a first metal layer on the first surface of the first substrate layer and a second metal layer on the third surface of the second substrate layer.

[0074] Step S8C: Metallization is performed, forming a first metal layer on the first surface of the first substrate layer and a second metal layer on the third surface of the second substrate layer.

[0075] Step S9A: Perform electroplating to form a first copper layer on the first metal layer and a second copper layer on the second metal layer. Step S9B: Perform a redox reaction to form a first copper layer on the first metal layer and a second copper layer on the second metal layer.

[0076] Step S9C: Perform electroplating to form a first copper layer on the first metal layer and a second copper layer on the second metal layer.

[0077] Step S10: Provide the first substrate and the second substrate

[0078] Step S11A: Perform pretreatment to form a first textured layer on the surface of the first copper layer of the first substrate and a second textured layer on the surface of the second copper layer of the second substrate.

[0079] Step S11B: Perform pretreatment to form a first textured layer and a third textured layer on the surface of the first copper layer and the surface of the third copper layer of the first substrate, respectively; and form a second textured layer and a fourth textured layer on the surface of the second copper layer and the surface of the fourth copper layer of the second substrate, respectively.

[0080] Step S12: Connect the first substrate and the second substrate. Detailed Implementation

[0081] Please see Figure 11 See also Figures 1 to 6B . Figure 1 This is a three-dimensional schematic diagram of a substrate having a copper layer according to a method for manufacturing a circuit board according to a first embodiment. Figure 2 This is a three-dimensional schematic diagram of a substrate with a textured copper layer according to a method for manufacturing a circuit board according to a first embodiment. Figure 3A for Figure 2 Enlarged view of part number 3A. Figure 3B for Figure 2 Enlarged view of part number 3B. Figure 4 This is a perspective view of a circuit board according to a first embodiment. Figure 5 for Figure 4 Enlarged view of part number 5. Figure 6A This is a side view of a substrate according to a method for manufacturing a circuit board according to a first embodiment. Figure 6B This is a schematic diagram of the substrate structure of a circuit board according to a first embodiment. Figure 11 This is a flowchart illustrating a method for manufacturing a circuit board according to a first embodiment. The circuit board 100 is a flexible circuit board that can be used in, for example, mobile phones, notebook computers, or tablet computers.

[0082] A method for manufacturing a circuit board 100 includes providing a first substrate 110 and a second substrate 130 (step S10). Figure 1 As shown, the first substrate 110 includes a first substrate layer 111 and a first copper layer 112. The first substrate layer 111 has opposing first surfaces 111a and second surfaces 111b, and the first copper layer 112 is located on the first surface 111a. The second substrate 130 has a second substrate layer 131 and a second copper layer 132. The second substrate layer 131 has opposing third surfaces 131a and fourth surfaces 131b, and the second copper layer 132 is located on the third surface 131a.

[0083] Perform preprocessing (step S11A), such as Figure 2 , Figure 3A and Figure 3B As shown, a first textured layer 113 is formed on the surface of a first copper layer 112 of a first substrate 110, and a second textured layer 133 is formed on the surface of a second copper layer 132 of a second substrate 130. The first textured layer 113 has a plurality of first textures 1131 and a plurality of first receiving portions 1132, with each first texture 1131 having a first receiving portion 1132 between it. The second textured layer 133 has a plurality of second textures 1331 and a plurality of second receiving portions 1332, with each second texture 1331 having a second receiving portion 1332 between it.

[0084] In the first embodiment, the first substrate 110 and the second substrate 130 have the same corresponding structure. In the first embodiment, as... Figure 1 As shown, the first substrate 110 and the second substrate 130 are flexible copper foil substrates (FCCL). Figure 6AA substrate with double-sided copper foil is shown, but it is not limited to this; it may also have copper foil on only one side. In other embodiments, the first substrate 110 and the second substrate 130 may be, for example, low-temperature co-fired ceramic (LTCC) or multi-layer ceramic capacitor (MLCC) substrates with copper. Furthermore, the copper layers of the first substrate 110 and the second substrate 130 may also be formed by electroplating or a redox reaction. There are various embodiments regarding the formation of the first copper layer 112 of the first substrate 110 and the second copper layer 132 of the second substrate 130 (described in detail later).

[0085] Next, the first substrate 110 is mated with the second substrate 130 (step S12), as follows: Figure 4 and Figure 5 As shown, the first fibers 1131 of the first substrate 110 are fitted together with the second receiving portions 1332 of the second substrate 130, and the second fibers 1331 of the second substrate 130 are fitted together with the first receiving portions 1132 of the first substrate 110.

[0086] Specifically, the first copper layer 112 of the first substrate 110 has a plurality of first fibers 1131, and the gaps between the first fibers 1131 form a first receiving portion 1132. The second copper layer 132 of the second substrate 130 has a plurality of second fibers 1331, and the gaps between the second fibers 1331 form a second receiving portion 1332. When the first substrate 110 and the second substrate 130 are mated together, the first fibers 1131 of the first substrate 110 are received into the second receiving portion 1332 of the second substrate 130, and the second fibers 1331 of the second substrate 130 are received into the first receiving portion 1132 of the first substrate 110, so that the first fiber layer 113 and the second fiber layer 133 form a zipper-like shape and are interlocked with each other. In the first embodiment, the first substrate 110 and the second substrate 130 are interlocked with each other by welding or pressing at a temperature below 250°C.

[0087] In other words, the method for manufacturing circuit board 100 produces a first substrate 110 and a second substrate 130 with a textured copper surface structure. The first substrate 110 with the textured copper surface structure is modularized, allowing the textured layer of the first substrate 110 to interlock with the textured layer of the second substrate 130, achieving a rapid lamination and interlocking effect. Furthermore, since the interlocking of the first substrate 110 and the second substrate 130 can be performed at a lower temperature, the characteristics of the circuit board can be avoided due to the high-temperature operating environment. In the first embodiment, the first substrate layer 111 and the second substrate layer 131 are made of polyimide, modified polyimide, liquid crystal polymer, fluorinated polymer, or ceramic material, and the first substrate layer 111 and the second substrate layer 131 can be the same material or different materials. Here, the fluorinated polymer is polytetrafluoroethylene, tetrachloroethylene copolymer resin, or fluorinated resin.

[0088] In the first embodiment, the first substrate layer 111 and the second substrate layer 131 can be, for example, substrate layers composed of one or more substrates, to modularize the substrate layers composed of one or more substrates into the first substrate layer 111 or the second substrate layer 131, and then press and embed these modular first substrate layers 111 or second substrate layers 131 together, so that the overall process speed can be greatly improved. Please refer to Figure 6B , Figure 6B This is a schematic diagram of a substrate structure for a circuit board according to a first embodiment. For example, the first substrate 110 has a first substrate layer 111 formed by stacking multiple layers of substrate 1112 and metal lines 1113. Figure 6B As shown, the metal lines 1113 of different layers are electrically connected to each other through vias 1111 formed through the substrate 1112. The vias 1111 are formed using known methods, such as forming through-holes and then filling them with metal paste or electroplating, which will not be described in detail here. In this way, the substrate layers are modularized and connected to other modular substrate layers through copper layers, achieving the effect of multilayer boards and multilayer board interconnection.

[0089] exist Figure 6B The example described uses a four-layer board, but the invention is not limited thereto. Other embodiments can also use single-sided boards, double-sided boards, five-layer boards, etc., all of which are applicable.

[0090] In other embodiments, the circuit board 100 may be composed of multiple substrates, not limited to the stacking of the first substrate 110 and the second substrate 130 (described in detail later).

[0091] There are various embodiments regarding the formation of the first copper layer 112 of the first substrate 110 and the second copper layer 132 of the second substrate 130.

[0092] Next, please refer to Figure 12 See also Figure 7 and Figure 8 . Figure 7 This is a three-dimensional schematic diagram of a substrate according to a method for manufacturing a circuit board according to a second embodiment. Figure 8 This is a schematic diagram of a substrate having a metal layer according to a method for manufacturing a circuit board according to a second embodiment. Figure 12 This is a flowchart illustrating the copper layer formation process of a circuit board fabrication method according to a second embodiment. In the second embodiment, prior to the steps of providing the first substrate 110 and the second substrate 130, electroplating deposition (step S8A) is performed to form a first metal layer 114a on the first surface 111a of the first substrate layer 111 and a second metal layer 134a on the third surface 131a of the second substrate layer 131. Electroplating is then performed (step S9A) to form a first copper layer 112 on the first metal layer 114a and a second copper layer 132 on the second metal layer 134a. Specifically, as... Figure 7 As shown, the first substrate 110 and the second substrate 130 originally did not have a copper layer, but rather, as... Figure 8 As shown, a first metal layer 114a and a second metal layer 134a are first formed on the first substrate layer 111 and the second substrate layer 131 by electroplating, respectively. Then, a first copper layer 112 and a second copper layer 132 are formed by sputtering, respectively, to obtain... Figure 1 The first substrate 110 and the second substrate 130. In the second embodiment, the metal electroplated and deposited on the first substrate 110 and the second substrate 130 is, for example, nickel or an inert metal.

[0093] Please see Figure 13 See also Figure 7 and Figure 9 . Figure 9 This is a three-dimensional schematic diagram of a substrate with a metal layer according to a circuit board of a third embodiment and a manufacturing method of a fourth embodiment. Figure 13 This is a flowchart illustrating the copper layer formation process of a circuit board fabrication method according to a third embodiment. In the third embodiment, prior to the steps of providing the first substrate 110 and the second substrate 130, metal coating is performed (step S8B), forming a first metal layer 114b on the first surface 111a of the first substrate layer 111 and a second metal layer 134b on the third surface 131a of the second substrate layer 131. A redox reaction is then performed (step S9B), forming a first copper layer 112 on the first metal layer 114b and a second copper layer 132 on the second metal layer 134b, resulting in... Figure 4 The first substrate 110 and the second substrate 130.

[0094] Please see Figure 14 See also Figure 7 and Figure 9 . Figure 14This is a flowchart illustrating the copper layer formation process of a circuit board fabrication method according to a fourth embodiment. In the fourth embodiment, prior to the steps of providing the first substrate 110 and the second substrate 130, metallization (step S8C) is performed, forming a first metal layer 114b on the first surface 111a of the first substrate layer 111 and a second metal layer 134b on the third surface 131a of the second substrate layer 131. Electroplating (step S9C) is then performed, forming a first copper layer 112 on the first metal layer 114b and a second copper layer 132 on the second metal layer 134b, resulting in... Figure 4 The first substrate 110 and the second substrate 130.

[0095] In other embodiments, the circuit board 100 may be composed of multiple substrates, not limited to the stacking of two substrates, namely the first substrate 110 and the second substrate 130.

[0096] Please see Figure 15 See also Figure 10A . Figure 10A This is a perspective view of a circuit board according to a fifth embodiment. Figure 15 This is a flowchart of a method for manufacturing a circuit board according to a fifth embodiment. In the fifth embodiment, the first substrate 110 further includes a third copper layer 115 located on the second surface 111b. The second substrate 130 further includes a fourth copper layer 135 located on the fourth surface 131b. During preprocessing, in addition to forming the first flock layer 113 and the second flock layer 133, a preprocessing step (S11B) is also performed to form a third flock layer 116 on the surface of the third copper layer 115 of the first substrate 110 and a fourth flock layer 136 on the surface of the fourth copper layer 135 of the second substrate 130. The third flock layer 116 has a plurality of third flocks 1161 and a plurality of third receiving portions 1162, with third receiving portions 1162 formed between each third flock 1161. The fourth flock layer 136 has a plurality of fourth flocks 1361 and a plurality of fourth receiving portions 1362, with fourth receiving portions 1362 formed between each fourth flock 1361.

[0097] Specifically, circuit board 100 can be composed of multiple stacked substrates, such as Figure 10A As shown, a third copper layer 115 can be formed on the second surface 111b of the first substrate layer 111, and the third copper layer 115 is used to connect with the textured layers of other substrates. The second substrate 130 can also be connected through the fourth copper layer 135 on the fourth surface 131b of the second substrate layer 131. Since the textured copper layers can be stacked quickly, the manufacturing time and labor consumption can be effectively reduced. In addition, since the manufacturing of the textured copper layer is more convenient and easier, it is easier to manufacture thicker multilayer boards. In the fifth embodiment, the thickness of the first copper layer 112, the second copper layer 132, the third copper layer 115 and the fourth copper layer 135 is 2 to 150 μm.

[0098] In the sixth embodiment, the substrate of the circuit board 100 can be stacked in multiple directions to achieve a multi-directional flexing effect. Please refer to... Figure 10B and Figure 10C . Figure 10B This is a perspective view of a circuit board according to a sixth embodiment. Figure 10C for Figure 10B A partial enlarged view of reference numeral 10C. The circuit board 100 also includes a third substrate 150, which includes a third substrate layer 151 and a fifth copper layer 152. The third substrate layer 151 has opposing fifth surfaces 151a and sixth surfaces 151b, and the fifth copper layer 152 is located on the fifth surface 151a. A fifth textured layer 153 is provided on the surface of the fifth copper layer 152 of the third substrate 150. The fifth textured layer 153 has a plurality of fifth textures 1531 and a plurality of fifth receiving portions 1532, with fifth receiving portions 1532 formed between each fifth texture 1531. The first substrate 110 and the third substrate 150 are mated together, such that the first fibers 1131 of the first substrate 110 and the fifth receiving portions 1532 of the third substrate 150 are mutually engaged, and the fifth fibers 1531 of the third substrate 150 and the first receiving portions 1132 of the first substrate 110 are mutually engaged, and the third substrate 150 and the second substrate 130 are parallel to each other. Specifically, the first substrate 110 extends to two ends, and the second substrate 130 and the third substrate 150 are respectively mated to the two ends of the first substrate 110. There is a gap between the second substrate 130 and the third substrate 150, and they are parallel to each other. A gap is reserved between the second substrate 130 and the third substrate 150 to retain space for the first substrate 110 to flex. In this way, the circuit board 100 can be formed by stacking substrates in different directions and has a multi-directional flexing effect.

[0099] In summary, the method for manufacturing circuit board 100 produces a first substrate 110 and a second substrate 130 with a textured copper surface structure. The first substrate 110 with the textured copper surface structure is modularized, allowing it to be interlocked with the textured layer of the second substrate 130. Since the textured copper layers can be quickly stacked, manufacturing time and labor costs are effectively reduced. Furthermore, the fabrication using textured copper layers is convenient and easy, making it easier to manufacture thicker multilayer boards. Additionally, since the interlocking of the first substrate 110 and the second substrate 130 can be performed at a lower temperature, the characteristics of the circuit board can be avoided due to the high-temperature operating environment.

Claims

1. A method for manufacturing a circuit board, characterized in that, include: A first substrate and a second substrate are provided. The first substrate includes a first substrate layer and a first copper layer. The first substrate layer has a first surface and a second surface opposite to each other. The first copper layer is located on the first surface. The second substrate includes a second substrate layer and a second copper layer. The second substrate layer has a third surface and a fourth surface opposite to each other. The second copper layer is located on the third surface. A pretreatment is performed to form a first velvet layer on the surface of the first copper layer of the first substrate and a second velvet layer on the surface of the second copper layer of the second substrate. The first velvet layer has a plurality of first velvets and a plurality of first receiving portions, with the first receiving portions formed between each of the first velvets. The second velvet layer has a plurality of second velvets and a plurality of second receiving portions, with the second receiving portions formed between each of the second velvets. as well as The first substrate is mated with the second substrate, such that the first fibers of the first substrate and the second receiving portions of the second substrate are mutually engaged, and the second fibers of the second substrate and the first receiving portions of the first substrate are mutually engaged.

2. The method for manufacturing a circuit board according to claim 1, characterized in that, Prior to providing the first substrate and the second substrate, the method further includes electroplating deposition to form a first metal layer on the first surface of the first substrate layer and a second metal layer on the third surface of the second substrate layer. as well as Electroplating is performed to form a first copper layer on the first metal layer and a second copper layer on the second metal layer.

3. The method for manufacturing a circuit board according to claim 1, characterized in that, Prior to the steps of providing the first substrate and the second substrate, the method further includes performing metal coating to form a first metal layer on the first surface of the first substrate layer and a second metal layer on the third surface of the second substrate layer; and A redox reaction is carried out to form a first copper layer on the first metal layer and a second copper layer on the second metal layer.

4. The method for manufacturing a circuit board according to claim 1, characterized in that, Before the step of providing the first substrate and the second substrate, metallization is further performed, forming a first metal layer on the first surface of the first substrate layer and a second metal layer on the third surface of the second substrate layer; as well as Electroplating is performed to form a first copper layer on the first metal layer and a second copper layer on the second metal layer.

5. The method for manufacturing a circuit board according to claim 1, characterized in that, The first substrate layer and the second substrate layer are made of polyimide, modified polyimide, liquid crystal polymer, fluorine polymer or ceramic material.

6. The method for manufacturing a circuit board according to any one of claims 1 to 4, characterized in that, The first substrate further includes a third copper layer located on the second surface, and the second substrate further includes a fourth copper layer located on the fourth surface. The manufacturing method further includes: A pretreatment is performed to form a third velvet layer on the surface of the third copper layer of the first substrate and a fourth velvet layer on the surface of the fourth copper layer of the second substrate. The third velvet layer has a plurality of third velvets and a plurality of third receiving portions, with the third receiving portions formed between each of the third velvets. The fourth velvet layer has a plurality of fourth velvets and a plurality of fourth receiving portions, with the fourth receiving portions formed between each of the fourth velvets.

7. The method for manufacturing a circuit board according to claim 6, characterized in that, The thickness of the first copper layer, the second copper layer, the third copper layer and the fourth copper layer is 2 to 150 μm.

8. A circuit board, characterized in that, include: A first substrate, the first substrate including a first substrate layer and a first copper layer, the first substrate layer having a first surface and a second surface opposite to each other, the first copper layer being located on the first surface, wherein the surface of the first copper layer of the first substrate has a first fuzz layer, the first fuzz layer having a plurality of first fuzzes and a plurality of first receiving portions, the first receiving portions being formed between each of the first fuzzes; and A second substrate has a second substrate layer and a second copper layer. The second substrate layer has a third surface and a fourth surface opposite to each other. The second copper layer is located on the third surface. A second velvet layer is provided on the surface of the second copper layer of the second substrate. The second velvet layer has a plurality of second velvets and a plurality of second receiving portions. The second receiving portions are formed between each of the second velvets. The first substrate is docked with the second substrate, such that the first fibers of the first substrate are interlocked with the second receiving portions of the second substrate, and the second fibers of the second substrate are interlocked with the first receiving portions of the first substrate.

9. The circuit board according to claim 8, characterized in that, The first surface of the first substrate layer has a first metal layer, and the third surface of the second substrate layer has a second metal layer. The first metal layer has a first copper layer, and the second metal layer has a second copper layer.

10. The circuit board according to claim 8, characterized in that, The first substrate layer and the second substrate layer are made of polyimide, modified polyimide, liquid crystal polymer, fluorine polymer or ceramic material.

11. The circuit board according to claim 8 or 9, characterized in that, The first substrate includes a third copper layer located on the second surface, and the second substrate includes a fourth copper layer located on the fourth surface. The surface of the third copper layer of the first substrate has a third velvet layer, and the surface of the fourth copper layer of the second substrate has a fourth velvet layer. The third velvet layer has a plurality of third velvets and a plurality of third receiving portions, with the third receiving portions formed between each third velvet. The fourth velvet layer has a plurality of fourth velvets and a plurality of fourth receiving portions, with the fourth receiving portions formed between each fourth velvet.

12. The circuit board according to claim 11, characterized in that, The thickness of the first copper layer, the second copper layer, the third copper layer and the fourth copper layer is 2 to 150 μm.

13. The circuit board according to claim 8, characterized in that, It also includes a third substrate, which includes a third substrate layer and a fifth copper layer. The third substrate layer has a fifth surface and a sixth surface opposite to each other. The fifth copper layer is located on the fifth surface. The surface of the fifth copper layer of the third substrate has a fifth velvet layer. The fifth velvet layer has a plurality of fifth velvets and a plurality of fifth receiving portions, and the fifth receiving portions are formed between each of the fifth velvets. The first substrate is docked with the third substrate, such that the first fibers of the first substrate are interlocked with the fifth receiving portions of the third substrate, the fifth fibers of the third substrate are interlocked with the first receiving portions of the first substrate, and the third substrate is parallel to the second substrate.

14. The circuit board according to claim 8, characterized in that, The first substrate layer includes at least one substrate, at least two metal lines and at least one via. The at least two metal lines are formed on opposite sides of the at least one substrate, and the at least one via penetrates the at least one substrate and is electrically connected to the at least two metal lines.

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