Method for forming a mask layout

By dividing the initial pattern into sub-patterns and splitting and combining them on the mask pattern, the etching deviation problem in optical proximity correction is solved, achieving a more efficient optical proximity correction effect and reducing the detection size deviation after etching.

CN116413995BActive Publication Date: 2026-01-20SEMICON MFG INT (SHANGHAI) CORP +1
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Patent Information

Application Number
CN202111679044.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-12-31
Publication Date
2026-01-20
Estimated Expiration
2041-12-31

AI Technical Summary

Technical Problem

Existing optical proximity correction techniques suffer from insufficient etching deviation in semiconductor manufacturing, leading to lithographic pattern distortion. Furthermore, existing methods require the collection of large amounts of data to establish complex etching models, resulting in low efficiency.

Method used

The initial pattern is divided into several sub-patterns, and then split and combined on different mask layouts to cover the actual graphic environment in the design, providing accurate optical proximity correction data and reducing the detection size deviation after etching.

Benefits of technology

Without changing the etching deviation table, the effect of optical proximity correction is improved, the size deviation of post-etching detection is reduced, the correction efficiency is improved, and the tedious process of complex data collection and model building is avoided.

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Abstract

A method for forming mask layout, comprising: providing an initial layout, the initial layout comprising a first pattern and a second pattern arranged along a first direction and parallel to a second direction, the first pattern being longer than the second pattern; dividing the first pattern into a plurality of sub-patterns; and combining the second pattern and the plurality of sub-patterns to form different mask layouts. By dividing the first pattern into a plurality of sub-patterns and combining the second pattern and the plurality of sub-patterns to form different mask layouts without changing the existing etching bias table, the collected pattern environment in the etching bias table can cover the pattern environment in the actual design, thereby providing correct correction data for optical proximity correction to reduce the problem of the detected size of the first pattern being too large after etching and the detected size of the second pattern being too small after etching. In addition, there is no need to collect a large amount of detailed data to re-establish an etching model, and the correction efficiency can be effectively improved.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor manufacturing, and in particular to a mask layout forming method. BACKGROUND

[0002] Photolithography is a very important technology in semiconductor manufacturing, which can transfer a pattern from a mask to a wafer to form a semiconductor product according to the design requirements. The photolithography process includes an exposure step, a developing step after the exposure step, and an etching step after the developing step. In the exposure step, light passes through the transparent area of the mask and irradiates the wafer coated with photoresist, and the photoresist undergoes a chemical reaction under the irradiation of light. In the developing step, the photoresist is developed based on the difference in the solubility of the exposed and unexposed photoresist to the developer, to form a photoresist pattern and transfer the mask pattern to the photoresist. In the etching step, the wafer is etched based on the photoresist pattern formed by the photoresist layer, and the mask pattern is further transferred to the wafer.

[0003] In semiconductor manufacturing, as the design size continues to shrink, the design size is closer and closer to the limit of the photolithography imaging system, and the diffraction effect of light becomes more and more obvious, resulting in optical image degradation of the design pattern, and the actual photoresist pattern formed is severely distorted relative to the pattern on the mask layout. The actual pattern formed on the wafer after photolithography is different from the design pattern, which is called optical proximity effect (OPE).

[0004] In order to correct the optical proximity effect, optical proximity correction (OPC) is generated. The core idea of optical proximity correction is to establish an optical proximity correction model based on the consideration of canceling the optical proximity effect, and to design a photomask pattern according to the optical proximity correction model. Although the photoresist pattern after photolithography has an optical proximity effect relative to the photomask pattern, since the photomask pattern is designed according to the optical proximity correction model, the photoresist pattern after photolithography is close to the target pattern that the user actually wants to obtain.

[0005] However, the optical proximity correction in the prior art still has many problems. SUMMARY

[0006] The technical problem solved by the present application is to provide a mask layout forming method that can effectively improve the effect of optical proximity correction.

[0007] To solve the above problems, the technical scheme of the present application provides a mask layout forming method, comprising: providing an initial layout, the initial layout comprising a first pattern and a second pattern arranged along a first direction and parallel to a second direction, the first direction being perpendicular to the second direction, in the second direction, the first pattern having a first length dimension, the second pattern having a second length dimension, the first length dimension being greater than the second length dimension; dividing the first pattern into a plurality of sub-patterns along the second direction; and splitting and combining the second pattern and the plurality of sub-patterns to form on different mask layouts.

[0008] Optionally, the method of dividing the first pattern into a plurality of sub-patterns along the second direction comprises: in the first direction, obtaining a projection range of the second pattern on the first pattern, the projection range having opposite first and second end points; and dividing the first pattern at the first and second end points respectively to divide the first pattern into a first sub-pattern, a second sub-pattern and a third sub-pattern along the second direction, the second sub-pattern being located between the first and third sub-patterns, in the second direction, the first sub-pattern having a third length dimension and the third sub-pattern having a fourth length dimension.

[0009] Optionally, the method of splitting and combining the second pattern and the plurality of sub-patterns to form on different mask layouts comprises: providing a minimum design rule length dimension; and when the third length dimension and the fourth length dimension are both greater than the minimum design rule length dimension, forming the second sub-pattern and the first sub-pattern, and the second sub-pattern and the third sub-pattern on different mask layouts.

[0010] Optionally, forming the second sub-pattern and the first sub-pattern, and the second sub-pattern and the third sub-pattern on different mask layouts comprises: combining the second sub-pattern and the second pattern to form on a first mask layout; and combining the first sub-pattern and the third sub-pattern to form on a second mask layout.

[0011] Optionally, forming the second sub-pattern and the first sub-pattern, and the second sub-pattern and the third sub-pattern on different mask layouts comprises: forming the second sub-pattern on a first mask layout; and combining the second pattern, the first sub-pattern and the third sub-pattern to form on a second mask layout.

[0012] Optionally, forming the second sub-pattern and the first sub-pattern, and the second sub-pattern and the third sub-pattern on different mask patterns comprises: forming the first sub-pattern on a first mask pattern; forming the second sub-pattern on a second mask pattern; forming the third sub-pattern on a third mask pattern; and forming the second pattern on any one of the first mask pattern, the second mask pattern and the third mask pattern.

[0013] Optionally, the method of splitting and combining the second pattern and the sub-patterns to form on different mask patterns comprises: providing a minimum design rule length size; when the third length size is less than the minimum design rule length size, combining the first sub-pattern and the second sub-pattern to form on a first mask pattern; and combining the third sub-pattern and the second pattern to form on a second mask pattern.

[0014] Optionally, the method of splitting and combining the second pattern and the sub-patterns to form on different mask patterns comprises: providing a minimum design rule length size; when the fourth length size is less than the minimum design rule length size, combining the third sub-pattern and the second sub-pattern to form on a first mask pattern; and combining the first sub-pattern and the second pattern to form on a second mask pattern.

[0015] Optionally, the method of splitting and combining the second pattern and the sub-patterns to form on different mask patterns comprises: providing a minimum design rule length size; when the third length size and the fourth length size are both less than the minimum design rule length size, combining the first sub-pattern, the second sub-pattern and the third sub-pattern to form on a first mask pattern; and forming the second pattern on a second mask pattern.

[0016] Optionally, the first length size is greater than 250 nanometers; and the second length size is less than 250 nanometers.

[0017] Compared with the prior art, the technical scheme of the present application has the following advantages:

[0018] The forming method of the mask layout of the technical scheme of the present application, without changing the existing etching deviation table, the first pattern is divided into several sub-patterns along the second direction; the second pattern and several sub-patterns are split and combined to form on different mask layouts. The collected pattern environment in the etching deviation table can cover the pattern environment in the actual design, and then correct data is provided for optical proximity correction to reduce the problem of the first pattern after etching detection size being too large and the second pattern after etching detection size being too small. In addition, it is not necessary to collect a large amount of detailed data to re-establish the etching model, and the correction efficiency can be effectively improved. BRIEF DESCRIPTION OF DRAWINGS

[0019] Figure 1 is a flow chart of the forming method of the mask layout of the embodiment of the present application;

[0020] Figures 2 to 4 is a structure schematic diagram of the forming method of the mask layout in the embodiment of the present application;

[0021] Figure 5 is a structure schematic diagram of the second pattern and several sub-patterns formed on different mask layouts in another embodiment of the present application;

[0022] Figure 6 is a structure schematic diagram of the second pattern and several sub-patterns formed on different mask layouts in another embodiment of the present application;

[0023] Figure 7 is a structure schematic diagram of the second pattern and several sub-patterns formed on different mask layouts in another embodiment of the present application;

[0024] Figure 8 is a structure schematic diagram of the second pattern and several sub-patterns formed on different mask layouts in another embodiment of the present application;

[0025] Figure 9 is a structure schematic diagram of the second pattern and several sub-patterns formed on different mask layouts in another embodiment of the present application. DETAILED DESCRIPTION

[0026] As described in the background, there are still many problems in the optical proximity correction in the prior art. The following will be specifically described.

[0027] The mask correction of optical proximity correction in the prior art is reflected in the correction of after development inspection (ADI) size. The after development inspection size is subjected to etching process to obtain after etching inspection (AEI) size on wafer. The after development inspection size and the after etching inspection size have a certain etch bias. The existing etch bias table is obtained by collecting feature sizes (such as length, width of target pattern and spacing between adjacent patterns) of different size types of patterns. The feature sizes of known patterns are queried on the etch bias table to obtain corresponding etch bias. Then, the corresponding optical proximity correction is performed according to the etch bias, so that the after etching inspection size obtained finally is kept within a certain threshold range of target size.

[0028] However, the existing etch bias table collects patterns in a relatively simple environment, generally a pattern environment formed by several short bars (short bar), without complex and variable pattern environments such as long short long (LSL), long short short (LSS) and short long short (SLS) composed of long short bars (long short bar). However, the pattern environment in actual design is much more complex than the pattern environment in the etch bias table, resulting in insufficient coverage of the etch bias table. If the existing etch bias table is still used in the process of optical proximity correction, the after etching inspection size of long pattern will be too large and the after etching inspection size of short pattern will be too small.

[0029] In the prior art, the methods to solve the above problems include: 1. Collect a large amount of after development inspection size and after etching inspection size data, calculate the etch bias to generate the etch bias table, so that the pattern environment in the etch bias table covers all types of pattern environments in actual design. This method has two disadvantages: 1. It is difficult to collect a large amount of after development inspection size and after etching inspection size data of patterns, which is time-consuming and has low feasibility; 2. Although the etch bias table is accurate, it is also extremely complex, and the corresponding optical proximity correction code is also tedious and long, which is prone to errors; 2. Establish an etching model, and the optical proximity correction obtains the after development inspection size adjusted again based on the model. The disadvantage is that the establishment of the etching model also needs to collect and arrange a large amount of data, and the complex model adjustment has a long cycle.

[0030] On this basis, the application provides a mask layout forming method, in which the first pattern is divided into several sub-patterns without changing the existing etching deviation table; and the second pattern and the several sub-patterns are split and combined to form on different mask layouts. The pattern environment collected in the etching deviation table can cover the pattern environment in the actual design, thereby providing correct correction data for optical proximity correction, so as to reduce the problems that the detected size of the first pattern after etching is too large and the detected size of the second pattern after etching is too small. In addition, it is not necessary to collect a large amount of detailed data to re-establish an etching model, and the correction efficiency can be effectively improved.

[0031] In order to make the above objectives, characteristics and advantages of the present application more obvious and easy to understand, the specific embodiments of the present application are described in detail below with reference to the drawings.

[0032] Figure 1 is a flow chart of the mask layout forming method of an embodiment of the present application, which comprises:

[0033] In step S101, an initial layout is provided, which comprises a first pattern and a second pattern arranged along a first direction and parallel to a second direction, the first direction being perpendicular to the second direction, the first pattern having a first length dimension in the second direction, and the second pattern having a second length dimension, the first length dimension being greater than the second length dimension;

[0034] In step S102, the first pattern is divided into several sub-patterns along the second direction.

[0035] In step S103, the second pattern and the several sub-patterns are split and combined to form on different mask layouts.

[0036] The steps of the mask layout forming method are described in detail below with reference to the drawings.

[0037] Figures 2 to 4 is a structural schematic diagram of each step of the mask layout forming method in the embodiment of the present application;

[0038] Figure 5 is a structural schematic diagram of the second pattern and the several sub-patterns forming on different mask layouts in another embodiment of the present application; Figure 6 is a structural schematic diagram of the second pattern and the several sub-patterns forming on different mask layouts in another embodiment of the present application; Figure 7 is a structural schematic diagram of the second pattern and the several sub-patterns forming on different mask layouts in another embodiment of the present application; Figure 8 is a structural schematic diagram of the second pattern and the several sub-patterns forming on different mask layouts in another embodiment of the present application; Figure 9is a structure diagram of a second pattern and a plurality of sub-patterns formed on different mask patterns in another embodiment of the present application.

[0039] Referring to Figure 2 , an initial mask pattern 100 is provided, which includes a first pattern 101 and a second pattern 102 arranged along a first direction X and parallel to a second direction Y, the first direction X being perpendicular to the second direction Y, in the second direction Y, the first pattern 101 has a first length size d1, and the second pattern 102 has a second length size d2, the first length size d1 being greater than the second length size d2.

[0040] In this embodiment, the initial mask pattern 100 is ideally formed on a wafer after the mask pattern is made, the mask pattern is exposed, and the pattern is etched and transferred, and the pattern formed on the wafer is the same as the target pattern. Figure 1 However, in the actual manufacturing process, there are problems of optical proximity effect in the process of mask exposure, and problems of etching deviation in the process of pattern etching and transferring, resulting in differences between the pattern formed on the wafer and the target pattern. Therefore, optical proximity correction is needed to reduce the differences between the pattern actually formed on the wafer and the target pattern.

[0041] In this embodiment, the first length size d1 is greater than 250 nanometers; and the second length size d2 is less than 250 nanometers.

[0042] Referring to Figure 3 , the first pattern 101 is divided into a plurality of sub-patterns along the second direction Y.

[0043] In this embodiment, the method of dividing the first pattern 101 into a plurality of sub-patterns along the second direction Y includes: obtaining the projection range of the second pattern 102 on the first pattern 101 in the first direction X, the projection range having opposite first and second end points A1 and A2; and dividing the first pattern 101 at the first and second end points A1 and A2, respectively, to divide the first pattern 101 into a first sub-pattern 101a, a second sub-pattern 101b and a third sub-pattern 101c in the second direction Y, the second sub-pattern 101b being located between the first sub-pattern 101a and the third sub-pattern 101c, the first sub-pattern 101a having a third length size d3 in the second direction Y, and the third sub-pattern 101c having a fourth length size d4.

[0044] Referring to Figure 4 , the second pattern 102 and a plurality of sub-patterns are split and combined to form on different mask patterns.

[0045] In the embodiment, the first pattern 101 is divided into several sub-patterns along the second direction Y without changing the existing etching bias table; the second pattern 102 and the several sub-patterns are combined to form on different mask patterns. The collected pattern environment in the etching bias table can cover the pattern environment in the actual design, and correct data for optical proximity correction is provided to reduce the problem that the detected size of the first pattern 101 after etching is too large and the detected size of the second pattern 102 after etching is too small. In addition, a large amount of detailed data is not required to re-establish an etching model, and the correction efficiency can be effectively improved.

[0046] In the embodiment, the method of combining the second pattern 102 and the several sub-patterns to form on different mask patterns includes: providing a minimum design rule length size d r ; the third length size d3 and the fourth length size d4 are both greater than the minimum design rule length size d r ; the second sub-pattern 101b and the first sub-pattern 101a and the second sub-pattern 101b and the third sub-pattern 101c are formed on different mask patterns.

[0047] In the embodiment, the minimum design rule length size d r is an exposure limit size. When the length size of a pattern is less than the minimum design rule length size d r , the exposure cannot be completed. When the third length size d3 and the fourth length size d4 are both greater than the minimum design rule length size d r , it indicates that the first sub-pattern 101a and the third sub-pattern 101c can complete the exposure process. Therefore, the second sub-pattern 101b and the first sub-pattern 101a and the second sub-pattern 101b and the third sub-pattern 101c are formed on different mask patterns to reduce the length difference with the second pattern 102.

[0048] In the embodiment, the second sub-pattern 101b and the first sub-pattern 101a and the second sub-pattern 101b and the third sub-pattern 101c are formed on different mask patterns, including: the second sub-pattern 101b and the second pattern 102 are combined to form on a first mask pattern 200; the first sub-pattern 101a and the third sub-pattern 101c are combined to form on a second mask pattern 300.

[0049] It should be noted that when the second pattern 102 and the plurality of sub-patterns are split and combined to form on different mask patterns, the relative positions between the second pattern 102 or the plurality of sub-patterns on each mask pattern remain unchanged.

[0050] For reference Figure 5 In another embodiment, forming the second sub-pattern 101b and the first sub-pattern 101a, and the second sub-pattern 101b and the third sub-pattern 101c on different mask patterns comprises: forming the second sub-pattern 101b on a first mask pattern 200; combining the second pattern 102, the first sub-pattern 101a and the third sub-pattern 101c to form on a second mask pattern 300.

[0051] For reference Figure 6 In yet another embodiment, forming the second sub-pattern 101b and the first sub-pattern 101a, and the second sub-pattern 101b and the third sub-pattern 101c on different mask patterns comprises: forming the first sub-pattern 101a on a first mask pattern 200; forming the second sub-pattern 101b on a second mask pattern 300; forming the third sub-pattern 101c on a third mask pattern 400; forming the second pattern 102 on any one of the first mask 200, the second mask 300 and the third mask 400.

[0052] It should be noted that in each of the above embodiments, when the second pattern 102 and the plurality of sub-patterns are split and combined to form on different mask patterns, the pattern density on each mask pattern, i.e. the number of patterns per unit area, needs to be considered, and the pattern density in each mask pattern needs to be as uniform as possible.

[0053] For reference Figure 7 In yet another embodiment, the method of splitting and combining the second pattern 102 and the plurality of sub-patterns to form on different mask patterns further comprises: providing a minimum design rule length dimension d r ; the third length dimension d3 is less than the minimum design rule length dimension d r Combining the first sub-pattern 101a and the second sub-pattern 101b to form on a first mask pattern 200; combining the third sub-pattern 101c and the second pattern 102 to form on a second mask pattern 300.

[0054] Since the third length dimension d3 is less than the minimum design rule length dimension d rTherefore, the first sub-pattern 101a cannot complete exposure, and the first sub-pattern 101a and the second sub-pattern 101b need to be combined to form on the same mask pattern.

[0055] Please refer to Figure 8 In another embodiment, the method of splitting and combining the second pattern 102 and several sub-patterns to form on different mask patterns comprises: providing a minimum design rule length size d r When the fourth length size d4 is less than the minimum design rule length size d r , the third sub-pattern 101c and the second sub-pattern 101b are combined to form on the first mask pattern 200, and the first sub-pattern 101a and the second pattern 102 are combined to form on the second mask pattern 300.

[0056] Because the fourth length size d4 is less than the minimum design rule length size d r , the third sub-pattern 101c cannot complete exposure, and the third sub-pattern 101c and the second sub-pattern 101b need to be combined to form on the same mask pattern.

[0057] Please refer to Figure 9 In another embodiment, the method of splitting and combining the second pattern 102 and several sub-patterns to form on different mask patterns further comprises: providing a minimum design rule length size d r ; the third length size d3 and the fourth length size d4 are both less than the minimum design rule length size d r The first sub-pattern 101a, the second sub-pattern 101b and the third sub-pattern 101c are combined to form on the first mask pattern 200, and the second pattern 102 is formed on the second mask pattern 200.

[0058] Because the third length size d3 and the fourth length size d4 are both less than the minimum design rule length size d r , the first sub-pattern 101a and the third sub-pattern 101c cannot complete exposure, and the first sub-pattern 101a, the second sub-pattern 101b and the third sub-pattern 101c need to be combined to form on the same mask pattern.

[0059] Although the present application is disclosed as above, the present application is not limited to this. Any person skilled in the art, without departing from the spirit and scope of the present application, can make various changes and modifications, and therefore the protection scope of the present application should be limited by the scope defined by the claims.

Claims

1. A method of forming a mask layout, the method comprising: The application relates to a method for forming a mask layout, comprising the following steps: providing an initial layout, wherein the initial layout comprises a first pattern and a second pattern arranged along a first direction and parallel to a second direction, the first direction being perpendicular to the second direction, in the second direction, the first pattern having a first length dimension, and the second pattern having a second length dimension, the first length dimension being greater than the second length dimension; segmenting the first pattern along the second direction into a plurality of sub-patterns; splitting and combining the second pattern and the plurality of sub-patterns to form on different mask layouts, so that the pattern environment collected in the etching deviation table can cover the pattern environment in the actual design; wherein the plurality of sub-patterns of the first pattern comprises a first sub-pattern, a second sub-pattern and a third sub-pattern arranged along the second direction, the second sub-pattern being located between the first sub-pattern and the third sub-pattern, in the second direction, the first sub-pattern having a third length dimension, and the third sub-pattern having a fourth length dimension; the method for splitting and combining the second pattern and the plurality of sub-patterns to form on different mask layouts comprises the following steps: providing a minimum design rule length dimension; when the third length dimension and the fourth length dimension are both greater than the minimum design rule length dimension, forming the second sub-pattern and the first sub-pattern on different mask layouts, and forming the second sub-pattern and the third sub-pattern on different mask layouts.

2. The method of claim 1, wherein The method for segmenting the first pattern along the second direction into a plurality of sub-patterns comprises the following steps: in the first direction, obtaining a projection range of the second pattern on the first pattern, the projection range having opposite first and second end points; respectively segmenting the first pattern at the first and second end points to segment the first pattern along the second direction into a first sub-pattern, a second sub-pattern and a third sub-pattern, the second sub-pattern being located between the first sub-pattern and the third sub-pattern, in the second direction, the first sub-pattern having a third length dimension, and the third sub-pattern having a fourth length dimension.

3. The method of claim 1, wherein the mask pattern is formed by a process selected from the group consisting of: photolithography, electron beam lithography, X-ray lithography, and nanoimprint lithography. The method for splitting and combining the second pattern and the plurality of sub-patterns to form on different mask layouts comprises the following steps: combining the second sub-pattern and the second pattern to form on a first mask layout; combining the first sub-pattern and the third sub-pattern to form on a second mask layout.

4. The method of claim 1, wherein The method for splitting and combining the second pattern and the plurality of sub-patterns to form on different mask layouts comprises the following steps: forming the second sub-pattern on a first mask layout; combining the second pattern, the first sub-pattern and the third sub-pattern to form on a second mask layout.

5. The method of claim 1, wherein The second sub-pattern and the first sub-pattern are formed on different mask patterns, and the second sub-pattern and the third sub-pattern are formed on different mask patterns, including: forming the first sub-pattern on a first mask pattern; forming the second sub-pattern on a second mask pattern; forming the third sub-pattern on a third mask pattern; and forming the second pattern on any one of the first mask pattern, the second mask pattern and the third mask pattern.

6. The method of claim 1, wherein The method of splitting and combining the second pattern and the sub-patterns to form on different mask patterns includes: providing a minimum design rule length size; when the third length size is less than the minimum design rule length size, combining the first sub-pattern and the second sub-pattern to form on a first mask pattern; and combining the third sub-pattern and the second pattern to form on a second mask pattern.

7. The method of claim 1, wherein The method of splitting and combining the second pattern and the sub-patterns to form on different mask patterns includes: providing a minimum design rule length size; when the fourth length size is less than the minimum design rule length size, combining the third sub-pattern and the second sub-pattern to form on a first mask pattern; and combining the first sub-pattern and the second pattern to form on a second mask pattern.

8. The method of claim 1, wherein The method of splitting and combining the second pattern and the sub-patterns to form on different mask patterns includes: providing a minimum design rule length size; when the third length size and the fourth length size are both less than the minimum design rule length size, combining the first sub-pattern, the second sub-pattern and the third sub-pattern to form on a first mask pattern; and forming the second pattern on a second mask pattern.

9. The method of claim 1, wherein The first length size is greater than 250 nanometers; and the second length size is less than 250 nanometers.

Citation Information

Patent Citations

  • Layout splitting method and splitting system

    CN109188857A

  • Correction method of target layout, correction method of mask layout, mask and semiconductor structure

    CN112824972A