A Space Electronic Integrated General Processor and Method Based on On-Orbit Flight

Abstract

In view of the deficiencies existing in the current situation of the electrical system of on-orbit spacecraft, the present invention provides an aerospace electronic integrated general processor based on on-orbit flight, which includes a power management module, a system management module, a general processing module, and an interface control module; the power management module provides power supply for the system management module, the general processing module, and the interface control module to meet the power supply requirements of the modules; the system management module realizes blueprint storage, configuration management, task deployment, scheduling, and fault management; the general processing module realizes data calculation, data conversion, and task processing, and the internal application configuration is issued by the system management module according to tasks; the general processing module receives and outputs data through the interface control module; the interface control module receives internal and external data and completes the internal and external communication functions of the general integrated processor.

Description

Technical Field

[0001] The present invention relates to an aerospace electronic integration and general processor device and method, belonging to the electrical field. Background Art

[0002] With the continuous increase in the types and functions of the electrical systems of on-orbit spacecraft, a large number of high-tech technologies have been widely adopted, and the complexity of on-orbit spacecraft has been increasing day by day, and the workload of testing, maintenance, and support has increased significantly. The contradiction between fully realizing the "six properties" requirements of on-orbit spacecraft and the current actual level has become increasingly prominent.

[0003] The hardware components of the on-orbit spacecraft's on-board electrical system mainly include: on-board computer, integrated controller, inertial measurement device, servo mechanism control device, central programmer, memory, radio frequency device and antenna, and other parameter measurement devices. Each on-board electrical device has an independent structural shape and is developed by different units. The devices communicate with each other through digital buses (such as 1553B bus and CAN bus, etc.). The main deficiencies in hardware resources mainly include:

[0004] a) Each electrical device has an independent structural shape and computing and processing unit, occupying a large amount of structural space and mass, thus affecting the overall performance index of the missile;

[0005] b) The computing speed of the processor cannot meet the requirements;

[0006] c) The communication capabilities provided by the 1553B bus, CAN bus, and RS422 bus only reach the order of megabits per second (Mbps), and the bus transmission rate is slow, becoming a bottleneck restricting the optimization of the missile's electrical performance.

[0007] The aerospace industry needs to draw on the advanced design concepts of domestic and foreign avionics systems to solve the contradiction between the application requirements and technical status of the on-orbit spacecraft's electrical system. Summary of the Invention

[0008] The technical problem to be solved by the present invention is: aiming at the deficiencies in the current situation of the on-orbit spacecraft's electrical system, absorbing the technical characteristics of the ASAAC integrated avionics architecture, the present invention provides a spaceborne electronic integrated general processor and method based on on-orbit flight, adopting a general and modular design method, enabling resource sharing and mutual redundancy for parts with similar functional characteristics and closely related tasks in the same functional area, and realizing dynamic reconfiguration and fault tolerance.

[0009] The technical solution adopted by the present invention is: a spaceborne electronic integrated general processor based on on-orbit flight, including a power management module, a system management module, a general processing module, and an interface control module;

[0010] The power management module provides power supply for the system management module, the general processing module, and the interface control module to meet their power requirements.

[0011] The system management module realizes blueprint storage, configuration management, task deployment, scheduling, and fault management.

[0012] The general processing module realizes data calculation, data conversion, and task processing. The internal application configuration is sent by the system management module according to the task. The general processing module receives and outputs data through the interface control module.

[0013] The interface control module receives internal and external data and completes the internal and external communication functions of the general integrated processor.

[0014] After the power-on of the system management module and the general processing module, hardware initialization and hardware self-check operations are performed. The system management module loads and runs the corresponding OS image from the local mass storage, asks each general processing module for the self-check result, and each general processing module feeds back the self-check result to the system management module. The system management module parses the blueprint configuration through the general processing module, confirms the OS image and configuration to be loaded by each general processing module, and downloads the corresponding OS image to the general processing module with normal self-check results and starts the operation of the OS according to the self-check results of each general processing module. For the general processing module with abnormal self-check, the system management module will execute the corresponding fault handling strategy according to the blueprint configuration. After the initialization of each general processing module is completed, the system management module issues the configuration file to the general processing module. Each general processing module downloads the corresponding application configuration program to the local according to its own application configuration and starts to execute it. Each general processing module feeds back the application deployment result.

[0015] Furthermore, the power management module, the system management module, the general processing module, and the interface control module adopt a 3U VPX architecture. Data exchange between the power management module, the system management module, the general processing module, and the interface control module is realized through the real-time RapidIO bus and the non-real-time Gigabit Ethernet bus, and the management function of the module is realized through the redundant IPMB bus.

[0016] Furthermore, the power management module is implemented by multiple DC / DC power supplies, receives external primary power supply, and converts it into secondary power required by the system management module, the general processing module, and the interface control module.

[0017] Furthermore, the power management module adopts a distributed network, which is divided into two levels in total. The first level is the front-stage power supply, which performs DC / DC conversion on the externally provided 28V DC power supply to convert it into 12V DC power supply of the intermediate bus voltage and 5V DC power supply, and reaches the power input ends of the system management module, the general processing module, and the interface control module through the bottom plate. The second level is the power supply of the functional module, which performs DC / DC conversion on the 12V DC power supply of the bus to convert it into the secondary voltage values required by the system management module, the general processing module, and the interface control module.

[0018] Furthermore, the external interface of the interface control module is a digital quantity interface for RapidIO optical fiber transmission. At the same time, the RapidIO bus is also used to complete the internal real-time data exchange function of the general integrated processor; the Gigabit Ethernet bus is used to complete the internal non-real-time data exchange function of the general integrated processor; the interface control module converts the internal digital quantity into an optical fiber transmission medium. The interface control module adopts a multi-channel parallel transceiver module, simultaneously receives and transmits more than 8 signals, and docks with the bottom plate through an optical and electrical hybrid connector to provide optical fiber connection externally.

[0019] Furthermore, the system management module includes system management module A and system management module B; system management module A serves as the main management module, and system management module B serves as the backup module; during the operation of the general integrated processor, system management module B detects the operation status information of system management module A through the heartbeat and data exchange channels. When it is found that system management module A is abnormal, system management module B takes over the system management function of the general integrated processor.

[0020] Furthermore, two or more general processing modules with the same configuration are adopted in the general integrated processor to execute the same application function.

[0021] A system boot and application deployment method for a space electronic integrated general processor based on on-orbit flight, including:

[0022] Power on the system management module and the general processing module, and the system management module and the general processing module perform hardware initialization and hardware self-check operations;

[0023] The system management module loads and runs the corresponding OS image from the local memory;

[0024] The system management module asks each general processing module about the self-check result, and each general processing module feeds back the self-check result to the system management module;

[0025] The system management module parses the blueprint configuration of the aerospace electronic integrated general processor through the general processing module, and confirms that each general processing module needs to load the OS image and configuration; according to the self-check results of each general processing module, the corresponding OS image is downloaded to the general processing module with normal self-check and the operation of the OS is started; the OS images of each general processing module are running normally and are in a state of waiting to load applications;

[0026] Each general processing module completes initialization;

[0027] The system management module issues the configuration file to the general processing module;

[0028] Each general processing module downloads the corresponding application configuration program to the local and starts to execute it according to its own application configuration;

[0029] Each general processing module feeds back the application deployment result to the system management module.

[0030] The advantages of the present invention compared with the prior art are as follows:

[0031] (1) The integrated general processor of the present invention is designed based on the principles of generalization and modularization, and is designed based on unified and open standard specifications, maximizing the reusability of software and hardware resources, reducing the full life cycle cost of the equipment, and at the same time facilitating the functional decomposition implementation and rapid system integration of the entire application system.

[0032] (2) Each module inside the integrated general processor of the present invention adopts the standard 3U VPX architecture, and each module realizes the management function of the module through the redundant IPMB bus; the unified IPMB bus management can realize the redundant backup of important functional units, thereby achieving the dynamic reconstruction and fault tolerance of functional units, and further improving the reliability of the general integrated processor.

[0033] (3) The RapidIO bus is adopted between the modules of the integrated general processor of the present invention to complete the internal real-time data exchange function of the general integrated processor, which has extremely low latency (ns) and high bandwidth, and can support baud rates of 1.25G, 2.5G, 3.125G, 5G, 6.25G, 10.3125G, improving the real-time performance of a large amount of data exchange between modules. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 It is the block diagram of the hardware system composition of the integrated general processor of the present invention;

[0035] Figure 2 It is the system boot flowchart of the integrated general processor of the present invention;

[0036] Figure 3 It is the application deployment flowchart of the integrated general processor of the present invention. Detailed Implementation Modes

[0037] The present invention will be further described below with reference to the accompanying drawings.

[0038] As Figure 1 shown, a space electronic integrated general processor based on on-orbit flight, the general processor is composed of a power management module (PMM), a system management module (SMM), a general processing module (CFM), an interface control module (IOM), etc. Each module adopts a standard 3U VPX architecture, and data exchange between modules is realized through a real-time RapidIO bus and a non-real-time gigabit Ethernet bus, and the management function of the module is realized through a redundant IPMB bus.

[0039] The power management module in the general integrated processor provides power supply requirements for the system management module, the general processing module, and the interface control module. It mainly includes sub-modules such as input overcurrent protection, DC / DC voltage conversion, and voltage regulation. This module is realized by using a modular power supply array, receives external primary power supply (generally 28VDC), and converts it into secondary power required by each module. The power supply within the system adopts a distributed network design, which is divided into two levels in total. The first level is the front-end power supply, which performs DC / DC conversion on the externally provided 28VDC, converts it to the intermediate bus voltages of 12VDC and 5VDC, and reaches the power input terminals of each functional module through the large backplane; the second level is the functional module power supply, which performs DC / DC conversion on the bus voltage of 12VDC to convert it into the secondary voltage values required by the functional module, such as 5V, 3.3V, 1.8V, etc. In order to improve the reliability of the power supply system, the front-end power supply adopts a redundant design, so that once a certain power supply fails, the other power supply can independently supply power to the functional module.

[0040] The system management module in the general integrated processor is the core control module, mainly composed of several system parts such as a PowerPC processor system, a gigabit Ethernet switching system, a RapidIO switching system, a power supply, and a clock. It integrates functions such as general system management, network support, and large-capacity storage, and realizes blueprint storage, configuration management, task deployment, scheduling, and fault management during system operation. The system management module includes two sub-parts: system management module A and system management module B. System management module A serves as the main management module to implement system management for each functional unit inside the general integrated processor, and module B serves as a backup module to implement management functions. During the operation of the general integrated processor, module B detects the operation status information of module A through a heartbeat and a data exchange channel. When it is found that module A is abnormal, module B takes over the system management function of the general integrated processor system.

[0041] The general processing module in the general integrated processor is the core module of the general processor, which consists of several parts such as a multi-core DSP processor, an FPGA, a clock, and peripheral circuits. It is mainly responsible for realizing data calculation, data conversion, and task processing in the system, and can be flexibly deployed according to the application requirements of the system, that is, the application configurations inside the general processing module are all issued by the system management module according to tasks. In the general integrated processor, to ensure the reliability of system applications, usually two or more general processing modules with the same configuration are used to execute the same application function. The two modules have the same function, are independent of each other, and are redundant backups. The general processing module can complete the mathematical calculations of spacecraft navigation, guidance, and attitude control, and can also realize task planning and task change, etc. The data source interface control module of the general processing module, and the result output of the general processing module is also the interface control module.

[0042] The interface control module in the general integrated processor is mainly responsible for receiving internal and external data and completing the internal and external communication functions of the general integrated processor. On the one hand, the external interface of the interface control module is a digital quantity interface, and the implementation form is the RapidIO optical fiber transmission form. At the same time, the RapidIO bus is also used to complete the internal high-speed real-time data exchange function of the general integrated processor; the Gigabit Ethernet bus is mainly used to complete the internal non-real-time data exchange function of the general integrated processor. The interface control module converts the digital quantity inside the system into an optical fiber transmission medium to meet the requirements of stable transmission. The interface control module can adopt a multi-channel parallel transceiver module, which can receive and transmit more than 8 channels of signals at the same time, and is docked with the system backplane through an optical and electrical hybrid connector to provide optical fiber connection externally.

[0043] The general integrated processor adopts a centralized management mode, and the boot process is uniformly controlled and completed by the system management module. After the system is powered on, the startup process can be divided into system boot and application deployment.

[0044] As Figure 2 shown, the main processes of its system boot include:

[0045] The first step is that the system management module and the general processing module are powered on, and the hardware support layers of each module inside the general integrated processor are first executed, mainly completing the necessary hardware initialization and hardware self-check operations of the CPU, memory, network, etc.;

[0046] The second step is that the system management module loads and runs the corresponding OS image from the local large-capacity memory;

[0047] The third step is that the system management module asks each general processing module about the self-check results, and each general processing module feeds back the self-check results to the system management module;

[0048] In the fourth step, the system management module parses the blueprint configuration of the general-purpose processor through the general processing module, confirms that each general processing module needs to load the OS image and configuration, and then, according to the self-check results of each general processing module, downloads the corresponding OS image to the modules with normal self-check and starts the operation of the OS. For the general processing modules with abnormal self-check, the system management module will execute the corresponding fault handling strategies according to the blueprint configuration, including operations such as hardware reset and power-off;

[0049] In the fifth step, after completing all the above operations, the OS of each general processing module is running normally and is in a state of waiting to load the application. The system boot process is completed, and next, the system management module will deploy the application according to the configuration.

[0050] As Figure 3 shown, the main process of its application deployment includes:

[0051] In the first step, the initialization of each general processing module is completed;

[0052] In the second step, the system management module issues the configuration file;

[0053] In the third step, each general processing module downloads the corresponding application configuration program to the local and starts to execute it according to its own application configuration;

[0054] In the fourth step, each general processing module feeds back the application deployment result to the system management module.

[0055] The parts not detailed in the present invention belong to the well-known technologies in the art.

Claims

1. A spaceborne electronic integrated general processor based on on-orbit flight, characterized in that, It includes a power management module, a system management module, a general processing module, and an interface control module; The power management module provides power supply to meet the power requirements of the system management module, the general processing module, and the interface control module; The system management module realizes blueprint storage, configuration management, task deployment, scheduling, and fault management; The general processing module realizes data calculation, data conversion, and task processing. The internal application configuration is sent by the system management module according to tasks. The general processing module receives and outputs data through the interface control module; The interface control module receives internal and external data and completes the internal and external communication functions of the general integrated processor; After the system management module and the general processing module are powered on, they perform hardware initialization and hardware self-check operations. The system management module loads and runs the corresponding OS image from the local mass storage, and asks each general processing module for the self-check result. Each general processing module feeds back the self-check result to the system management module; The system management module parses the blueprint configuration through the general processing module, confirms the OS image and configuration to be loaded by each general processing module, and according to the self-check results of each general processing module, downloads the corresponding OS image to the general processing module with normal self-check and starts the operation of the OS. For the general processing module with abnormal self-check, the system management module will execute the corresponding fault handling strategy according to the blueprint configuration; After the initialization of each general processing module is completed, the system management module issues a configuration file to the general processing module; Each general processing module downloads the corresponding application configuration program to the local according to its own application configuration and starts to execute it. Each general processing module feeds back the application deployment result.

2. The spaceborne electronic integrated general processor based on on-orbit flight according to claim 1, characterized in that, The power management module, the system management module, the general processing module, and the interface control module adopt a 3U VPX architecture. Data exchange between the power management module, the system management module, the general processing module, and the interface control module is realized through the real-time RapidIO bus and the non-real-time Gigabit Ethernet bus, and the management function of the module is realized through the redundant IPMB bus.

3. The spaceborne electronic integrated general processor based on on-orbit flight according to claim 1, characterized in that, The power management module is implemented by selecting multiple DC / DC power supplies, receives external primary power supply, and converts it into secondary power required by the system management module, the general processing module, and the interface control module.

4. The spaceborne electronic integrated general processor based on on-orbit flight according to claim 3, characterized in that, The power management module adopts a distributed network, which is divided into two levels in total. The first level is the front-end power supply, which performs DC / DC conversion on the externally provided 28V DC power supply to convert it into an intermediate bus voltage of 12V DC and 5V DC, and reaches the power input terminals of the system management module, the general processing module, and the interface control module through the backplane. The second level is the functional module power supply, which performs DC / DC conversion on the bus voltage of 12V DC to convert it into the secondary voltage value required by the system management module, the general processing module, and the interface control module.

5. The spaceborne electronic integrated general processor based on on-orbit flight according to claim 1, characterized in that, The external interface of the interface control module is a digital quantity interface for RapidIO optical fiber transmission. At the same time, the RapidIO bus is also used to complete the internal real-time data exchange function of the general integrated processor; the Gigabit Ethernet bus is used to complete the internal non-real-time data exchange function of the general integrated processor; the interface control module converts the internal digital quantity into an optical fiber transmission medium. The interface control module adopts a multi-channel parallel transceiver module, simultaneously receives and transmits more than 8 signals, and docks with the motherboard through an optical and electrical hybrid connector to provide optical fiber connection externally.

6. The spaceborne electronic integrated general processor based on on-orbit flight according to claim 1, characterized in that, The system management module includes system management module A and system management module B; system management module A serves as the main management module, and system management module B serves as the backup module; during the operation of the general integrated processor, system management module B detects the operation status information of system management module A through the heartbeat and data exchange channels. When it is found that system management module A is abnormal, system management module B takes over the system management function of the general integrated processor.

7. The spaceborne electronic integrated general processor based on on-orbit flight according to claim 1, characterized in that, Two or more general processing modules with the same configuration are adopted in the general integrated processor to execute the same application function.

8. A system boot and application deployment method for a spaceborne electronic integrated general processor based on on-orbit flight, characterized in that, Including: Power on the system management module and general processing module, and the system management module and general processing module perform hardware initialization and hardware self-check operations; The system management module loads and runs the corresponding OS image from the local memory; The system management module asks each general processing module about the self-check result, and each general processing module feeds back the self-check result to the system management module; The system management module parses the blueprint configuration of the aerospace electronic integrated general processor through the general processing module, and confirms that each general processing module needs to load the OS image and configuration; according to the self-check results of each general processing module, download the corresponding OS image to the general processing module with normal self-check and start the operation of the OS; the OS images of each general processing module run normally and are in a state of waiting to load the application; Each general processing module completes initialization; The system management module issues a configuration file to the general processing module; Each general processing module downloads the corresponding application configuration program to the local according to its own application configuration and starts to execute; Each general processing module feeds back the application deployment result to the system management module.

9. The system boot and application deployment method for a spaceborne electronic integrated general processor based on on-orbit flight according to claim 8, characterized in that, The system management module includes system management module A and system management module B; system management module A serves as the main management module, and system management module B serves as the backup module; during the operation of the general integrated processor, system management module B detects the operation status information of system management module A through the heartbeat and data exchange channels. When it is found that system management module A is abnormal, system management module B takes over the system management function of the general integrated processor.

10. A system boot and application deployment method for an on-orbit flight-based aerospace electronic integrated general processor according to claim 8, characterized in that, Two or more general processing modules with the same configuration are adopted in the integrated general processor to execute the same application function.

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