A super capacitor voltage balancing device and method

Abstract

The present disclosure relates to the technical field of super capacitor voltage balancing, in particular to a super capacitor voltage balancing device and method. The super capacitor voltage balancing device comprises: an actual intermediate voltage acquisition module configured to acquire an actual intermediate voltage U1 between a first super capacitor and a second super capacitor, wherein the first super capacitor and the second super capacitor have an intermediate voltage acquisition end therebetween; a desired intermediate voltage forming module configured to form a first desired intermediate voltage U2 and a second desired intermediate voltage U3; and a first voltage comparison module configured to obtain a first positive input end voltage through the actual intermediate voltage U1 and a first negative input end voltage through the first desired intermediate voltage U2. The voltage balancing device of the present disclosure can balance the voltages of the first super capacitor and the second super capacitor through a simple circuit structure, without the need to set a complex monitoring circuit, thus effectively reducing the cost of preventing overcharging, over-discharging or reverse charging of the super capacitor.

Description

Technical Field

[0001] This disclosure mainly relates to the field of supercapacitor voltage balancing technology, specifically a voltage balancing device and method for supercapacitors. Background Technology

[0002] PLC and other control systems may encounter faults such as unstable power supply or even power outages during operation. In such cases, a sudden forced shutdown of the controller may result in data loss or even the output of incorrect control signals. Therefore, energy storage circuits are needed to maintain the controller's operation for a period of time after a power outage and to complete a series of actions to ensure a safe shutdown. Supercapacitors are used as the most common energy storage circuit due to their advantages such as low cost, high power, and long lifespan.

[0003] A single supercapacitor typically has a withstand voltage of only 2.5 to 2.7V, therefore they need to be connected in series to achieve the 4 to 5V power supply voltage required by the control system. However, even supercapacitors of the same model can have varying capacitances, and these differences increase with age. For two supercapacitors connected in series (such as…) Figure 1 (as shown) / Two sets of supercapacitors connected in series (such as...) Figure 2 As shown, during charging, smaller supercapacitors / supercapacitor groups may overcharge; during discharging of series-connected supercapacitors / supercapacitor groups, smaller capacitors may over-discharge, or even reverse-charge. Overcharging, over-discharging, or reverse charging can cause permanent damage to supercapacitors, or even breakage and explosion, endangering the normal operation of surrounding circuits.

[0004] To address this, existing technologies use an MCU to monitor the voltage state of each supercapacitor and actively control the bypass discharge switch of the supercapacitor to prevent overcharging, over-discharging, or reverse charging. However, this approach requires the MCU to actively monitor and control the supercapacitor, and the monitoring circuitry is complex and costly, contradicting the initial intention of using low-cost supercapacitors. Summary of the Invention

[0005] The embodiments of this disclosure address the problems existing in the prior art by proposing a voltage balancing device and method for supercapacitors, thereby solving the problem that the prior art requires active monitoring to prevent overcharging and over-discharging of supercapacitors, and that the monitoring circuit is complex and costly.

[0006] In a first aspect of this disclosure, a voltage balancing device for a supercapacitor is provided, comprising:

[0007] An actual intermediate voltage acquisition module is used to acquire the actual intermediate voltage U1 between the first supercapacitor and the second supercapacitor, wherein the first supercapacitor and the second supercapacitor have an intermediate voltage acquisition terminal.

[0008] A desired intermediate voltage forming module is used to form a first desired intermediate voltage U2 and a second desired intermediate voltage U3;

[0009] The first voltage comparison module is used to obtain a first positive input terminal voltage through the actual intermediate voltage U1, obtain a first negative input terminal voltage through the first expected intermediate voltage U2, and compare the first positive input terminal voltage with the first negative input terminal voltage to obtain a first comparison result.

[0010] The second voltage comparison module is used to obtain a second positive input voltage through the second expected intermediate voltage U3, obtain a second negative input voltage through the actual intermediate voltage U1, and compare the second positive input voltage with the second negative input voltage to obtain a second comparison result.

[0011] A first voltage balancing module is configured to receive the first comparison result. When the first comparison result triggers the first voltage balancing module to enter a second state from a first state, the first voltage balancing module performs a discharge operation on the first supercapacitor. When the first comparison result triggers the first voltage balancing module to enter a first state from a second state, the first voltage balancing module stops performing a discharge operation on the first supercapacitor.

[0012] The second voltage balancing module is used to receive the second comparison result. When the second comparison result triggers the second voltage balancing module to enter the second state from the first state, the second voltage balancing module performs a discharge operation on the second supercapacitor. When the second comparison result triggers the second voltage balancing module to enter the first state from the second state, the second voltage balancing module stops performing the discharge operation on the second supercapacitor.

[0013] Preferably, the desired intermediate voltage forming module specifically includes:

[0014] The first resistor R1 has its first terminal connected to the power supply.

[0015] The first end of the second resistor R2 is connected to the second end of the first resistor R1;

[0016] The third resistor R3 has its first end connected to the second end of the second resistor R2, and the second end of the third resistor R3 is grounded.

[0017] Preferably, the first voltage comparison module specifically includes:

[0018] The negative input terminal of the first comparator S1 is connected to the second terminal of the second resistor R2;

[0019] The fourth resistor R4 has its first end connected to the positive input terminal of the first comparator S1, and its second end connected to the intermediate voltage acquisition terminal.

[0020] The fifth resistor R5 has its first end connected to the first end of the fourth resistor R4, and its second end connected to the output of the first comparator S1.

[0021] Preferably, the first voltage balancing module specifically includes:

[0022] The gate of the first field-effect transistor M1 is connected to the output terminal of the first comparator S1, the source of the first field-effect transistor M1 is connected to the power supply, and the drain of the first field-effect transistor M1 is connected to the intermediate voltage acquisition terminal.

[0023] Preferably, when the resistance of the first resistor R1 is equal to the resistance of the third resistor R3, the resistance of the second resistor R2 is a times the resistance of the first resistor R1, and the resistance of the fifth resistor R5 is b times the resistance of the fourth resistor R4, if the voltage V of the first supercapacitor... SC1 With the voltage V of the second supercapacitor SC2 If the following formula 1) is satisfied, the first comparison result triggers the first voltage balancing module to enter the second state from the first state;

[0024]

[0025] If the voltage V of the first supercapacitor SC1 With the voltage V of the second supercapacitor SC2 If the following formula 2) is satisfied, the first comparison result triggers the first voltage balancing module to enter the first state from the second state;

[0026]

[0027] Preferably, the second voltage comparison module specifically includes:

[0028] The negative input terminal of the second comparator S2 is connected to the intermediate voltage acquisition terminal;

[0029] The sixth resistor R6 has its first end connected to the positive input terminal of the second comparator S2, and its second end connected to the first end of the second resistor R1.

[0030] The seventh resistor R7 has its first end connected to the first end of the sixth resistor R6, and its second end connected to the output of the second comparator S2.

[0031] Preferably, the second voltage balancing module specifically includes:

[0032] The gate of the second field-effect transistor M2 is connected to the output terminal of the second comparator S2, the source of the second field-effect transistor M2 is connected to the intermediate voltage acquisition terminal, and the drain of the second field-effect transistor M2 is grounded.

[0033] Preferably, when the resistance of the first resistor R1 is equal to the resistance of the third resistor R3, the resistance of the second resistor R2 is a times the resistance of the first resistor R1, and the resistance of the seventh resistor R7 is c times the resistance of the sixth resistor R6, if the voltage V of the first supercapacitor... SC1 With the voltage V of the second supercapacitor SC2 If the following formula 3) is satisfied, the second comparison result triggers the second voltage balancing module to enter the second state from the first state;

[0034]

[0035] If the voltage V of the first supercapacitor SC1 With the voltage V of the second supercapacitor SC2 If the following formula 4) is satisfied, the second comparison result triggers the second voltage balancing module to enter the first state from the second state;

[0036]

[0037] In a second aspect of this disclosure, a voltage balancing method for a supercapacitor is provided, employing the aforementioned voltage balancing device, specifically comprising:

[0038] The actual intermediate voltage acquisition module acquires the actual intermediate voltage U1 between the first supercapacitor and the second supercapacitor;

[0039] The desired intermediate voltage forming module forms a first desired intermediate voltage U2 and a second desired intermediate voltage U3;

[0040] The first voltage comparison module obtains the first positive input voltage through the actual intermediate voltage U1 and the first negative input voltage through the first expected intermediate voltage U2, and compares the first positive input voltage with the first negative input voltage to obtain the first comparison result;

[0041] The first voltage balancing module receives the first comparison result. When the first comparison result triggers the first voltage balancing module to enter the second state from the first state, the first voltage balancing module performs a discharge operation on the first supercapacitor. When the first comparison result triggers the first voltage balancing module to enter the first state from the second state, the first voltage balancing module stops performing the discharge operation on the first supercapacitor.

[0042] The second voltage comparison module obtains the second positive input voltage through the second expected intermediate voltage U3, obtains the second negative input voltage through the actual intermediate voltage U1, and compares the second positive input voltage with the second negative input voltage to obtain the second comparison result.

[0043] The second voltage balancing module receives the second comparison result. When the second comparison result triggers the second voltage balancing module to enter the second state from the first state, the second voltage balancing module performs a discharge operation on the second supercapacitor. When the second comparison result triggers the second voltage balancing module to enter the first state from the second state, the second voltage balancing module stops performing a discharge operation on the second supercapacitor.

[0044] Preferably, when the voltage at the first positive input terminal is greater than the voltage at the first negative input terminal, the first comparison result is high and the first voltage balancing module is in a first state; when the voltage at the first positive input terminal is less than the voltage at the first negative input terminal, the first comparison result is low and the first voltage balancing module is in a second state.

[0045] When the voltage at the second positive input terminal is greater than the voltage at the second negative input terminal, the second comparison result is high, and the second voltage balancing module is in the first state; when the voltage at the second positive input terminal is less than the voltage at the second negative input terminal, the second comparison result is low, and the second voltage balancing module is in the second state.

[0046] Beneficial effects

[0047] This embodiment of the invention can determine whether the first supercapacitor is overcharged or the second supercapacitor is over-discharged through an actual intermediate voltage acquisition module, a desired intermediate voltage formation module, and a first voltage comparison module. When the first supercapacitor is overcharged or the second supercapacitor is over-discharged, the first voltage balancing module can automatically discharge the first supercapacitor, thereby balancing the voltages of the first and second supercapacitors connected in series. Similarly, this embodiment can determine whether the second supercapacitor is overcharged or the first supercapacitor is over-discharged through the same module. When the second supercapacitor is overcharged or the first supercapacitor is over-discharged, the second voltage balancing module can automatically discharge the second supercapacitor, thereby balancing the voltages of the first and second supercapacitors connected in series. The voltage balancing device of this embodiment can balance the voltages of the first and second supercapacitors with a simple circuit structure, eliminating the need for complex monitoring circuits. Therefore, it effectively reduces the cost of preventing supercapacitor overcharging, over-discharging, or reverse charging. Attached Figure Description

[0048] Figure 1This is a schematic diagram of two supercapacitors connected in series according to this disclosure;

[0049] Figure 2 This is a schematic diagram of two sets of supercapacitors connected in series according to this disclosure;

[0050] Figure 3 This is a schematic diagram of the voltage balancing device provided in the embodiments of this disclosure during normal charging and discharging.

[0051] Figure 4 A schematic diagram of the operation of the voltage balancing device provided in the embodiments of this disclosure when the first supercapacitor is overcharged or the second supercapacitor is over-discharged.

[0052] Figure 5 This is a schematic diagram of the operation of the voltage balancing device provided in the embodiments of this disclosure when the first supercapacitor is over-discharged or the second supercapacitor is over-charged. Detailed Implementation

[0053] Embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings.

[0054] Example 1: A voltage balancing device for a supercapacitor, comprising: an actual intermediate voltage acquisition module, a desired intermediate voltage formation module, a first voltage comparison module, a second voltage comparison module, a first voltage balancing module, and a second voltage balancing module.

[0055] The actual intermediate voltage acquisition module is used to acquire the actual intermediate voltage U1 between the first supercapacitor and the second supercapacitor, wherein the first supercapacitor and the second supercapacitor have an intermediate voltage acquisition terminal. Specifically, the actual intermediate voltage acquisition module can be a wire, with one end connected to the intermediate voltage acquisition terminal and the other end connected to the voltage input terminal of either the first or second voltage comparison module, for inputting the actual intermediate voltage U1 acquired from the intermediate voltage acquisition terminal to the voltage input terminal of either the first or second voltage comparison module. The first and second supercapacitors can be a single first supercapacitor and a single second supercapacitor connected in series, or a group of first supercapacitors and a group of second supercapacitors connected in series.

[0056] The desired intermediate voltage forming module is used to form a first desired intermediate voltage U2 and a second desired intermediate voltage U3. For example... Figure 3As shown, the desired intermediate voltage forming module specifically includes: a first resistor R1, a second resistor R2, and a third resistor R3. The first terminal of the first resistor R1 is connected to a power supply, the first terminal of the second resistor R2 is connected to the second terminal of the first resistor R1, the first terminal of the third resistor R3 is connected to the second terminal of the second resistor R2, and the second terminal of the third resistor R3 is grounded. The voltage across the third resistor R3 is the first desired intermediate voltage U2, and the voltages across the second resistor R2 and the third resistor R3 are the second desired intermediate voltage U3.

[0057] The second resistor R2 is set to make the first expected intermediate voltage U2 and the second expected intermediate voltage U3 different, thereby avoiding the first voltage balancing module and the second voltage balancing module from simultaneously discharging the corresponding first supercapacitor and the second supercapacitor.

[0058] The first voltage comparison module is used to obtain a first positive input voltage through the actual intermediate voltage U1, obtain a first negative input voltage through the first expected intermediate voltage U2, and compare the first positive input voltage with the first negative input voltage to obtain a first comparison result. Figure 3 As shown, the first voltage comparison module specifically includes: a first comparator S1, a fourth resistor R4, and a fifth resistor R5. The negative input terminal of the first comparator S1 is connected to the second terminal of the second resistor R2, and is used to directly input the first desired intermediate voltage U2 (i.e., the voltage at the first negative input terminal of the first comparator S1 is the first desired intermediate voltage U2). The first terminal of the fourth resistor R4 is connected to the positive input terminal of the first comparator S1, and the second terminal of the fourth resistor R4 is connected to the intermediate voltage acquisition terminal. The actual intermediate voltage U1 is not directly input to the positive input terminal of the first comparator S1; the voltage at the first positive input terminal of the first comparator S1 needs to be calculated from the actual intermediate voltage U1. The first terminal of the fifth resistor R5 is connected to the first terminal of the fourth resistor R4, and the second terminal of the fifth resistor R5 is connected to the output terminal of the first comparator S1.

[0059] When the voltage at the first positive input terminal of the first comparator S1 is greater than the voltage at the first negative input terminal of the first comparator S1, the first comparison result output by the first comparator S1 is high; when the voltage at the first positive input terminal of the first comparator S1 is less than the voltage at the first negative input terminal of the first comparator S1, the first comparison result output by the first comparator S1 is low. Furthermore, the fifth resistor R5 is included to prevent the first voltage balancing module from entering an incorrect operating state due to an uncertain first comparison result output by the first comparator S1.

[0060] The second voltage comparison module is used to obtain a second positive input voltage through the second desired intermediate voltage U3, obtain a second negative input voltage through the actual intermediate voltage U1, and compare the second positive input voltage with the second negative input voltage to obtain a second comparison result. Figure 3 As shown, the second voltage comparison module specifically includes: a second comparator S2, a sixth resistor R6, and a seventh resistor R7. The negative input terminal of the second comparator S2 is connected to the intermediate voltage acquisition terminal, and is used to directly input the actual intermediate voltage U1 (i.e., the voltage at the second negative input terminal of the second comparator S2 is directly the actual intermediate voltage U1). The first terminal of the sixth resistor R6 is connected to the positive input terminal of the second comparator S2, and the second terminal of the sixth resistor R6 is connected to the first terminal of the second resistor R1. The second desired intermediate voltage U3 is not directly input to the positive input terminal of the second comparator S2; the voltage at the second positive input terminal of the second comparator S2 needs to be calculated from the second desired intermediate voltage U3. The first terminal of the seventh resistor R7 is connected to the first terminal of the sixth resistor R6, and the second terminal of the seventh resistor R7 is connected to the output terminal of the second comparator S2.

[0061] When the voltage at the second positive input terminal of the second comparator S2 is greater than the voltage at the second negative input terminal of the second comparator S2, the second comparison result output by the second comparator S2 is high; when the voltage at the positive input terminal of the second comparator S2 is less than the voltage at the negative input terminal of the second comparator S2, the second comparison result output by the second comparator S2 is low. Furthermore, the seventh resistor R7 is included to prevent the second voltage balancing module from entering an incorrect operating state due to an uncertain second comparison result output by the second comparator S2.

[0062] The first voltage balancing module receives the first comparison result. When the first comparison result triggers the first voltage balancing module to enter a second state from a first state, the first voltage balancing module performs a discharge operation on the first supercapacitor. When the first comparison result triggers the first voltage balancing module to enter a first state from a second state, the first voltage balancing module stops performing the discharge operation on the first supercapacitor. Figure 3 As shown, the first voltage balancing module specifically includes a first field-effect transistor M1. The gate of the first field-effect transistor M1 is connected to the output terminal of the first comparator S1, the source of the first field-effect transistor M1 is connected to the power supply, and the drain of the first field-effect transistor M1 is connected to the intermediate voltage acquisition terminal.

[0063] When the first comparison result output by the first comparator S1 is high, the first field-effect transistor M1 is not turned on, the first voltage balance mode is in the first state, and the first supercapacitor charges and discharges normally. For example... Figure 4As shown, when the first supercapacitor is overcharged / the second supercapacitor is over-discharged, the first comparison result output by the first comparator S1 will change from high level to low level. At this time, the first field-effect transistor M1 is turned on, the first voltage balance mode changes from the first state to the second state, and the first supercapacitor performs a discharge operation. When the first supercapacitor discharges a certain amount of charge (i.e., when the first supercapacitor is not overcharged / the second supercapacitor is not over-discharged), the first comparison result output by the first comparator S1 changes from low level to high level again. At this time, the first field-effect transistor M1 is not turned on, and the first voltage balance mode returns from the second state to the first state.

[0064] In this embodiment, the resistance of the first resistor R1 is equal to the resistance of the third resistor R3, the resistance of the second resistor R2 is a times the resistance of the first resistor R1, and the resistance of the fifth resistor R5 is b times the resistance of the fourth resistor R4.

[0065] Assuming the power source is Utotal and the voltage of the first supercapacitor is Vtotal SC1 The voltage V of the second supercapacitor SC2 The voltage at the first positive input terminal of the first comparator S1 is Us1 positive, and the voltage at the first negative input terminal of the first comparator S1 is Us1 negative. Furthermore, the actual intermediate voltage U1 is related to the voltage V of the second supercapacitor. SC2 If they are equal, then when the first comparison result of the first comparator S1 is high,

[0066]

[0067]

[0068] When Us1 is positive, it equals Us1 negative. The first comparison result just transitions from a high level to a low level, i.e., it passes...

[0069]

[0070] It can be deduced that when the voltage V of the first supercapacitor... SC1 With the voltage V of the second supercapacitor SC2 When the following formula 1) is satisfied, the first comparison result triggers the first voltage balancing module to enter the second state from the first state.

[0071]

[0072] When the first comparison result of the first comparator S1 is low,

[0073]

[0074]

[0075] When Us1 is positive, it equals Us1 negative. The first comparison result is triggered to change from low level to high level, i.e., through...

[0076]

[0077] It can be deduced that when the voltage V of the first supercapacitor... SC1 With the voltage V of the second supercapacitor SC2 When the following formula 2) is satisfied, the first comparison result triggers the first voltage balancing module to switch from the second state to the first state.

[0078]

[0079] In this embodiment, assuming U is always 5V, the resistances of the first resistor R1 and the third resistor R3 are 510Ω, the resistance of the second resistor R2 is 51Ω, the resistance of the fourth resistor R4 is 1kΩ, and the resistance of the fifth resistor R5 is 51kΩ, then a = 0.1 and b = 51. Calculations using formula 1) show that when V... SC1 When the voltage is 2.67V (indicating overcharge of the first supercapacitor / overdischarge of the second supercapacitor), the voltage at the first positive input terminal of the first comparator S1 is equal to the voltage at the first negative input terminal of the first comparator S1. The first comparison result output by the first comparator S1 changes from high level to low level, and the first voltage balancing module performs a discharge operation on the first supercapacitor. It can be calculated using formula 2) that when V... SC1 When the voltage is 2.57V (indicating that the first supercapacitor is no longer overcharged / the second supercapacitor is no longer over-discharged), the voltage at the first positive input terminal of the first comparator S1 is equal to the voltage at the first negative input terminal of the first comparator S1. The first comparison result changes from low level to high level, and the first voltage balancing module stops performing the discharge operation on the first supercapacitor.

[0080] The second voltage balancing module receives the second comparison result. When the second comparison result triggers the second voltage balancing module to enter the second state from the first state, the second voltage balancing module performs a discharge operation on the second supercapacitor. When the second comparison result triggers the second voltage balancing module to enter the first state from the second state, the second voltage balancing module stops performing the discharge operation on the second supercapacitor. Figure 3 As shown, the second voltage balancing module specifically includes a second field-effect transistor M2. The gate of the second field-effect transistor M2 is connected to the output terminal of the second comparator S2, the source of the second field-effect transistor M2 is connected to the intermediate voltage acquisition terminal, and the drain of the second field-effect transistor M2 is grounded.

[0081] When the second comparison result output by the second comparator S2 is high, the second field-effect transistor M2 is not turned on, the second voltage balance mode is in the first state, and the second supercapacitor charges and discharges normally. For example... Figure 5 As shown, when the second supercapacitor is overcharged / the first supercapacitor is over-discharged, the second comparison result output by the second comparator S2 will change from high level to low level. At this time, the second field-effect transistor M2 is turned on, the second voltage balance mode changes from the first state to the second state, and the second supercapacitor performs a discharge operation. When the second supercapacitor discharges a certain amount of charge (i.e., when the second supercapacitor is not overcharged / the first supercapacitor is not over-discharged), the second comparison result output by the second comparator S2 changes from low level to high level again. At this time, the second field-effect transistor M2 is not turned on, and the second voltage balance mode returns from the second state to the first state.

[0082] In this embodiment, the resistance of the first resistor R1 is equal to the resistance of the third resistor R3, the resistance of the second resistor R2 is a times the resistance of the first resistor R1, and the resistance of the seventh resistor R7 is c times the resistance of the sixth resistor R6.

[0083] Assuming the power source is Utotal and the voltage of the first supercapacitor is Vtotal SC1 The voltage V of the second supercapacitor SC2 The voltage at the second positive input terminal of the second comparator S2 is Us2 positive, and the voltage at the second negative input terminal of the second comparator S2 is Us2 negative. Furthermore, the actual intermediate voltage U1 and the voltage V of the second supercapacitor are... SC2 If they are equal, then when the second comparison result of the second comparator S2 is high,

[0084]

[0085] Us2 negative = U1 = V SC2

[0086] When Us2 is positive, it equals Us2 negative. The second comparison result just transitions from a high level to a low level, i.e., it passes...

[0087]

[0088] It can be deduced that when the voltage V of the first supercapacitor... SC1 With the voltage V of the second supercapacitor SC2 When the following formula 3) is satisfied, the second comparison result triggers the second voltage balancing module to change from the first state to the second state.

[0089]

[0090] When the second comparison result of the second comparator S2 is low,

[0091]

[0092] Us2 negative = U1 = V SC2

[0093] When Us2 is positive, it equals Us2 negative. The second comparison result just transitions from a low level to a high level, i.e., it passes...

[0094]

[0095] It can be deduced that when the voltage V of the first supercapacitor... SC1 With the voltage V of the second supercapacitor SC2 When the following formula 4) is satisfied, the second comparison result triggers the second voltage balancing module to switch from the second state to the first state.

[0096]

[0097] In this embodiment, assuming U is always 5V, the resistances of the first resistor R1 and the third resistor R3 are 510Ω, the resistance of the second resistor R2 is 51Ω, the resistance of the sixth resistor R6 is 1kΩ, and the resistance of the seventh resistor R7 is 51kΩ, then a = 0.1 and c = 51. Calculations using formula 3) show that when V... SC2 When the voltage is 2.66V (indicating overcharge of the second supercapacitor / overdischarge of the first supercapacitor), the voltage at the second positive input terminal of the second comparator S2 is equal to the voltage at the second negative input terminal of the second comparator S2. The second comparison result output by the second comparator S2 changes from high level to low level, and the second voltage balancing module performs a discharge operation on the second supercapacitor. Calculations using formula 4) show that when V... SC2 When the voltage is 2.57V (indicating that the second supercapacitor is no longer overcharged / the first supercapacitor is no longer over-discharged), the voltage at the second positive input terminal of the second comparator S2 is equal to the voltage at the second negative input terminal of the second comparator S2. The second comparison result output by the second comparator S2 changes from low level to high level, and the second voltage balancing module stops performing the discharge operation on the second supercapacitor.

[0098] The voltage balancing device of this embodiment can determine whether the first supercapacitor is overcharged or the second supercapacitor is over-discharged through the actual intermediate voltage acquisition module, the expected intermediate voltage formation module, and the first voltage comparison module. When the first supercapacitor is overcharged or the second supercapacitor is over-discharged, the first voltage balancing module can automatically discharge the first supercapacitor, thereby balancing the voltages of the first and second supercapacitors connected in series. Similarly, it can determine whether the second supercapacitor is overcharged or the first supercapacitor is over-discharged through the actual intermediate voltage acquisition module, the expected intermediate voltage formation module, and the second voltage comparison module. When the second supercapacitor is overcharged or the first supercapacitor is over-discharged, the second voltage balancing module can automatically discharge the second supercapacitor, thereby balancing the voltages of the first and second supercapacitors connected in series. This voltage balancing device can balance the voltages of the first and second supercapacitors with a simple circuit structure, eliminating the need for complex monitoring circuits, thus effectively reducing the cost of preventing supercapacitor overcharging, over-discharging, or reverse charging.

[0099] Example 2: A voltage balancing method for a supercapacitor, employing the voltage balancing device described in Example 1, specifically comprising:

[0100] The actual intermediate voltage acquisition module acquires the actual intermediate voltage U1 between the first supercapacitor and the second supercapacitor.

[0101] The expected intermediate voltage forming module forms a first expected intermediate voltage U2 and a second expected intermediate voltage U3.

[0102] The first voltage comparison module obtains the first positive input voltage through the actual intermediate voltage U1 and the first negative input voltage through the first expected intermediate voltage U2, and compares the first positive input voltage with the first negative input voltage to obtain a first comparison result.

[0103] The first voltage balancing module receives the first comparison result. When the first comparison result triggers the first voltage balancing module to enter the second state from the first state, the first voltage balancing module performs a discharge operation on the first supercapacitor. When the first comparison result triggers the first voltage balancing module to enter the first state from the second state, the first voltage balancing module stops performing the discharge operation on the first supercapacitor. Specifically, when the voltage at the first positive input terminal is greater than the voltage at the first negative input terminal, the first comparison result is high, and the first voltage balancing module is in the first state; when the voltage at the first positive input terminal is less than the voltage at the first negative input terminal, the first comparison result is low, and the first voltage balancing module is in the second state.

[0104] The second voltage comparison module obtains the second positive input voltage through the second expected intermediate voltage U3, obtains the second negative input voltage through the actual intermediate voltage U1, and compares the second positive input voltage with the second negative input voltage to obtain the second comparison result.

[0105] The second voltage balancing module receives the second comparison result. When the second comparison result triggers the second voltage balancing module to enter the second state from the first state, the second voltage balancing module performs a discharge operation on the second supercapacitor. When the second comparison result triggers the second voltage balancing module to enter the first state from the second state, the second voltage balancing module stops performing the discharge operation on the second supercapacitor. Specifically, when the voltage at the second positive input terminal is greater than the voltage at the second negative input terminal, the second comparison result is high, and the second voltage balancing module is in the first state; when the voltage at the second positive input terminal is less than the voltage at the second negative input terminal, the second comparison result is low, and the second voltage balancing module is in the second state.

[0106] The voltage balancing method of this embodiment can determine whether the first supercapacitor is overcharged or the second supercapacitor is over-discharged through the actual intermediate voltage acquisition module, the expected intermediate voltage formation module, and the first voltage comparison module. When the first supercapacitor is overcharged or the second supercapacitor is over-discharged, the first voltage balancing module can automatically discharge the first supercapacitor, thereby balancing the voltages of the first and second supercapacitors connected in series. Similarly, the method can determine whether the second supercapacitor is overcharged or the first supercapacitor is over-discharged through the actual intermediate voltage acquisition module, the expected intermediate voltage formation module, and the second voltage comparison module. When the second supercapacitor is overcharged or the first supercapacitor is over-discharged, the second voltage balancing module can automatically discharge the second supercapacitor, thereby balancing the voltages of the first and second supercapacitors connected in series. The voltage balancing device of this embodiment can balance the voltages of the first and second supercapacitors with a simple circuit structure, without the need for complex monitoring circuits, thus effectively reducing the cost of preventing supercapacitor overcharging, over-discharging, or reverse charging.

[0107] While some embodiments of this disclosure are shown in the accompanying drawings, it should be understood that this disclosure can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of this disclosure. It should be understood that the accompanying drawings and embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of protection of this disclosure.

Claims

1. A voltage balancing device for a supercapacitor, comprising: An actual intermediate voltage acquisition module is used to acquire the actual intermediate voltage U1 between the first supercapacitor and the second supercapacitor, wherein the first supercapacitor and the second supercapacitor have an intermediate voltage acquisition terminal. A desired intermediate voltage forming module is used to form a first desired intermediate voltage U2 and a second desired intermediate voltage U3; The first voltage comparison module is used to obtain a first positive input terminal voltage through the actual intermediate voltage U1, obtain a first negative input terminal voltage through the first expected intermediate voltage U2, and compare the first positive input terminal voltage with the first negative input terminal voltage to obtain a first comparison result. The second voltage comparison module is used to obtain a second positive input voltage through the second expected intermediate voltage U3, obtain a second negative input voltage through the actual intermediate voltage U1, and compare the second positive input voltage with the second negative input voltage to obtain a second comparison result. A first voltage balancing module is configured to receive the first comparison result. When the first comparison result triggers the first voltage balancing module to enter a second state from a first state, the first voltage balancing module performs a discharge operation on the first supercapacitor. When the first comparison result triggers the first voltage balancing module to enter a first state from a second state, the first voltage balancing module stops performing a discharge operation on the first supercapacitor. The second voltage balancing module is used to receive the second comparison result. When the second comparison result triggers the second voltage balancing module to enter the second state from the first state, the second voltage balancing module performs a discharge operation on the second supercapacitor. When the second comparison result triggers the second voltage balancing module to enter the first state from the second state, the second voltage balancing module stops performing the discharge operation on the second supercapacitor. The desired intermediate voltage forming module specifically includes: The first resistor R1 has its first terminal connected to the power supply. The first end of the second resistor R2 is connected to the second end of the first resistor R1; The first end of the third resistor R3 is connected to the second end of the second resistor R2, and the second end of the third resistor R3 is grounded. The first voltage comparison module specifically includes: The negative input terminal of the first comparator S1 is connected to the second terminal of the second resistor R2; The fourth resistor R4 has its first end connected to the positive input terminal of the first comparator S1, and its second end connected to the intermediate voltage acquisition terminal. The fifth resistor R5 has its first end connected to the first end of the fourth resistor R4, and its second end connected to the output of the first comparator S1. The second voltage comparison module specifically includes: The negative input terminal of the second comparator S2 is connected to the intermediate voltage acquisition terminal; The sixth resistor R6 has its first end connected to the positive input terminal of the second comparator S2, and its second end connected to the first end of the second resistor R2. The seventh resistor R7 has its first end connected to the first end of the sixth resistor R6, and its second end connected to the output of the second comparator S2.

2. The voltage balancing device according to claim 1, wherein, The first voltage balancing module specifically includes: The gate of the first field-effect transistor M1 is connected to the output terminal of the first comparator S1, the source of the first field-effect transistor M1 is connected to the power supply, and the drain of the first field-effect transistor M1 is connected to the intermediate voltage acquisition terminal.

3. The voltage balancing device according to claim 2, wherein, When the resistance of the first resistor R1 is equal to the resistance of the third resistor R3, the resistance of the second resistor R2 is *a* times the resistance of the first resistor R1, and the resistance of the fifth resistor R5 is *b* times the resistance of the fourth resistor R4, if the voltage of the first supercapacitor... With the voltage of the second supercapacitor If the following formula 1) is satisfied, the first comparison result triggers the first voltage balancing module to enter the second state from the first state; 1） If the voltage of the first supercapacitor With the voltage of the second supercapacitor If the following formula 2) is satisfied, the first comparison result triggers the first voltage balancing module to change from the second state to the first state; 2）。 4. The voltage balancing device according to claim 1, wherein, The second voltage balancing module specifically includes: The gate of the second field-effect transistor M2 is connected to the output terminal of the second comparator S2, the source of the second field-effect transistor M2 is connected to the intermediate voltage acquisition terminal, and the drain of the second field-effect transistor M2 is grounded.

5. The voltage balancing device according to claim 4, wherein, When the resistance of the first resistor R1 is equal to the resistance of the third resistor R3, the resistance of the second resistor R2 is *a* times the resistance of the first resistor R1, and the resistance of the seventh resistor R7 is *c* times the resistance of the sixth resistor R6, if the voltage of the first supercapacitor... With the voltage of the second supercapacitor If the following formula 3 is satisfied, then the second comparison result triggers the second voltage balancing module to enter the second state from the first state; 3） If the voltage of the first supercapacitor With the voltage of the second supercapacitor If the following formula 4 is satisfied, then the second comparison result triggers the second voltage balancing module to enter the first state from the second state; 4）。 6. A voltage balancing method for a supercapacitor, employing the voltage balancing device described in claim 1, specifically comprising: The actual intermediate voltage acquisition module acquires the actual intermediate voltage U1 between the first supercapacitor and the second supercapacitor; The desired intermediate voltage forming module forms a first desired intermediate voltage U2 and a second desired intermediate voltage U3; The first voltage comparison module obtains the first positive input voltage through the actual intermediate voltage U1 and the first negative input voltage through the first expected intermediate voltage U2, and compares the first positive input voltage with the first negative input voltage to obtain the first comparison result; The first voltage balancing module receives the first comparison result. When the first comparison result triggers the first voltage balancing module to enter the second state from the first state, the first voltage balancing module performs a discharge operation on the first supercapacitor. When the first comparison result triggers the first voltage balancing module to enter the first state from the second state, the first voltage balancing module stops performing the discharge operation on the first supercapacitor. The second voltage comparison module obtains the second positive input voltage through the second expected intermediate voltage U3, obtains the second negative input voltage through the actual intermediate voltage U1, and compares the second positive input voltage with the second negative input voltage to obtain the second comparison result. The second voltage balancing module receives the second comparison result. When the second comparison result triggers the second voltage balancing module to enter the second state from the first state, the second voltage balancing module performs a discharge operation on the second supercapacitor. When the second comparison result triggers the second voltage balancing module to enter the first state from the second state, the second voltage balancing module stops performing the discharge operation on the second supercapacitor.

7. A voltage balancing method for a supercapacitor according to claim 6, wherein, When the voltage at the first positive input terminal is greater than the voltage at the first negative input terminal, the first comparison result is high, and the first voltage balancing module is in the first state; when the voltage at the first positive input terminal is less than the voltage at the first negative input terminal, the first comparison result is low, and the first voltage balancing module is in the second state. When the voltage at the second positive input terminal is greater than the voltage at the second negative input terminal, the second comparison result is high, and the second voltage balancing module is in the first state; when the voltage at the second positive input terminal is less than the voltage at the second negative input terminal, the second comparison result is low, and the second voltage balancing module is in the second state.

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