A low-power leakage protection chip circuit

Abstract

This invention discloses a low-power leakage current protection chip circuit, comprising: a bandgap reference unit for generating a reference voltage V_REF, including a first current mirror and an output component; a current stabilizing unit for generating a current source I_REF independent of temperature and power supply voltage, including a second current mirror and a negative temperature coefficient current generating component; and a voltage stabilizing unit for generating a voltage source. This invention designs a novel leakage current protection chip with stable temperature characteristics and low power consumption. Temperature compensation technology is used to improve the chip's power supply circuit and bias circuit, resulting in an 80% reduction in power consumption and an 80% reduction in chip static current temperature drift compared to the previous circuit.

Description

Technical Field

[0001] This invention relates to the field of low-power temperature compensation technology, and in particular to a low-power leakage protection chip circuit. Background Technology

[0002] Analog integrated circuits are very sensitive to bias and temperature. The power consumption and temperature drift of the quiescent current of the chip are adverse factors that limit the further development of the chip's performance and can cause the chip to malfunction under certain operating conditions. In particular, some chips that operate in harsh environments need to have better measures to control power consumption and temperature drift. Summary of the Invention

[0003] The purpose of this section is to outline some aspects of the embodiments of the present invention and to briefly introduce some preferred embodiments. Some simplifications or omissions may be made in this section, as well as in the abstract and title of the present application, to avoid obscuring the purpose of this section, the abstract and title of the invention. Such simplifications or omissions shall not be used to limit the scope of the present invention.

[0004] In view of the problems existing in the above and / or prior art, the present invention is proposed.

[0005] Therefore, the technical problem to be solved by the present invention is that the existing voltage regulator module is implemented by Zener diode, which has a large temperature drift coefficient, seriously affecting the reliability of the circuit.

[0006] To solve the above technical problems, the present invention provides the following technical solution: a low-power leakage protection chip circuit, comprising a bandgap reference unit for generating a reference voltage V_REF, including a first current mirror, an output component, and an auxiliary component for improving the current replication accuracy of the first current mirror;

[0007] The current stabilizing unit is used to generate a current source I_REF that is independent of temperature and power supply voltage. It includes a second current mirror and a negative temperature coefficient current generating component. The second current mirror is connected to the output of the first current mirror. The bandgap reference unit provides bias current to the negative temperature coefficient current generating component through the bias unit.

[0008] The voltage regulator unit is used to buffer the output voltage of the bandgap reference unit. The operational amplifier of the voltage regulator unit is connected to the negative temperature coefficient current generating component and the bias unit.

[0009] As a preferred embodiment of the low-power leakage protection chip circuit of the present invention, the voltage regulation unit includes an operational amplifier and a voltage regulator. The operational amplifier provides a large loop gain for the voltage regulator to ensure the accuracy of the voltage regulator and the power supply suppression effect.

[0010] In a preferred embodiment of the low-power leakage protection chip circuit of the present invention, the bias unit provides bias current to the operational amplifier.

[0011] As a preferred embodiment of the low-power leakage protection chip circuit of the present invention, the output component includes a positive temperature coefficient current generator composed of transistors Q1, Q2, Q3 and resistor R3, and a negative temperature coefficient voltage generator composed of transistors Q1, Q2 and Q5.

[0012] As a preferred embodiment of the low-power leakage protection chip circuit of the present invention, wherein: the base of transistor Q1 is connected to the emitter of Q2 and the base of Q3, R3 is connected to the emitter of Q3 and the emitter of Q1, and the emitter of Q1 is grounded.

[0013] As a preferred embodiment of the low-power leakage protection chip circuit of the present invention, wherein: the collector of transistor Q1 is connected to the base of Q2, one end of R1 is connected, the other end of R1 is connected to the emitter of Q5, and both the base and collector of Q5 are connected to the first current mirror.

[0014] In a preferred embodiment of the low-power leakage protection chip circuit of the present invention, the first current mirror includes transistors Q6 to Q7. 12 The collectors of Q6, Q9, and Q5 are connected together. The emitter of Q6 is connected to the collector of Q7, and the emitter of Q9 is connected to the collector of Q8. 12 emitter connection Q 11 The collector of Q6, the base of Q6, the base of Q9, and Q... 12 The bases of Q7, Q8, and Q are connected together. 11 The base is connected.

[0015] In a preferred embodiment of the low-power leakage protection chip circuit of the present invention, the auxiliary component includes transistor Q. 10 and Q 17 Q 10 emitter and Q 11 The base connection, Q 10 The base and Q 11 collector connection, Q 10 collector and Q 17 The collector is connected to ground, Q 17 emitter and Q 12 The base connection, the base of Q17, Q 12 The collector of Q1 is connected to the collector of Q2.

[0016] In a preferred embodiment of the low-power leakage protection chip circuit of the present invention, the second current mirror includes transistor Q.13 and Q 14 Q 13 The base and Q 11 The base connection, Q 14 The base and Q 12 The base connection, Q 13 collector and Q 14 The emitter connection.

[0017] As a preferred embodiment of the low-power leakage protection chip circuit of the present invention, the negative temperature coefficient current generating component includes transistor Q. 15 Q 16 Resistor R2, one end of which is connected to Q. 15 base, Q 16 The emitter of R2 is connected to Q. 13 emitter, Q 15 The emitter, Q 15 collector connection Q 16 The base, Q 16 collector connection Q 14 The collector.

[0018] As a preferred embodiment of the low-power leakage protection chip circuit of the present invention, the operational amplifier includes Q... 19 ~Q 24 Q 19 emitter and Q 20 The base connection, Q 22 emitter and Q 21 The base connection, Q 20 emitter connection Q 21 The emitter, Q 20 collector and Q 23 collector, Q 23 The base and Q 24 The base connection, Q 21 collector and Q 24 collector connection, Q 19 collector, Q 23 emitter, Q 24 emitter and Q 22 The collector connection.

[0019] As a preferred embodiment of the low-power leakage protection chip circuit of the present invention, the voltage regulator includes transistor Q. 25 ~Q 27 Q 25 base connection Q 24 The collector, Q 25 emitter connection Q 26 The base and Q27 The base, Q 25 collector connection Q 26 collector, Q 24 emitter and Q 27 The collector, Q 26 emitter and Q 27 The emitter connection.

[0020] In a preferred embodiment of the low-power leakage protection chip circuit of the present invention, the voltage regulation unit further includes a feedback component, which includes resistors R4 and R5, with one end of resistor R4 connected to Q. 27 The emitter is connected to R5 and Q at the other end. 22 The base of R5 is connected to ground.

[0021] As a preferred embodiment of the low-power leakage protection chip circuit of the present invention, the bias unit includes transistors Q4 and Q5. 18 With resistors R6 and R7, the base of Q4, Q 18 The base of Q1 is connected to the base of Q3, and the emitter of Q4 is connected to one end of R6. 18 The emitter of Q4 is connected to one end of R7, the other ends of R6 and R7 are grounded, and the collector of Q4 is connected to Q. 15 The collector, Q 18 collector connection Q 20 The emitter.

[0022] The beneficial effects of this invention are as follows: This invention designs a novel leakage current protection chip with stable temperature characteristics and low power consumption; the power supply circuit and bias circuit of the chip are improved by using temperature compensation technology, and the power consumption of the improved circuit is reduced by 80% and the temperature drift of the chip static current is reduced by 80% compared with the previous circuit. Attached Figure Description

[0023] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] in:

[0025] Figure 1 This is a schematic diagram of the low-power leakage protection chip circuit according to an embodiment of the present invention;

[0026] Figure 2 This invention illustrates the relationship between the output bias current generated by the circuit current source section and temperature under three process angles.

[0027] Figure 3 This invention illustrates the relationship between the output voltage V_REF generated by the bandgap reference portion of the circuit and temperature under three process angles.

[0028] Figure 4 This is the application circuit of the chip in this invention;

[0029] Figure 5 To improve the static current-voltage relationship of the chip at different temperatures;

[0030] Figure 6 The waveforms of current and voltage at each port under the -25℃ / SS process angle are shown.

[0031] Figure 7 The waveforms of current and voltage at each port under a process angle of 25℃ / TT;

[0032] Figure 8 The waveforms of current and voltage at each port under a process angle of 75℃ / FF;

[0033] Figure 9 This is a schematic diagram of the loop amplitude-frequency and phase-frequency characteristics of the voltage regulator. Detailed Implementation

[0034] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0035] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.

[0036] Secondly, the present invention will be described in detail with reference to the schematic diagrams. When detailing the embodiments of the present invention, for ease of explanation, the cross-sectional views illustrating the device structure will be partially enlarged, not according to the usual scale. Furthermore, the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. In addition, actual fabrication should include three-dimensional spatial dimensions of length, width, and depth.

[0037] Furthermore, the term "an embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places throughout this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that mutually excludes other embodiments.

[0038] Example 1

[0039] Reference Figures 1-9 This embodiment provides a low-power leakage current protection chip circuit, including: a bandgap reference unit 100 for generating a reference voltage V_REF, including a first current mirror 101, an output component 102, and an auxiliary component 103 for improving the current replication accuracy of the first current mirror 101; a current stabilizing unit 200 for generating a current source I_REF independent of temperature and power supply voltage, including a second current mirror 201 and a negative temperature coefficient current generating component 202, wherein the second current mirror 201 is connected to the output of the first current mirror 101, and the bandgap reference unit 100 provides a bias current to the negative temperature coefficient current generating component 202 through a biasing unit 400; and a voltage regulating unit 300 for buffering the output voltage of the bandgap reference unit 100, wherein the operational amplifier 301 of the voltage regulating unit 300 is connected to the negative temperature coefficient current generating component 202 and the biasing unit 400.

[0040] The voltage regulator unit 300 includes an operational amplifier 301 and a voltage regulator 302. The operational amplifier 301 provides a large loop gain for the voltage regulator 302 to ensure the accuracy of the voltage regulator and the power supply suppression effect.

[0041] It also includes a bias unit 400, which provides bias current for the negative temperature coefficient current generating component 202 and the operational amplifier 301.

[0042] The protection chip circuit disclosed in this invention is as follows: Figure 1 As shown, the main design idea is to use a bandgap reference source as a voltage reference and to generate voltage and current with a good temperature coefficient. Figure 1 The circuit shown consists of three parts: a bandgap reference source (bandgap reference unit 100), a current source (current stabilizing unit 200), and a voltage source (voltage stabilizing unit 300).

[0043] Figure 1 V_SUPPLY is the external power supply voltage, I_REF is the reference current, and V_REF is the reference voltage. V_REF and I_REF are the power supply voltage and bias current for the main circuit, respectively, which achieve the effects of temperature compensation and low power consumption; V_CC is the reference voltage after buffering (supplying the main circuit module).

[0044] The bandgap reference source is constructed by superimposing a negative temperature coefficient voltage V_CTAT and a positive temperature coefficient voltage V_PTAT, where V_CTAT is the junction voltage V of the PN junction. BE V_PTAT is the voltage across the resistor and has a negative temperature coefficient; while V_PTAT is the voltage across the resistor and has an integer temperature coefficient. By assigning certain weights to the two and superimposing them, the first-order quantities of the two voltages that change with temperature cancel each other out, so that the output voltage has good temperature characteristics.

[0045] Specifically, the output component 102 includes a positive temperature coefficient current generator composed of transistors Q1, Q2, Q3 and resistor R3, and a negative temperature coefficient voltage generator composed of transistors Q1, Q2 and Q5.

[0046] The base of transistor Q1 is connected to the emitter of Q2 and the base of Q3. R3 is connected to the emitter of Q3 and the emitter of Q1. The emitter of Q1 is grounded.

[0047] The collector of transistor Q1 is connected to the base of Q2, one end of R1 is connected, and the other end of R1 is connected to the emitter of Q5. The base and collector of Q5 are both connected to the first current mirror 101.

[0048] Furthermore, the first current mirror 101 includes transistors Q6 to Q7. 12 The collectors of Q6, Q9, and Q5 are connected together. The emitter of Q6 is connected to the collector of Q7, and the emitter of Q9 is connected to the collector of Q8. 12 emitter connection Q 11 The collector of Q6, the base of Q6, the base of Q9, and Q... 12 The bases of Q7, Q8, and Q are connected together. 11 The base is connected.

[0049] The bandgap reference unit 100 in the circuit consists of transistors Q1, Q3, Q6~Q9, and Q... 11 Q 12 With resistor R3, a PTAT current is generated, where Q6~Q9, Q 11 and Q 12 A 1:2 current mirror is formed by transistors Q1 and Q3 and resistor R3. The voltage across R3 is the difference between the two emitter junction voltages, which is a positive temperature coefficient value, thus generating a positive temperature coefficient current. The reference voltage output is composed of the emitter junction voltages of transistors Q1, Q2, and Q5 and the voltage across resistor R1. By choosing an appropriate value for R1, the first-order temperature coefficient of the reference voltage is made zero. Finally, the measured bandgap reference can stably output a voltage of 2.94V with a temperature coefficient of 30ppm / ℃.

[0050] The bandgap reference unit 100 also includes an auxiliary component 103, which includes a transistor Q. 10 and Q 17 Q is an auxiliary transistor designed to ensure that the current mirror composed of low-beta PNP transistors maintains high proportional accuracy. Specifically, Q... 10 emitter and Q 11 The base connection, Q 10 The base and Q 11 collector connection, Q 10 collector and Q17 The collector is connected to ground, Q 17 emitter and Q 12 The base connection, Q 17 base, Q 12 The collector of Q1 is connected to the collector of Q2.

[0051] Q1, Q2, Q3, and R3 constitute a positive temperature coefficient current generator, which produces a current that is strictly proportional to temperature. At the same time, Q1, Q2, and Q5 provide a negative temperature coefficient voltage. R1 uses the positive temperature coefficient current to generate a positive temperature coefficient voltage, which is superimposed with the aforementioned negative temperature coefficient voltage to produce a voltage that is independent of temperature, and serves as the reference voltage V_REF output.

[0052] Q 15 Q 16 Together with R2, they form a negative temperature coefficient current generator, utilizing Q. 15 The negative temperature coefficient of the PN junction voltage generates a negative temperature current.

[0053] The second current mirror 201 includes transistor Q. 13 and Q 14 Q 13 The base and Q 11 The base connection, Q 14 The base and Q 12 The base connection, Q 13 collector and Q 14 The emitter connection.

[0054] The negative temperature coefficient current generating component 202 includes transistor Q. 15 Q 16 Resistor R2, one end of which is connected to Q. 15 base, Q 16 The emitter of R2 is connected to Q. 13 emitter, Q 15 The emitter, Q 15 collector connection Q 16 The base, Q 16 collector connection Q 14 The collector.

[0055] The principle of the current stabilizing unit 200 is the addition of two currents with opposite temperature characteristics, utilizing the positive temperature coefficient current I_PTAT generated by the bandgap reference unit 100 and the emitter junction V BE The negative temperature coefficient current generated by the temperature characteristics is superimposed at the nodes with certain weights, ultimately resulting in a temperature-independent current, which serves as the bias current for the main circuit. This current is generated by transistor Q. 13 Q 14 Q 15Q 16 It consists of resistors R2 and R3, where transistor Q... 13 Q14 and Q14 are a current mirror that precisely replicates the PTAT current of the bandgap reference cell 100. 15 Q 16 R2 and Q form a feedback loop. 15 The on-state voltage of the emitter junction is a CTAT voltage, which is converted into a CTAT current through resistor R2 and superimposed with the PTAT current from the reference core, becoming a current source independent of temperature and supply voltage.

[0056] The voltage regulator unit 300 utilizes a fixed-ratio resistor feedback network consisting of resistors R4 and R5, and a transistor Q. 19 ~Q 24 The operational amplifier and transistor Q are constructed 25 ~Q 27 The output stage is constructed using Darlington transistors. To improve the accuracy of the operational amplifier, a Darlington transistor structure is used at the input. Increasing the input impedance reduces the bias current, thereby reducing error. This makes the total input current of the amplifier negligible. The output circuit uses an emitter follower to output a stable voltage. Simulation results are as follows... Figure 9 As shown, the loop DC gain of this regulator is 56dB and the phase margin is 80°.

[0057] Operational amplifier 301 includes Q 19 ~Q 24 Q 19 emitter and Q 20 The base connection, Q 22 emitter and Q 21 The base connection, Q 20 emitter connection Q 21 The emitter, Q 20 collector and Q 23 collector, Q 23 The base and Q 24 The base connection, Q 21 collector and Q 24 collector connection, Q 19 collector, Q 23 emitter, Q 24 emitter and Q 22 The collector connection. Q 19 ~Q 24 This forms an operational amplifier, providing a large loop gain for the voltage regulator to ensure good accuracy and high power supply rejection.

[0058] Regulator 302 includes transistor Q 25 ~Q27 Q 25 ~Q 27 The output buffer, which forms a Darlington structure, increases the output current to increase the load-driving capacity. R4 and R5 serve as feedback resistors, and the sampled feedback voltage, which is proportional to the output, is sent back to the error amplifier.

[0059] Q 25 base connection Q 24 The collector of Q25 is connected to the emitter of Q. 26 The base and Q 27 The base, Q 25 collector connection Q 26 collector, Q 24 emitter and Q 27 The collector, Q 26 emitter and Q 27 emitter connection

[0060] Furthermore, the voltage regulator unit 300 also includes a feedback component 303, which includes resistors R4 and R5, with one end of resistor R4 connected to R... 27 The emitter is connected to R5 and Q at the other end. 22 The base of R5 is connected to ground.

[0061] The bias unit 400 includes transistors Q4 and Q5. 18 Resistors R6 and R7 provide bias current for the negative temperature coefficient current generator and operational amplifier.

[0062] Specifically, the base of Q4, Q 18 The base of Q1 is connected to the base of Q3, and the emitter of Q4 is connected to one end of R6. 18 The emitter of Q1 is connected to one end of R7, one end of R6, one end of R7, and the emitter of Q1 are connected together, and the collector of Q4 is connected to Q... 15 The collector, Q 18 collector connection Q 20 The emitter.

[0063] It should be noted that the parameters of R6, R7 and R3 are the same.

[0064] In recent years, reports have highlighted the use of timing delay principles to meet the high sensitivity and anti-interference requirements of residual current devices (RCDs) and the addition of control modules for zoned protection, significantly improving chip functionality. However, simulation analysis of the original chips reveals that temperature drift and power consumption are also key factors affecting reliability. Currently, commercially available RCDs exhibit significant temperature drift and power consumption, severely impacting the reliability of RCDs. To address these critical issues, this paper improves the RCD from the perspectives of power consumption and temperature stability. Simulation results demonstrate that the designed chip achieves improved power consumption and stability.

[0065] Compared with traditional leakage protection chips, the novel leakage protection chip designed in this paper uses a voltage and current stabilizing unit to replace the traditional Zener diode and fixed bias circuit, reducing power consumption by more than 80% and static current temperature drift by 80%.

[0066] The application effects of the chip of this invention in circuits will be described below.

[0067] Chip application circuits such as Figure 4 As shown, the application circuit is powered by the mains frequency power supply from the incoming line. This power is stepped down by a transformer and rectified and filtered to become a DC power supply usable by the chip. The coil connected in parallel with C4 is the secondary coil of the current transformer. C4's function is to eliminate the interference of differential-mode voltage induced by the electric field and noise differential-mode voltage on the chip. C3 also filters out interference noise. C5 is an integrating capacitor and also serves as a filter for the latch's input signal. Its main purpose is to provide a delay and eliminate false triggering of the latch caused by external interference. C6 is the power supply filter capacitor for the thyristor drive circuit, and C7 is the gate-level filter capacitor for the thyristor to prevent interference to the SCR gate from causing false SCR activation.

[0068] A is the external power supply terminal, B is the ground terminal, C is the reference voltage terminal, D is the input voltage terminal, E is the delay filter capacitor terminal, F is the latch input terminal, G is the noise filter terminal, and H is the output voltage terminal.

[0069] SS indicates the slow process corner of the device; FF indicates the fast process corner of the device; TT indicates the normal process corner of the device.

[0070] Simulations were performed on three combinations (-25℃ / SS; 75℃ / FF; 25℃ / TT), and the results are as follows. Figure 5 As shown in the simulation results, the power consumption and temperature drift have been significantly improved. Figure 5It can be seen that, under the condition of 75℃ / FF, the simulation results of its static current remain basically unchanged compared with those under the condition of -25℃ / SS at the same voltage. Compared with the traditional solution, the power consumption is reduced by more than 80%. Figure 6 The simulation results are taken as an example under the simulation results at -25℃ and slow (SS) process angle. VIN is the signal voltage at the output terminal of the current transformer, and LATCHIN is the signal output from the comparator amplifier and input to the latch. As shown in the figure, the latch receives this signal and immediately latches it. Then, this signal is converted into the SCR drive signal through the circuit. Finally, the SCR conducts under the action of this signal. In the test circuit, a 10V external power supply is used. The SCR is connected in series with a resistor across the 10V power supply, and the signal is detected from the anode of the SCR. Figure 6 The SCROUT signal.

[0071] contrast Figure 6 As shown in Figures 7 and 8, the slowest response time is observed in the -25℃ / SS process corner combination, with a delay of 4ms. The fastest response occurs in the 75℃ / FF process corner combination, with a delay of 1ms. The significant difference in delay time under different conditions is due to several factors. Firstly, at high temperatures and FF process corners, the emitter junction on-state voltage of the transistor decreases, reducing the circuit's dead zone. Secondly, the increased carrier mobility at high temperatures results in a larger current gain in the transistor. Thirdly, the negative temperature coefficient of the resistor (p-well resistor) leads to a larger current charging the filter capacitor at the output point, resulting in a faster voltage slew rate at the output node. These factors contribute to the improved response speed and reduced dead zone width.

[0072] It is important to note that the constructions and arrangements of this application shown in several different exemplary embodiments are merely illustrative. Although only a few embodiments are described in detail in this disclosure, those who consult this disclosure will readily understand that many modifications are possible (e.g., changes in the size, dimensions, structure, shape, and proportions of various elements, as well as parameter values ​​(e.g., temperature, pressure, etc.), mounting arrangements, use of materials, color, orientation, etc.) without substantially departing from the novel teachings and advantages of the subject matter described in this application). For example, an element shown as integrally formed may be composed of multiple parts or elements, the position of elements may be inverted or otherwise altered, and the nature or number or position of discrete elements may be changed or altered. Therefore, all such modifications are intended to be included within the scope of the invention. The order or sequence of any process or method steps may be changed or rearranged according to alternative embodiments. In the claims, any "device plus function" clause is intended to cover the structure described herein that performs the function, and not only structurally equivalent but also equivalent in structure. Other substitutions, modifications, alterations, and omissions may be made in the design, operation, and arrangement of the exemplary embodiments without departing from the scope of the invention. Therefore, the present invention is not limited to the specific embodiments, but extends to various modifications that still fall within the scope of the appended claims.

[0073] Furthermore, in order to provide a concise description of exemplary embodiments, not all features of actual embodiments (i.e., those features that are not relevant to the currently considered best mode for carrying out the invention, or those features that are not relevant to implementing the invention) may be omitted.

[0074] It should be understood that numerous specific implementation decisions can be made during the development of any practical implementation, such as in any engineering or design project. Such development efforts may be complex and time-consuming, but for those skilled in the art who benefit from this disclosure, the development effort will be a routine work of design, manufacturing, and production without requiring much experimentation.

[0075] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A low power consumption leakage protection chip circuit, characterized by: The application relates to a bandgap reference unit (100) for generating a reference voltage V_REF, comprising a first current mirror (101) and an output component (102); a current stabilizing unit (200) for generating a temperature and supply voltage independent current source I_REF, comprising a second current mirror (201) and a negative temperature coefficient current generating component (202); a voltage stabilizing unit (300) for generating a voltage source; the voltage stabilizing unit (300) comprises an operational amplifier (301) and a voltage stabilizer (302), the operational amplifier (301) provides a large loop gain for the voltage stabilizer (302) to ensure the precision of the voltage stabilizer and the power supply rejection effect; a bias unit (400) is further included, which provides bias current for the negative temperature coefficient current generating component (202) and the operational amplifier (301); the output component (102) comprises a positive temperature coefficient current generator composed of transistors Q1, Q2, Q3 and a resistor R3 and a negative temperature coefficient voltage generator composed of transistors Q1, Q2 and Q5; the base of the transistor Q1 is connected with the emitter of the transistor Q2 and the base of the transistor Q3, one end of the resistor R3 is connected with the emitter of the transistor Q3, the other end of the resistor R3 is connected with the emitter of the transistor Q1 and grounded, and the emitter of the transistor Q1 is grounded; the collector of the transistor Q1 is connected with the base of the transistor Q2 and one end of the resistor R1, the other end of the resistor R1 is connected with the emitter of the transistor Q5, and the base and the collector of the transistor Q5 are connected with the first current mirror (101); the transistors Q1, Q2, Q3 and the resistor R3 constitute the positive temperature coefficient current generator, generate a current strictly proportional to temperature, meanwhile, the transistors Q1, Q2 and Q5 provide a negative temperature coefficient voltage, the resistor R1 generates a positive temperature coefficient voltage by using the positive temperature coefficient current, and the positive temperature coefficient voltage is superposed with the temperature coefficient voltage to generate a temperature independent voltage, which is output as the reference voltage V_REF; ​ ​ ​ ​ ​ ​ The bias unit (400) comprises transistors Q4, Q 18 and resistors R6, R7, the base of Q4, the base of Q 18 and the base of Q3 are connected, the emitter of Q4 is connected to one end of R6, the emitter of Q 18 is connected to one end of R7, the other end of R6 and the other end of R7 are connected to the emitter of Q1 and grounded, the collector of Q1 is connected to the collector of Q 15 , the collector of Q 18 is connected to the emitter of Q 20 ; ​ ​ The first current mirror (101) comprises transistors Q6-Q 12 The collector of Q6, the collector of Q9 and the collector of Q5 are connected, the emitter of Q6 is connected to the collector of Q7, the emitter of Q9 is connected to the collector of Q8, the base of Q6, the base of Q9 and the base of Q 12 are connected, the emitter of Q7, the emitter of Q8 and the emitter of Q 11 are connected to the collector of Q5, the base of Q6, the base of Q9 and the base of Q 12 are connected, the base of Q7, the base of Q8 and the base of Q 11 are connected, the emitter of Q7, the emitter of Q8 and the emitter of Q 11 are connected to an external supply voltage V_SUPPLY; The bandgap reference unit (100) further comprises an auxiliary assembly (103) comprising a transistor Q 10 and the emitter of Q 17 , the base of Q 10 , the collector of Q 11 , the collector of Q 10 , the base of Q 11 , the collector of Q 10 , the collector of Q 17 , the emitter of Q 17 , the base of Q 12 , the base of Q 12 17, the collector of Q 3, the collector of Q 3 are connected. The bandgap reference unit (100) in the circuit consists of transistors Q1, Q3, Q6~Q9, and Q... 11 Q 12 With resistor R3, a PTAT current is generated, where Q6~Q9, Q 11 and Q 12 A 1:2 current mirror is formed by transistors Q1, Q3 and resistor R3. The voltage across R3 is the difference between the two emitter junction voltages, which is a positive temperature coefficient value, thereby generating a positive temperature coefficient current. The reference voltage output is composed of the emitter junction voltages of transistors Q1, Q2 and Q5 and the voltage across resistor R1. ​ Q 15 , Q 16 and R2 form a negative temperature coefficient current generator which utilizes the negative temperature coefficient of the PN junction voltage of Q 15 to generate a negative temperature current.

2. The low power consumption leakage protection chip circuit of claim 1, wherein: The second current mirror (201) comprises a transistor Q 13 and Q 14 , the base of Q 13 and the base of Q 11 are connected, the base of Q 14 and the base of Q 12 are connected, the collector of Q 13 and the emitter of Q 14 are connected.

3. The low power consumption leakage protection chip circuit of claim 2, wherein: The negative temperature coefficient current generating component (202) comprises a transistor Q 15 , Q 16 and a resistor R2, one end of R2 is connected to the base of Q 15 , the emitter of Q 16 , the other end of R2 is connected to the emitter of Q 13 , the emitter of Q 15 , the collector of Q 15 is connected to the base of Q 16 , the collector of Q 16 is connected to the collector of Q 12 .

4. The low power consumption leakage protection chip circuit of claim 3, wherein: The operational amplifier (301) includes Q 19 The emitter of Q 24 The emitter of Q 19 The emitter of Q 20 The base of Q 22 The emitter of Q 21 The emitter of Q 20 The emitter of Q 21 The collector of Q 20 The collector of Q 23 The base of Q 23 The base of Q 24 The collector of Q 22 The collector of Q 24 The collector of Q 19 The emitter of Q 23 The emitter of Q 24 The emitter of Q 22 The collector of Q 5. The low power consumption leakage protection chip circuit of claim 4, wherein: The voltage regulator (302) comprises a transistor Q 25 Q 27 , the base of which is connected to the collector of Q 25 , the emitter of which is connected to the base of Q 24 , the base of which is connected to the collector of Q 26 , the base of which is connected to the base of Q 27 , the collector of which is connected to the collector of Q 25 , the emitter of which is connected to the emitter of Q 26 , the collector of which is connected to the collector of Q 24 , the emitter of which is connected to the emitter of Q 27 , the collector of which is connected to the collector of Q 26 , the emitter of which is connected to the emitter of Q 27 .

6. The low power consumption leakage protection chip circuit of claim 5, wherein: The voltage stabilizing unit (300) further comprises a feedback component (303) comprising resistors R4 and R5, one end of the resistor R4 being connected to R 27 3, the other end of the resistor R4 being connected to the base of Q 22 1, the other end of the resistor R5 being grounded.

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