A programmable gain amplifier suitable for high precision ADC front end

Abstract

The present application belongs to the technical field of analog circuit, and particularly relates to a programmable gain amplifier suitable for a high-precision ADC front end. The programmable gain amplifier of the present application adopts a whole differential structure, and comprises a whole differential amplifier. The amplifier completes the function of signal amplification, and has the characteristics of high gain and high linearity. The switches of the network of the switching feedback resistance and capacitance all adopt transmission gate switches, so as to reduce the channel charge injection effect of the switches and the nonlinearity of the on-resistance of the switches. The feedback network of the programmable gain amplifier changes the size of the feedback resistance and capacitance through the transmission gate and the resistance-capacitance combination, so as to realize the control of the gain. The input signal is amplified by the accurate amplification multiple, and meanwhile the size of the feedback resistance and capacitance is impedance-matched, so as to ensure that the-3dB bandwidth of the whole programmable gain amplifier remains basically unchanged, so that the working speed of the programmable gain amplifier under different gain conditions remains consistent, and the linearity is greatly improved.

Description

Technical Field

[0001] This invention belongs to the field of analog circuit technology, and specifically relates to a programmable gain amplifier suitable for the front end of a high-precision ADC. Background Technology

[0002] With the continuous development of integrated circuit technology, programmable gain amplifiers (PGAs) are widely used in wireless communication and various transceiver systems. They are primarily used to optimize the dynamic range of the entire system, amplifying weak signals from nature and automatically adjusting the input signal to the optimal signal range according to the requirements of the analog-to-digital converter (ADC), bringing the signal as close as possible to the ADC's full-scale range and improving the circuit's signal-to-noise ratio. The challenge in PGA design lies in precisely controlling the amplifier's gain when processing signals with a large input dynamic range. This requires the PGA to have high linearity while simultaneously ensuring robustness and minimal susceptibility to PVT (Progressive Voltage Transformation).

[0003] Traditional PGA structures, such as Figure 1 As shown, the circuit consists of an amplifier and a resistor feedback network. The value of the resistor in the feedback network is selected according to the needs, thereby controlling the gain of the PGA. Under different gain conditions, the resistor used in the feedback network is different, which will lead to different loading effects of the feedback network on the load, thus affecting the -3dB bandwidth of the circuit. The maximum signal frequency that the circuit can handle is different under each gain condition, that is, the operating speed of the circuit is different. This seriously affects the overall linearity of the circuit. In addition, the feedback resistor required by this structure increases exponentially with the increase of circuit gain. Resistors occupy a large part of the area during chip manufacturing, which seriously wastes chip area and increases manufacturing costs. Summary of the Invention

[0004] The purpose of this invention is to address the above problems by proposing a high-linearity PGA architecture that adaptively adjusts the loading effect caused by changing the resistance based on the PGA gain. At the same time, a new feedback network switching method is adopted to reduce the number of feedback resistors while ensuring the gain adjustment range.

[0005] The technical solution of this invention is as follows:

[0006] A programmable gain amplifier suitable for the front end of a high-precision ADC includes a high-gain amplifier AMP, a first feedback network, a second feedback network, a third feedback network, a load circuit, and an inverter circuit. The first feedback network is located between the positive input and negative output terminals of the high-gain amplifier AMP and includes a second transmission gate T2, a third transmission gate T3, a fourth transmission gate T4, a fifth transmission gate T5, a sixth transmission gate T6, a seventh transmission gate T7, an eighth transmission gate T8, a ninth transmission gate T9, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a first capacitor C1, a second capacitor C2, and a third capacitor C3. 3 and the fourth capacitor C4; the input terminals of the second transmission gate T2, the third transmission gate T3, the fourth transmission gate T4, and the fifth transmission gate T5 are connected and then connected to the negative output terminal of the high-gain amplifier AMP. The output terminal of the second transmission gate T2 is connected to one end of the second resistor R2, the output terminal of the third transmission gate T3 is connected to one end of the third resistor R3, the output terminal of the fifth transmission gate T5 is connected to one end of the fifth resistor R5, and the output terminal of the fourth transmission gate T4 is connected to the other end of the fifth resistor R5 and one end of the fourth resistor R4; the other end of the fourth resistor R4, the other end of the third resistor R3, and the other end of the second resistor R2 are connected and then connected to the negative output terminal of the high-gain amplifier AMP. The positive input terminal of the gain amplifier AMP, the input terminal of the sixth transmission gate T6, the input terminal of the seventh transmission gate T7, the input terminal of the eighth transmission gate T8, and the input terminal of the ninth transmission gate T9 are connected. The output terminal of the sixth transmission gate T6 is connected to one end of the first capacitor C1, the output terminal of the seventh transmission gate T7 is connected to one end of the second capacitor C2, the output terminal of the eighth transmission gate T8 is connected to one end of the third capacitor C3, and the output terminal of the ninth transmission gate T9 is connected to one end of the fourth capacitor C4. The other ends of the first capacitor C1, the second capacitor C2, the third capacitor C3, and the fourth capacitor C4 are connected and then connected to the negative output terminal of the high-gain amplifier AMP. The control signal for the second transmission gate T2 is the first control signal and its reverse signal; the control signal for the third transmission gate T3 is the second control signal and its reverse signal; the control signal for the fourth transmission gate T4 is the third control signal and its reverse signal; the control signal for the fifth transmission gate T5 is the fourth control signal and its reverse signal; the control signal for the sixth transmission gate T6 is the eighth control signal and its reverse signal; the control signal for the seventh transmission gate T7 is the seventh control signal and its reverse signal; the control signal for the eighth transmission gate T8 is the sixth control signal and its reverse signal; and the control signal for the ninth transmission gate T9 is the fifth control signal and its reverse signal.

[0007] The second feedback network is located between the negative input and positive output of the high-gain amplifier AMP, and includes the tenth transmission gate T10, the eleventh transmission gate T11, the twelfth transmission gate T12, the thirteenth transmission gate T13, the fourteenth transmission gate T14, the fifteenth transmission gate T15, the sixteenth transmission gate T16, the seventeenth transmission gate T17, the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, the ninth resistor R9, the fifth capacitor C5, the sixth capacitor C6, the seventh capacitor C7, and the eighth capacitor C8; wherein the input of the fourteenth transmission gate T14 and the fifteenth transmission gate T15... The input terminals of the sixteenth transmission gate T16 and the seventeenth transmission gate T17 are connected to the positive output terminal of the high-gain amplifier AMP; the output terminal of the fourteenth transmission gate T14 is connected to one end of the sixth resistor R6; the output terminal of the fifteenth transmission gate T15 is connected to one end of the seventh resistor R7; the output terminal of the seventeenth transmission gate T17 is connected to one end of the ninth resistor R9; the output terminal of the sixteenth transmission gate T16 is connected to the other end of the ninth resistor R9 and one end of the eighth resistor R8; the other ends of the sixth resistor R6, the seventh resistor R7, and the eighth resistor R8 are connected to the positive output terminal of the high-gain amplifier AMP. The negative input terminal of the gain amplifier AMP, the input terminals of the tenth transmission gate T10, the eleventh transmission gate T11, the twelfth transmission gate T12, and the thirteenth transmission gate T13 are connected to the following terminals: the output terminal of the tenth transmission gate T10 is connected to one end of the fifth capacitor C5, the output terminal of the eleventh transmission gate T11 is connected to one end of the sixth capacitor C6, the output terminal of the twelfth transmission gate T12 is connected to one end of the seventh capacitor C7, and the output terminal of the thirteenth transmission gate T13 is connected to one end of the eighth capacitor C8; the control signal for the fourteenth transmission gate T14 is the first control signal and its inverse signal. The control signal for the fifteenth transmission gate T15 is the second control signal and its reverse signal; the control signal for the sixteenth transmission gate T16 is the third control signal and its reverse signal; the control signal for the seventeenth transmission gate T17 is the fourth control signal and its reverse signal; the control signal for the tenth transmission gate T10 is the fifth control signal and its reverse signal; the control signal for the eleventh transmission gate T11 is the sixth control signal and its reverse signal; the control signal for the twelfth transmission gate T12 is the seventh control signal and its reverse signal; and the control signal for the thirteenth transmission gate T13 is the eighth control signal and its reverse signal.

[0008] The third feedback network includes a first transmission gate T1, an eighteenth transmission gate T18, a first resistor R1, and a tenth resistor R10. One end of the first resistor R1 is connected to the differential input signal VIN, and the other end is connected to the input terminal of the first transmission gate T1. The output terminal of the first transmission gate T1 is connected to the negative input terminal of the high-gain amplifier AMP. One end of the tenth resistor R10 is connected to the differential input signal VPN, and the other end is connected to the input terminal of the eighteenth transmission gate T18. The output terminal of the eighteenth transmission gate T18 is connected to the positive input terminal of the high-gain amplifier AMP. The control signals for the first transmission gate T1 and the eighteenth transmission gate T18 are both enable signals and their inverse signals.

[0009] The load circuit includes a first load resistor RL1 and a first load capacitor CL1 connected in parallel at the negative output terminal, and a second load resistor RL2 and a second load capacitor CL2 connected in parallel at the positive output terminal.

[0010] The inverter circuit includes a first inverter INV1, a second inverter INV2, and a third inverter INV3. The input of the first inverter INV1 is connected to a first control signal sequence consisting of a first control signal, a second control signal, a third control signal, and a fourth control signal, and the output of the first inverter INV1 outputs the inverted signal of the first control signal sequence. The input of the second inverter INV2 is connected to a second control signal sequence consisting of a fifth control signal, a sixth control signal, a seventh control signal, and an eighth control signal, and the output of the second inverter INV2 outputs the inverted signal of the second control signal sequence. The input of the third inverter INV3 is connected to an enable signal, and the output of the third inverter INV3 outputs the inverted signal of the enable signal.

[0011] Furthermore, when the enable signal is high, and the first control signal is high, the second control signal is high, the third control signal is low, the fourth control signal is low, the fifth control signal is high, the sixth control signal is high, the seventh control signal is high, and the eighth control signal is high, the programmable gain amplifier achieves a gain of 1.

[0012] When the enable signal is high, and the first control signal is low, the second control signal is high, the third control signal is low, the fourth control signal is low, the fifth control signal is high, the sixth control signal is high, the seventh control signal is high, and the eighth control signal is low, the programmable gain amplifier achieves a gain of 2 times.

[0013] When the enable signal is high, and the first control signal is low, the second control signal is low, the third control signal is high, the fourth control signal is low, the fifth control signal is high, the sixth control signal is high, the seventh control signal is low, and the eighth control signal is low, the programmable gain amplifier achieves a gain of 4 times.

[0014] When the enable signal is high, and the first control signal is low, the second control signal is low, the third control signal is low, the fourth control signal is high, the fifth control signal is high, the sixth control signal is low, the seventh control signal is low, and the eighth control signal is low, the programmable gain amplifier achieves an 8x gain.

[0015] The beneficial effects of this invention are as follows: This invention proposes a programmable gain amplifier suitable for high-precision ADC front-ends. The programmable gain amplifier adopts a fully differential structure, including a fully differential amplifier that performs signal amplification and has high gain and high linearity characteristics. All switches in the network that switch the feedback resistor and capacitor use transmission gate switches, reducing channel charge injection effects and nonlinearity of switch on-resistance. The feedback network of the programmable gain amplifier uses a combination of transmission gates and resistors / capacitors to change the values ​​of the feedback resistor and capacitor, thereby achieving gain control. The input signal is amplified by a precise factor, and the values ​​of the feedback resistor and capacitor are impedance matched to ensure that the -3dB bandwidth of the entire programmable gain amplifier remains essentially constant, ensuring consistent operating speed under different gain conditions and greatly improving linearity. The programmable gain amplifier proposed in this invention has strong resistance to common-mode interference and can achieve precise amplification factors of 1, 2, 4, and 8 times through programming control. Compared with traditional control methods, it uses fewer unit resistors, saves chip area, and has strong robustness. Attached Figure Description

[0016] Figure 1 The structure is that of a traditional PGA;

[0017] Figure 2 This is the circuit diagram for the transmission gate;

[0018] Figure 3 This invention relates to a programmable amplifier structure suitable for high-precision ADC front-ends;

[0019] Figure 4 Output frequency response curves of a programmable gain amplifier under four gain control states. Detailed Implementation

[0020] The present invention will now be described in detail with reference to the accompanying drawings.

[0021] like Figure 3 As shown, the present invention mainly includes a high-gain amplifier AMP, a feedback network 100, a feedback network 101, a feedback network 120, a load circuit 121, and an inverter circuit 110.

[0022] Feedback network 100 includes a second transmission gate T2, a third transmission gate T3, a fourth transmission gate T4, a fifth transmission gate T5, a sixth transmission gate T6, a seventh transmission gate T7, an eighth transmission gate T8, a ninth transmission gate T9, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a first capacitor C1, a second capacitor C2, a third capacitor C3, and a fourth capacitor C4; feedback network 101 includes a tenth transmission gate T10, an eleventh transmission gate T11, a twelfth transmission gate T12, a thirteenth transmission gate T13, a fourteenth transmission gate T14, a fifteenth transmission gate T15, and a sixteenth transmission gate T16. The seventeenth transmission gate T17, the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, the ninth resistor R9, the fifth capacitor C5, the sixth capacitor C6, the seventh capacitor C7, and the eighth capacitor C8; the feedback network 120 includes the first transmission gate T1, the eighteenth transmission gate T18, the first resistor R1, and the tenth resistor R10; the load circuit 121 includes the first load resistor RL1, the first load capacitor CL1, the second load resistor RL2, and the second load capacitor CL2; the inverter circuit includes the first inverter INV1, the second inverter INV2, and the third inverter INV3; the circuit diagram of the transmission gates used is as follows. Figure 2 As shown.

[0023] The programmable gain amplifier of this invention precisely controls the gain of the amplifier circuit by programming the feedback resistors and capacitors at the input and output terminals of the amplifier (AMP). The following details four gain control methods for the programmable gain amplifier:

[0024] 1x gain: R <0> R <1> For high, R <2> R <3> When the signal is low, transmission gates T2, T3, T14, and T15 are turned on, and transmission gates T4, T5, T16, and T17 are turned off. (C) <0> C <1> C <2> C <3> With the transmission gates T6, T7, T8, T9, T10, T11, T12, and T13 in high position, the total resistance of the feedback networks 100 and 101 is R, and the total capacitance is 8C.

[0025] 2x gain: R <1> For high, R <0> R <2> R <3> When the current value is low, transmission gates T3 and T15 are turned on, and transmission gates T2, T4, T5, T14, T16, and T17 are turned off. (C) <0> C <1> C <2> For high, C <3> When the signal is low, transmission gates T7, T8, T9, T10, T11, and T12 are turned on, and transmission gates T6 and T13 are turned off. The total resistance of feedback networks 100 and 101 is 2R, and the total capacitance is 4C.

[0026] 4x gain: R <2> High, R <0> R <1> R <3> When the current value is low, transmission gates T4 and T16 are turned on, and transmission gates T2, T3, T5, T14, T15, and T17 are turned off. (C) <0> C <1> For high, C <2> C <3> With the input voltage low, transmission gates T8, T9, T10, and T11 are turned on, while T6, T7, T12, and T13 are turned off. The total resistance of feedback networks (100) and (101) is 4R, and the total capacitance is 2C. 8x gain: R <3> For high, R <0> R <1> R <2> When the current value is low, transmission gates T5 and T17 are turned on, and transmission gates T2, T3, T4, T14, T15, and T16 are turned off. (C) <0> For high C <1> C <2> C <3> When the signal is low, transmission gates T9 and T10 are turned on, while gates T6, T7, T8, T11, T12, and T13 are turned off. The total resistance of feedback networks 100 and 101 is 8R, and the total capacitance is C.

[0027] The output frequency response curves of the programmable gain amplifier under the four gain control states of this invention are as follows: Figure 4 As shown in the figure, the low-frequency gain of the circuit under the four gain control modes are 7.984, 3.992, 1.996, and 0.998, respectively. The difference from the ideal situation is only 2 / 1000, and the gain is very accurate. Moreover, the -3dB bandwidth of the circuit (the gain factor drops to 0.707 times that under DC conditions) is about 100KHz, and the programmable gain amplifier has good linearity.

[0028] The programmable gain amplifier proposed in this invention has strong resistance to common-mode interference. It can achieve precise amplification factors of 1, 2, 4, and 8 times through programming control. Compared with traditional control methods, it uses fewer unit resistors, saving chip area. The feedback network of the programmable gain amplifier achieves gain control by changing the size of the feedback resistor and capacitor through the combination of transmission gates and resistors and capacitors. The input signal is amplified by precise amplification factor. At the same time, the size of the feedback resistor and capacitor is impedance matched to ensure that the -3dB bandwidth of the entire programmable gain amplifier remains basically unchanged. This ensures that the operating speed of the programmable gain amplifier remains consistent under different gain conditions, greatly improving linearity.

Claims

1. A programmable gain amplifier suitable for the front end of a high-precision ADC, characterized in that, This includes a high-gain amplifier AMP, a first feedback network, a second feedback network, a third feedback network, a load circuit, and an inverter circuit. The first feedback network is located between the positive input and negative output terminals of the high-gain amplifier AMP and includes a second transmission gate T2, a third transmission gate T3, a fourth transmission gate T4, a fifth transmission gate T5, a sixth transmission gate T6, a seventh transmission gate T7, an eighth transmission gate T8, a ninth transmission gate T9, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a first capacitor C1, a second capacitor C2, a third capacitor C3, and a fourth capacitor C4. The second transmission gate T2... The input terminals of the second transmission gate T2, the third transmission gate T3, the fourth transmission gate T4, and the fifth transmission gate T5 are connected together and then connected to the negative output terminal of the high-gain amplifier AMP. The output terminal of the second transmission gate T2 is connected to one end of the second resistor R2, the output terminal of the third transmission gate T3 is connected to one end of the third resistor R3, the output terminal of the fifth transmission gate T5 is connected to one end of the fifth resistor R5, and the output terminal of the fourth transmission gate T4 is connected to the other end of the fifth resistor R5 and one end of the fourth resistor R4. The other end of the fourth resistor R4, the other end of the third resistor R3, and the other end of the second resistor R2 are connected together and then connected to the positive output terminal of the high-gain amplifier AMP. The input terminals are: the input terminal of the sixth transmission gate T6, the input terminal of the seventh transmission gate T7, the input terminal of the eighth transmission gate T8, and the input terminal of the ninth transmission gate T9; the output terminal of the sixth transmission gate T6 is connected to one end of the first capacitor C1, the output terminal of the seventh transmission gate T7 is connected to one end of the second capacitor C2, the output terminal of the eighth transmission gate T8 is connected to one end of the third capacitor C3, and the output terminal of the ninth transmission gate T9 is connected to one end of the fourth capacitor C4; the other ends of the first capacitor C1, the second capacitor C2, the third capacitor C3, and the fourth capacitor C4 are connected and connected to the negative output terminal of the high-gain amplifier AMP; the second The control signal for transmission gate T2 is the first control signal and its reverse signal; the control signal for transmission gate T3 is the second control signal and its reverse signal; the control signal for transmission gate T4 is the third control signal and its reverse signal; the control signal for transmission gate T5 is the fourth control signal and its reverse signal; the control signal for transmission gate T6 is the eighth control signal and its reverse signal; the control signal for transmission gate T7 is the seventh control signal and its reverse signal; the control signal for transmission gate T8 is the sixth control signal and its reverse signal; and the control signal for transmission gate T9 is the fifth control signal and its reverse signal. The second feedback network is located between the negative input and positive output of the high-gain amplifier AMP, and includes the tenth transmission gate T10, the eleventh transmission gate T11, the twelfth transmission gate T12, the thirteenth transmission gate T13, the fourteenth transmission gate T14, the fifteenth transmission gate T15, the sixteenth transmission gate T16, the seventeenth transmission gate T17, the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, the ninth resistor R9, the fifth capacitor C5, the sixth capacitor C6, the seventh capacitor C7, and the eighth capacitor C8; The inputs of the fourteenth transmission gate T14, the fifteenth transmission gate T15, the sixteenth transmission gate T16, and the seventeenth transmission gate T17 are connected to the positive output of the high-gain amplifier AMP. The output of the fourteenth transmission gate T14 is connected to one end of the sixth resistor R6, the output of the fifteenth transmission gate T15 is connected to one end of the seventh resistor R7, the output of the seventeenth transmission gate T17 is connected to one end of the ninth resistor R9, and the output of the sixteenth transmission gate T16 is connected to the other end of the ninth resistor R9 and one end of the eighth resistor R8. The other ends of the sixth resistor R6, the seventh resistor R7, and the eighth resistor R8 are connected to the negative input of the high-gain amplifier AMP, the inputs of the tenth transmission gate T10, the eleventh transmission gate T11, the twelfth transmission gate T12, and the thirteenth transmission gate T13. The output of the tenth transmission gate T10 is connected to the fifth... One end of capacitor C5 is connected to the output of the eleventh transmission gate T11, which is connected to one end of the sixth capacitor C6; the output of the twelfth transmission gate T12 is connected to one end of the seventh capacitor C7; and the output of the thirteenth transmission gate T13 is connected to one end of the eighth capacitor C8. The control signal of the fourteenth transmission gate T14 is the first control signal and its reverse signal; the control signal of the fifteenth transmission gate T15 is the second control signal and its reverse signal; the control signal of the sixteenth transmission gate T16 is the third control signal and its reverse signal; the control signal of the seventeenth transmission gate T17 is the fourth control signal and its reverse signal; the control signal of the tenth transmission gate T10 is the fifth control signal and its reverse signal; the control signal of the eleventh transmission gate T11 is the sixth control signal and its reverse signal; the control signal of the twelfth transmission gate T12 is the seventh control signal and its reverse signal; and the control signal of the thirteenth transmission gate T13 is the eighth control signal and its reverse signal. The third feedback network includes a first transmission gate T1, an eighteenth transmission gate T18, a first resistor R1, and a tenth resistor R10. One end of the first resistor R1 is connected to the differential input signal VIN, and the other end is connected to the input terminal of the first transmission gate T1. The output terminal of the first transmission gate T1 is connected to the negative input terminal of the high-gain amplifier AMP. One end of the tenth resistor R10 is connected to the differential input signal VPN, and the other end is connected to the input terminal of the eighteenth transmission gate T18. The output terminal of the eighteenth transmission gate T18 is connected to the positive input terminal of the high-gain amplifier AMP. The control signals for the first transmission gate T1 and the eighteenth transmission gate T18 are both enable signals and their inverse signals. The load circuit includes a first load resistor RL1 and a first load capacitor CL1 connected in parallel at the negative output terminal, and a second load resistor RL2 and a second load capacitor CL2 connected in parallel at the positive output terminal. The inverter circuit includes a first inverter INV1, a second inverter INV2, and a third inverter INV3. The input terminal of the first inverter INV1 is connected to a first control signal sequence consisting of a first control signal, a second control signal, a third control signal, and a fourth control signal. The output terminal of the first inverter INV1 outputs the inverted signal of the first control signal sequence. The input terminal of the second inverter INV2 is connected to the second control signal sequence consisting of the fifth control signal, the sixth control signal, the seventh control signal, and the eighth control signal. The output terminal of the second inverter INV2 outputs the inverted signal of the second control signal sequence. The input terminal of the third inverter INV3 receives an enable signal, and the output terminal of the third inverter INV3 outputs the inverted signal of the enable signal.

2. The programmable gain amplifier suitable for high-precision ADC front-ends according to claim 1, characterized in that, When the enable signal is high, and the first control signal is high, the second control signal is high, the third control signal is low, the fourth control signal is low, the fifth control signal is high, the sixth control signal is high, the seventh control signal is high, and the eighth control signal is high, the programmable gain amplifier achieves a gain of 1. When the enable signal is high, and the first control signal is low, the second control signal is high, the third control signal is low, the fourth control signal is low, the fifth control signal is high, the sixth control signal is high, the seventh control signal is high, and the eighth control signal is low, the programmable gain amplifier achieves a gain of 2 times. When the enable signal is high, and the first control signal is low, the second control signal is low, the third control signal is high, the fourth control signal is low, the fifth control signal is high, the sixth control signal is high, the seventh control signal is low, and the eighth control signal is low, the programmable gain amplifier achieves a gain of 4 times. When the enable signal is high, and the first control signal is low, the second control signal is low, the third control signal is low, the fourth control signal is high, the fifth control signal is high, the sixth control signal is low, the seventh control signal is low, and the eighth control signal is low, the programmable gain amplifier achieves an 8x gain.

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