Methods and systems for benchmarking quantum devices

Abstract

This invention discloses a system and method for benchmarking quantum devices. According to the disclosed embodiments, the benchmarking method may include obtaining a sequence of M quantum gates from a set of quantum gates based on a probability distribution. The quantum gates in this set are capable of polynomial-time classical simulation. The method may further include obtaining a result measurement by applying the sequence of M quantum gates to N qubits of a quantum computing device, and obtaining the probability of obtaining a result value when applying the selected sequence of M quantum gates. The probability can be obtained using classical simulation of the selected sequence of quantum gates. A fidelity benchmark for the M quantum gates can be generated, at least in part, based on the obtained probabilities.

Description

Technical Field

[0001] This disclosure relates to quantum computing, and more specifically, to a benchmarking protocol using quantum gates suitable for classical simulations in polynomial time. Background Technology

[0002] Quantum computing can solve classically intractable computational problems. However, existing quantum computing devices are limited by various sources of error and inaccuracies. Benchmarking can be used to determine the fidelity of a set of gates implemented on a quantum computing device. Traditional linear cross-entropy benchmarking (XEB) can be performed using shallow quantum circuits, but it is not suitable for benchmarking more complex quantum circuits. Polynomial-time linear cross-entropy benchmarking (PXEB) can identify gate sets or quantum computing devices with excellent fidelity, thus supporting the development of quantum computing. Summary of the Invention

[0003] The present invention provides a method and system for benchmarking quantum computing devices by applying a sequence of quantum gates that can be simulated in polynomial time. The results of applying this sequence can be measured. Classical simulation can determine the probability of obtaining this result. This probability can be used to determine a fidelity metric for the quantum device.

[0004] Embodiments of this disclosure provide a method for benchmarking a quantum device. The method may include selecting a sequence of M quantum gates from a set of quantum gates based on a probability distribution. The quantum gates in the set are capable of polynomial-time classical simulation. The method may include obtaining a result value by applying the sequence of the M quantum gates to N qubits of a quantum computing device. The method may include obtaining a probability of obtaining a result value by applying the selected sequence of M quantum gates through polynomial-time classical simulation. The method may include generating an average probability using the obtained probability and a second probability, the second probability being obtained by applying a second sequence of the M quantum gates selected from the set of quantum gates to the N qubits. The method may include providing a fidelity benchmark for the M quantum gates based at least in part on the obtained average probability.

[0005] In some embodiments, providing a fidelity benchmark may include dividing a function of the average probability by M, where the quotient is the fidelity benchmark. In some embodiments, providing a fidelity benchmark may include determining the fidelity function based in part on the average probability value, where the exponential decay coefficient of the fidelity function is the fidelity benchmark. In some embodiments, the set of quantum gates includes a set of Clifford gates. In some embodiments, the N qubits include superconducting circuits, trapped ion qubits, or photon qubits. In some embodiments, N is greater than 100 or M is greater than 20. In some embodiments, the N qubits include transmon or fluxonium qubits.

[0006] Embodiments of this disclosure provide a system for benchmarking a quantum device. The system may include at least one processor and at least one non-transitory computer-readable medium. The medium may contain instructions that, when executed by the at least one processor, cause the system to perform operations. These operations may include obtaining a sequence of M quantum gates from a set of quantum gates according to a probability distribution. The quantum gates in the set of quantum gates are capable of polynomial-time classical simulation. These operations may include obtaining a result measurement by applying the sequence of M quantum gates to N qubits of the quantum computing device. These operations may include obtaining a probability of obtaining a result value by applying the selected sequence through polynomial-time classical simulation. These operations may include generating an average probability using the obtained probability and a second probability obtained by applying a second sequence of the M quantum gates selected from the set of quantum gates to the N qubits. These operations may include providing a fidelity benchmark for the M quantum gates based at least in part on the obtained probability.

[0007] In some embodiments, providing a fidelity benchmark may include dividing a function of the average probability by M, where the quotient is the fidelity benchmark. In some embodiments, providing a fidelity benchmark may include determining an exponential decay coefficient, which is the fidelity benchmark, based in part on the average probability value. In some embodiments, the set of quantum gates may include a set of Clifford gates. In some embodiments, the N qubits may include superconducting circuits, trapped ion qubits, or photon qubits. In some embodiments, N may be greater than 100, or M may be greater than 20. In some embodiments, the N qubits include transmon or fluxonium qubits.

[0008] The disclosed embodiments include a computer-readable medium containing instructions. When executed by at least one processor, these instructions can cause a system to perform operations. These operations can include obtaining a sequence of M quantum gates from a set of quantum gates according to a probability distribution. The quantum gates in the set of quantum gates are capable of polynomial-time classical simulation. These operations can include obtaining a result measurement by applying the sequence of M quantum gates to N qubits of a quantum computing device. These operations can include obtaining a probability of obtaining a result value by applying the selected M quantum gates through polynomial-time classical simulation. These operations can include generating an average probability using the obtained probability and a second probability obtained by applying a second sequence of the M quantum gates selected from the set of quantum gates to the N qubits. These operations can include providing a fidelity benchmark for the M quantum gates based at least in part on the obtained probability.

[0009] In some embodiments, providing a fidelity benchmark may include dividing a function of the average probability by M, where the quotient is the fidelity benchmark. In some embodiments, providing a fidelity benchmark may include determining an exponential decay coefficient, which is the fidelity benchmark, based in part on the average probability value. In some embodiments, the set of quantum gates may include a set of Clifford gates. In some embodiments, the N qubits may include superconducting circuits, trapped ion qubits, or photon qubits. In some embodiments, N may be greater than 100, or M may be greater than 20. In some embodiments, the N qubits include transmon or fluxonium qubits.

[0010] It should be understood that the foregoing general description and the following detailed description are merely exemplary and illustrative, and not intended to limit the disclosed embodiments. Attached Figure Description

[0011] The accompanying drawings, which form part of this specification, illustrate several embodiments and, together with the specification, serve to explain the principles and features of the disclosed embodiments. In the drawings:

[0012] Figure 1 An exemplary PXEB test according to the disclosed embodiments is depicted.

[0013] Figure 2 A system for implementing PXEB according to the disclosed embodiments is described.

[0014] Figure 3 An exemplary method for performing PXEB according to the disclosed embodiments is described.

[0015] Figure 4 Results of simulated PXEB benchmark tests using Clifford gates for a simulated 54-qubit quantum computing device according to the disclosed embodiments are depicted. Detailed Implementation

[0016] Exemplary embodiments will now be discussed in detail with reference to the accompanying drawings. In some cases, the same reference numerals will be used throughout all the drawings and in the following description to refer to the same or similar parts. Unless otherwise defined, technical or scientific terms have the meanings commonly understood by one of ordinary skill in the art. The disclosed embodiments have been described in sufficient detail to enable those skilled in the art to practice them. It should be understood that other embodiments may be utilized and changes may be made without departing from the scope of the disclosed embodiments. Therefore, the materials, methods, and examples are illustrative only and are not intended to be limiting.

[0017] Performance characterization is a crucial component of the development and verification of quantum computing devices. It can be achieved by benchmarking a quantum computing device, a set of gates on a quantum computing device, or a specific implementation of a set of gates on a quantum computing device. Efficient and reliable benchmarking schemes enable comparisons between different quantum computing devices (e.g., those manufactured by different companies) and provide useful feedback for device calibration and error diagnosis. Therefore, such benchmarking can support future hardware design and the development of fault-tolerant quantum computing.

[0018] Traditional XEB has been used to demonstrate what is claimed to be quantum advantage (e.g., performing tasks that cannot be performed by classical computing systems using quantum computing systems). According to this method, a sequence of M gates is applied to a quantum computing device. The state of the quantum computing device is then measured. The probability of obtaining the measured output is then obtained using classical simulation of qubits (e.g., using a classical computer configured to perform numerical operations using binary bit values). For example, quantum computing can be represented as a tensor network and simulated using tensor network contraction, as described in "Efficient parallelization of tensor network contraction for simulating quantum computing" in Nature Computing Science 1.9 (2021): 578-587. The classical simulation technique disclosed in that journal article is incorporated herein by reference. Multiple trials can be performed over the sequence length m, and the simulated probabilities of each trial can be averaged to obtain a fidelity benchmark. The fidelity benchmark can be converted to values ​​ranging between 0 and 1.

[0019] The limitations of traditional XEB make it particularly suitable for demonstrating quantum advantage. Such demonstrations can include applying quantum circuits to quantum devices. Some quantum circuits may comprise a relatively small number of gates or be applied to a relatively small number of qubits, enabling classical simulations of such quantum circuits. Traditional XEB can use such classical simulations to demonstrate that quantum devices can be reliably used with these shallow, small quantum circuits. The reliability of quantum devices when using shallow, small quantum circuits can support the inference that they will be reliable when using deep or large quantum circuits, even though such quantum circuits cannot actually be classically simulated (and therefore cannot be benchmarked using traditional XEB).

[0020] In this way, conventional XEBs using shallow, small quantum circuits can demonstrate the fidelity of quantum devices, while conventional XEBs using deep, large quantum circuits cannot demonstrate quantum advantage.

[0021] Unfortunately, the behavior of larger and deeper quantum circuits may differ from that of smaller and shallower quantum circuits. Fidelity inferences derived from the behavior of quantum devices on smaller, shallower circuits cannot replace direct measurements of the fidelity of quantum devices on larger, deeper circuits. Furthermore, such direct measurements cannot be obtained using conventional XEB. As disclosed herein and understood by the inventors, conventional XEB can be transformed from a tool for proving quantum advantage into a tool for benchmarking deep or large quantum circuits. According to the disclosed embodiments, the polynomial-time method of XEB (PXEB) can use gates suitable for classical simulation, such as Clifford gates or matched gates. This limitation ensures that deep or large quantum circuits can be classically simulated in polynomial time, thus enabling PXEB to be used for such circuits (and therefore contributing to a more comprehensive understanding of the performance of quantum devices). However, this limitation also makes PXEB unsuitable for proving quantum advantage. Figure 1 An exemplary PXEB experiment according to the disclosed embodiments is depicted. In such an experiment, a specific sequence of M gates can be randomly selected from a set of gates according to a probability distribution (e.g., a uniform probability distribution). This set of gates can include gates that can be classically simulated in polynomial time. In some embodiments, the gates can be Clifford gates. In various embodiments, the gates can be matched gates. The quantum computing device can be initialized to a specific state (e.g., state Si), and a specific sequence C of random gates can be applied. The state of the quantum computing device can then be measured (e.g., a measurement state Sm is generated). Given the sequence C and the application of the initial state Si, the ideal probability of obtaining the state Sm is... It can be estimated as: According to the disclosed embodiments, the ideal probability is calculated. An estimate can be obtained by averaging multiple trials from 1 to k. This estimate can be used to calculate a fidelity benchmark. In some embodiments, the fidelity value can be... Here, N is the number of qubits. Multiple trials can be conducted for different sequence lengths to generate a set of fidelity values. An exponential curve can be fitted to this set of fidelity values ​​with respect to m. The exponential basis of this curve can serve as a fidelity benchmark for quantum computing devices.

[0022] Figure 2 A system 200 for performing PXEB is depicted according to the disclosed embodiments. System 200 may include classical components 210 (e.g., classical computing devices or collections of classical computing devices) and quantum components 220.

[0023] Quantum component 220 can be configured to process information using quantum phenomena (e.g., superposition or entanglement). Quantum component 220 can operate on units of information called "qubits". A qubit is the smallest unit of information in a quantum computer and can have any linear combination of two values, typically represented as |0> and |1>. The value of a qubit can be represented as |ψ>. Unlike digital bits, which can have values ​​of "0" or "1", |ψ> can have the value α|0>+β|1>, where α and β are complex numbers (called "amplitudes"), unconstrained except for |α| 2 +|β| 2 =1. The quantum states of the components of quantum component 220 can represent quantum states. The disclosed embodiments are not limited to any particular qubit implementation. For example, qubits can be classically implemented using photons whose polarization is a quantum state (e.g., in lasers); electrons or ions whose spin is a quantum state (e.g., trapped in an electromagnetic field); Josephson junctions whose charge, current flux, or phase is a quantum state (e.g., in superconducting quantum systems); quantum dots whose point spin is a quantum state (e.g., in semiconductor structures); topological quantum systems; or any other system that can provide two or more quantum states. Quantum component 220 can be used with quantum logic gates (or simply "quantum gates") to create, remove, or modify qubits.

[0024] Conversely, classical component 210 can be a computing system that cannot perform quantum computing, such as an electronic computer (e.g., a laptop, desktop computer, cluster, cloud computing platform, etc.). Classical component 210 can operate on binary value bits in digital logic. Classical component 210 may include one or more processors (e.g., CPU, GPU, etc.), application-specific integrated circuits, hardware accelerators, or other components for processing digital logic. Classical component 210 may include one or more memories, buffers, caches, or other components for storing binary values. Classical component 210 may include one or more I / O devices that communicate with other systems, devices (e.g., quantum component 220), users, etc.

[0025] Classical component 210 can be configured to control quantum component 220. The classical component may include compilation module 211. Compilation module 211 can be configured to obtain a description of a benchmark task (e.g., a PXEB benchmark task for quantum component 220). The description of the benchmark task may include a description of a set of gates used for benchmarking.

[0026] Based on the description of the benchmark task, the compilation module 211 can determine the gate sequence for the PXEB benchmark. In some embodiments, the compilation module 211 can determine several sets of gate sequences with different sequence lengths m.

[0027] It is understood that the quantum component 220 can be designed to implement this set of quantum gates using a set of local gates. The gate decomposition module 213 (which can be implemented as a submodule of the compilation module 211) can be configured to decompose the gate sequence determined by the compilation module 211 into a sequence of local gates that can be physically implemented on the quantum component 220. The sequence of local gates can then be provided to the quantum controller 215.

[0028] Quantum controller 215 can be configured to directly control quantum component 220. Quantum controller 215 can be a digital computing device (e.g., a computing device including a CPU, graphics processing unit, application-specific integrated circuit, field-programmable gate array, or other suitable processor). Quantum controller 215 can configure quantum component 220 for computation, provide quantum gates to quantum component 220, and read state information from quantum component 220.

[0029] Quantum controller 215 may include instruction generation module 216. The capabilities of instruction generation module 216 may depend on the specific implementation of quantum component 220. In some embodiments, instruction generation module 216 may be configured to directly or indirectly provide bias drive to quantum component 220 to enable or disable interaction between qubits. Instruction generation module 216 may indirectly provide bias drive by providing instructions to a bias drive source (e.g., a waveform generator, etc.) such that the bias drive source provides bias drive to quantum component 220. Instruction generation module 216 may apply local quantum gates by providing one or more microwave pulses (or other gate drives) to qubits in quantum component 220. In various embodiments, instruction generation module 216 may implement such gates by providing instructions to a computation drive source (e.g., a waveform generator, etc.) such that the computation drive source provides such microwave pulses (or other gate drives) to qubits in quantum component 220. As described herein, microwave pulses may be selected or configured to implement one or more local quantum gates. Microwave pulses may be provided to qubits using one or more coils coupled to the respective qubits. The coil can be external to the quantum component 220 or on the chip that implements the quantum component 220.

[0030] Quantum controller 215 can be configured to determine state information of quantum component 220. In some embodiments, quantum controller 215 can measure the state of one or more qubits of quantum component 220. The state can be measured when one or more quantum operation sequences are completed. In some embodiments, instruction generation module 216 can provide a probe signal (e.g., a microwave probe tone) to the coupled resonator of quantum component 220, or provide instructions to a readout device (e.g., an arbitrary waveform generator) that provides the probe signal.

[0031] In various embodiments, the quantum controller 215 may include a data processing module 217. The capabilities of the data processing module 217 may depend on the specific implementation of the quantum component 220. In some embodiments, the data processing module 217 may take an output signal (e.g., electrons / photons), convert it into a discrete signal, and perform data processing (e.g., averaging, post-processing) on ​​it to obtain a computational result. In some embodiments, the data processing module 217 may include or be configured to receive information from a detector configured to determine the amplitude and phase of an output signal received from a coupled resonator in response to the provision of a microwave probe tone. The amplitude and phase of the output signal can be used to determine the state of the probed qubit. The disclosed embodiments are not limited to any particular method for measuring the state of a qubit.

[0032] According to the disclosed embodiments, the quantum controller 215 can be configured to provide output to the compilation module 211 (or another suitable module of the classical component 210).

[0033] According to the disclosed embodiments, classical component 210 (e.g., compiler module 211 of classical component 210 or another suitable module) or another system can be configured to use the output to determine a fidelity benchmark for quantum component 220. In some embodiments, classical component 210 can be configured to determine an ideal probability of the measured output, given in the initial state of quantum component 220 and the sequence of applied gates. Classical component 210 can be configured to determine an average ideal probability for a sequence of length m based on the ideal probabilities obtained from multiple trials. Classical component 210 can be configured to determine a fidelity value for a sequence of length M based on the average ideal probability and the number of qubits applied to the gate sequence. Classical component 210 can be configured to determine a fidelity benchmark based on fidelity values ​​for different sequence lengths.

[0034] According to the disclosed embodiments, when classical component 210 determines the fidelity reference of quantum component 220, classical component 210 can be configured to provide the fidelity reference to a user (e.g., using a graphical user interface), to another system, or to a storage location accessible to classical component 210.

[0035] Quantum component 220 can be configured to receive commands (e.g., bias drive, quantum gate, probe signal, etc.) from classical component 210. In some embodiments, quantum component 220 can be implemented using a superconducting quantum circuit coupled to quantum controller 215 using at least one microwave drive line. According to the disclosed embodiments, the superconducting quantum circuit can implement multiple qubits (e.g., transmon qubits, fluxonium qubits, or any other suitable type of qubit). In some embodiments, the superconducting quantum circuit can be implemented using one or more chips containing qubits, each chip including at least a portion of a microwave drive line coupling the qubits to quantum controller 215.

[0036] Figure 3 An exemplary method 300 for performing PXEB according to the disclosed embodiments is depicted. In some embodiments, method 300 may be performed using system 200. Method 300 may include operations performed on a conventional computing device such as classical component 210 (e.g., mobile device, laptop, desktop, workstation, computing cluster, cloud computing platform, etc.). Method 300 may include operations performed on a quantum computing device such as quantum component 220 (e.g., quantum controller managing superconducting circuits, trapped ion quantum system, topological quantum computing system, photonic quantum computing system, etc.).

[0037] According to the disclosed embodiments, a conventional computing device can be configured to apply gate sequences to a quantum computing device. The conventional computing device can also be configured to measure the state of the quantum computing device after each gate sequence is applied. In some embodiments, given an initial state of the quantum computing device and the applied gate sequence, the conventional computing device can be configured to determine the probability of obtaining a measured state of the quantum computing device. In some embodiments, the conventional computing device can be configured to determine a fidelity value for a gate sequence of length m. In some embodiments, the conventional computing device can be configured to determine a fidelity benchmark based on the fidelity values ​​of gate sequences of multiple lengths.

[0038] Before executing method 300, a set of gates may be selected. The selected set of gates may include gates that can be classically simulated in polynomial time. For example, the set may include Clifford gates or matching gates. In some embodiments, a conventional computing device may be configured to select this set of gates. In some embodiments, a conventional computing device may be configured with a predetermined set of gates. In various embodiments, the conventional computing device may receive or retrieve indications for this set of gates (e.g., from another system or through interaction with a user).

[0039] According to the disclosed embodiments, in step 310, the conventional computing device can obtain a sequence of M quantum gates suitable for polynomial-time classical simulation. In some embodiments, the conventional computing device can receive or retrieve the sequence from another computing device. In various embodiments, the conventional computing device can generate the sequence. For example, the conventional computing device can independently draw M gates from this set of gates according to a probability distribution. The probability distribution can be a uniform probability distribution over this set of gates.

[0040] This is understandable, because gates can be classically simulated, so the sequence length M can be much larger than what can be achieved using traditional XEB. For example, the sequence depth can be greater than 20 gates, greater than 50 gates, greater than 100 gates, greater than 200 gates, greater than 500 gates, greater than 1000 gates, or more.

[0041] According to the disclosed embodiments, in step 320, a conventional computing device can obtain a result measurement by applying a quantum gate sequence to N qubits of the quantum computing device. In some embodiments, the conventional computing device initializes the quantum computing device. The conventional computing device can then apply a selected quantum gate sequence to the quantum computing device. It is understood that the quantum computing device can have a set of local quantum gates. Applying the quantum gate sequence can include converting the sequence into an equivalent sequence of local quantum gates and applying the equivalent sequence of local quantum gates. In some embodiments, applying the quantum gate sequence can include providing instructions to the quantum computing device to apply the quantum gate sequence. According to the disclosed embodiments, after applying the gate sequence, the conventional computing device can then measure (or provide measurement instructions) the state of the quantum computing device.

[0042] Understandably, because gates can be classically simulated, this sequence can be applied to a much larger number of qubits than would be used for benchmarking with conventional XEB. For example, N can be greater than 100 qubits, greater than 200 qubits, greater than 500 qubits, greater than 1000 qubits, or more. Therefore, the disclosed embodiments enable benchmarking (and thus potentially more useful) of more complex quantum circuits.

[0043] In step 330, a conventional computing device (or another device) can determine the ideal probability of obtaining the measurement state of the quantum system. This ideal probability can be determined by classical simulation. Suitable simulation programs include the simulator disclosed in "Stim: A Fast Stable Circuit Simulator" Quantum 5,497 (2021). The disclosure of that simulation program is incorporated herein by reference.

[0044] In step 340, the conventional computing device can determine whether a stopping condition is met. If the stopping condition is not met, method 300 can return to step 310 and estimate another ideal probability. This estimation may include plotting another independent gate sequence of length M and applying that gate sequence to the quantum computing device. If the stopping condition is met, method 300 can proceed to step 350. The stopping condition may depend on time, the number of ideal probabilities generated, statistical criteria, or any combination thereof. For example, the conventional computing device may determine that the stopping condition is met when the elapsed reference time exceeds a predetermined time threshold. As another example, the conventional computing device may determine that the stopping condition is met when determining a threshold number of ideal probabilities. In some embodiments, the conventional computing device may determine that the stopping condition is met based on standard deviation, confidence interval, interval estimation, standard error of the mean, or other statistical values. Statistical values ​​may be calculated on a set of ideal probabilities of length m. For example, the stopping condition may be met when the standard deviation or standard error of the mean of such a set of ideal probabilities is less than a predetermined value. According to the disclosed embodiments, in step 350, the computing device may be configured to determine a fidelity value corresponding to the sequence length (e.g., the sequence length M in steps 310 and 320). In some embodiments, this determination process may include generating an average probability. The average probability can be generated using previously obtained ideal probabilities of a sequence of length M (e.g., the ideal probability obtained in step 330, one or more ideal probabilities obtained in previous iterations of steps 310 to 330, etc.). (See above regarding...) Figure 1 In some embodiments, the fidelity value corresponding to the length M can be... Where N is the number of qubits in the quantum device. This is the average probability. In step 360, according to the disclosed embodiments, the computing device can be configured to determine a fidelity benchmark for the quantum device based on fidelity values. In some embodiments, the fidelity benchmark may depend on multiple fidelity values. For example, a function can be fitted to a set of fidelity values ​​computed for different sequence lengths. The fidelity benchmark can be a parameter of the fitted function. For example, an exponential function can fit this set of fidelity values. Then, the exponential basis of the exponential function can be the fidelity benchmark. In various embodiments, the fidelity benchmark may depend on a single fidelity value. In some embodiments, the fidelity benchmark may be an experimentally obtained fidelity value scaled from an ideal fidelity value. For example, given an ideal gate (e.g., a gate with a zero error rate), as M decreases, When m→∞ Therefore, for this ideal gate, as M decreases, F(m) → 2. n-1, and as m→∞, F(m)→1. The value of F(m) for an ideal gate constitutes the upper limit of the value of F(m). Therefore, the experimentally obtained value of F(m) can be scaled by the theoretical value of F(m) for an ideal gate to obtain a fidelity benchmark in the interval [0, 1]. In some embodiments, the m-th root of this fidelity benchmark can be calculated to obtain the fidelity benchmark for a single gate.

[0045] It is understandable that when the fidelity benchmark depends on multiple fidelity values ​​( Figure 3 When (not shown in the diagram), method 300 may return to step 310 after step 350. Whether to proceed to step 360 or return to step 310 may depend on the satisfaction of a stopping condition. Similar to the stopping condition in step 340, this stopping condition may depend on time, the number of fidelity values ​​generated, a statistical criterion, or any combination thereof. In such an embodiment, the statistical criterion may be an estimate of the goodness of fit of a function fitted to the fidelity values ​​obtained experimentally.

[0046] The disclosed embodiments are not limited to embodiments in which a single conventional computing device obtains a quantum gate sequence, applies the sequence to the quantum computing device, obtains a result measurement, determines a fidelity value, and determines a fidelity benchmark. In various embodiments, these operations can be performed by multiple computing devices. For example, a first conventional computing device can obtain a quantum gate sequence, determine a fidelity metric, and determine a fidelity benchmark. A second conventional computing device can apply the quantum gate sequence to the quantum computing device and obtain a result measurement.

[0047] Figure 4 Results of simulated PXEB benchmark tests using Clifford gates for a simulated 54-qubit quantum computing device according to the disclosed embodiments are depicted. In this semi-logarithmic plot, the x-axis is the sequence length, and the y-axis is the corresponding fidelity value. The depicted traces correspond to different two-qubit gate error rates. The simulated PXEB benchmark tests use gate sequences comprising up to 30 gates. Simulating the behavior of such deep, large-scale quantum circuits is feasible because Clifford gates can be simulated in polynomial time. Furthermore, the proven feasibility of the simulated PXEB benchmark tests validates the feasibility of practical PXEB benchmark tests for quantum circuits of similar depth and size.

[0048] Trajectory 410 depicts the results of a simulated PXEB benchmark test of an ideal quantum gate with zero two-qubit gate error. For such an ideal gate, F(m) → 2 as M decreases. n-1, F(m)→1 as m→∞. Trace 420 depicts the results of a simulated PXEB benchmark test of a quantum gate with a gate error of 0.1%. Trace 430 depicts the results of a simulated PXEB benchmark test of a quantum gate with a gate error of 0.7%. Trace 440 depicts the results of a simulated PXEB benchmark test of a quantum gate with a gate error of 1%. Although trace 420 shows a significant decrease in fidelity value with increasing gate sequence length, this decrease is much smaller than that shown by traces 430 and 440.

[0049] In some embodiments, a non-transitory computer-readable storage medium including instructions that can be executed by a device (e.g., the disclosed encoder and decoder) to perform the methods described above is also provided. Common forms of non-transitory media include, for example, floppy disks, hard disks, solid-state drives, magnetic tape or any other magnetic data storage media, CD-ROMs, any other optical data storage media, any physical media with a perforated pattern, RAM, PROMs and EPROMs, FLASH-EPROMs or any other flash memory, NVRAM, caches, registers, any other memory chips or cassette memories and their network versions. The device may include one or more processors (CPUs), input / output interfaces, network interfaces, and / or memory.

[0050] The foregoing description is for illustrative purposes. This description is not exhaustive and is not limited to the precise forms or embodiments disclosed. Modifications and adaptations to the embodiments will be apparent from the detailed description and practice of the disclosed embodiments. For example, the described implementations include hardware, but systems and methods conforming to this disclosure can be implemented in both hardware and software. Furthermore, while some components have been described as coupled to each other, these components may be integrated with each other or distributed in any suitable manner.

[0051] Furthermore, although illustrative embodiments have been described herein, the scope includes any and all embodiments based on this disclosure that have equivalent gates, modifications, omissions, combinations, adjustments, or alterations (e.g., aspects spanning various embodiments). Gates in the claims are to be interpreted broadly based on the language used in the claims and are not limited to the examples described in this specification or in the application process, which are to be interpreted as non-exclusive. Moreover, the steps of the disclosed method can be modified in any way, including reordering steps or inserting or deleting steps.

[0052] It should be noted that the relational terms used herein (e.g., “first” and “second”) are used only to distinguish one entity or operation from another, and do not require or imply any actual relationship or order between these entities or operations. Furthermore, the words “including,” “having,” “containing,” and “comprising,” as well as other similar forms, are intended to be semantically equivalent and open-ended, as one or more items following any of these terms do not imply an exhaustive list of those items, nor do they imply limitation to the listed items.

[0053] The features and advantages of this disclosure are readily apparent from the detailed description, and therefore the appended claims are intended to cover all systems and methods falling within the true spirit and scope of this disclosure. As used herein, the indefinite articles “a” and “an” mean “one or more”. Furthermore, since many modifications and variations will readily arise upon studying this disclosure, it is not intended to limit this disclosure to the exact constructions and operations shown and described; therefore, all suitable modifications and equivalents may be considered to fall within the scope of this disclosure.

[0054] As used herein, unless otherwise expressly stated, the term "or" includes all possible combinations unless impractical. For example, if it is specified that a database may include A or B, then unless otherwise specified or impractical, the database may include A, B, or A and B. As a second example, if it is specified that a database may include A, B, or C, then unless otherwise specified or impractical, the database may include A, or B, or C, or A and B, or A and C, or B and C, or A and B and C.

[0055] It should be understood that the above embodiments can be implemented by hardware, software (program code), or a combination of hardware and software. If implemented by software, it can be stored in the above-described computer-readable medium. When executed by a processor, the software can perform the disclosed methods. The computing units and other functional units described in this disclosure can be implemented by hardware, software, or a combination of hardware and software. Those skilled in the art will also understand that multiple of the above modules / units can be combined into one module / unit, and each of the above modules / units can be further divided into multiple sub-modules / sub-units.

[0056] In the foregoing description, numerous specific details have been described with reference to embodiments, which may vary depending on the implementation. Certain adjustments and modifications may be made to the described embodiments. Other embodiments will be apparent to those skilled in the art in light of the detailed description and practice of the invention disclosed herein. The description and embodiments are to be considered exemplary only, and the true scope and spirit of the invention are indicated by the appended claims. The sequence of steps shown in the figures is also intended for illustrative purposes only and is not intended to limit one to any particular order of steps. Therefore, those skilled in the art will understand that these steps may be performed in a different order when implementing the same method.

[0057] Exemplary embodiments have been disclosed in the accompanying drawings and description. However, many variations and modifications can be made to these embodiments. Therefore, although specific terminology has been used, it is used only in a general and descriptive sense and not to limit or constrain the scope of the embodiments as defined by the appended claims.

Claims

1. A method for benchmarking quantum devices, comprising: A sequence of M quantum gates is selected from the quantum gate set according to a probability distribution, wherein the quantum gates in the quantum gate set are capable of performing polynomial-time classical simulations; The result value is obtained by applying the sequence of the M quantum gates to the N qubits of the quantum computing device; The probability of obtaining the result value by applying the sequence of the M quantum gates selected by the application is obtained through polynomial-time classical simulation. An average probability is generated using the obtained probability and a second probability, the second probability being obtained by applying a second sequence of M quantum gates selected from the quantum gate group to the N qubits; and a fidelity benchmark is provided for the M quantum gates based at least in part on the obtained average probability; Providing a fidelity benchmark for the M quantum gates, at least in part based on the obtained average probability, includes: dividing a function of the average probability by M and determining the quotient as the fidelity benchmark; or, determining a fidelity function in part based on the average probability, wherein the exponential decay coefficient of the fidelity function is the fidelity benchmark, and the fidelity benchmark is a value in the interval [0, 1].

2. The method according to claim 1, wherein: The quantum gate set includes the Clifford gate set.

3. The method according to claim 1, wherein: The N qubits include superconducting circuits, trapped ion or photon qubits.

4. The method according to claim 1, wherein: N is greater than 100.

5. The method according to claim 1, wherein: M is greater than 20.

6. The method according to claim 1, wherein, The N qubits include transmon or fluxonium qubits.

7. A system for benchmarking quantum devices, comprising: At least one processor; as well as At least one non-transitory computer-readable medium containing instructions that, when executed by the at least one processor, cause the system to perform the method of any one of claims 1 to 6.

8. A computer-readable medium containing instructions executable by at least one processor of a system to cause the system to perform the method of any one of claims 1 to 6.

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