Parallel bus short point automatic detection positioning system for vertically mounted load network
By using a DDS signal source and a positive cross-correlation algorithm, short-circuit faults in parallel buses of power lines can be automatically detected and located, solving the problems of long detection time and large errors in manual detection, and achieving fast and accurate short-circuit point location.
Patent Information
- Application Number
- CN202310613513.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-05-29
- Publication Date
- 2026-02-06
- Estimated Expiration
- 2043-05-29
AI Technical Summary
Existing technologies require manual intervention to detect short-circuit faults in parallel buses of power lines, which is time-consuming and prone to measurement errors, making it difficult to achieve fast and accurate automated fault alarms and location.
The DDS signal source circuit module outputs orthogonal signals, which are combined with a broadband amplifier, sampling resistor, multiplier, level adjustment circuit and RF detection circuit. The phase difference is calculated through a positive cross-correlation algorithm to realize automated detection and location of short circuit fault points.
It enables rapid detection without human intervention, improves measurement accuracy and anti-interference capabilities, reduces costs and hardware requirements, and is suitable for industrial environments.
Smart Images

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Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of distance measurement, in particular to a parallel bus short-circuit point automatic detection and positioning system for vertically-mounted load network. BACKGROUND
[0002] Short-circuit fault between two parallel power lines is a common fault type of power transmission line. When short-circuit fault occurs, it is of great significance and application value to realize fast and accurate automatic fault alarm and short-circuit fault point positioning detection, so as to timely find and solve the safety hazard and faster restore daily production and life. If traditional method is used to check and locate the short-circuit fault point, manual intervention is needed, and voltage table, current table and other instruments are used to access the power transmission line and load network. The position of the short-circuit point is checked by measuring the change of voltage or current on the power line and load network, which has certain safety; at the same time, the distance positioning of the fault point takes a long time, consumes a large amount of human resources, and various interference signals on the power line will introduce a large measurement error. SUMMARY
[0003] The present application aims at the deficiencies of the above background technology, and provides a parallel bus short-circuit point automatic detection and positioning system for vertically-mounted load network, which is realized by the following technical solutions:
[0004] The parallel bus short-circuit point automatic detection and positioning system for vertically-mounted load network comprises a DDS signal source circuit module, which outputs two-way orthogonal signals with a phase difference of 90° as excitation signals for measuring the short-circuit fault point on the parallel bus and load network.
[0005] A wideband amplifier circuit module is arranged to amplify the voltage of the orthogonal signals.
[0006] A sampling resistor is arranged to sample the voltage signals at both ends of the sampling resistor to determine whether a short-circuit fault occurs between the parallel bus and the load network.
[0007] A level adjustment circuit module is arranged to filter out the high-frequency signal components of the output of the multiplier, the leakage components of the input signals, the stray signals and the high-frequency noise, effectively amplify the direct current components of the output of the multiplier, and adjust the bias level of the direct current components of the output of the multiplier after low-pass filtering and direct current amplification, so as to ensure that the direct current signal input to the ADC sampling port of the single-chip microcomputer is a positive unipolar signal.
[0008] A radio frequency detection circuit module is arranged to convert the alternating voltage at both ends of the sampling resistor into a direct current signal for detecting the voltage amplitude at both ends of the sampling resistor.
[0009] The microcontroller integrates two channels of an ADC and the output of a sampling level adjustment circuit module to perform phase difference calculation based on positive reciprocal correlation, complete the distance calculation of the short-circuit fault point, and output parameter display data. It controls the DDS signal source module and selects the excitation signal frequency according to the distance of the short-circuit fault point. It completes the initialization of the measurement system, uses the two channels of the ADC to sample the DC offset data of the multiplier, and completes the data acquisition and correction of DC drift. It samples and detects the voltage value across the sampling resistor to determine if a short-circuit fault has occurred on the parallel bus and triggers an alarm.
[0010] A further design of the automatic short-circuit detection and location system for the parallel bus of the vertically mounted load network is that the microcontroller determines and alarms when a short-circuit fault occurs on the parallel bus, specifically including the following steps:
[0011] The voltage amplitude V across the sampling resistor in the ADC channel of the microcontroller Rs Perform periodic sampling, set a threshold TH, and once V Rs / V i Exceeding a preset threshold, i.e., V Rs / V i >TH, the measuring device determines that a component in the load network has a short circuit fault, and the microcontroller outputs a control signal to control the buzzer to immediately sound a short circuit alarm.
[0012] A further design of the automatic detection and location system for short-circuit points on the parallel bus of the vertically mounted load network includes the following steps for calculating the phase difference based on positive interaction correlation:
[0013] According to equations (1) and (2), the two output signals of the DDS signal source circuit module are set to have a phase difference of 90°, the same frequency, and equal amplitude.
[0014] V1=Ecosωt V2=Esinωt (1)
[0015] In equation (1), E represents the initial amplitude of the quadrature signal after two amplifications, and ω represents the frequency of the two quadrature signals. Assuming the frequency is MHz or higher, and the initial phase of the quadrature signal is zero, one of the signals V1 is selected as the output signal of the measuring device. After passing through the sampling resistor, it is output from the signal output terminal N of the measuring device. After passing through a bus of a certain length, it is input into the load network. The output signal of the load network is input into the signal input port M of the system after passing through a bus of the same length.
[0016] 2) Set the frequency components of the interference signal according to equation (2).
[0017]
[0018] In equation (2), ω nifrequency of the interference signal, V ni amplitude of the interference signal, φ(ω ni phase of the interference signal;
[0019] A represents the total gain introduced by the short-circuit of the load network mounted on the bus, the AM section of the bus and the network under test, then according to equation (3), the system input signal V0is represented as,
[0020] V0(t) = EA cos(ωt + φ(ω)) + v n (3)
[0021] In equation (3), E0= EA represents the amplitude of the device input signal V0, φ(ω) represents the total phase offset introduced after passing through the bus and the load network, v n represents the interference signal superimposed on the device input signal V0.
[0022] 3) Set the multiplier gain to 1, the output of the multiplication of the input signal V0of the measuring device and the two in- device generated quadrature signals in the in- device multiplier is represented as:
[0023]
[0024] In equations (4) and (5), the first term contains the product term of the interference signal and the two quadrature signals, the second term contains the frequency-doubled component of the two quadrature signals, and the third term contains the sine value and the remainder value of the phase difference φ(ω); the first component of the output signal can be converted into the sum frequency and difference frequency components of the interference signal and the quadrature signal, and after multiplying v n ·E0cos(ωt) in equation (4) with the interference signal represented in equation (2), we get:
[0025] Since the selected quadrature signal is high frequency, with a frequency of MHz or above, in general, there is a significant frequency interval between the frequency of most interference signals and the frequency of the selected quadrature signal. The cutoff frequency of the low-pass filter is set to 10 KHz, and all sum frequency components and most difference frequency components are significantly higher than the cutoff frequency of the low-pass filter, and thus cannot pass through the low-pass filter. Therefore, the first component of the output signal is mostly filtered out after low-pass filtering, and is considered to be approximately zero. The frequency of the second component of the output signal is twice the frequency of the quadrature signal, which is a high frequency component and is filtered out by the low-pass filter.
[0026] After the multiplier output signals represented in equations (4) and (5) pass through the low-pass filter, only the third component is left, which is represented as:
[0027]
[0028] I(ω) and Q(ω) represent two direct current components outputted after the low pass filter;
[0029] The total phase shift φ(ω) is calculated according to formula (8):
[0030]
[0031] The further design of the parallel bus short-circuit point automatic detection positioning system for vertically hanging load network is that the single-chip microcomputer is based on the phase difference of orthogonal cross-correlation and phase difference ranging calculation, and includes the following steps:
[0032] Step 1) The two direct current components I(ω) and Q(ω) are first subjected to direct current amplification and level adjustment, and then are sent to the ADC sampling port of the single-chip microcomputer for amplitude detection, so as to obtain the amplitudes of the two direct current signals I'(ω) and Q'(ω); in the actual circuit implementation process of the cross-correlation algorithm, the gain of the multiplier is only close to 1, the amplitudes of the two direct current components I(ω) and Q(ω) outputted are small, about several mV to several tens of mV, and the polarities are uncertain. Therefore, in order to improve the detection precision of the direct current components I(ω) and Q(ω) and ensure that I(ω) and Q(ω) are unipolar positive signals (satisfying the input level requirement of the ADC sampling port of the single-chip microcomputer).
[0033] Step 2) The gain of the two direct current amplification circuits is the same, and the direct current bias voltages introduced by the two level adjustment circuits are also the same, so that the two direct current signals inputted to the ADC sampling port of the single-chip microcomputer are represented as:
[0034] Q'(ω) = G·Q(ω) + V Rex I'(ω) = G·I(ω) + V Rex (9)
[0035] Wherein, G represents the amplification multiple of the two direct current amplification circuits, V Rex represents the direct current bias voltage value introduced by the two level adjustment circuits;
[0036] After the bus NB section, the load network and the bus AM section, the total phase shift φ(ω) introduced is obtained according to formula (10),
[0037]
[0038] A further design of the automatic short-circuit detection and positioning system for the parallel bus of the vertically mounted load network is that, due to the DC offset in the output of the analog multiplier, this DC offset is not a constant but is related to the frequency, amplitude, and operating temperature of the input signal. Random variations in the DC offset will affect the phase offset calculation results of the positive cross-correlation algorithm, thereby affecting the fault location accuracy of the measuring device. The microcontroller performs data acquisition and correction for the DC drift, specifically as follows:
[0039] With the DDS signal source output channel closed, there is no signal at the input of the multiplier. The ADC channel of the main control microcontroller samples the DC drift signal output by the multiplier, records 500 points of DC drift data of the multiplier in the microcontroller, takes the average value as the correction data, and assumes that the DC drift data of the multiplier remains unchanged within a short measurement period.
[0040] When measuring phase difference offset using the positive cross-correlation algorithm, the DC signal output by the multiplier is corrected using the stored DC drift data of the multiplier. The value obtained by subtracting the corrected data from the initial sampled data is used as the final result, thereby reducing the superposition error caused by the DC drift of the multiplier. The phase offset is then calculated after correction.
[0041] A further design of the automatic short-circuit point detection and location system for the vertically mounted load network's parallel bus is that the microcontroller calculates the distance to the short-circuit fault point as follows:
[0042] Let the frequencies of the two orthogonal signals generated by the DDS signal source be f. The measurement device uses an orthogonal cross-correlation algorithm to calculate the total phase offset φ(ω) introduced after the bus NB segment, load network and bus AM segment. The NB segment is the part of the bus short-circuit point B from the system output end, and the AM segment is the part of the bus short-circuit point A from the system input end. The total length of the introduced total phase offset φ(ω) is L. The propagation speed of the electromagnetic wave signal in the bus is the speed of light c. The total length L is calculated according to formula (11).
[0043]
[0044] In equation (11), L = AM + BN + Δx,
[0045] In practical applications, the length Δx of the internal short circuit AB of the load network is negligible. The load network is vertically mounted on the parallel bus, and NB = AM. Therefore, the distance d between the short circuit point on the parallel bus and the port of the measuring device is expressed as:
[0046] In practical applications, the distance between the short-circuit points A and B occurring at the input / output signal ports of the measuring device and on the two parallel buses may be quite large (as shown in the attached figure). Figure 2As shown in the figure), the distance between the parallel buses is generally close, in the order of m. The difference between the two is two orders of magnitude, so the length of the internal short circuit line AB of the load network can be ignored, and the load network is vertically mounted on the parallel bus, NB=AM (as shown in the figure) Figure 1 As shown in the figure), the distance between the parallel buses is generally close, in the order of m. The difference between the two is two orders of magnitude, so the length of the internal short circuit line AB of the load network can be ignored, and the load network is vertically mounted on the parallel bus, NB=AM (as shown in the figure)
[0047] Advantages of the present application:
[0048] 1. The automatic detection and positioning system for short-circuit points of parallel buses of a vertically mounted load network of the present application can realize automatic measurement without human operation intervention, can quickly detect short-circuit point faults occurring between the parallel buses of the vertically mounted load network and alarm, can save a lot of time and cost compared with traditional manual measurement, and can significantly improve safety and measurement accuracy.
[0049] 2. The automatic detection and positioning system for short-circuit points of parallel buses of a vertically mounted load network of the present application combines the phase difference ranging algorithm and the bus load network phase difference calculation algorithm based on cross-correlation, fully utilizes the characteristics of the cross-correlation algorithm that has strong anti-interference ability, can be applied to occasions with large industrial environment interference, and at the same time improves the accuracy of fault point ranging.
[0050] 3. Further experimental test results show that the bus load network phase difference calculation algorithm based on cross-correlation used by the automatic detection and positioning system for short-circuit points of parallel buses of a vertically mounted load network of the present application also has a good inhibitory effect on white noise interference. When the short-circuit fault point of the load network is far away, the excitation signal is greatly attenuated by bus transmission, that is, under the condition of low signal-to-noise ratio, the accuracy of fault point ranging can still be guaranteed.
[0051] 4. The automatic detection and positioning system for short-circuit points of parallel buses of a vertically mounted load network of the present application can switch different output excitation signal frequencies according to the requirements of fault point ranging range. In various application scenarios such as long-distance and short-distance fault point ranging, it can guarantee a small measurement error.
[0052] 5. The automatic detection and positioning system for short-circuit points of parallel buses of a vertically mounted load network of the present application uses low-cost and stable circuit modules, the system adopts full modular design, has good scalability, and is convenient for device maintenance and upgrading.
[0053] 6. The parallel bus short-circuit point automatic detection and positioning system of the vertical hanging load network of the present application only needs to sample the direct current voltage and has low requirements on the ADC sampling rate of the processor after the signal processing circuit, the realization of the orthogonal cross-correlation algorithm is mainly completed by the hardware circuit of the signal processing, and the operation speed of the processor is also not high, therefore, a low-cost single-chip microcomputer can be used as the main control unit of the measuring device, and the hardware cost and power consumption of the measuring device are greatly reduced. BRIEF DESCRIPTION OF DRAWINGS
[0054] Figure 1 The schematic diagram for judging the short-circuit fault on the parallel bus of the vertical hanging load network of the present application.
[0055] Figure 2 The schematic diagram for the relative positions of the load network, the parallel bus and the measuring system.
[0056] Figure 3 The internal circuit module block diagram of the parallel bus short-circuit point automatic detection and positioning system of the vertical hanging load network of the present application.
[0057] Figure 4 The principle diagram of the DDS signal source circuit composed of the AD9959 chip.
[0058] Figure 5 The principle diagram of the multiplier circuit composed of the AD835 chip.
[0059] Figure 6 The principle diagram of the wideband amplifier circuit.
[0060] Figure 7 The principle diagram of the low-pass amplification and level adjustment circuit.
[0061] Figure 8 The waveform diagram of the two-way orthogonal signal output by the DDS signal source (the frequency is 1.5 MHz).
[0062] Figure 9 The output signal waveform diagram of the measuring system after the excitation signal is output, and no external interference signal and white noise is introduced into the measured network.
[0063] Figure 10 The waveform diagram of the two-way direct current signal output by the two-way multiplier after the low-pass filtering, direct current amplification and level adjustment.
[0064] Figure 11 The output waveform diagram of the load network when the external interference signal is introduced into the load network or the bus.
[0065] Figure 12 The output waveform diagram of the load network when the white noise signal is introduced into the load network or the bus.
[0066] Figure 13 For the load network or bus without superimposed external interference signal and white noise, the error distribution histogram of 15 times of short-circuit fault point distance measurement is obtained by the system when the short-circuit fault point distance is set to be certain (84 cm) in the embodiment.
[0067] Figure 14 For the load network or bus with superimposed external interference signal (a sine wave with a frequency of 300 KHz and an amplitude of 100 mV), the error distribution histogram of 15 times of short-circuit fault point distance measurement is obtained by the system when the short-circuit fault point distance is set to be certain (84 cm) in the embodiment.
[0068] Figure 15 For the load network or bus with superimposed white noise signal (effective value is 70 mV), the error distribution histogram of 15 times of short-circuit fault point distance measurement is obtained by the system when the short-circuit fault point distance is set to be certain (84 cm) in the embodiment.
[0069] Figure 16 The main control flowchart of the single-chip microcomputer. DETAILED DESCRIPTION
[0070] The technical solutions of the application are further described in combination with the drawings.
[0071] The load network vertically mounted on the bus is a passive network composed of R, L and C elements, the elements inside the load network are vertically mounted on the upper and lower parallel buses (the buses can simulate power transmission lines on the power grid), the two buses are parallel, and there is a certain interval distance Δx between the buses. The signal input and output ports of the measuring device are connected to the upper and lower parallel buses, respectively.
[0072] The schematic diagram of the relative positions of the load network, the parallel buses and the measuring device is shown in the accompanying Figure 1 The number of elements inside the load network is unknown, the R, L and C attributes of the elements are unknown, the element parameter values are unknown, and the relative distances between the elements are also unknown. Figure 1 n Z represents the R, L and C elements inside the load network, Rs is the sampling resistance of the detection device, the signal input port of the detection device is connected to the bus, and the position is represented by point M in the accompanying Figure 1 The signal output port of the detection device is connected to the bus, and the position is represented by point N in the accompanying Figure 1 The interval distance between the parallel buses is Δx. When a short circuit occurs in a certain element Z n inside the load network, a short circuit occurs between the upper and lower parallel buses, and the corresponding short-circuit point on the bus can occur at any position on the parallel bus on which the load network is mounted. Figure 1 In the figure, it is assumed that the element Z2 has a short circuit, and A and B represent the positions of the corresponding short circuit points on the parallel buses. Since the short circuit element Z2 is vertically mounted between the parallel buses, the length of the BN segment between the output port of the measuring device and the short circuit point B on the bus is equal to the length of the AM segment between the input port of the measuring device and the short circuit point A on the bus, i.e. BN = AM.
[0073] In practical applications, the distance between the input and output signal ports of the measuring device and the positions of the short circuit points occurring on the two parallel buses can be far apart, on the order of hundreds of meters or kilometers, and the distance Δx between the parallel buses is generally short, on the order of meters. In the specific embodiment of the present application, for the convenience of experimental measurement and verification, the corresponding distances in the figure are proportionally reduced, and the distance between the input and output signal ports of the measuring device and the positions of the short circuit points occurring on the two parallel buses is set to tens to hundreds of centimeters, and the distance between the parallel buses is set to a few centimeters. The buses use ordinary copper medium wires, and the resistivity of the wires is about ρ = 0.0185 Ω·m (at 20°C normal temperature). Figure 1
[0074] When a short circuit fault occurs in an element inside the load network, regardless of the specific R, L, and C attributes of the short circuit element and the element parameter values, the short circuit element can be regarded as a short circuit line, and the length of the short circuit line is the distance Δx between the parallel buses. At this time, the load network vertically mounted between the two parallel buses does not introduce a phase shift related to the element values, and only the length Δx of the short circuit line introduces an additional phase shift, and the amount of the phase shift is directly proportional to the length Δx of the short circuit line.
[0075] As shown in the attached Figure 1 , A and B represent the positions of the corresponding short circuit points on the parallel buses after the short circuit of the element inside the load network, and at this time, the phase shift φ(ω) calculated by the measuring device using the orthogonal cross-correlation algorithm is jointly introduced by the length BN of the segment between the position of the signal output port N of the device and the short circuit point B on the bus, the length AM of the segment between the position of the signal input port M of the device and the short circuit point A on the bus, and the length Δx of the short circuit line AB inside the network to be measured (the length of the AB segment in the attached Figure 1 , i.e. the length Δx between the parallel buses). The total length is represented by L, L = AM + BN + Δx. The total length L introduces a total phase shift φ(ω).
[0076] The internal structure of the measuring device is shown in the attached Figure 3 . After the series sampling resistor Rs, the signal output port N of the device is connected to the bus. The signal input M of the device is connected to the bus, and the input signal V0 is simultaneously connected to the two input ports of the multipliers inside the device.
[0077] The single-chip microcomputer control program of the parallel bus short-circuit point automatic detection positioning system of the vertical load network of the embodiment can be divided into the following functional units:
[0078] 1. System initialization unit, the single-chip microcomputer initializes the keys, the LCD display screen, the buzzer, the DDS chip and the ADC sampling;
[0079] 2. Alarm unit, when the single-chip microcomputer detects that the short-circuit fault judgment condition is established, that is, the signal amplitude at both ends of the sampling resistor is close to the input signal amplitude, an alarm is immediately given;
[0080] 3. Single-chip microcomputer measurement initialization calibration unit, the ADC sampling value is fitted and corrected by the multiplier direct current drift signal obtained through the previous measurement debugging, so as to reduce the superimposed error caused by the multiplier direct current drift as much as possible and improve the precision of fault point ranging;
[0081] 4. Single-chip microcomputer sampling calculation unit, using the single-chip microcomputer as the control and calculation core, the output signal of the level adjustment circuit and the voltage signal at both ends of the sampling resistor are A / D sampled and calculated, whether a short-circuit fault occurs is judged and the short-circuit point detection positioning result is obtained;
[0082] In the experimental measurement verification of the specific embodiments of the application, for the convenience of experimental measurement, the corresponding distances in the schematic Figure 1 are proportionally reduced, the distance between the input and output signal ports of the measuring device and the short-circuit point position occurring on the two parallel buses is set to tens to hundreds of cm, and the distance between the parallel buses is set to 4 cm.
[0083] In the specific embodiments, when the actual measurement verification is carried out in the laboratory, the ranging range of the fault point is tens to hundreds of cm, at this time, the frequency of the excitation signal is selected to be 100 MHz, the corresponding electromagnetic wavelength is 3 m, the phase difference changes by 1.2° when the distance position of the measured fault point changes by 1 cm, and the measuring device can ensure a high measurement precision in the measurement range.
[0084] As shown in the accompanying Figure 1The parallel bus short-circuit point automatic detection positioning system of the vertical load network mainly comprises a DDS (digital frequency synthesis) signal source circuit module, a wideband amplifier circuit module, a sampling resistor, a radio frequency detection circuit module, a multiplier circuit module, a level adjustment circuit (low-pass filter direct current amplification and level adjustment) module, and a single-chip microcomputer, etc. The DDS signal source circuit module outputs a local oscillator signal containing a single-frequency sine wave signal and a continuous frequency-sweeping sine wave signal. The wideband amplifier circuit module amplifies the voltage of the two-way orthogonal signals output by the DDS signal source. The sampling resistor samples the voltage signals at both ends of the sampling resistor to determine whether a short-circuit fault occurs between the parallel buses of the load network. The radio frequency detection circuit module converts the alternating voltage at both ends of the sampling resistor into a direct current signal (the amplitude of the direct current signal is in a logarithmic relationship with the power of the alternating voltage) to detect the voltage amplitude at both ends of the sampling resistor. The multiplier circuit module multiplies the two-way input signals. The low-pass filter direct current amplification and level adjustment circuit module is used to filter the high-frequency signal components, the leakage components of the input signals, the stray signals, the high-frequency noises, etc. of the multiplier output, effectively amplifies the direct current components of the multiplier output, and adjusts the bias level of the direct current components of the multiplier output after low-pass filtering and direct current amplification, so as to ensure that the direct current signal input to the ADC sampling port of the single-chip microcomputer is a positive unipolar signal. The parallel bus short-circuit point automatic detection positioning system of the vertical load network further comprises a liquid crystal screen for displaying the measurement parameters.
[0085] In the embodiment, the DDS signal source circuit module uses an AD9959 chip, which can output two-way orthogonal signals with a phase difference of 90°, the frequency of the output signal is continuously adjustable in the range of 1 to 200, the output signal amplitude is adjustable in the range of 50 to 300 according to a certain step, and the phase difference of the output signals of the two channels is continuously adjustable between 0° and 360°.
[0086] In the embodiment, the wideband amplifier circuit module amplifies the voltage of the two-way orthogonal signals output by the DDS signal source, and the output signal amplitude is between 0.8V and 1.6V. A high-speed current feedback operational amplifier THS3001 chip is adopted, the working frequency range is direct current to high frequency, the 3dB bandwidth reaches 150MHZ, and the gain is greater than 12dB in the frequency range of 40MHZ to 100MHZ.
[0087] In the embodiment, the sampling resistor samples the voltage signals at both ends of the sampling resistor to determine whether a short-circuit fault occurs between the parallel buses of the load network, and the resistance is between 100 and 300.
[0088] In this embodiment, the multiplier circuit module is used to realize the multiplication of two input signals; AD835 analog multiplier chip is used; the input signal bandwidth of the multiplier is at least 100MHz, and the gain of the multiplier is close to 1;
[0089] In this embodiment, the low-pass filter DC amplification and level adjustment circuit module is used to filter out the high-frequency signal components of the multiplier output, the leakage components of the input signal, the stray signals, the high-frequency noise, etc., while effectively amplifying the DC component of the multiplier output, and the bias level of the DC component of the multiplier output after low-pass filtering and DC amplification is adjusted to ensure that the DC signal input to the single-chip microcomputer ADC sampling port is a positive unipolar signal. Precise operational amplifier OP27AH and AD817AN chips are used. The cutoff frequency of the low-pass filter circuit is 10KHz, the gain of the DC amplification circuit is greater than 16dB, and the DC bias voltage of the level adjustment circuit is adjustable between 1V and 2.5V;
[0090] In this embodiment, the radio frequency detector circuit module converts the alternating voltage across the sampling resistor into a direct current signal (the amplitude of the direct current signal is in logarithmic relationship with the power of the alternating voltage) to detect the voltage amplitude across the sampling resistor; the existing automatic detection and positioning system of the parallel bus short circuit point of the vertically mounted load network is used to quickly detect the short circuit fault between the parallel buses of the vertically mounted load network and alarm, and the bus load network phase difference calculation method and phase difference ranging technology based on orthogonal cross-correlation are used to automatically detect the distance between the signal input and output ports of the measurement system and the short circuit fault point on the parallel buses of the vertically mounted load network. Figure 1 is a schematic diagram of the relative positions of the load network, parallel bus and measurement system, Figure 2 is a block diagram of the internal signal processing circuit structure of the measurement system, and the implementation steps of the automatic detection and fault point positioning of the measurement system for the parallel bus short circuit point of the vertically mounted load network are as follows:
[0091] (1) The stm32f407 single-chip microcomputer as the main control unit of the measurement system initializes each module, starts the multi-channel ADC sampling of the single-chip microcomputer, displays the current running state on the LCD screen, and stores the DC drift data of the multipliers 1 and 2 in the single-chip microcomputer.
[0092] (2) The ADC sampling channel 1 periodically samples the output (the measured voltage V Rs ) of the radio frequency detector circuit, and once the threshold value is exceeded, i.e. V Rs / V i >TH, the alarm unit immediately alarms. In this embodiment, TH=0.95. In this embodiment, the parallel bus and the load network are built, the distance of the parallel bus short circuit fault point is in the order of m, and the typical measured judgment results of the short circuit fault point are shown in the following table 1.
[0093] Table 1 Measurement results of short-circuit fault point judgment experiment of the embodiment of the application
[0094]
[0095] In the experiment, the system completed a total of 43 measurements, of which 27 times were short-circuit fault points, 16 times were normal states, and the number of false measurements and missed measurements of the short-circuit fault points was 0.
[0096] (3) In this embodiment, the distance of the parallel bus short-circuit fault point is of the order of m, and the distance measurement range is relatively short. According to the excitation signal frequency selection principle, the frequency of the quadrature excitation signal output by the measurement system is 150 MHz, and the corresponding wavelength is 2 m. The amplitude of the excitation signal is set to 125 mV. The gain of the wideband amplifier is 12 times, and the output signal amplitude E after the wideband amplifier is 1.5 V. The excitation signal frequency selection principle is that the measurement device can select an appropriate output excitation signal frequency according to the distance measurement range. When the estimated load network short-circuit point distance measurement device is of the order of km, the excitation signal frequency output by the measurement device can be selected to be of the order of hundreds of kHz, and at this time the corresponding electromagnetic wavelength is of the order of km. Further reducing the frequency of the excitation signal can expand the distance measurement range of the fault point, but if the frequency of the excitation signal is too low, the corresponding electromagnetic wavelength is too large, and the distance of the measured fault point is not in the same order of magnitude, as can be seen from formula (12), the total phase shift measured by the quadrature cross-correlation algorithm changes slightly with the distance of the measured fault point, and the distance measurement accuracy of the measurement device will decrease. On the contrary, the higher the frequency of the excitation signal, the shorter the corresponding electromagnetic wavelength, and the total phase shift changes more obviously with the distance of the measured fault point, and the distance measurement accuracy of the measurement device improves, but as the wavelength of the excitation signal decreases, the distance measurement range of the fault point decreases, and at the same time the frequency of the excitation signal may exceed the bandwidth of the multiplier, which increases the error of the total phase shift measured by the quadrature cross-correlation algorithm.
[0097] The DDS signal source inside the measurement system outputs two quadrature signals V1=Ecosωt and V2=E sinωt according to the pre-set frequency and amplitude. V1 is sent to the load network through the signal output connection point N (as shown in FIG. 8) of the measurement system of the parallel bus, and V2 is input into the multiplier 2 inside the measurement system. Figure 1
[0098] In actual application, the distance measurement range of the bus fault point is generally of the order of hundreds of meters or kilometers, at this time the corresponding wavelength of the excitation signal is of the order of km, which can expand the distance measurement range of the fault point. The waveform of the quadrature signal with a frequency of 1.5 MHz output by the measurement system is shown in FIG. 9. Figure 8
[0099] (4) The DDS signal source outputs two orthogonal signals, one of which is input to the load network as V1, and the other is directly input to the multiplier 2 in the measuring system. When there is no external interference signal and white noise introduced into the bus, the output signal of the load network can be represented as V0(t) = E0cos(ωt + φ(ω)), and the output waveform is shown in Fig. 4. Figure 10 The DDS signal source outputs two orthogonal signals, one of which is input to the load network as V1, and the other is directly input to the multiplier 2 in the measuring system. When there is no external interference signal and white noise introduced into the bus, the output signal of the load network can be represented as V0(t) = E0cos(ωt + φ(ω)), and the output waveform is shown in Fig. 4.
[0100] (5) According to the derivation and analysis of the orthogonal cross-correlation algorithm, the DC signals output by the two multipliers after low-pass filtering can be represented as:
[0101] (6) The DC signals output by the two multipliers after low-pass filtering, DC amplification and level adjustment can be represented as: Q'(ω) = G·Q(ω) + V Rex , I'(ω) = G·I(ω) + V Rex In this embodiment, the DC amplification factor is 15, i.e., G is 15, and the DC bias voltage introduced by the level adjustment circuit is 1.6V, i.e., V Rex is 1.6V. The DC waveforms of the two signals output by the multipliers after low-pass filtering, DC amplification and level adjustment are shown in Fig. 5. Figure 10
[0102] (7) The single-chip microcomputer uses ADC sampling channels 2 and 3 to sample the two DC signals Q'(ω) and I'(ω) after low-frequency amplification and level adjustment. When the single-chip microcomputer processes the sampled DC signals, it first averages every 50 points of the sampled DC signals, and then, when measuring the phase difference offset of the orthogonal cross-correlation, it corrects the DC signals output by the two multipliers using the stored DC drift data of the multipliers to minimize the superimposed error caused by the DC drift of the multipliers. After correction, the phase offset is calculated according to formulas (9) and (10) in the orthogonal cross-correlation algorithm.
[0103] (8) According to the known output signal amplitude E0 of the wideband amplifier, the DC amplifier amplification factor G and the DC bias level V Rex introduced by the level adjustment circuit, the Q(ω) component is calculated using formulas (9) and (10) in the orthogonal cross-correlation algorithm, and if The value is negative, indicating that sin(φ(ω)) > 0, indicating that the phase difference φ(ω) is in the range of 0~π, and the formula in this range is solved If the value of Q(ω) is positive, it indicates that the phase difference φ(ω) is in the range of π~2π, and the formula in this range is solved
[0104] (9) After calculating the total phase shift φ(ω) introduced by the parallel bus distance of the load network and the short circuit fault point with the orthogonal cross-correlation algorithm, the distance difference calculation formula (11) And formula (12) Finally, the distance d between the short circuit point on the parallel bus and the output port of the measurement system is calculated. In this embodiment, the position of the short circuit fault point on the parallel bus is changed, and when there is no external interference signal and white noise superimposed on the load network or the bus, the fault point distance is measured continuously for multiple times. The measured data results are shown in Table 2 below. The measured data of the table includes the waveform amplitude of the output of the two multipliers after low-pass filtering and direct current amplification, the direct current signal value sampled by the two ADC channels of the single-chip microcomputer after the level adjustment circuit, the measured total phase shift and the corresponding fault point distance.
[0105] Table 2 When there is no external interference signal and white noise superimposed on the load network or the bus, the measured data of the short circuit fault point distance measured by the embodiment of the present application is continuously measured for multiple times
[0106]
[0107] As can be seen from the measured data of the short circuit fault point in Table 2, the distance measurement range of the short circuit fault point is tens of cm to m level, the minimum distance of the measured short circuit fault point is 20 cm, and the maximum distance is 180 cm. The maximum relative error of the short circuit fault point distance measurement is 2.34%, the minimum relative error of the measurement is 0.10%, the distance measurement error of the short circuit fault point is mostly within 1.6%, which confirms that the vertical hanging load network parallel bus short circuit point automatic detection and positioning device and method proposed in the present application has high measurement accuracy.
[0108] (10) Superimpose external interference signals on the output end of the load network to simulate external industrial interference signals in actual application. The output signal of the load network can be represented as V0(t) = E0cos(ωt + φ(ω)) + v n . Wherein ω ni represents the frequency of the interference signal, V ni represents the amplitude of the interference signal, φ(ω ni) represents the phase of the interference signal. In a specific embodiment, a signal with a frequency of 300 KHz and an amplitude of 100 mV is superimposed on the load network to simulate an externally introduced interference signal. The position of the short-circuit fault point on the parallel bus is changed again, steps (5)-(9) of the specific embodiment are repeated, and a plurality of experimental measurements of the fault point distance are continuously performed. The measured data results are shown in Table 3 below, and the output signal waveform of the load network after superimposing the external interference signal is shown in FIG. 6. Figure 11
[0109] Table 3 When the load network or the bus is superimposed with an external interference signal (a sine wave with a frequency of 300 KHz and an amplitude of 100 mV), the specific embodiment of the present application performs a plurality of continuous experiments, and the measured data measurement results of the short-circuit fault point distance
[0110]
[0111]
[0112] As can be seen from the data measurement results of the short-circuit fault point experiment in Table 3, the distance measurement range of the short-circuit fault point is tens of cm to m level, the minimum distance of the measured short-circuit fault point is 20 cm, and the maximum distance is 180 cm. The maximum relative error of the short-circuit fault point distance measurement is 3.59%, the minimum relative error is 1.38%, the distance measurement error of the short-circuit fault point is mostly within 2.3%, and compared with the case where no external interference signal and white noise is superimposed on the load network or the bus, the maximum and minimum values of the measurement relative error increase by no more than 1.5%. The measured relative error only increases slightly, and the experimental results further confirm that the vertical hanging load network parallel bus short-circuit point automatic detection positioning device and method proposed in the present application has good anti-interference ability and still maintains high measurement accuracy under the action of external interference signals.
[0113] (11) A white noise signal is superimposed on the output end of the load network as an interference signal, the effective value of the white noise signal is 70 mV, and the output signal of the load network can be represented as V0(t) = E0cos(ωt + φ(ω)) + v n , wherein v n is white noise. The position of the short-circuit fault point on the parallel bus is changed again, steps (5)-(9) of the specific embodiment are repeated, and a plurality of experimental measurements of the fault point distance are continuously performed. The measured data results are shown in Table 4 below, and the output signal waveform of the load network after superimposing the external interference signal is shown in FIG. 7. Figure 12
[0114] Table 4 When the load network or the bus is superimposed with a noise signal (effective value is 70 mV), the specific embodiment of the present application performs a plurality of continuous experiments, and the measured data measurement results of the short-circuit fault point distance
[0115]
[0116] As can be seen from the data results measured from the short-circuit fault point experiment of Table 4, the ranging range of the short-circuit fault point is unchanged. The maximum of the measured relative error is 5.49%, the minimum of the measured relative error is 2.21%, and the ranging error of the short-circuit point is mostly within 3.8%. Compared with the case that there is no external interference signal and white noise superimposed on the load network or bus, the maximum and minimum of the measured relative error increases by no more than 3.5%. The measured relative error is also slightly increased. The experimental results prove that the short-circuit point automatic detection and positioning device and method of the parallel bus of the vertically mounted load network proposed in the present application also has good suppression capability for white noise interference signals, and still maintains high measurement accuracy when external white noise signals interfere.
[0117] In the present embodiment, the short-circuit fault point distance is set to 84 cm. Under the conditions that there is no external interference signal and white noise introduced on the load network or bus, an external interference signal (a sine wave with a frequency of 300 KHz and an amplitude of 100 mV) introduced on the load network or bus, and a white noise signal (effective value of 70 V) introduced on the load network or bus, respectively, the system of the present application is used to measure the short-circuit fault point distance for 15 times continuously, and the error distribution histogram of the measurement results is shown in FIG. 6. Figures 13-15 As can be seen from the test results, when there is no external interference signal and white noise introduced on the load network or bus, the maximum of the relative error of the short-circuit fault point distance measurement is close to 3.5%, the minimum of the relative error is close to 0.5%, the mean square value of the error is 1.32%, and the distribution of the measurement error is close to normal distribution.
[0118] When an external interference signal (a sine wave with a frequency of 300 KHz and an amplitude of 100 mV) is introduced on the load network or bus, the maximum of the relative error of the short-circuit fault point distance measurement is close to 3.7%, the minimum of the relative error is close to 1.3%, and the maximum of the relative error is within 5%. Compared with the case that there is no external interference signal and white noise introduced on the load network or bus, the relative error of the short-circuit fault point distance measurement increases, the mean square value of the error is 2.33%, and the mean square value of the error increases by about 1%.
[0119] When a white noise signal (effective value of 70 V) is introduced on the load network or bus, the maximum of the relative error of the short-circuit fault point distance measurement is close to 4.6%, the minimum of the relative error is close to 2.7%, and the maximum of the relative error is within 5%. Compared with the case that there is no external interference signal and white noise introduced on the load network or bus, the relative error of the short-circuit fault point distance measurement increases, the mean square value of the error is 3.66%, and the mean square value of the error increases by about 2.3%.
[0120] The experimental measurement results show that when external interference signals (a sine wave with a frequency of 300 KHz and an amplitude of 100 mV) and white noise signals (an effective value of 70 mV) are introduced on the load network or bus, the maximum relative error of the short-circuit fault point distance measurement is still within 5%, and the mean square error of the error slightly increases. It is confirmed that the application of the application patent proposes a parallel bus short-circuit point automatic detection and positioning system and method for vertically mounted load network, which has high measurement stability and measurement accuracy for the distance measurement of the short-circuit fault point on the load network and the parallel bus, and has good suppression ability to external superimposed interference signals and white noise.
[0121] The measurement device and method of the application use the load network phase difference calculation method based on the orthogonal cross-correlation algorithm and the phase difference ranging technology, which can quickly detect the short-circuit fault of the parallel bus of the vertically mounted load network and alarm, and automatically detect the distance between the signal input and output ports of the measurement device and the short-circuit fault point on the parallel bus of the vertically mounted load network, realizing the functions of automatic short-circuit fault point alarm and short-circuit fault point detection and positioning.
[0122] The measurement device and method of the application have the advantages of high sensitivity, high precision, low cost, strong anti-interference ability and strong expansibility, and are suitable for the short-circuit fault point troubleshooting and positioning of the parallel bus of the vertically mounted load network under various situations such as long bus distance, external interference on the bus, and difficulty in manual detection of short-circuit fault points.
[0123] The above is only a preferred specific embodiment of the application patent, but the protection scope of the application is not limited thereto, and any person skilled in the art can easily think of changes or replacements within the technical range disclosed by the application, which should be covered within the protection scope of the application.
Claims
1. An automatic detection and location system for short-circuit points in a parallel bus of a vertically mounted load network, characterized in that... include: The DDS signal source circuit module outputs two orthogonal signals with a 90° phase difference, which are used as excitation signals for measuring short-circuit fault points on the parallel bus and load network. A broadband amplifier circuit module amplifies the voltage of the orthogonal signals. The sampling resistor is used to sample the voltage signal across its terminals to determine whether a short circuit fault has occurred between the parallel buses of the load network. The multiplier circuit module enables the multiplication of two input signals; The radio frequency detection circuit module converts the AC voltage across the sampling resistor into a DC signal to detect the voltage amplitude across the sampling resistor. The level adjustment circuit module filters out high-frequency signal components from the multiplier output, leakage components from the input signal, spurious signals, and high-frequency noise. At the same time, it effectively amplifies the DC component of the multiplier output and adjusts the bias level of the DC component after low-pass filtering and DC amplification to ensure that the DC signal input to the microcontroller's ADC sampling port is a positive unipolar signal. The microcontroller integrates two channels of the ADC and the output of the sampling level adjustment circuit module to realize phase difference calculation based on positive interaction correlation, complete the distance calculation of the short circuit fault point and output of parameter display data; The system controls the DDS signal source module and selects the excitation signal frequency based on the distance to the short-circuit fault point; it completes the initialization of the measurement system, uses the two channels of the ADC to sample the DC offset data of the multiplier, and completes the data acquisition and correction of DC drift; it samples and detects the voltage value across the sampling resistor to determine if a short-circuit fault has occurred on the parallel bus and triggers an alarm.
2. The automatic detection and positioning system for short-circuit points of parallel buses in a vertically mounted load network according to claim 1, characterized in that... The specific steps for a microcontroller to detect a short circuit fault in the parallel bus and trigger an alarm include the following: The voltage amplitude V across the sampling resistor in the microcontroller's ADC channel... Rs Perform periodic sampling, set a threshold TH, and once V Rs / V i Exceeding a preset threshold, i.e., V Rs / V i >TH, the measuring device determines that a component in the load network has a short circuit fault, and the microcontroller outputs a control signal to control the buzzer to immediately sound a short circuit alarm.
3. The automatic detection and positioning system for short-circuit points of parallel buses in a vertically mounted load network according to claim 1, characterized in that... The phase difference calculation based on positive interaction correlation includes the following steps: According to equations (1) and (2), the two output signals of the DDS signal source circuit module are set to have a phase difference of 90°, the same frequency, and equal amplitude. V1=Ecosωt V2=Esinωt (1) In equation (1), E represents the initial amplitude of the quadrature signal after two amplifications, and ω represents the frequency of the two quadrature signals. Assuming the frequency is MHz or higher, and the initial phase of the quadrature signal is zero, one of the signals V1 is selected as the output signal of the measuring device. After passing through the sampling resistor, it is output from the signal output terminal N of the measuring device. After passing through a bus of a certain length, it is input into the load network. The output signal of the load network is input into the signal input port M of the system after passing through a bus of the same length. 2) Set the frequency components of the interference signal according to equation (2): In equation (2), ω ni Indicates the frequency of the interference signal, V ni Indicates the amplitude of the interference signal, φ(ω) ni () indicates the phase of the interference signal; Let A be a constant representing the total gain introduced by the bus NB, AM segments and the network under test after a short circuit in the load network connected to the bus. Then, according to equation (3), the system input signal V0 is represented. V0(t)=EAcos(ωt+φ(ω))+v n (3) In equation (3), E0=EA represents the amplitude of the device input signal V0, φ(ω) represents the total phase offset introduced after passing through the bus and load network, v n This represents the interference signal superimposed on the input signal V0 of the measuring device; 3) With the multiplier gain set to 1, the output of the multiplication of the input signal V0 of the measuring device and the two orthogonal signals generated internally by the device in the internal multiplier is expressed as: In equations (4) and (5), the first term contains the product of the interference signal and the two orthogonal signals, the second term contains the frequency harmonics of the two orthogonal signals, and the third term contains the sine value of the phase difference φ(ω) and the remainder value. The first term of the output signal is quantized into the sum and difference frequency components of the interference signal and the quadrature signal, and v in equation (4) is... n Multiplying E0cos(ωt) by the interference signal represented by equation (2) yields: The multiplier output signals represented by equations (4) and (5), after passing through a low-pass filter, only the third component remains, which is expressed as: I(ω) and Q(ω) represent the two DC components of the output signal after passing through the low-pass filter; The total phase offset φ(ω) is calculated according to equation (8):
4. The automatic detection and positioning system for short-circuit points of parallel buses in a vertically mounted load network according to claim 1, characterized in that... The microcontroller calculates the phase difference based on positive interaction correlation, including the following steps: Step 1) First, the two DC components I(ω) and Q(ω) are DC amplified and level adjusted, and then sent to the ADC sampling port of the microcontroller for amplitude detection to obtain the amplitudes of the two DC signals I'(ω) and Q'(ω); Step 2) Represent the two DC signals input to the ADC sampling port of the microcontroller as follows: Q'(ω)=G·Q(ω)+V Rex I'(ω)=G·I(ω)+V Rex (9) Where G represents the amplification factor of the two DC amplifier circuits, and V Rex This indicates the DC bias voltage value introduced by the two-way level adjustment circuit; After passing through the NB segment of the bus, the load network, and the AM segment of the bus, the total phase offset φ(ω) introduced is obtained according to equation (10).
5. The automatic detection and positioning system for short-circuit points of parallel buses in a vertically mounted load network according to claim 1, characterized in that... The microcontroller performs DC drift data acquisition and correction as follows: With the DDS signal source output channel closed, there is no signal at the input of the multiplier. The ADC channel of the main control microcontroller samples the DC drift signal output by the multiplier, records 500 points of DC drift data of the multiplier in the microcontroller, takes the average value as the correction data, and assumes that the DC drift data of the multiplier remains unchanged within a short measurement period. Next, when measuring the phase difference offset using the positive cross-correlation algorithm, the DC signal output by the multiplier is corrected using the stored DC drift data of the multiplier. The value after subtracting the corrected data from the initial sampled data is taken as the final result, thereby reducing the superposition error caused by the DC drift of the multiplier. The phase offset is then calculated after correction.
6. The automatic detection and positioning system for short-circuit points of parallel buses in a vertically mounted load network according to claim 1, characterized in that... The microcontroller calculates the distance to the short-circuit fault point as follows: Let the frequencies of the two orthogonal signals generated by the DDS signal source be f. The measurement device uses an orthogonal cross-correlation algorithm to calculate the total phase offset φ(ω) introduced after the bus NB segment, load network and bus AM segment. The NB segment is the part of the bus short-circuit point B from the system output end, and the AM segment is the part of the bus short-circuit point A from the system input end. The total length of the introduced total phase offset φ(ω) is L. The propagation speed of the electromagnetic wave signal in the bus is the speed of light c. The total length L is calculated according to formula (11). In equation (11), L = AM + NB + Δx, In practical applications, the length Δx of the internal short circuit AB of the load network is negligible. The load network is vertically mounted on the parallel bus, and NB = AM. Therefore, the distance d between the short circuit point on the parallel bus and the port of the measuring device is expressed as:
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