Rerouting cantilever beam structure and preparation method, packaging structure and preparation method

Abstract

The application discloses a re-wiring cantilever beam structure, a preparation method, a packaging structure and a preparation method, and the re-wiring cantilever beam structure comprises a first chip, a first conductive adhesive layer, a bottom first conductive adhesive layer is electrically connected with a first chip pin metal layer, a bottom first main body metal layer, a groove exposing the bottom first conductive adhesive layer is formed by etching the bottom first main body metal layer, a bottom dielectric insulating layer is formed in the groove, a cantilever beam structure is sequentially formed on the bottom first main body metal layer, flip bumps are sequentially formed on the third main body metal layer, and a part of a surface of a second conductive adhesive layer is relative to a surface of the first chip, so that a cavity structure is formed, the cavity structure comprises a half-cavity part and a full-cavity part. The structure is simple, the process precision requirement is low, due to the special design of the flip bumps, corresponding radio frequency performance is obtained, and based on the mutual cooperation of the cantilever beam structure and the flip bumps, radio frequency signals can be adjusted through voltage and current.

Description

Technical Field

[0001] This invention relates to the field of semiconductor packaging technology, and in particular to a redistribution cantilever beam structure and its fabrication method, as well as a packaging structure and its fabrication method. Background Technology

[0002] In existing flip-chip technology, two chips are connected via a redistribution layer. The chips are interconnected through inorganic or organic dielectric interposers on silicon, resulting in electrical characteristics very similar to those of on-chip interconnects, significantly reducing power consumption and increasing bandwidth. However, in existing technologies, because the two chips are directly connected through a complete redistribution layer, the electrical performance is still inferior to that of a pure cavity structure due to the inherent dielectric properties of the dielectric material. Furthermore, a simple cantilever cavity structure presents challenges in terms of stability and reliability, and forming cavities on organic dielectric layers presents further technological challenges. Summary of the Invention

[0003] The cantilever beam structure and the flip-chip bumps in this invention support the cantilever beam to form a cavity structure. The proportion and optimization of the cantilever and overhang on both sides of the flip-chip bump support, as well as the control of the distance between the cantilever beam and the metal layer or redistribution metal layer and dielectric layer surface on the first and second chips, are also addressed. Due to the special design of the flip-chip bumps, the semi-cavity part (the part from the flip-chip bump to the reinforcing anchor, which is actually the first conductive adhesive layer, the bottom first main metal layer, and the bottom dielectric insulating layer in the groove) can be applied to the radio frequency field to obtain correspondingly better radio frequency performance. For example, the radio frequency signal can be adjusted by voltage and current through the cooperation of the cantilever beam structure and the flip-chip bumps. On the other hand, the radio frequency signal can be fine-tuned by the electromagnetic modulation effect of the full cavity part (the part from the flip-chip bump to the end of the cantilever beam).

[0004] Because the cantilever beam is suspended, the dielectric constant and loss of the air between the cantilever beam and the first chip are very low, which is beneficial for improving and fine-tuning the corresponding radio frequency performance.

[0005] The length of the cantilever beam design, which is suspended outside the flip-chip bump, can be designed accordingly. The redistribution cantilever beam structure, combined with the electrode matching of the second chip, increases the spacing and thus enhances the RF performance tuning capability. On the other hand, the sandwich structure reinforcement of the cantilever beam, using Ni or NiFe (such as 15-45% Fe) electroplated alloy, can further increase the electromagnetic field modulation capability.

[0006] Therefore, the redistribution cantilever beam structure of the present invention has multiple applications and adjustment capabilities. When the redistribution cantilever beam structure is connected and packaged together with a second chip, which can be either an active chip or a passive chip, the entire package structure forms an RFMEMS (Radio Frequency Micro-Electro-Mechanical System) structure.

[0007] To address the shortcomings of existing technologies, this invention provides a rewiring cantilever beam structure and its fabrication method, as well as a packaging structure and its fabrication method.

[0008] To solve the above-mentioned technical problems, the present invention provides the following technical solution:

[0009] A rewire cantilever beam structure, comprising:

[0010] A first chip containing a metal layer for the first chip pins;

[0011] A first chip dielectric insulating layer is formed on the surface of the first chip, and a bottom first conductive adhesive layer is formed on the surface of the first chip dielectric insulating layer. The bottom first conductive adhesive layer is electrically connected to the metal layer of the first chip pin through an opening in the first chip dielectric insulating layer.

[0012] A bottom first main metal layer is formed on the bottom first conductive adhesive layer, and the bottom first main metal layer and the bottom first conductive adhesive layer are etched to form a groove that exposes the surface of the first chip.

[0013] A bottom dielectric insulating layer is formed within the groove;

[0014] A cantilever beam structure is sequentially formed on the bottom first main metal layer, the cantilever beam structure sequentially including a second conductive adhesive layer, a first main metal layer, a second main metal layer and a third main metal layer;

[0015] Inverted bumps are formed sequentially on the third main metal layer.

[0016] In one possible implementation, a portion of the surface of the second conductive adhesive layer is positioned relative to the surface of the first chip to form a cavity structure. The cavity structure includes a semi-cavity portion and a full cavity portion, wherein the portion extending from the centerline of the flip bump to the end of the cantilever beam is the full cavity portion, and the remaining portion is the semi-cavity portion.

[0017] As one possible implementation, the flip bump sequentially includes a first flip bump body metal layer, a second flip bump body metal layer, and a flip bump solder cap, wherein the location of the flip bump corresponds to a portion of the surface of the second conductive adhesive layer.

[0018] As one possible implementation, the height of the inverted bump first main body metal layer, the inverted bump second main body metal layer, or the inverted bump solder cap can be adaptively adjusted.

[0019] In one possible implementation, the materials of the bottom first conductive adhesive layer and the second conductive adhesive layer are both TiW or Ti.

[0020] As one possible implementation, if the bottom first conductive adhesive layer and the second conductive adhesive layer are made of the same material, then the bottom first conductive adhesive layer is at least 500 Å thinner than the second conductive adhesive layer.

[0021] In one possible implementation, the thickness of the second main metal layer is greater than the thickness of the second conductive adhesive layer.

[0022] A method for fabricating a rewire cantilever beam structure includes the following steps:

[0023] Provide a first chip including a first chip pin metal layer;

[0024] A bottom first conductive adhesive layer is formed on the surface of the first chip dielectric insulating layer of the first chip, and the bottom first conductive adhesive layer is electrically connected to the metal layer of the first chip pins;

[0025] A bottom first main metal layer is selectively electroplated on the bottom first conductive adhesive layer, and a bottom dielectric insulating layer is formed by filling, exposure and development or patterning etching on the bottom first conductive adhesive layer and the bottom first main metal layer, and an opening is made to expose at least a portion of the bottom first main metal layer.

[0026] A cantilever beam structure is formed on the bottom first main metal layer, and the cantilever beam structure sequentially includes a second conductive adhesive layer, a first main metal layer, a second main metal layer and a third main metal layer;

[0027] Inverted protrusions are formed on the cantilever beam structure;

[0028] Part of the bottom dielectric insulating layer and the bottom first adhesive layer are removed, so that a portion of the surface of the second conductive adhesive layer is relative to the surface of the first chip to form a cavity structure.

[0029] As one possible implementation, the formed flip bump sequentially includes a first flip bump body metal layer, a second flip bump body metal layer, and a flip bump solder cap, wherein the location of the flip bump corresponds to a portion of the surface of the second conductive adhesive layer.

[0030] As one possible implementation, the dielectric insulating material is removed by dry plasma and / or wet etching.

[0031] As one possible implementation, the bottom first conductive adhesive layer is removed by dry plasma and / or wet etching.

[0032] A rewiring cantilever beam packaging structure includes:

[0033] A first chip containing a metal layer for the first chip pins;

[0034] A first chip dielectric insulating layer is formed on the surface of the first chip, and a bottom first conductive adhesive layer is formed on the surface of the first chip dielectric insulating layer. The bottom first conductive adhesive layer is electrically connected to the metal layer of the first chip pin through an opening in the first chip dielectric insulating layer.

[0035] A bottom first main metal layer is formed on the bottom first conductive adhesive layer, and the bottom first main metal layer and the bottom first conductive adhesive layer are etched to form a groove that exposes the surface of the first chip;

[0036] A bottom dielectric insulating layer is formed within the groove;

[0037] A cantilever beam structure is sequentially formed on the bottom first main metal layer, the cantilever beam structure sequentially including a second conductive adhesive layer, a first main metal layer, a second main metal layer and a third main metal layer;

[0038] Inverted bumps are sequentially formed on the third main metal layer;

[0039] The second chip has a second chip conductive adhesive layer and a second chip pin metal layer on its surface. Multiple second chip conductive pads are formed on the second chip conductive adhesive layer and electrically connected to the second chip pin metal layer. The second chip conductive pads are electrically connected to the flip-chip bumps.

[0040] A portion of the surface of the second conductive adhesive layer is relative to the surface of the first chip, and a portion of the surface of the third body metal layer is relative to the surface of the second chip to form a cavity structure.

[0041] As one possible implementation, the system further includes a substrate, the substrate comprising a conductive metal layer;

[0042] The conductive metal layer of the second chip is connected to the conductive metal layer of the substrate through a connection structure.

[0043] In one possible implementation, the flip bump sequentially includes a first flip bump body metal layer, a second flip bump body metal layer, and a flip bump solder cap. The location of the flip bump corresponds to a portion of the surface of the second conductive adhesive layer, and the second chip conductive pad is electrically connected to the flip bump solder cap.

[0044] A method for fabricating a rewiring cantilever beam packaging structure includes the following steps:

[0045] Provide a first chip including a first chip pin metal layer;

[0046] A bottom first conductive adhesive layer is formed on the surface of the first chip dielectric insulating layer of the first chip, and the bottom first conductive adhesive layer is electrically connected to the metal layer of the first chip pins;

[0047] A bottom first main metal layer is selectively electroplated on the bottom first conductive adhesive layer, and a bottom dielectric insulating layer is formed by filling, exposure and development or patterning etching on the bottom first conductive adhesive layer and the bottom first main metal layer, and an opening is made to expose at least a portion of the bottom first main metal layer.

[0048] A cantilever beam structure is formed on the bottom first main metal layer, and the cantilever beam structure sequentially includes a second conductive adhesive layer, a first main metal layer, a second main metal layer and a third main metal layer;

[0049] Inverted protrusions are formed on the cantilever beam structure;

[0050] A second chip is provided, wherein a second chip conductive adhesive layer and a second chip pin metal layer are provided on the surface of the second chip, and a plurality of second chip conductive pads are formed on the second chip conductive adhesive layer and electrically connected to the second chip pin metal layer;

[0051] The conductive pads of the second chip are electrically connected to the flip-chip bumps, providing at least one first chip electrically connected to the second chip;

[0052] A portion of the bottom dielectric insulating layer, excess second chip conductive adhesive layer, and bottom first conductive adhesive layer are removed, such that a portion of the surface of the second conductive adhesive layer is relative to the surface of the first chip, and a portion of the surface of the third main metal layer is relative to the surface of the second chip to form a cavity structure.

[0053] In one possible implementation, the flip bump sequentially includes a first flip bump body metal layer, a second flip bump body metal layer, and a flip bump solder cap. The location of the flip bump corresponds to a portion of the surface of the second conductive adhesive layer, and the second chip conductive pad is electrically connected to the flip bump solder cap.

[0054] In one possible implementation, the materials of the bottom first conductive adhesive layer, the second conductive adhesive layer, and the second chip conductive adhesive layer are all TiW or Ti.

[0055] As one possible implementation, if the bottom first conductive adhesive layer and the second chip conductive adhesive layer are made of the same material, then the thickness of the bottom first conductive adhesive layer is the same as the thickness of the second chip conductive adhesive layer or is 190 Å-200 Å thinner than the second chip conductive adhesive layer.

[0056] As one possible implementation, if the bottom first conductive adhesive layer and the second conductive adhesive layer are made of the same material, then the bottom first conductive adhesive layer is at least 500 Å thinner than the second conductive adhesive layer.

[0057] As one possible implementation method, the following steps are also included:

[0058] Provide a substrate containing a conductive metal layer;

[0059] The conductive metal layer of the second chip is connected to the conductive metal layer of the substrate through a connection structure.

[0060] As one possible implementation method, the following steps are also included:

[0061] Provide a protective cover to seal the substrate, or seal the edges of the first chip and the second chip.

[0062] This invention, by adopting the above technical solutions, has significant technical effects:

[0063] The structure and preparation method proposed in this invention are not only simple in structure and have low requirements for process precision, but also improve the yield rate, reduce unnecessary steps, and simplify the process.

[0064] The cantilever beam structure and the flip-chip bumps of this invention support the cantilever beam and control the distance between the cantilever beam and the metal layers or redistribution metal layers on the first and second chips. Due to the special design of the flip-chip bumps, corresponding radio frequency performance is obtained. Furthermore, the radio frequency signal can be adjusted by voltage and current through the cooperation between the cantilever beam structure and the flip-chip bumps.

[0065] Because the cantilever beam is suspended, the dielectric constant and loss of the air between the cantilever beam and the first chip are very low, which is beneficial to the improvement of the corresponding radio frequency performance.

[0066] The length of the cantilever beam design, which is suspended outside the flip-chip bump, can be designed accordingly. The rewiring cantilever beam structure, combined with the electrode matching of the second chip, increases the spacing and thus enhances the RF performance adjustment capability.

[0067] Therefore, the redistribution cantilever beam structure of the present invention has multiple applications and adjustment capabilities. When the redistribution cantilever beam structure is connected and packaged together with a second chip, which can be either an active chip or a passive chip, the entire package structure forms an RFMEMS (Radio Frequency Micro-Electro-Mechanical System) structure. Attached Figure Description

[0068] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0069] Figure 1 This is a schematic diagram of the rewire cantilever beam structure of the present invention;

[0070] Figure 2 This is a flowchart illustrating Embodiment 2 of the present invention;

[0071] Figure 3 This is an initial structural schematic diagram of the rewire cantilever beam structure of the present invention;

[0072] Figure 4 This is a schematic diagram of the structure of Embodiment 4 of the present invention;

[0073] Figure 5 This is a flowchart of Embodiment 5 of the present invention;

[0074] Figure 6 This is a schematic diagram of the specific initial steps in Embodiment 5 of the present invention;

[0075] Figure 7 This is a schematic diagram of the intermediate steps in Embodiment 5 of the present invention;

[0076] Figure 8 This is a schematic diagram of the second intermediate step in Embodiment 5 of the present invention;

[0077] Figure 9 This is a schematic diagram of the packaging structure generated in Embodiment 5 of the present invention;

[0078] Figure 10 This is a schematic diagram of the final packaging structure;

[0079] Figure 11 This is a schematic diagram of another connection method between the first chip and the second chip.

[0080] Explanation of the labels in the attached diagram:

[0081] 1. Bottom first conductive adhesive layer; 2. Bottom first main metal layer; 3. Bottom dielectric insulating layer; 4. Second conductive adhesive layer; 5. First main metal layer; 6. Second main metal layer; 7. Third main metal layer; 8. Flip-chip bump first main metal layer; 9. Flip-chip bump second main metal layer; 10. Flip-chip bump solder cap; 101. Semi-cavity portion; 102. Full cavity portion; 30. First chip; 31. First chip lead metal layer; 32. First chip dielectric insulating layer; 40. Second chip; 41. Second chip lead metal layer; 42. Second chip dielectric insulating layer; 43. Second chip conductive adhesive layer; 44. Second chip conductive pad; 45. Substrate; 46. Protective cover; 47. Connection structure; 48. Sealing structure. Detailed Implementation

[0082] The present invention will be further described in detail below with reference to the embodiments. The following embodiments are explanations of the present invention, but the present invention is not limited to the following embodiments.

[0083] To fully understand this application, detailed structures and steps will be presented in the following description to illustrate the technical solutions proposed in this application. Preferred embodiments of this application are described in detail below; however, in addition to these detailed descriptions, this application may have other implementation methods.

[0084] Example 1:

[0085] A rewire cantilever beam structure, such as Figure 1 As shown, it includes:

[0086] A first chip 30 containing a first chip pin metal layer 31;

[0087] A first chip dielectric insulating layer 32 is formed on the surface of the first chip 30, and a bottom first conductive adhesive layer 1 is formed on the surface of the first chip dielectric insulating layer 32. The bottom first conductive adhesive layer 1 is electrically connected to the first chip pin metal layer 31 through the opening of the first chip dielectric insulating layer 32.

[0088] A bottom first main metal layer 2 is formed on the bottom first conductive adhesive layer 1, and the bottom first main metal layer 2 and the bottom first conductive adhesive layer 1 are etched to form a groove that exposes the surface of the first chip 30.

[0089] A bottom dielectric insulating layer 3 is formed within the groove;

[0090] A cantilever beam structure is sequentially formed on the bottom first main metal layer 2, the cantilever beam structure sequentially including a second conductive adhesive layer 4, a first main metal layer 5, a second main metal layer 6 and a third main metal layer 7;

[0091] Inverted bumps are sequentially formed on the third main metal layer 7;

[0092] A portion of the surface of the second conductive adhesive layer 4 is relative to the surface of the first chip 30.

[0093] In this embodiment, the dielectric insulating material, except for the bottom dielectric insulating layer 3 inside the groove, is removed.

[0094] This embodiment fabricates a redistribution cantilever beam structure on a first chip 30. First, a first chip dielectric insulating layer 32 is formed on the surface of the first chip 30. A bottom first conductive adhesive layer 1 is formed on the surface of the first chip dielectric insulating layer 32. The bottom first conductive adhesive layer 1 is electrically connected to the first chip pin metal layer 31 through the opening of the first chip dielectric insulating layer 32, thus creating the production conditions for the redistribution cantilever beam structure and forming the various structures of the redistribution cantilever beam structure. The key to this structure lies in the position of the cantilever beam structure and the flip bumps on the cantilever beam, as well as the height of the flip bumps, to support the cantilever beam and control the distance between the cantilever beam and the metal layers or redistribution metal layers on the first chip 30 and the second chip 40. It is based on this special design of the flip bumps that a cavity structure is obtained. With the center line of the flip bumps as the boundary, the cavity structure includes a half-cavity part 101 and a full-cavity part 102. The part from the center line of the flip bumps to the end of the cantilever beam is the full-cavity part 102, and the remaining part is the half-cavity part 101. This structure allows for flexible design and modulation of the corresponding radio frequency (RF) performance. The RF signal can be adjusted via voltage and current through the interaction of the cantilever beam structure and the flip-chip bumps. In all embodiments, the length of the cantilever beam structure is not strictly limited, as its length or width can be designed in conjunction with the performance of the electrically connected second chip 40 and first chip 30. Similarly, the length or width of the flip-chip bumps is not limited and can be adjusted during subsequent use to achieve the desired RF performance.

[0095] Part of the surface of the second conductive adhesive layer 4 is suspended relative to the surface of the first chip 30, i.e., the cantilever beam design is suspended. Therefore, the dielectric constant and loss of the air between the cantilever beam and the first chip 30 are very low, which is beneficial to the corresponding improvement of RF performance. The length of the cantilever beam design, which is suspended outside the flip bump, can be designed accordingly to obtain a cavity structure. The cavity structure includes a half-cavity part 101 and a full-cavity part 102. The redistribution cantilever beam structure, combined with the electrode matching of the second chip 40, increases the spacing and thus enhances the RF performance adjustment capability.

[0096] Specifically, the flip bump sequentially includes a first flip bump body metal layer 8 with an optional adhesive layer such as Ti or TiW (not shown), a second flip bump body metal layer 9, and a flip bump solder cap 10. The location of the flip bump corresponds to a portion of the surface of the second conductive adhesive layer 4. Here, the first main body metal layer 8 of the flip bump can be copper, or other conductive materials or a stack of multiple layers of different metals. The shape of the first main body metal layer 8 of the flip bump is pre-designed, such as a cylinder or a racetrack shape, to form the second main body metal layer 9 of the flip bump. The material of this layer can be Ni or other materials that can block the Sn / Cu reaction. Of course, other materials can also be used, as long as they can meet this performance requirement. The flip bump cap 10 is formed on the second main body metal layer 9 of the flip bump. After reflow, the flip bump cap 10 becomes a cap shape or a convex shape. Since it needs to be soldered to the metal layers or pads of other chips, easy-to-solder materials are preferred, such as SnAg, AuSn, etc. Of course, other easy-to-solder materials are also possible, which will not be elaborated here.

[0097] In addition, the materials of the bottom first conductive adhesive layer 1 and the second conductive adhesive layer 4 are both TiW or Ti, or other metals with good adhesion to the dielectric insulating layer. The purpose is to not only give full play to the adhesion performance, but also to effectively block the diffusion of corresponding ions in the bottom first main metal layer 2. For example, if the bottom first main metal layer 2 is Cu, it can effectively block the diffusion of copper ions.

[0098] In practice, Cu is chosen for the first main metal layer 2 at the bottom. Of course, copper-related compounds can also be chosen, as long as they can achieve the same function. This will not be elaborated on here.

[0099] In one embodiment, if the bottom first conductive adhesive layer 1 and the second conductive adhesive layer 4 are made of the same material, for example, both TiW or both Ti are selected, then the bottom first conductive adhesive layer 1 is at least 500 Å thinner than the second conductive adhesive layer 4. Specifically, in order to achieve better function and effect, the bottom dielectric insulating layer 3 formed in the groove is made of organic polymer dielectric materials such as Polyimide, PBO, WPR, etc., or inorganic dielectric materials such as SiO2, Si3N4, SiCN, etc., for the purpose of insulation and stress buffering.

[0100] The cantilever beam structure sequentially includes a second conductive adhesive layer 4, a first main metal layer 5, a second main metal layer 6, and a third main metal layer 7. The second conductive adhesive layer 4 is selected from materials such as Ti or TiW, or other metals with good adhesion to the dielectric insulating layer. The first main metal layer 5 mainly functions as a current control layer, and the selected metal can be copper. As mentioned above, the purpose of selecting materials such as Ti or TiW, or other metals with good adhesion to the dielectric insulating layer, is to both effectively perform the bonding function and effectively block the diffusion of corresponding ions in the bottom first main metal layer 2. For example, if the bottom first main metal layer 2 is Cu, it can effectively block the diffusion of copper ions. The second main metal layer 6 mainly functions as an electromagnetic control layer and provides mechanical strength, and can be selected from materials such as Ni, NiFe (e.g., 15-45% Fe), or other conductive special magnetic materials. The third main metal layer 7 mainly functions as a contact resistance control layer and provides surface protection, and can be selected from materials such as Cu, Au, Ag, or other metal materials.

[0101] In addition, in order to improve the overall structure, the thickness of the second main metal layer 6 is greater than the thickness of the second conductive adhesive layer 4.

[0102] Example 2:

[0103] A method for fabricating a rewire cantilever beam structure, such as Figure 2 As shown, it includes the following steps:

[0104] S100, providing a first chip 30 including a first chip pin metal layer 31;

[0105] S200: A bottom first conductive adhesive layer 1 is formed on the surface of the first chip dielectric insulating layer 32 of the first chip 30. The bottom first conductive adhesive layer 1 is electrically connected to the first chip pin metal layer 31. The specific process is as follows: A first chip dielectric insulating layer 32 is formed on the surface of the first chip 30, such as organic polymer dielectric insulating materials such as Polyimide, PBO, WPR, or inorganic dielectric insulating materials such as SiO2, Si3N4, SiN. The first chip pin metal layer 31 is exposed through photolithography openings. Then, it is heated and cured. The bottom first conductive adhesive layer 1 is formed on the surface of the first chip dielectric insulating layer 32 by physical sputtering deposition. The bottom first conductive adhesive layer 1 is electrically connected to the first chip pin metal layer 31 through the openings of the first chip dielectric insulating layer 32.

[0106] S300: Selectively electroplate a bottom first main metal layer 2 on the bottom first conductive adhesive layer 1; fill and expose or pattern and etch a bottom dielectric insulating layer 3 on the bottom first conductive adhesive layer 1 and the bottom first main metal layer 2; and open holes to expose at least a portion of the bottom first main metal layer 2. The specific process is as follows: the bottom first conductive adhesive layer 1 and the thin film copper seed layer are formed sequentially by physical sputtering deposition. The thin film copper seed layer is a copper layer with a thickness of 1000 angstroms to 3000 angstroms. The bottom first main metal layer 2 is formed on the bottom first conductive adhesive layer 1 by selective photolithography electroplating. The thin film copper seed layer outside the bottom first main metal layer 2 is etched, but the bottom first conductive adhesive layer 1 is not etched away. Then, the bottom dielectric insulating layer 3 is formed on the complete first conductive adhesive layer 1 and the bottom first main metal layer 2, and open holes to expose at least a portion of the first main metal layer 2.

[0107] S400: A cantilever beam structure is formed and electrically connected on the bottom first main metal layer 2. The cantilever beam structure sequentially includes a second conductive adhesive layer 4, a first main metal layer 5, a second main metal layer 6, and a third main metal layer 7. The specific process is as follows: a second conductive adhesive layer 4 and a thin-film copper seed layer are physically sputtered and deposited on the bottom dielectric insulating layer 3. The first main metal layer 5 (e.g., copper), the second main metal layer 6 (e.g., Ni, NiFe, or other electroplated magnetic materials) and the third main metal layer 7 (e.g., copper, or gold) are formed by coating photoresist A, selective photolithography, and subsequent electroplating. Then, photoresist A is removed.

[0108] S500, Flip bumps are formed on the cantilever beam structure; the specific process is as follows: the second conductive adhesive layer 4 and the thin film copper seed layer outside the first main metal layer 5 are not etched away first, and then the thin film adhesive layer (not shown here for simplification) and the thin film copper seed layer (i.e., the bimetallic seed layer is optional) are optionally physically sputtered onto the third main metal layer 7 and the second conductive adhesive layer 4; the flip bump first main metal layer 8, the flip bump second main metal layer 9 and the flip bump solder cap 10 are formed by coating photoresist B on the wafer of the first chip 30 and performing selective photolithography and development and subsequent electroplating; then the photoresist B is removed and the second conductive adhesive layer 4 and the thin film copper seed layer outside the first main metal layer 5 and the second conductive adhesive layer 4 and the thin film copper seed layer outside the first main metal layer 8 of the flip bump are etched away;

[0109] Here, the flip-chip bumps serve as a direct connection between the diced first chip 30 and the wafer on which the second chip 40 is flip-chipped.

[0110] As another preparation method, the second conductive adhesive layer 4 can be partially removed by coating and developing a mask with the third photoresist C, leaving only the cantilever beam and the surrounding part designed according to the process, mechanical and electrical requirements. This part needs to be etched away before flip-chip reflow or flip-chip of the second chip, and then the third photoresist C is removed.

[0111] As another preparation method, the second conductive adhesive layer 4 can also be locally removed using a laser mask, leaving only the cantilever beam and the surrounding part designed according to the process, mechanical and electrical requirements.

[0112] S600, partially remove the bottom dielectric insulating layer 3 and the bottom first adhesive layer 1, such that a portion of the surface of the second conductive adhesive layer 4 is relative to the surface of the first chip 30. Specifically, the bottom dielectric insulating layer 3 and the bottom first adhesive layer 1 are removed within at least 2 μm of the cantilever beam and at least the periphery by plasma etching or selective wet etching. The bottom first conductive adhesive layer 1, the bottom dielectric insulating layer 3, and a portion of the bottom first main metal layer 2 form an anchor block structure that supports the cantilever beam and has buffer energy.

[0113] This embodiment is based on a method for fabricating a redistribution cantilever beam structure on a first chip 30. First, a bottom first conductive adhesive layer 1 is formed on the surface of the first chip 30, and the bottom first conductive adhesive layer 1 is electrically connected to the metal layer 31 of the first chip pin, thus creating the production conditions for the redistribution cantilever beam structure. This allows for the formation of various structures of the redistribution cantilever beam structure. The key to this structure lies in the position of the cantilever beam structure and the flip bumps, as well as the height of the flip bumps, to support the cantilever beam and control the distance between the cantilever beam and the metal layers or redistribution metal layers on the first chip 30 and the second chip 40. It is based on this special design of the flip bumps that a cavity structure is obtained. The cavity structure includes a semi-cavity portion 101 and a full cavity portion 102. Through this structure, flexible design and modulation of the corresponding radio frequency performance can be achieved, and the radio frequency signal can be adjusted by voltage and current through the cooperation of the cantilever beam structure and the flip bumps. In all embodiments, the length of the cantilever beam structure is not strictly limited, because the length or width of the cantilever beam structure can be designed in combination with the performance of the electrically connected second chip 40 and first chip 30. In addition, the length or width of the flip bump is not limited and will be adjusted in subsequent use to obtain the corresponding radio frequency performance.

[0114] In one embodiment, the flip bump sequentially includes a first flip bump body metal layer 8 with an optional adhesive layer (not shown) such as Ti or TiW, a second flip bump body metal layer 9, and a flip bump solder cap 10. The location of the flip bump corresponds to a portion of the surface of the second conductive adhesive layer 4. Here, the first flip bump body metal layer 8 can be copper, or other conductive materials, or a stack of multiple layers of different metals. The shape of the first flip bump body metal layer 8 is pre-designed, such as a cylinder, to form the second flip bump body metal layer 9. The material of this layer can be materials such as Ni, which can block the Sn / Cu reaction. Of course, other materials can also be used, as long as they meet this performance requirement. The flip bump solder cap 10 is formed on the second flip bump body metal layer 9. After reflow, the flip bump solder cap 10 becomes a cap shape or a convex shape. Since it needs to be soldered to the metal layers or pads of other chips, easily solderable materials such as SnAg, AuSn, etc. are preferred. Of course, other easily solderable materials are also possible, which will not be elaborated here.

[0115] In one embodiment, the materials of the bottom first conductive adhesive layer 1 and the second conductive adhesive layer 4 are both TiW or Ti, or other metals that have good adhesion to the dielectric insulating layer. The purpose is to not only give full play to the adhesive performance, but also to effectively block the diffusion of corresponding ions in the bottom first main metal layer 2. For example, if the bottom first main metal layer 2 is Cu, then it can effectively block the diffusion of copper ions.

[0116] In practice, Cu is chosen for the first main metal layer 2 at the bottom. Of course, copper-related compounds can also be chosen, as long as they can achieve the same function. This will not be elaborated on here.

[0117] In one embodiment, if the bottom first conductive adhesive layer 1 and the second conductive adhesive layer 4 are made of the same material, for example, both TiW or both Ti are selected, then the bottom first conductive adhesive layer 1 is at least 500 Å thinner than the second conductive adhesive layer 4. Specifically, in order to achieve better function and effect, the bottom dielectric insulating layer 3 formed in the groove is made of organic polymer dielectric materials such as Polyimide, PBO, WPR, etc., or inorganic dielectric materials such as SiO2, Si3N4, SiN, etc., for the purpose of insulation.

[0118] The cantilever beam structure sequentially includes a second conductive bonding layer 4, a first main metal layer 5, a second main metal layer 6, and a third main metal layer 7. The second conductive bonding layer 4 is selected from materials such as Ti or TiW, or other metals with good adhesion to the dielectric insulating layer. The first main metal layer 5 mainly functions as a current control layer, and the selected metal can be copper. As mentioned above, the purpose of selecting materials such as Ti or TiW, or other metals with good adhesion to the dielectric insulating layer, is to both effectively perform the bonding function and effectively block the diffusion of corresponding ions in the bottom first main metal layer 2. For example, if the bottom first main metal layer 2 is Cu, it can effectively block the diffusion of copper ions. The second main metal layer 6 mainly functions as an electromagnetic control layer and provides mechanical strength, and can be selected from materials such as Ni, NiFe, or other conductive special magnetic materials. The third main metal layer 7 mainly functions as a contact resistance control layer and provides surface protection, and can be selected from materials such as Cu, Au, Ag, or other metal materials.

[0119] In addition, in order to improve the overall structure, the thickness of the second main metal layer 6 is greater than the thickness of the second conductive adhesive layer 4.

[0120] In the preparation method, the dielectric insulating material is removed by dry plasma and / or wet solvent. The bottom first conductive adhesive layer is removed by wet etching.

[0121] Example 3:

[0122] A rewiring cantilever beam packaging structure, such as Figure 3 As shown, its general structure is similar to that of Embodiment 1, except that a bottom dielectric insulating layer 3 is formed between the surface of the second conductive adhesive layer 4 and the surface of the first chip 30.

[0123] Example 4:

[0124] A rewiring cantilever beam packaging structure, such as Figure 4 As shown, it includes:

[0125] A first chip 30 containing a first chip pin metal layer 31;

[0126] A first chip dielectric insulating layer 32 is formed on the surface of the first chip 30, and a bottom first conductive adhesive layer 1 is formed on the surface of the first chip dielectric insulating layer 32. The bottom first conductive adhesive layer 1 is electrically connected to the first chip pin metal layer 31 through the opening of the first chip dielectric insulating layer 32.

[0127] A bottom first main metal layer 2 is formed on the bottom first conductive adhesive layer 1, and the bottom first main metal layer 2 and the bottom first conductive adhesive layer 1 are etched to form a groove that exposes the surface of the first chip 30.

[0128] A bottom dielectric insulating layer 3 is formed within the groove;

[0129] A cantilever beam structure is sequentially formed on the bottom first main metal layer 2, the cantilever beam structure sequentially including a second conductive adhesive layer 4, a first main metal layer 5, a second main metal layer 6 and a third main metal layer 7;

[0130] Inverted bumps are sequentially formed on the third main metal layer 7;

[0131] The second chip 40 has a second chip conductive adhesive layer 43 and a second chip pin metal layer 41 on its surface. A plurality of second chip conductive pads 44 are formed on the second chip conductive adhesive layer 43 and electrically connected to the second chip pin metal layer 41. The second chip conductive pads 44 are electrically connected to the flip bumps.

[0132] A portion of the surface of the second conductive adhesive layer 4 is relative to the surface of the first chip 30, and a portion of the surface of the third main metal layer 7 is relative to the surface of the second chip 40.

[0133] This embodiment electrically connects the redistribution cantilever beam structure to the second chip 40. When the redistribution cantilever beam structure and the second chip 40 are connected and packaged together, the second chip 40 can be either an active chip or a passive chip, and the entire package structure forms an RFMEMS (Radio Frequency Micro-Electro-Mechanical System) structure. The key to this structure lies in the position of the cantilever beam structure and the flip-chip bumps on the cantilever beam, as well as the height of the flip-chip bumps. The position and height of the cantilever beam structure and flip-chip bumps in this invention support the cantilever beam and control the distance between the cantilever beam and the metal layers or redistribution metal layers on the first chip 30 and the second chip 40. Because of this special design based on the flip-chip bumps, a cavity structure is obtained, which includes a semi-cavity portion 101 and a full-cavity portion 102. This structure allows for flexible design and modulation of the corresponding RF performance, and the RF signal can be adjusted by voltage and current through the interaction of the cantilever beam structure and the flip-chip bumps.

[0134] Since the cantilever beam is suspended, the dielectric constant and loss of the air between the cantilever beam and the first chip 30 are very low, which is beneficial to the improvement of the corresponding radio frequency performance.

[0135] The length of the cantilever beam design, which is suspended outside the flip-chip bump, can be designed accordingly. The rewiring cantilever beam structure, combined with the electrodes of the second chip 40, increases the spacing and thus enhances the RF performance adjustment capability.

[0136] Example 5:

[0137] A method for fabricating a rewiring cantilever beam packaging structure, such as Figure 5As shown, it includes the following steps:

[0138] S100, providing a first chip 30 including a first chip pin metal layer 31;

[0139] S200: A bottom first conductive adhesive layer 1 is formed on the surface of the first chip dielectric insulating layer 32 of the first chip 30. The bottom first conductive adhesive layer 1 is electrically connected to the first chip pin metal layer 31. The specific process is as follows: A first chip dielectric insulating layer 32 is formed on the surface of the first chip 30, such as organic polymer dielectric insulating materials such as Polyimide, PBO, WPR, or inorganic dielectric insulating materials such as SiO2, Si3N4, SiN. The first chip pin metal layer 31 is exposed through photolithography openings. Then, it is heated and cured. The bottom first conductive adhesive layer 1 is formed on the surface of the first chip dielectric insulating layer 32 by physical sputtering deposition. The bottom first conductive adhesive layer 1 is electrically connected to the first chip pin metal layer 31 through the openings of the first chip dielectric insulating layer 32.

[0140] S300: Selectively electroplate a bottom first main metal layer 2 on the bottom first conductive adhesive layer 1; fill and expose or pattern and etch a bottom dielectric insulating layer 3 on the bottom first conductive adhesive layer 1 and the bottom first main metal layer 2; and open holes to expose at least a portion of the bottom first main metal layer 2. The specific process is as follows: the bottom first conductive adhesive layer 1 and the thin film copper seed layer are formed sequentially by physical sputtering deposition. The thin film copper seed layer is a copper layer with a thickness of 1000 angstroms to 3000 angstroms. The bottom first main metal layer 2 is formed on the bottom first conductive adhesive layer 1 by selective photolithography electroplating. The thin film copper seed layer outside the bottom first main metal layer 2 is etched, but the bottom first conductive adhesive layer 1 is not etched away. Then, the bottom dielectric insulating layer 3 is formed on the complete first conductive adhesive layer 1 and the bottom first main metal layer 2, and open holes to expose at least a portion of the first main metal layer 2.

[0141] S400, A cantilever beam structure is formed and electrically connected on the bottom first main metal layer 2. The cantilever beam structure sequentially includes a second conductive adhesive layer 4, a first main metal layer 5, a second main metal layer 6, and a third main metal layer 7. The specific process is as follows: a second conductive adhesive layer 4 and a thin film copper seed layer are physically sputtered and deposited on the bottom dielectric insulating layer 3. The first main metal layer 5 (such as copper), the second main metal layer 6 (such as Ni, NiFe, or other electroplated magnetic materials) and the third main metal layer 7 (such as copper or gold) are formed by coating photoresist A, selective photolithography and development, and subsequent electroplating. Then the photoresist A is removed.

[0142] S500, Flip bumps are formed on the cantilever beam structure; the specific process is as follows: the second conductive adhesive layer 4 and the thin film copper seed layer outside the first main metal layer 5 are not etched away first, and then a thin film adhesive layer (not shown here for simplification) and a thin film copper seed layer (i.e., the bimetallic seed layer is optional) are optionally physically sputtered onto the third main metal layer 7 and the second conductive adhesive layer 4; the flip bump first main metal layer 8, the flip bump second main metal layer 9 and the flip bump solder cap 10 are formed by coating photoresist B on the wafer of the first chip 30 and performing selective photolithography and development and subsequent electroplating; then the photoresist B is removed and the second conductive adhesive layer 4 and the thin film copper seed layer outside the first main metal layer 5 and the second conductive adhesive layer 4 and the thin film copper seed layer outside the first main metal layer 8 of the flip bump are etched away; here, the flip bumps play a direct connection role on the wafer of the cut first chip 30 flip-chip onto the second chip 40.

[0143] S006. Remove part of the bottom dielectric insulating layer 3 and the bottom first adhesive layer 1, so that part of the surface of the second conductive adhesive layer 4 is relative to the surface of the first chip 30. Specifically, the bottom dielectric insulating layer 3 and the bottom first adhesive layer 1 are removed at least within a range of at least 2 μm below and at least around the cantilever beam by plasma etching or selective wet etching. The bottom first conductive adhesive layer 1, the bottom dielectric insulating layer 3 and part of the bottom first main metal layer 2 form an anchor block structure that supports the cantilever beam with buffer energy.

[0144] S007. Electrically connect the second chip conductive pad 44 to the flip-chip bump, as follows: Figure 6 As shown, at least one first chip 30 is flip-chip reflowed onto the entire wafer or a single chip of the second chip 40;

[0145] S008. Remove a portion of the bottom dielectric insulating layer 3, such that a portion of the surface of the second conductive adhesive layer 4 is relative to the surface of the first chip 30. Specifically, this involves removing the bottom dielectric insulating layer 3, at least under the cantilever beam and within at least 2 μm of its periphery, outside the groove, using plasma etching or selective wet etching. Figure 7 and Figure 8 As shown;

[0146] S009. Remove excess second chip conductive adhesive layer 43 and bottom first conductive adhesive layer 1 by plasma etching or selective wet etching, such that a portion of the surface of the second conductive adhesive layer 4 is relative to the surface of the first chip 30, and a portion of the surface of the third main metal layer 7 is relative to the surface of the second chip 40. Figure 9As shown, this forms the final MEMS cantilever beam radio frequency and electromagnetic modulation structure. Simultaneously, the bottom first conductive adhesive layer 1, the bottom dielectric insulating layer 3, and part of the bottom first main metal layer 2 form an anchor block structure that buffers energy and supports the cantilever beam.

[0147] This embodiment electrically connects the redistribution cantilever beam structure to the second chip 40. When the redistribution cantilever beam structure and the second chip 40 are connected and packaged together, the second chip 40 can be either an active chip or a passive chip, and the entire package structure forms an RFMEMS (Radio Frequency Micro-Electro-Mechanical System) structure. The key to this structure lies in the position of the cantilever beam structure and the flip-chip bumps on the cantilever beam, as well as the height of the flip-chip bumps. The position and height of the cantilever beam structure and the flip-chip bumps in this invention support the cantilever beam and control the distance between the cantilever beam and the metal layers or redistribution metal layers on the first chip 30 and the second chip 40. It is precisely because of this special design based on the flip-chip bumps that a cavity structure is obtained, which includes a semi-cavity portion 101 and a full-cavity portion 102. This structure allows for flexible design and modulation of the corresponding RF performance, and the RF signal can be adjusted by voltage and current through the interaction of the cantilever beam structure and the flip-chip bumps.

[0148] In addition, in the preparation process of this embodiment, the structure of Example 3 can be selected, or the structure formed by removing only a small part of the dielectric insulating material in Example 3 can be selected. It will not be elaborated here. Selecting the structure of different embodiments can achieve the preparation method of this embodiment. It will only turn into a question of how much dielectric insulating material to remove.

[0149] Since the cantilever beam is suspended, the dielectric constant and loss of the air between the cantilever beam and the first chip 30 are very low, which is beneficial to the improvement of the corresponding radio frequency performance.

[0150] The length of the cantilever beam design, which is suspended outside the flip-chip bump, can be designed accordingly. The rewiring cantilever beam structure, combined with the electrodes of the second chip 40, increases the spacing and thus enhances the RF performance adjustment capability.

[0151] If the bottom first conductive adhesive layer 1 and the second chip conductive adhesive layer 43 are made of the same material, then the thickness of the bottom first conductive adhesive layer 1 is the same as the thickness of the second chip conductive adhesive layer 43 or is 190 Å-200 Å thinner than the conductive adhesive layer 43.

[0152] Example 6:

[0153] A rewiring cantilever beam packaging structure, such as Figure 10 , Figure 11 As shown, its general structure is similar to that of Example 4, with the following differences:

[0154] Additionally, it includes a substrate 45, which contains a conductive metal layer; the second chip pin metal layer 41 is connected to the conductive metal layer of the substrate 45 via a connection structure 47. The purpose of this embodiment is to integrate the redistribution cantilever beam structure, the second chip 40, and the substrate 45 into a single unit. During the packaging process, various methods can be employed, such as providing a protective cover 46 to seal the substrate 45, or sealing the edges of the first chip 30 and the second chip 40 using a sealing structure 48. The sealing structure 48 can be a sealing material or an adhesive material, which protects the redistribution cantilever beam structure and increases its reliability and mechanical strength.

[0155] See appendix Figure 9 The connection structure can be wire bonding, or other methods can be used (see [link]). Figure 10 The connection structure 47 can have a copper core solder ball at one end and a copper metal block at the other end. The exterior can be plated with a soldering wettable metal such as Ni / Au or Sn. One or both can be used to control the standing height between the two chips. Of course, solder balls can also be used, or combined with copper core solder balls, plastic core solder balls, or copper pillars for control.

[0156] The embodiments of this application and the various features thereof can be combined with each other without conflict, and the resulting technical solutions are all within the protection scope of this application. In the accompanying drawings, for clarity, the dimensions and relative dimensions of layers and regions may be exaggerated. The same reference numerals denote the same elements throughout. It should be understood that although the terms "first," "second," "third," etc., may be used to describe various elements, components, regions, layers, and / or portions, these elements, components, regions, layers, and / or portions should not be limited by these terms. These terms are merely used to distinguish one element, component, region, layer, or portion from another element, component, region, layer, or portion. Therefore, without departing from the teachings of this application, the first element, component, region, layer, or portion discussed below may be represented as a second element, component, region, layer, or portion. It should be understood that spatial relation terms such as "above," "located above," "below," "located below," etc., are used herein for convenience of description to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms are intended to also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, then the element or feature described as "below other elements" will be oriented "above" other elements or features. Therefore, the exemplary terms "below" and "below" can include both upper and lower orientations. The device may be otherwise oriented (rotated 90 degrees or otherwise) and the spatial descriptive terms used herein will be interpreted accordingly.

[0157] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. When used herein, the singular forms “a,” “an,” and “the” are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising” and / or “including,” when used in this specification, identify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups. When used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0158] Embodiments of this application are described herein with reference to cross-sectional views illustrating ideal embodiments (and intermediate structures). Thus, variations in the shape shown can be anticipated due to, for example, fabrication techniques and / or tolerances. Therefore, embodiments of this application should not be limited to the specific shape of the region shown herein, but should include shape deviations due to, for example, fabrication processes.

[0159] Furthermore, it should be noted that the shapes and names of the parts and components described in the specific embodiments described in this specification may differ. All equivalent or simple variations made to the structure, features, and principles described in this patent concept are included within the protection scope of this patent. Those skilled in the art to which this invention pertains may make various modifications or additions to the described specific embodiments or use similar methods to replace them, as long as they do not depart from the structure of this invention or exceed the scope defined in these claims, they should all fall within the protection scope of this invention.

Claims

1. A rewiring cantilever beam structure, characterized in that, include: A first chip containing a metal layer for the first chip pins; A first chip dielectric insulating layer is formed on the surface of the first chip, and a bottom first conductive adhesive layer is formed on the surface of the first chip dielectric insulating layer. The bottom first conductive adhesive layer is electrically connected to the metal layer of the first chip pin through an opening in the first chip dielectric insulating layer. A bottom first main metal layer is formed on the bottom first conductive adhesive layer, and the bottom first main metal layer and the bottom first conductive adhesive layer are etched to form a groove that exposes the surface of the first chip dielectric insulating layer; A bottom dielectric insulating layer is formed within the groove; A cantilever beam structure is sequentially formed on the bottom first main metal layer, the cantilever beam structure sequentially including a second conductive adhesive layer, a first main metal layer, a second main metal layer and a third main metal layer; Inverted bumps are sequentially formed on the third main metal layer; Wherein, a portion of the surface of the second conductive adhesive layer is relative to the surface of the first chip to form a cavity structure, the cavity structure including a semi-cavity portion and a full cavity portion, wherein the portion from the center line of the flip bump as the starting line to the end of the cantilever beam is the full cavity portion, and the remaining portion is the semi-cavity portion.

2. The rewiring cantilever beam structure according to claim 1, characterized in that, The flip-chip bump sequentially includes a first flip-chip bump body metal layer, a second flip-chip bump body metal layer, and a flip-chip bump solder cap. The location of the flip-chip bump corresponds to a portion of the surface of the second conductive adhesive layer.

3. The rewiring cantilever beam structure according to claim 2, characterized in that, The height of the first main metal layer of the inverted bump, the second main metal layer of the inverted bump, or the inverted bump welding cap can be adaptively adjusted.

4. The rewiring cantilever beam structure according to claim 1, characterized in that, The materials of the bottom first conductive adhesive layer and the second conductive adhesive layer are both TiW or Ti.

5. The rewiring cantilever beam structure according to claim 1, characterized in that, If the bottom first conductive adhesive layer and the second conductive adhesive layer are made of the same material, then the bottom first conductive adhesive layer is at least 500 angstroms thinner than the second conductive adhesive layer.

6. The rewiring cantilever beam structure according to claim 1, characterized in that, The thickness of the second main metal layer is greater than the thickness of the second conductive adhesive layer.

7. A method for fabricating a rewire cantilever beam structure as described in claim 1, characterized in that, Includes the following steps: Provide a first chip including a first chip pin metal layer; A bottom first conductive adhesive layer is formed on the surface of a first chip dielectric insulating layer of a first chip, and the bottom first conductive adhesive layer is electrically connected to the metal layer of the first chip pins; wherein, the electrical connection between the bottom first conductive adhesive layer and the metal layer of the first chip pins includes: forming a first chip dielectric insulating layer on the surface of the first chip, opening a hole in the first chip dielectric insulating layer to expose the metal layer of the first chip pins, and then forming a bottom first conductive adhesive layer on the surface of the first chip dielectric insulating layer, the bottom first conductive adhesive layer being electrically connected to the metal layer of the first chip pins through the opening in the first chip dielectric insulating layer; A bottom first main metal layer is selectively electroplated on the bottom first conductive adhesive layer, and a groove is formed by etching the bottom first main metal layer and the bottom first conductive adhesive layer to expose the surface of the first chip. A bottom dielectric insulating layer is formed by filling, exposure and development or patterning etching on the bottom first conductive adhesive layer and the bottom first main metal layer and in the groove, and an opening is made to expose at least a portion of the bottom first main metal layer. A cantilever beam structure is formed on the bottom first main metal layer, and the cantilever beam structure sequentially includes a second conductive adhesive layer, a first main metal layer, a second main metal layer and a third main metal layer; Inverted protrusions are formed on the cantilever beam structure; Remove all bottom dielectric insulating layers except for the groove, and remove part of the bottom first conductive adhesive layer, so that a portion of the surface of the second conductive adhesive layer is relative to the surface of the first chip to form a cavity structure.

8. The method for fabricating a rewire cantilever beam structure according to claim 7, characterized in that, The formed flip bumps sequentially include a first flip bump body metal layer, a second flip bump body metal layer, and a flip bump solder cap, wherein the location of the flip bumps corresponds to a portion of the surface of the second conductive adhesive layer.

9. The method for fabricating a rewire cantilever beam structure according to claim 7, characterized in that, The material of the bottom dielectric insulating layer is removed by dry plasma and / or wet etching.

10. The method for fabricating a rewire cantilever beam structure according to claim 7, characterized in that, The bottom first conductive adhesive layer is removed by dry plasma and / or wet etching.

11. A rewiring cantilever beam encapsulation structure, characterized in that, include: A first chip containing a metal layer for the first chip pins; A first chip dielectric insulating layer is formed on the surface of the first chip, and a bottom first conductive adhesive layer is formed on the surface of the first chip dielectric insulating layer. The bottom first conductive adhesive layer is electrically connected to the metal layer of the first chip pin through an opening in the first chip dielectric insulating layer. A bottom first main metal layer is formed on the bottom first conductive adhesive layer, and the bottom first main metal layer and the bottom first conductive adhesive layer are etched to form a groove that exposes the surface of the first chip dielectric insulating layer; A bottom dielectric insulating layer is formed within the groove; A cantilever beam structure is sequentially formed on the bottom first main metal layer, the cantilever beam structure sequentially including a second conductive adhesive layer, a first main metal layer, a second main metal layer and a third main metal layer; Inverted bumps are sequentially formed on the third main metal layer; The second chip has a second chip conductive adhesive layer and a second chip pin metal layer on its surface. Multiple second chip conductive pads are formed on the second chip conductive adhesive layer and electrically connected to the second chip pin metal layer. The second chip conductive pads are electrically connected to the flip-chip bumps. A portion of the surface of the second conductive adhesive layer is relative to the surface of the first chip, and a portion of the surface of the third body metal layer is relative to the surface of the second chip to form a cavity structure.

12. The rewiring cantilever beam encapsulation structure according to claim 11, characterized in that, It also includes a substrate, the substrate comprising a conductive metal layer; The conductive metal layer of the second chip is connected to the conductive metal layer of the substrate through a connection structure.

13. The rewiring cantilever beam encapsulation structure according to claim 11, characterized in that, The flip bump sequentially includes a first flip bump body metal layer, a second flip bump body metal layer, and a flip bump solder cap. The location of the flip bump corresponds to a portion of the surface of the second conductive adhesive layer, and the second chip conductive pad is electrically connected to the flip bump solder cap.

14. A method for fabricating a rewiring cantilever beam encapsulation structure as described in claim 11, characterized in that, Includes the following steps: Provide a first chip including a first chip pin metal layer; A bottom first conductive adhesive layer is formed on the surface of a first chip dielectric insulating layer of a first chip, and the bottom first conductive adhesive layer is electrically connected to the metal layer of the first chip pins; wherein, the electrical connection between the bottom first conductive adhesive layer and the metal layer of the first chip pins includes: forming a first chip dielectric insulating layer on the surface of the first chip and making an opening in the first chip dielectric insulating layer to expose the metal layer of the first chip pins; and then forming a bottom first conductive adhesive layer on the surface of the first chip dielectric insulating layer, the bottom first conductive adhesive layer being electrically connected to the metal layer of the first chip pins through the opening in the first chip dielectric insulating layer; A bottom first main metal layer is selectively electroplated on the bottom first conductive adhesive layer. A bottom first main metal layer is formed by etching the bottom first main metal layer and the bottom first conductive adhesive layer to form a groove that exposes the surface of the first chip. A bottom dielectric insulating layer is formed by filling the bottom first conductive adhesive layer and the bottom first main metal layer and the groove, and by exposure development or patterning etching. An opening is made to expose at least a portion of the bottom first main metal layer. A cantilever beam structure is formed and electrically connected on the bottom first main metal layer; the cantilever beam structure includes a second conductive adhesive layer, a first main metal layer, a second main metal layer and a third main metal layer in sequence; Inverted protrusions are formed on the cantilever beam structure; A second chip is provided, the surface of which is provided with a second chip conductive adhesive layer, and a plurality of second chip conductive pads are formed on the second chip conductive adhesive layer and electrically connected to the metal layer of the second chip pins; The conductive pads of the second chip are electrically connected to the flip-chip bumps, providing at least one first chip electrically connected to the second chip; Remove all dielectric insulation layers except for the groove; Remove excess second chip conductive adhesive layer and bottom first conductive adhesive layer, such that a portion of the surface of the second conductive adhesive layer is relative to the surface of the first chip, and a portion of the surface of the third main metal layer is relative to the surface of the second chip to form a cavity structure.

15. The method for fabricating the rewiring cantilever beam encapsulation structure according to claim 14, characterized in that, The flip bump sequentially includes a first flip bump body metal layer, a second flip bump body metal layer, and a flip bump solder cap. The location of the flip bump corresponds to a portion of the surface of the second conductive adhesive layer, and the second chip conductive pad is electrically connected to the flip bump solder cap.

16. The method for fabricating the rewiring cantilever beam encapsulation structure according to claim 14, characterized in that, The materials of the bottom first conductive adhesive layer, the second conductive adhesive layer and the second chip conductive adhesive layer are all TiW or Ti.

17. The method for fabricating the rewiring cantilever beam encapsulation structure according to claim 16, characterized in that, If the bottom first conductive adhesive layer and the second chip conductive adhesive layer are made of the same material, then the thickness of the bottom first conductive adhesive layer is the same as the thickness of the second chip conductive adhesive layer, or the first conductive adhesive layer is 190-200 angstroms thinner than the second chip conductive adhesive layer.

18. The method for fabricating the rewiring cantilever beam encapsulation structure according to claim 14, characterized in that, It also includes the following steps: Provide a substrate containing a conductive metal layer; The conductive metal layer of the second chip is connected to the conductive metal layer of the substrate through a connection structure.

19. The method for preparing the packaging structure according to claim 18, characterized in that, It also includes the following steps: Provide a protective cover to seal the substrate, or seal the edges of the first chip and the second chip.

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