Laser chip carrier with compensation structure

Abstract

This invention discloses a laser chip carrier with a compensation structure. The carrier includes a first carrier layer and a second carrier layer, with the first carrier layer disposed on the second carrier layer. A mounting area is disposed at a first preset position on the first carrier layer for mounting the chip. At least two first metal areas extend from one end of the mounting area, and rectangular metal areas are disposed at the ends of the extended first metal areas to facilitate the generation of carrier parasitic capacitance with respect to the ground plane. An integrated resistor and an integrated capacitor are also disposed on the upper surface of the first carrier layer, and an integrated inductor is disposed at a second preset position on the upper surface of the second carrier layer. One pole of the laser chip is connected to one end of the integrated inductor to form a series connection. One end of the carrier parasitic capacitance is connected to one end of the integrated resistor to form a series connection. One end of the integrated capacitor and the other end of the integrated resistor are respectively connected to the other end of the integrated inductor. The other ends of the integrated capacitor and the carrier parasitic capacitance are respectively connected to the other pole of the laser chip to form a circuit for compensating bandwidth.

Description

Technical Field

[0001] This invention relates to the field of shaping and active packaging for optical communication, and particularly to a laser chip carrier with a compensation structure. Background Technology

[0002] In recent years, influenced by the pandemic and the complex social environment, the process of social digitalization, networking, and intelligentization has accelerated. The new environment, with its remote work and remote education models, has placed increasing demands on network speed and bandwidth. The convergence of various ICT (Information and Communications Technology) technologies and the accelerated digital transformation of various industries are all contributing to a new round of explosive growth in global data traffic. Traditionally, increasing the bandwidth of optoelectronic laser chips involves upgrading the chips themselves to achieve higher bandwidth.

[0003] Opto-laser chips are usually mounted on a carrier. When the bandwidth of an opto-laser chip increases to a certain level, and the bandwidth cannot be further increased through self-update, the use of the opto-laser chip is often restricted, making it difficult to meet market demands.

[0004] Therefore, overcoming the shortcomings of existing technologies and solving the aforementioned technical problems is a difficult problem to be solved in this technical field. Summary of the Invention

[0005] The technical problem to be solved by this invention is how to solve the problem of bandwidth limitation of optoelectronic laser chips when the bandwidth of optoelectronic laser chips cannot be improved by updating and upgrading itself.

[0006] This invention is implemented as follows:

[0007] In a first aspect, the present invention provides a laser chip carrier with a compensation structure, comprising a first carrier layer 1 and a second carrier layer 2, wherein the first carrier layer 1 is disposed on the second carrier layer 2;

[0008] A mounting area 11 is provided on the upper surface of the first carrier layer 1 at a first preset position, and the mounting area 11 is used to mount the laser chip;

[0009] At least two first metal areas 12 extend from one end of the mounting area 11. A rectangular metal area 13 is provided at the end of the extended first metal area 12. A ground area 21 is provided on the second carrier layer 2 so that the rectangular metal area 13 generates a carrier parasitic capacitance 3 to the ground area 21.

[0010] The upper surface of the first carrier layer 1 is also provided with an integrated resistor 14 and an integrated capacitor 15, and the upper surface of the second carrier layer 2 is provided with an integrated inductor 4 at a second preset position.

[0011] The laser chip, integrated inductor 4, carrier parasitic capacitance 3, and integrated resistor 14 are connected in series in an electrically interconnected relationship. A gold wire is led out from the connection point between the integrated inductor 4 and the carrier parasitic capacitance 3 and electrically connected to one pole of the integrated capacitor 15. A gold wire is led out from the connection point between the integrated resistor 14 and the corresponding electrode of the laser chip and electrically connected to the other pole of the integrated capacitor 15, so as to form a compensation circuit to compensate for the bandwidth of the laser chip.

[0012] Preferably, the end of the first metal region 12 connected to the mounting region 11 is configured as an inverted funnel shape to reduce the emission of radio frequency signals when they are transmitted to the laser chip.

[0013] Preferably, an insulating layer is provided between the first carrier layer 1 and the second carrier layer 2 to avoid electrical crosstalk.

[0014] Preferably, at least one metallization layer 16 parallel to the first metal region 12 is provided on the first carrier layer 1. The metallization layer 16 is provided with a metallization hole 17 that penetrates the insulating layer and extends toward the second carrier layer 2. One end of the metallization hole 17 is connected to the metallization layer 16, and the other end of the metallization hole 17 is connected to one end of the integrated inductor 4.

[0015] Preferably, the at least two first metal 12 regions are arranged in a centrally symmetrical manner along the mounting area 11.

[0016] Preferably, the size of the rectangular metal area 13 is greater than or equal to 0.15mm × 0.15mm and less than or equal to 0.25mm × 0.25mm.

[0017] Preferably, both the first carrier layer 1 and the second carrier layer 2 are made of aluminum nitride ceramic or silicon-based materials.

[0018] In a second aspect, the present invention also provides a laser chip carrier with a compensation structure, including a first carrier layer 1 and a second carrier layer 2, wherein the first carrier layer 1 is disposed on the second carrier layer 2;

[0019] A mounting area 11 is provided on the upper surface of the first carrier layer 1 at a first preset position, and the mounting area 11 is used to mount the laser chip;

[0020] At least two first metal areas 12 extend from one end of the mounting area 11. A rectangular metal area 13 is provided at the end of the extended first metal area 12. A ground area 21 is provided on the second carrier layer 2 so as to generate carrier parasitic capacitance 3 on the ground.

[0021] The upper surface of the first carrier layer 1 is also provided with an integrated resistor 14, an integrated capacitor 15 and an integrated inductor 4;

[0022] One pole of the laser chip is connected to one end of the integrated inductor 4 to form a series electrical interconnection between the laser chip and the integrated inductor 4; one end of the carrier parasitic capacitance 3 is connected to one end of the integrated resistor 14 to form a series electrical interconnection; one end of the integrated capacitor 15 and the other end of the integrated resistor 14 are respectively electrically connected to the other end of the integrated inductor 4; the other end of the integrated capacitor 15 and the other end of the carrier parasitic capacitance 3 are respectively electrically connected to the other pole of the laser chip to form a compensation circuit for compensating for the bandwidth of the laser chip.

[0023] Preferably, the end of the first metal region 12 connected to the mounting region 11 is configured as an inverted funnel shape to reduce the emission of radio frequency signals when they are transmitted to the laser chip.

[0024] Preferably, the first carrier layer 1 is made of aluminum nitride ceramic or silicon-based material.

[0025] Compared with the prior art, the above technical solutions adopted in this invention have the following beneficial effects:

[0026] The laser chip carrier with compensation structure in this embodiment of the invention includes a first carrier layer 1 and a second carrier layer 2. By setting integrated inductors 4, integrated capacitors 15, carrier parasitic capacitance 3 and integrated resistors 14 at corresponding positions of the first carrier layer 1 and the second carrier layer 2, additional resonance is generated at high frequencies using the parasitic parameters of the laser chip itself (such as parasitic capacitance, photocurrent-induced equivalent resistance, junction parasitic capacitance and parasitic inductance brought by gold wire, etc.), thereby compensating for the bandwidth of the laser chip and increasing the bandwidth of the laser chip. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0028] Figure 1 This is a schematic diagram of the overall structure of a laser chip carrier with a compensation structure provided in an embodiment of the present invention;

[0029] Figure 2 A schematic diagram of the structure of the first carrier layer of a laser chip carrier with a compensation structure provided in an embodiment of the present invention;

[0030] Figure 3 A schematic diagram of the structure of the second carrier layer of a laser chip carrier with a compensation structure provided in an embodiment of the present invention;

[0031] Figure 4 A circuit diagram showing a laser chip carrier with a compensation structure for gain adjustment of a laser chip, provided as an embodiment of the present invention;

[0032] Figure 5 This is a schematic diagram of the overall structure of a laser chip carrier with a compensation structure provided in an embodiment of the present invention;

[0033] Figure 6 A schematic diagram of the structure of the first carrier layer of a laser chip carrier with a compensation structure provided in an embodiment of the present invention;

[0034] Figure 7 A schematic diagram of the structure of the second carrier layer of a laser chip carrier with a compensation structure provided in an embodiment of the present invention;

[0035] Figure 8 A circuit diagram provided for embodiments of the present invention that does not use a carrier to gain a laser chip;

[0036] Figure 9 This image compares the effect of existing technologies that do not perform gain enhancement on laser chips with the gain enhancement effect of a laser chip carrier with a compensation structure provided in this embodiment of the invention.

[0037] The attached figures are labeled as follows:

[0038] 1-First carrier layer; 11-mount area; 12-first metal area; 13-rectangular metal area; 14-integrated resistor; 15-integrated capacitor; 16-metallization layer; 17-metallization via; 2-second carrier layer; 21-ground area; 3-carrier parasitic capacitance; 4-integrated inductor. Detailed Implementation

[0039] In the description of this invention, the terms "inner", "outer", "longitudinal", "lateral", "upper", "lower", "top", "bottom", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and do not require that this invention must be constructed and operated in a specific orientation. Therefore, they should not be construed as limiting this invention.

[0040] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0041] Example 1:

[0042] This invention provides a laser chip carrier with a compensation structure, such as... Figures 1-3 As shown, it includes a first carrier layer 1 and a second carrier layer 2, wherein the first carrier layer 1 is disposed on the second carrier layer 2;

[0043] like Figure 1-2 As shown, a mounting area 11 is provided at a first preset position on the upper surface of the first carrier layer 1. The mounting area 11 is used to mount the laser chip. In this embodiment, the carrier includes a two-layer structure: a first carrier layer 1 and a second carrier layer 2. The mounting area 11 is provided within the first carrier layer 1. The mounting area 11 is a conductive layer, which can be, but is not limited to, made of TiPtAu or TIWuAu material. Conductive solder (e.g., gold-tin solder) is applied over the mounting area 11. The conductive solder is mainly used for mounting the laser chip. After the laser chip is mounted in the mounting area 11, one electrode of the laser chip forms an electrical connection with the mounting area 11. In this embodiment, the mounting area 11 is positioned at the first preset position of the first carrier layer 1, which is configured according to actual conditions. For example, ... Figure 1 As shown, the first preset position is the upper middle area of ​​the first carrier layer 1.

[0044] like Figures 2-3 As shown, at least two first metal regions 12 extend from one end of the mounting area 11. A rectangular metal region 13 is provided at the end of the extended first metal region 12. A ground plane region 21 is provided on the second carrier layer 2 to generate a carrier parasitic capacitance 3 in the ground plane region 21. At least one first metal region 12 extends from one end of the mounting area 11. The mounting area 11 is a conductive layer, and the first metal region 12 is connected to the mounting area 11, so that the mounting area 11 and the first metal region 12 are electrically connected. In this embodiment of the invention, a rectangular metal region 13 is provided at the end of the extended first metal region 12. The rectangular metal region 13 is preferably a square with a size greater than or equal to 0.15mm × 0.15mm but less than 0.25mm × 0.25mm. A ground plane region 21 is provided in the second carrier layer 2. A capacitor is formed between the rectangular metal region 13 and the ground plane region 21, generating a carrier parasitic capacitance 3, which is used to compensate for the parasitic inductance in the interconnect structure of the laser chip.

[0045] The upper surface of the first carrier layer 1 is also provided with an integrated resistor 14 and an integrated capacitor 15, and the upper surface of the second carrier layer 2 is provided with an integrated inductor 4 at a second preset position; wherein, the second preset position can be determined according to the actual situation, for example, the second preset position is in the corner area of ​​the second carrier layer 2.

[0046] One pole of the laser chip is connected to one end of the integrated inductor 4 to form a series electrical interconnection between the laser chip and the integrated inductor 4; one end of the carrier parasitic capacitance 3 is connected to one end of the integrated resistor 14 to form a series electrical interconnection; one end of the integrated capacitor 15 and the other end of the integrated resistor 14 are respectively electrically connected to the other end of the integrated inductor 4; the other end of the integrated capacitor 15 and the other end of the carrier parasitic capacitance 3 are respectively electrically connected to the other pole of the laser chip to form a compensation circuit for compensating for the bandwidth of the laser chip.

[0047] like Figure 4 As shown, in this embodiment of the invention, an integrated resistor 14 and an integrated capacitor 15 are further disposed on the first carrier layer 1, and an integrated inductor 4 is disposed at a second preset position on the upper surface of the second carrier layer 2. The integrated inductor 4 is connected in series with the laser chip via gold wires. Furthermore, after the integrated capacitor 15, the carrier parasitic capacitance 3, and the integrated resistor 14 are connected to the compensation circuit via gold wires, the integrated capacitor 15 and the laser chip are connected in parallel. The carrier parasitic capacitance 3 and the integrated resistor 14 are first connected in series, and then the entire series connection of the carrier parasitic capacitance 3 and the integrated resistor 14 is connected in parallel with the laser chip to form a compensation circuit for compensating the bandwidth of the laser chip (see [reference]). Figure 4 (As shown). It is worth noting that, in the embodiments of the present invention, the connection between the laser chip, integrated resistor 14, integrated inductor 4, carrier parasitic capacitance 3 and integrated capacitor 15 can be formed by using gold wire to form an electrical connection relationship.

[0048] The laser chip carrier with compensation structure in this embodiment of the invention includes two carrier layers (first carrier layer 1 and second carrier layer 2). By setting integrated inductors 4, integrated capacitors 15, carrier parasitic capacitance 3 and integrated resistors 14 at corresponding positions of the first carrier layer 1 and the second carrier layer 2, additional resonance is generated at high frequencies using the parasitic parameters of the laser itself (such as parasitic capacitance, photocurrent-induced equivalent resistance, junction parasitic capacitance and parasitic inductance brought by gold wire, etc.), thereby compensating for the bandwidth of the laser chip and increasing the bandwidth of the laser chip.

[0049] To illustrate the complete solution of the embodiments of the present invention, the details of the present invention will be described in detail below. To reduce the emission of radio frequency signals when they are transmitted to the chip, such as... Figure 2As shown, in this embodiment of the invention, the end where the first metal region 12 connects to the mounting region 11 is configured as an inverted funnel shape to reduce emission when the radio frequency signal is transmitted to the laser chip. It is worth noting that the two first metal regions 12 in this embodiment are typically symmetrically arranged along the mounting region 11, allowing the radio frequency signal transmitted to the N-pole of the laser chip to be split into two signals for transmission. Compared to a structure with only one signal transmission path, the transmission structure of this embodiment is more impedance-matched to the laser chip, resulting in better high-frequency performance.

[0050] The laser chip carrier with compensation structure in this embodiment of the invention includes a first carrier layer 1 and a second carrier layer 2. To avoid crosstalk between the first carrier layer 1 and the second carrier layer 2, an insulating layer is provided between them to prevent electrical crosstalk. The insulating layer in this embodiment of the invention may, but is not limited to, be made of silicon dioxide.

[0051] An insulating layer is provided between the first carrier layer 1 and the second carrier layer 2 in this embodiment of the invention (see reference). Figure 5 As shown (not marked in the figure), in order to form an electrical interconnect between the integrated inductor 4 located in the second carrier layer 2 and the carrier parasitic capacitance 3 (located in the first carrier layer 1), the first carrier layer 1 is provided with at least one metallization layer 16 parallel to the first metal region 12. The metallization layer 16 has a metallization hole 17 extending through the insulating layer and towards the second carrier layer 2. One end of the metallization hole 17 is connected to the metallization layer 16, and the other end is connected to one end of the integrated inductor 4. By providing the metallization hole 17, the metallization hole 17 penetrates the insulating layer, and the metallization layer 16 connects one end of a metal pillar. The other end of the metal pillar is connected to one end of the integrated inductor 4. The laser chip is electrically connected to the metal region, and the metal region is electrically connected to the metallization layer 16, so that one pole of the laser chip can be electrically connected to the integrated inductor 4 through the metallization hole 17. In addition, in embodiments of the present invention, the integrated inductor 4 can be connected in the compensation circuit by using metallized pillars instead of metallized vias 17, but not limited to this method. The principle of using metallized pillars in embodiments of the present invention is the same as that of using metallized vias 17, and will not be described in detail here. It is worth noting that the metallized via 17 in embodiments of the present invention ultimately needs to be connected to the ground plane region 21, thereby grounding one pole of the laser chip through the metallized via 17.

[0052] According to actual needs, the integrated inductor 4 in this embodiment of the invention is either ring-shaped or square (see reference). Figure 1 and Figure 5By adjusting the number of turns and shape of the integrated inductor 4, the size of the integrated inductor 4 can be adjusted so that the integrated inductor 4 matches the parasitic parameters of the laser chip, thereby achieving compensation for the laser chip.

[0053] To address the heat dissipation problem of the laser chip in this embodiment of the invention, the first carrier layer 1 is made of aluminum nitride ceramic or silicon-based material; the second carrier layer 2 is also made of aluminum nitride ceramic or silicon-based material. Both the first carrier layer 1 and the second carrier layer 2 are made of aluminum nitride ceramic or silicon-based material, which have good heat dissipation performance, to facilitate heat dissipation for the laser chip. Alternatively, this embodiment of the invention can use other materials with a thermal conductivity of not less than 150 W / (mK), a linear thermal expansion coefficient distributed between approximately 4 × 10⁻⁶ / K and 710⁻⁶ / K, and a dielectric constant distributed between 4 and 12 to replace the aluminum nitride ceramic or silicon-based material, thereby achieving heat dissipation for the laser chip.

[0054] The laser chip carrier with compensation structure in this embodiment of the invention includes two carrier layers (first carrier layer 1 and second carrier layer 2). By integrating an inductor 4, an integrated capacitor 15, a carrier parasitic capacitance 3, and an integrated resistor 14 at corresponding positions in the first carrier layer 1 and the second carrier layer 2, additional resonance is generated at high frequencies using the parasitic parameters of the laser itself (such as parasitic capacitance, photocurrent-induced equivalent resistance, junction parasitic capacitance, and parasitic inductance from the gold wire). This compensates for the bandwidth of the laser chip, thereby increasing its bandwidth. Furthermore, this invention employs a novel radio frequency (RF) transmission structure, splitting the RF signal transmitted to the N-pole of the laser chip into two signals. Compared to a single-channel RF transmission structure, the transmission line structure used in this invention is more impedance-matched to the laser chip, resulting in better high-frequency performance.

[0055] Example 2:

[0056] Embodiment 2 of the present invention is a further optimization based on Embodiment 1. Compared with Embodiment 1, the laser chip carrier with compensation structure in Embodiment 2 of the present invention includes a first carrier layer 1 and a second carrier layer 2. The second carrier layer 2 mainly serves as a ground layer. The integrated inductor 4 in Embodiment 1 is also set in the first carrier layer 1, so that when the integrated inductor 4 on the laser chip carrier with compensation structure of the present invention is damaged, it can be replaced and repaired, and is easy to remove, which can better meet the needs of the market.

[0057] Embodiment 2 of the present invention proposes a laser chip carrier with a compensation structure, such as... Figures 5-7As shown, it includes a first carrier layer 1 and a second carrier layer 2, wherein the first carrier layer 1 is disposed on the second carrier layer 2; a mounting area 11 is disposed at a first preset position on the upper surface of the first carrier layer 1, the mounting area 11 being used to mount a laser chip; at least two first metal areas 12 extend from one end of the mounting area 11, and a rectangular metal area 13 is disposed at the end of the extended first metal area 12; a ground plane area 21 is disposed on the second carrier layer 2 to facilitate the generation of carrier parasitic capacitance 3 on the ground plane; an integrated resistor 14, an integrated capacitor 15, and an integrated inductor 4 are also disposed on the upper surface of the first carrier layer 1.

[0058] One pole of the laser chip is connected to one end of the integrated inductor 4 to form a series electrical interconnection between the laser chip and the integrated inductor 4; one end of the carrier parasitic capacitance 3 is connected to one end of the integrated resistor 14 to form a series electrical interconnection; one end of the integrated capacitor 15 and the other end of the integrated resistor 14 are respectively electrically connected to the other end of the integrated inductor 4; the other end of the integrated capacitor 15 and the other end of the carrier parasitic capacitance 3 are respectively electrically connected to the other pole of the laser chip to form a compensation circuit for compensating for the bandwidth of the laser chip.

[0059] The process of forming a compensation circuit between the laser chip, integrated inductor 4, carrier parasitic capacitance 3 and integrated resistor 14 in this embodiment of the invention, as well as the arrangement of the laser chip, carrier parasitic capacitance 3 and integrated resistor 14 on the first carrier layer 1, are the same as in embodiment 1 of the invention, and will not be repeated here.

[0060] To illustrate the difference between Embodiment 2 and Embodiment 1, the following description will illustrate the configuration of the integrated inductor 4 in Embodiment 2 of the present invention through comparison.

[0061] like Figure 5-6 As shown, in the laser chip carrier with compensation structure of Embodiment 1 of the present invention, the laser chip, the metallization layer 16, the metallization hole 17, and the integrated inductor 4 are electrically connected. The metallization layer 16 is disposed on the first carrier layer 1, and the integrated inductor 4 is disposed on the second carrier layer 2. The integrated inductor 4 is connected to the metallization layer 16 through the metallization hole 17 to form a conductive relationship. In the laser chip carrier with compensation structure of Embodiment 2 of the present invention, the metallization layer 16 is also disposed within the first carrier layer 1. Based on this, the metallization layer 16 can be modified in the embodiments of the present invention (see reference). Figure 5 As shown, the metallization layer 16 is split into two metal blocks (see...). Figure 5(The metal blocks are not marked in the figure) Then, the integrated inductor 4 is connected between the two small metallization layers 16 to form an electrical connection. Specifically, at least one metallization layer 16 parallel to the first metal region 12 is provided on the first carrier layer 1, and one of the first metal regions 12 is divided into two metal blocks (see Figure 1). Figure 5 (Metal blocks not marked in the figure) One metal block is connected to one end of the integrated inductor 4, and the other metal block is connected to the other end of the integrated inductor 4; Alternatively, the integrated inductor 4 can be placed in other areas of the first carrier layer 1, with one end of the integrated inductor 4 directly connected to one pole of the laser chip, thereby connecting the integrated inductor 4 into the compensation circuit formed by the laser chip carrier with compensation structure and the laser chip in Embodiment 2 of the present invention. It is worth noting that the metallized hole 17 in the embodiment of the present invention ultimately needs to be connected to the ground plane region 21, thereby grounding one pole of the laser chip through the metallized hole 17.

[0062] To illustrate the complete solution of the embodiments of the present invention, the details of the present invention will be described in detail below. To reduce emissions when radio frequency signals are transmitted to the chip, in this embodiment of the present invention, the end connecting the first metal region 12 and the mounting region 11 is configured as an inverted funnel shape to reduce emissions when radio frequency signals are transmitted to the laser chip. It is worth noting that the two first metal regions 12 in this embodiment of the present invention are typically symmetrically arranged along the mounting region 11, so that the radio frequency signal transmitted to the N-pole of the laser chip is split into two signal transmission paths. Compared to a structure with only one signal transmission path, the transmission structure of this embodiment of the present invention is more impedance-matched to the laser chip, resulting in better high-frequency performance.

[0063] To address the heat dissipation problem of the laser chip in this embodiment of the invention, the first carrier layer 1 is made of aluminum nitride ceramic or silicon-based material; the second carrier layer 2 is also made of aluminum nitride ceramic or silicon-based material. Both the first carrier layer 1 and the second carrier layer 2 are made of aluminum nitride ceramic or silicon-based material, which have good heat dissipation performance, to facilitate heat dissipation for the laser chip. Alternatively, this embodiment of the invention can use other materials with a thermal conductivity of not less than 150 W / (mK), a linear thermal expansion coefficient distributed between approximately 4 × 10⁻⁶ / K and 710⁻⁶ / K, and a dielectric constant distributed between 4 and 12 to replace the aluminum nitride ceramic or silicon-based material, thereby achieving heat dissipation for the laser chip.

[0064] In addition, the embodiments of the present invention also compare the gain of the laser chip by the compensation circuit formed in Embodiments 1 and 2 with the gain of the laser chip in the prior art without the use of a carrier, such as... Figure 4 , Figure 8 and Figure 9 As shown, where, Figure 4 This is a circuit diagram illustrating the gain adjustment of a laser chip by a laser chip carrier with a compensation structure according to an embodiment of the present invention. Figure 8 This is a circuit diagram illustrating that existing technologies do not use a laser chip carrier to gain the laser chip. Figure 9 Line a in the diagram represents the simulated bandwidth of the laser chip when the laser chip gain is not achieved using a laser chip carrier in the prior art. Line b represents the simulated bandwidth of the laser chip when the laser chip gain is achieved using the laser chip carrier with the compensation structure as described in this embodiment of the invention. Figure 9 As can be seen from the embodiments of the present invention, when the laser chip carrier with compensation structure gains the laser chip, it can significantly compensate for the bandwidth of the laser chip when additional resonance is generated at high frequencies, thus significantly increasing the bandwidth of the laser chip.

[0065] The laser chip carrier with compensation structure in this embodiment of the invention includes two carrier layers (first carrier layer 1 and second carrier layer 2). By integrating an inductor 4, an integrated capacitor 15, a carrier parasitic capacitance 3, and an integrated resistor 14 at corresponding positions in the first carrier layer 1 and the second carrier layer 2, additional resonance is generated at high frequencies using the parasitic parameters of the laser itself (such as parasitic capacitance, photocurrent-induced equivalent resistance, junction parasitic capacitance, and parasitic inductance from the gold wire). This compensates for the bandwidth of the laser chip, thereby increasing its bandwidth. Furthermore, this invention employs a novel radio frequency (RF) transmission structure, splitting the RF signal transmitted to the N-pole of the laser chip into two signals. Compared to a single-channel RF transmission structure, the transmission line structure used in this invention is more impedance-matched to the laser chip, resulting in better high-frequency performance.

[0066] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A laser chip carrier with a compensation structure, characterized in that, It includes a first carrier layer (1) and a second carrier layer (2), wherein the first carrier layer (1) is disposed on the second carrier layer (2); A mounting area (11) is provided on the upper surface of the first carrier layer (1) at a first preset position, and the mounting area (11) is used to mount the laser chip; At least two first metal areas (12) extend from one end of the mounting area (11), and a rectangular metal area (13) is provided at the end of the first metal area (12). A ground area (21) is provided on the second carrier layer (2) so that the rectangular metal area (13) generates a carrier parasitic capacitance (3) to the ground area (21). The upper surface of the first carrier layer (1) is also provided with an integrated resistor (14) and an integrated capacitor (15), and the upper surface of the second carrier layer (2) is provided with an integrated inductor (4) at a second preset position. One pole of the laser chip is connected to one end of the integrated inductor (4) to form a series electrical interconnection between the laser chip and the integrated inductor (4); one end of the carrier parasitic capacitance (3) is connected to one end of the integrated resistor (14) to form a series electrical interconnection; one end of the integrated capacitor (15) and the other end of the integrated resistor (14) are respectively electrically connected to the other end of the integrated inductor (4); the other end of the integrated capacitor (15) and the other end of the carrier parasitic capacitance (3) are respectively electrically connected to the other pole of the laser chip to form a compensation circuit for compensating the bandwidth of the laser chip. An insulating layer is provided between the first carrier layer (1) and the second carrier layer (2). The metallized hole (17) penetrates the insulating layer. The metallized hole (17) is ultimately connected to the ground plane (21) so that one pole of the laser chip is grounded through the metallized hole (17).

2. The laser chip carrier with compensation structure according to claim 1, characterized in that, The end of the first metal area (12) connected to the mounting area (11) is set in an inverted funnel shape to reduce the emission of radio frequency signals when they are transmitted to the laser chip.

3. The laser chip carrier with compensation structure according to claim 1, characterized in that, An insulating layer is provided between the first carrier layer (1) and the second carrier layer (2) to avoid electrical crosstalk.

4. The laser chip carrier with compensation structure according to claim 3, characterized in that, The first carrier layer (1) is provided with at least one metallization layer (16) parallel to the first metal region (12). The metallization layer (16) is provided with a metallization hole (17) that penetrates the insulating layer and extends toward the second carrier layer (2). One end of the metallization hole (17) is connected to the metallization layer (16), and the other end of the metallization hole (17) is connected to one end of the integrated inductor (4).

5. The laser chip carrier with compensation structure according to claim 1, characterized in that, The at least two first metal regions (12) are arranged in a centrally symmetrical manner along the mounting region (11).

6. The laser chip carrier with compensation structure according to claim 1, characterized in that, The dimensions of the rectangular metal area (13) are greater than or equal to 0.15 mm × 0.15 mm and less than or equal to 0.25 mm × 0.25 mm.

7. The laser chip carrier with compensation structure according to claim 1, characterized in that, Both the first carrier layer (1) and the second carrier layer (2) are made of aluminum nitride ceramic or silicon-based material.

8. A laser chip carrier with a compensation structure, characterized in that, It includes a first carrier layer (1) and a second carrier layer (2), wherein the first carrier layer (1) is disposed on the second carrier layer (2); A mounting area (11) is provided on the upper surface of the first carrier layer (1) at a first preset position, and the mounting area (11) is used to mount the laser chip; At least two first metal areas (12) extend from one end of the mounting area (11), and a rectangular metal area (13) is provided at the end of the first metal area (12). A ground area (21) is provided on the second carrier layer (2) so as to generate carrier parasitic capacitance (3) on the ground area (21). The upper surface of the first carrier layer (1) is also provided with an integrated resistor (14), an integrated capacitor (15) and an integrated inductor (4). One pole of the laser chip is connected to one end of the integrated inductor (4) to form a series electrical interconnection between the laser chip and the integrated inductor (4); one end of the carrier parasitic capacitance (3) is connected to one end of the integrated resistor (14) to form a series electrical interconnection; one end of the integrated capacitor (15) and the other end of the integrated resistor (14) are respectively electrically connected to the other end of the integrated inductor (4); the other end of the integrated capacitor (15) and the other end of the carrier parasitic capacitance (3) are respectively electrically connected to the other pole of the laser chip to form a compensation circuit for compensating the bandwidth of the laser chip. An insulating layer is provided between the first carrier layer (1) and the second carrier layer (2). The metallized hole (17) penetrates the insulating layer. The metallized hole (17) is ultimately connected to the ground plane (21) so that one pole of the laser chip is grounded through the metallized hole (17).

9. The laser chip carrier with compensation structure according to claim 8, characterized in that, The first carrier layer (1) is provided with at least one metallization layer (16) parallel to the first metal region (12), wherein the first metal region (12) is divided into two metal blocks, one of which is connected to one end of the integrated inductor (4), and the other metal block is connected to the other end of the integrated inductor (4).

10. The laser chip carrier with compensation structure according to claim 8, characterized in that, Both the first carrier layer (1) and the second carrier layer (2) are made of aluminum nitride ceramic or silicon-based material.

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