Programmable, multi-functional, multi-resolution 2d / 3d CMOS image sensor and method of operation thereof

Abstract

The application discloses a programmable, multifunctional and multi-resolution 2D / 3D CMOS image sensor and an operation method thereof, wherein the programmable, multifunctional and multi-resolution 2D / 3D CMOS image sensor comprises a semiconductor substrate, a pixel array and a chip circuit, the pixel array is arranged on the semiconductor substrate, the pixel array comprises at least two pixel units, each pixel unit is provided with a photoelectric gate, each photoelectric gate is located on one side of the corresponding pixel unit close to an adjacent pixel unit, and the two adjacent photoelectric gates are electrically isolated; the chip circuit is electrically connected with the photoelectric gate, and the chip circuit is used for programming the photoelectric gate, so that the photoelectric gate has photosensitivity in the corresponding one pixel unit or has photosensitivity in at least two adjacent pixel units. The scheme can integrate multiple image capturing functions, and meet the user demand.

Description

Technical Field

[0001] This application relates to the field of image sensor technology, specifically to a programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor and its operation method. Background Technology

[0002] With the ever-increasing pursuit of high-quality images, Complementary Metal Oxide Semiconductor (CMOS) image sensors have been widely used in fields such as cameras. To achieve better shooting results, users are placing increasingly higher demands on the performance of CMOS image sensors.

[0003] However, the image capture functions of commonly available CMOS image sensors are relatively simple and cannot meet the needs of users. Summary of the Invention

[0004] This application provides a programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor and its operation method, which can integrate multiple image capture functions to meet user needs.

[0005] In a first aspect, this application provides a programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor, comprising:

[0006] Semiconductor substrate;

[0007] A pixel array disposed on the semiconductor substrate, the pixel array comprising at least two pixel units, each pixel unit having a photogate, each photogate being located on the side of the corresponding pixel unit closer to the adjacent pixel unit, and two adjacent photogates being electrically isolated.

[0008] A chip circuit is electrically connected to the photoelectric gate. The chip circuit is used to program the photoelectric gate so that the photoelectric gate has photosensitive properties in a corresponding pixel unit or in at least two adjacent pixel units.

[0009] In the programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor provided in this application, the photoelectric gate is programmed through the chip circuit so that a single pixel unit in the pixel array is used as a first 2D pixel, and / or at least two adjacent pixel units in the pixel array are used as a 3D depth pixel, so that the CMOS image sensor has 2D image capture function and / or 3D depth image capture function.

[0010] In the programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor provided in this application, when a single pixel unit in the pixel array is used as a first 2D pixel, at least two adjacent first 2D pixels are merged into a second 2D pixel by charge aggregation according to application requirements, so as to adjust the 2D resolution of the CMOS image sensor.

[0011] In the programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor provided in this application, when a single pixel unit in the pixel array is used as a 2D pixel, each 2D pixel corresponds to a chip circuit, which operates independently of other pixel units, thereby enabling the CMOS image sensor to have a 2D image capture function.

[0012] In the programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor provided in this application, when at least two adjacent pixel units in the pixel array are used as a 3D depth pixel, the number of pixel units in the 3D depth pixel is adjusted according to application requirements to program the 3D depth pixel into a 3D depth pixel with different ranging mechanisms.

[0013] In the programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor provided in this application, when at least two adjacent pixel units in the pixel array are used as a 3D depth pixel, each 3D depth pixel corresponds to a chip circuit to operate independently of other pixel units, thereby enabling the CMOS image sensor to have a 3D depth image capture function.

[0014] In the programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor provided in this application, at least one photoelectric gate in each of the 3D depth pixels has the function of excluding background light charge.

[0015] In the programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor provided in this application, each pixel unit has a pixel drain floating diffusion outlet to provide a path for the corresponding photogate to exclude background photocharge.

[0016] In the programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor provided in this application, each pixel unit is a global shutter pixel with a charge or signal storage device.

[0017] In the programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor provided in this application, at least two adjacent pixel units in each 3D depth pixel share a pixel readout circuit.

[0018] In the programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor provided in this application, each pixel unit has a corresponding microlens, and the microlens has an optimized design and focal length.

[0019] Secondly, this application provides a method for operating a programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor, including:

[0020] Obtain the application requirements of CMOS image sensors;

[0021] The CMOS image sensor is programmed according to the application requirements to enable the CMOS image sensor to have 2D image capture and / or 3D depth image capture functions.

[0022] In the operation method of the programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor provided in this application, the CMOS image sensor includes a pixel array, the pixel array includes at least two pixel units, each pixel unit is provided with a photoelectric gate, each photoelectric gate is located on the side of the corresponding pixel unit close to the adjacent pixel unit, and there is electrical isolation between two adjacent photoelectric gates.

[0023] In the operation method of the programmable, multi-functional, multi-resolution 2D / 3D CMOS image sensor provided in this application, the step of programming the CMOS image sensor according to the application requirements to enable the CMOS image sensor to have 2D image capture function and / or 3D depth image capture function includes:

[0024] The photoelectric gate is programmed according to the application requirements so that a single pixel unit in the pixel array is a first 2D pixel, and / or at least two adjacent pixel units in the pixel array are a 3D depth pixel, so that the CMOS image sensor has 2D image capture function and / or 3D depth image capture function.

[0025] In the operation method of the programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor provided in this application, when a single pixel unit in the pixel array is used as a first 2D pixel, at least two adjacent first 2D pixels are merged into a second 2D pixel by charge aggregation according to application requirements, so as to adjust the 2D resolution of the CMOS image sensor.

[0026] In the operation method of the programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor provided in this application, when at least two adjacent pixel units in the pixel array are used as a 3D depth pixel, the number of pixel units in the 3D depth pixel is adjusted according to application requirements to program the 3D depth pixel into a 3D depth pixel with different ranging mechanisms.

[0027] In summary, the programmable, multi-functional, multi-resolution 2D / 3D CMOS image sensor provided in this application includes a semiconductor substrate, a pixel array, and a chip circuit. The pixel array is disposed on the semiconductor substrate and includes at least two pixel units. Each pixel unit has a photogate, and each photogate is located on the side of the corresponding pixel unit closest to its adjacent pixel unit. Two adjacent photogates are electrically isolated. The chip circuit is electrically connected to the photogates and is used to program the photogates so that each photogate is photosensitive in a corresponding pixel unit or in at least two adjacent pixel units. This solution, by setting photogates in pixel units and positioning each photogate on the side of the corresponding pixel unit closest to its adjacent pixel unit, allows each pixel unit to operate independently or in combination with at least two adjacent pixel units, thereby enabling the CMOS image sensor to have multiple image capture functions. In other words, this solution can integrate multiple image capture functions to meet user needs. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 This is a schematic diagram of the structure of a programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor provided in the embodiments of this application.

[0030] Figure 2 This is a schematic diagram of the 2D pixel configuration provided in the embodiments of this application.

[0031] Figure 3 This is a schematic diagram of the 3D depth pixel configuration provided in the embodiments of this application.

[0032] Figure 4 This is a schematic diagram of 3D depth pixels provided in an embodiment of this application.

[0033] Figure 5This is another schematic diagram of the 3D depth pixels provided in the embodiments of this application.

[0034] Figure 6 This is another schematic diagram of the 3D depth pixels provided in the embodiments of this application.

[0035] Figure 7 This is another schematic diagram of the structure of the programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor provided in the embodiments of this application.

[0036] Figure 8 This is a flowchart illustrating the operation method of the programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor provided in the embodiments of this application. Detailed Implementation

[0037] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0038] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, components, features, and elements with the same names in different embodiments of this application may have the same meaning or different meanings, the specific meaning of which must be determined by its interpretation in that specific embodiment or further in conjunction with the context of that specific embodiment.

[0039] It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0040] In the following description, the use of suffixes such as "module," "part," or "unit" to denote elements is solely for the purpose of illustrative purposes and has no specific meaning in itself. Therefore, "module," "part," or "unit" may be used interchangeably.

[0041] In the description of this application, it should be noted that the terms "upper," "lower," "left," "right," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0042] In CMOS technology, the design of 3D Time-of-Flight (TOF) pixels is far more complex than that of conventional 2D image sensors. Whenever a TOF image sensor simultaneously captures a 2D intensity image, the 3D depth image and the 2D infrared image are consistently rendered with the same low resolution. Furthermore, almost all TOF pixels currently on the 3D market are designed for a single function. Examples include two-phase or multi-phase continuous-wave phase demodulation pixels in indirect Time-of-Flight (iTOF) sensors; three or more tap-locked pixels in holographic Time-of-Flight (hTOF) sensors; or more complex pixels and alternatives to Time-to-Digital Converter (TDC) or direct Time-of-Flight (dTOF) sensors. Moreover, none of the various TOF sensors on the market can simultaneously capture a 2D infrared image with a higher resolution than a 3D depth image. Therefore, 3D depth image sensors are larger and more expensive than equivalent 2D infrared image sensors.

[0043] Based on this, embodiments of this application provide a programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor and its operation method. The technical solution shown in this application will be described in detail below through specific embodiments. It should be noted that the order of description of the following embodiments is not intended to limit the priority of the embodiments.

[0044] Please see Figure 1 , Figure 1 This is a schematic diagram of the structure of a programmable, multi-functional, multi-resolution 2D / 3D CMOS image sensor provided in an embodiment of this application. The programmable, multi-functional, multi-resolution 2D / 3D CMOS image sensor may include a semiconductor substrate 10, a pixel array 20, and chip circuitry (not shown).

[0045] The semiconductor substrate 10 can be made of materials such as single-crystal silicon, silicon carbide, gallium arsenide, indium phosphide, or germanium silicon. The semiconductor substrate material can also be germanium silicon, group III-V element compounds, silicon carbide or their stacked structures, or silicon-on-insulator structures. It can also be a diamond substrate or other semiconductor material substrates known to those skilled in the art. For example, P atoms can be implanted into single-crystal silicon to form an N-type conductive semiconductor substrate, or B atoms can be implanted into single-crystal silicon to form a P-type conductive semiconductor substrate.

[0046] In some embodiments, an epitaxial layer may be formed on the semiconductor substrate 10, and the active regions are all disposed on the epitaxial layer.

[0047] The pixel array 20 is disposed on the semiconductor substrate 10 and includes at least two pixel units 21. Each pixel unit 21 has a photogate (PG) 211, and each photogate 211 is located on the side of the corresponding pixel unit closest to the adjacent pixel unit. Each pixel unit 21 has a first transfer gate (TG) 23 and a first floating diffuser (FD) 24 interconnected. The first transfer gate 23 is used to transfer signal charge to the first floating diffuser 24; the floating diffuser 24 is used to convert the signal charge into a signal voltage. The semiconductor substrate 10 has a photosensitive region. The photogate 211 is used to attract photogenerated charge from the photosensitive region of the semiconductor substrate 10.

[0048] The chip circuit is electrically connected to the photoelectric gate 211. The chip circuit is used to program the photoelectric gate 211 so that the photoelectric gate 211 has photosensitive properties in a corresponding pixel unit 21 or in at least two adjacent pixel units 21.

[0049] Specifically, in this embodiment, the photosensitive element in the pixel unit 21 is set as a photogate 211, and each photogate 211 is respectively disposed on the side of the corresponding pixel unit close to the adjacent pixel unit, thereby enabling... Figure 2 As shown, by programming the photogate 211, a single photogate 211 can only acquire the photogenerated charge of the corresponding photosensitive region 212, thereby enabling each pixel unit 21 to operate independently as a first 2D pixel; or as... Figure 3As shown, by programming the photogate 211, at least two adjacent photosensitive regions 212 can be captured by one photogate 211, thereby enabling at least two adjacent pixel units 21 to combine into a 3D depth pixel 22. This allows the CMOS image sensor to simultaneously possess higher resolution image capture capabilities and / or lower resolution 3D depth image capture capabilities. In the prior art, the photosensitive elements in pixel units are all photodiodes, which cannot be combined.

[0050] In practical applications, the photoelectric gate 211 can be programmed via chip circuitry to make a single pixel unit 21 in the pixel array 20 function as a first 2D pixel, and / or at least two adjacent pixel units 21 in the pixel array 20 function as a 3D depth pixel 22. This allows the CMOS image sensor to simultaneously possess higher resolution image capture capabilities and / or lower resolution 3D depth image capture capabilities. Specifically, this can be achieved as follows:

[0051] When a single pixel unit 21 in the pixel array 20 is used as a 2D pixel, each 2D pixel corresponds to a chip circuit that operates independently of other pixel units 21. These chips are programmed to operate independently of other pixel units, thus enabling the CMOS image sensor to have 2D image capture capabilities. In this case, each photogate 211 in the 2D pixel is configured to attract the maximum photogenerated charge only within its corresponding pixel unit 21.

[0052] In some embodiments, when a single pixel unit in the pixel array is used as a first 2D pixel, at least two adjacent first 2D pixels are merged into a second 2D pixel by charge aggregation according to application requirements, so as to adjust the 2D resolution of the CMOS image sensor.

[0053] like Figure 4-6 As shown, when at least two adjacent pixel units 21 in the pixel array 20 form a 3D depth pixel 22, each 3D depth pixel 22 corresponds to a chip circuit that operates independently of other pixel units 21, thereby enabling the CMOS image sensor to have a 3D depth image capture function. At this time, at least one photoelectric gate 211 in the 3D depth pixel 22 can be configured to attract the maximum photogenerated charge within the entire 3D depth pixel 22; while other photoelectric gates 211 in the 3D depth pixel 22 can be configured to attract smaller photogenerated charges, thereby achieving the charge modulation function required for 3D depth image capture.

[0054] In some embodiments, when at least two adjacent pixel units in a pixel array are used as a 3D depth pixel, the number of pixel units in the 3D depth pixel is adjusted according to application requirements to program the 3D depth pixel as a 3D depth pixel with different ranging mechanisms.

[0055] For example, by adjusting the number of pixel units in the 3D depth pixel, the CMOS image sensor can have one or more of the following 3D depth image capture functions: the 3D depth image capture function of two-phase or multi-phase continuous wave phase demodulation pixels of an iTOF sensor, the 3D depth image capture function of three or more tap-locked pixels of an hTOF sensor, the 3D depth image capture function of more complex pixels and TDC, or the 3D depth image capture function of a dTOF sensor.

[0056] In other words, 3D depth image pixels can be programmed to have different ranging mechanisms without significantly changing the 3D depth image capture performance. Examples include two-phase continuous wave (CW) demodulated iTOF, three-phase CW demodulated iTOF, four-phase CW demodulated iTOF, 3-tap phase-locked loop (hTOF), and 4-tap phase-locked loop (hTOF). It should be noted that the 3D depth pixel 22 can function as a larger 3D TOF pixel operating as a multi-tap hybrid TOF pixel, while the photoelectric gates 211 in other pixel units 21 can be used as individual taps of this 3D TOF pixel.

[0057] It should be noted that, in this embodiment, in order to achieve 3D imaging, there is electrical isolation between two adjacent photogates 211. This electrical isolation can be a doping curve within the semiconductor substrate 10 and / or a dielectric trench between two adjacent pixel units 21.

[0058] It is understood that each pixel unit 21 is a global shutter pixel with a charge or signal storage device, thereby realizing the transfer of photogenerated charge attracted by the photogate to the diffusion node or charge / signal storage element of the corresponding pixel unit.

[0059] In some embodiments, at least two adjacent pixel units 21 in the 3D depth pixel 22 can share the same pixel readout circuit, thereby achieving better noise filtering. It should be noted that each pixel unit 21 can retain an independent pixel readout circuit, thereby simplifying the design.

[0060] In some embodiments, to improve imaging performance, at least one photogate 21 in each 3D depth pixel 22 has the function of excluding background light charge. For example... Figure 7As shown, at least one pixel unit 21 in each 3D depth pixel 22 has a second transmission gate 25 and a second floating diffuser 26 to provide a path for the corresponding photogate 211 to exclude background light charge.

[0061] It is understandable that each pixel unit 21 has a corresponding microlens with an optimized design and focal length to redirect the light signal on each pixel unit 21 so that the light signal can be effectively focused on the photoelectric gate 211 of the corresponding pixel unit.

[0062] In some embodiments, at least two adjacent pixel units 211 in the 3D depth pixel 22 may share a microlens with the same optimized design and focal length to form a larger microlens to redirect the light signal on the 3D depth pixel 22, thereby enabling at least two adjacent pixel units 21 in the 3D depth pixel 22 to work as a single pixel.

[0063] In this embodiment, the chip circuit can be programmed according to the application requirements of the CMOS image sensor to control the magnitude of the attraction of the photogate 211 in each pixel unit 21 to photogenerated charge. Whenever the function of a higher resolution 2D image sensor is required, the photogate 211 in each pixel unit 21 can be set to have a large attraction to photogenerated charge; whenever the function of a lower resolution 3D depth image sensor is required, at least two adjacent pixel units 21 form a 3D depth pixel 22, forming a larger 3D depth pixel 22, and at least one photogate 211 in the 3D depth pixel 22 can be set to have the function of attracting the maximum photogenerated charge within the entire 3D depth pixel 22, while the other photogates 211 in the 3D depth pixel 22 can be set to have the function of attracting smaller photogenerated charge.

[0064] In summary, the CMOS image sensor provided in this application includes a semiconductor substrate 10, a pixel array 20, and a chip circuit. The pixel array 20 is disposed on the semiconductor substrate 10 and includes at least two pixel units 21. Each pixel unit 21 is provided with a photogate 211, and each photogate 211 is located on the side of the corresponding pixel unit close to the adjacent pixel unit. Two adjacent photogates 211 are electrically isolated. The chip circuit is electrically connected to the photogates 211 and is used to program the photogates 211 so that the photogates 211 have photosensitivity in a corresponding pixel unit 21 or in at least two adjacent pixel units 21. By setting photogates 211 in the pixel units 21 and placing each photogate 211 on the side of the corresponding pixel unit close to the adjacent pixel unit, this solution allows each pixel unit 21 to operate as a 2D pixel independently, or for at least two adjacent pixel units 21 to combine into a 3D depth pixel 22, thereby enabling the CMOS image sensor to have 2D image capture function and / or 3D depth image capture function. 3D depth image pixels can be programmed to have different ranging mechanisms without significantly changing the 3D depth image capture performance. Examples include two-phase continuous wave (CW) demodulation iTOF, three-phase CW demodulation iTOF, four-phase CW demodulation iTOF, 3-tap phase-locked loop (hTOF), and 4-tap phase-locked loop (hTOF). Therefore, CMOS image sensors possess multiple image capture functions. In other words, this solution integrates multiple image capture functions to meet user needs.

[0065] Furthermore, each pixel unit 21 in this CMOS image sensor can have the same simple design as a conventional 2D infrared image sensor. For example, the pixel unit 21 can be a four-transistor active pixel design, or even a multi-transistor global shutter active pixel design. Therefore, compared to other 3D TOF sensors, the CMOS image sensor provided in this application embodiment is smaller in size and lower in cost.

[0066] Please see Figure 8 , Figure 8 This is a flowchart illustrating the operation method of the programmable, multi-functional, multi-resolution 2D / 3D CMOS image sensor provided in this application embodiment. The specific flow of the operation method of this programmable, multi-functional, multi-resolution 2D / 3D CMOS image sensor can be as follows:

[0067] 101. Obtain the application requirements of CMOS image sensors;

[0068] 102. Program the CMOS image sensor according to application requirements to enable the CMOS image sensor to have 2D image capture function and / or 3D depth image capture function.

[0069] It should be noted that the CMOS image sensor includes a pixel array, which includes at least two pixel units. Each pixel unit is provided with a photoelectric gate. Each photoelectric gate is located on the side of the corresponding pixel unit that is close to the adjacent pixel unit. There is electrical isolation between two adjacent photoelectric gates.

[0070] In the specific implementation process, the photoelectric gate can be programmed according to the application requirements so that a single pixel unit in the pixel array is a first 2D pixel, and / or at least two adjacent pixel units in the pixel array are a 3D depth pixel, so that the CMOS image sensor has 2D image capture function and / or 3D depth image capture function.

[0071] Specifically, when a single pixel unit in the pixel array is used as a first 2D pixel, at least two adjacent first 2D pixels are merged into a second 2D pixel through charge aggregation according to application requirements, so as to adjust the 2D resolution of the CMOS image sensor.

[0072] Specifically, when at least two adjacent pixel units in the pixel array are used as a 3D depth pixel, the number of pixel units in the 3D depth pixel is adjusted according to application requirements to program the 3D depth pixel into a 3D depth pixel with different ranging mechanisms.

[0073] It should be noted that the meanings of the terms in this embodiment are the same as those in the above-mentioned programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor. The specific implementation details can be found in the description of the device embodiment, and will not be repeated here.

[0074] In summary, the operation method of the programmable, multi-functional, multi-resolution 2D / 3D CMOS image sensor provided in this application embodiment can program the CMOS image sensor according to the application requirements of the CMOS image sensor. Each pixel unit 21 can operate independently as a 2D pixel, or at least two adjacent pixel units 21 can be combined into a 3D depth pixel 22. Thus, the CMOS image sensor simultaneously possesses higher resolution image capture capabilities and / or lower resolution 3D depth image capture capabilities. In other words, this solution can integrate multiple image capture functions to meet user needs.

[0075] The above provides a detailed description of the programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor and its operation method provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A programmable, multi-functional, multi-resolution 2D / 3D CMOS image sensor, characterized in that, include: Semiconductor substrate; A pixel array disposed on the semiconductor substrate, the pixel array comprising at least two pixel units, each pixel unit having a photogate, each photogate being located on the side of the corresponding pixel unit closer to the adjacent pixel unit, and two adjacent photogates being electrically isolated. A chip circuit, electrically connected to the photoelectric gate, is configured to: program the photoelectric gate such that a single photoelectric gate only acquires photogenerated charge from the corresponding photosensitive region, thereby enabling each pixel unit to operate independently as a first 2D pixel; and / or, program the photoelectric gate such that at least two adjacent photosensitive regions are acquired through a single photoelectric gate, thereby enabling at least two adjacent pixel units to combine into a 3D depth pixel, thus enabling the CMOS image sensor to have 2D image capture function and / or 3D depth image capture function; when a single pixel unit in the pixel array acts as a first 2D pixel, at least two adjacent first 2D pixels are merged into a second 2D pixel through charge aggregation according to application requirements to adjust the 2D resolution of the CMOS image sensor; when at least two adjacent pixel units in the pixel array act as a 3D depth pixel, the number of pixel units in the 3D depth pixel is adjusted according to application requirements to program the 3D depth pixel as a 3D depth pixel with different ranging mechanisms.

2. The programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor as described in claim 1, characterized in that, When a single pixel unit in the pixel array is used as a 2D pixel, each 2D pixel corresponds to a chip circuit that operates independently of other pixel units, thereby enabling the CMOS image sensor to have 2D image capture capabilities.

3. The programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor as described in claim 1, characterized in that, When at least two adjacent pixel units in the pixel array are used as a 3D depth pixel, each 3D depth pixel corresponds to a chip circuit, which operates independently of other pixel units, thereby enabling the CMOS image sensor to have 3D depth image capture function.

4. The programmable, multi-functional, multi-resolution 2D / 3D CMOS image sensor as described in claim 2 or 3, characterized in that, At least one photoelectric gate in each of the 3D depth pixels has the function of excluding background light charge.

5. The programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor as described in any one of claims 1 to 4, characterized in that, Each pixel unit has a pixel drain floating diffusion outlet to provide a path for the corresponding photogate to exclude background photocharge.

6. The programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor as described in any one of claims 1 to 4, characterized in that, Each of the pixel units is a global shutter pixel with a charge or signal storage device.

7. The programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor as described in claim 6, characterized in that, At least two adjacent pixel units in each of the 3D depth pixels share a pixel readout circuit.

8. The programmable, multifunctional, multi-resolution 2D / 3D CMOS image sensor as described in any one of claims 1 to 3, characterized in that, Each pixel unit has a corresponding microlens, which has an optimized design and focal length.

9. A method for operating a programmable, multi-functional, multi-resolution 2D / 3D CMOS image sensor, characterized in that, include: The application requirements for obtaining a CMOS image sensor are as follows: the CMOS image sensor includes a pixel array, the pixel array includes at least two pixel units, each pixel unit is provided with a photoelectric gate, each photoelectric gate is located on the side of the corresponding pixel unit close to the adjacent pixel unit, and there is electrical isolation between two adjacent photoelectric gates; According to the application requirements, the photogates are programmed so that a single photogate only acquires the photogenerated charge of the corresponding photosensitive region, thereby enabling each pixel unit to operate independently as a first 2D pixel; and / or, by programming the photogates, the photogenerated charge of at least two adjacent photosensitive regions is acquired through a single photogate, thereby enabling at least two adjacent pixel units to combine into a 3D depth pixel, so that the CMOS image sensor has 2D image capture function and / or 3D depth image capture function; when a single pixel unit in the pixel array acts as a first 2D pixel, at least two adjacent first 2D pixels are merged into a second 2D pixel through charge aggregation according to the application requirements, so as to adjust the 2D resolution of the CMOS image sensor; when at least two adjacent pixel units in the pixel array act as a 3D depth pixel, the number of pixel units in the 3D depth pixel is adjusted according to the application requirements, so as to program the 3D depth pixel into a 3D depth pixel with different ranging mechanisms.

Images