Interchangeable Interface Role Remapping

Abstract

In response to the startup and reset of an input / output (I / O) device that provides virtualized hardware resources for use by a virtual function (VF) driver of a virtual machine (VM) and the loading of a physical function (PF) driver, a global configuration status register (CSR) is set by the PF driver and / or the I / O device to a mapping value that defines a certain mapping between the base address register (BAR) roles supported by the virtual functions opened by the I / O device and the I / O device BARs of these virtual functions. In response to this setting, these VF drivers of these virtual functions corresponding to the PF driver are loaded. Each corresponding VF driver obtains the mapping value of the global CSR and, according to this certain mapping, maps the BAR of the VF driver specified for these BAR roles to the corresponding I / O device BARs of these virtual functions, and these virtual functions are mapped to these BAR roles.

Description

Background Art

[0001] In some of its embodiments, the present invention relates to virtual machines (VMs), and more particularly, but not exclusively, to communication between a VM and virtualized resources of physical hardware devices.

[0002] Hardware resources, particularly I / O devices such as storage devices, accelerator hardware, and network interfaces, can be virtualized. Virtualization of hardware resources allows multiple VMs to share the same hardware resources. Summary of the Invention

[0003] An object of the present invention is to provide a computing device, a method, and a computer-readable storage medium for virtualizing hardware resources of an input / output (I / O) device.

[0004] The above and other objects are achieved by the features of the independent claims. Further implementations are apparent from the dependent claims, the description, and the drawings.

[0005] According to a first aspect, a computing device communicating with an input / output (I / O) device that provides virtualized hardware resources for use by multiple virtual function (VF) drivers of multiple virtual machines (VMs), the computing device being configured to: execute a virtual machine manager (VMM) that implements a physical function (PF) driver and multiple base address register (BAR) roles, wherein the multiple BAR roles are supported by multiple virtual functions opened by the I / O device, the PF driver, and the multiple virtual functions implemented by the multiple VMs corresponding to the multiple VF drivers; in response to startup or reset of the I / O device and loading of the PF driver: set a global configuration status register (CSR) to a mapping value by at least one of the PF driver and the I / O device, the mapping value defining a certain mapping of multiple mappings between the multiple BAR roles and I / O device BARs of the multiple virtual functions, wherein in response to the setting, load the multiple VF drivers corresponding to the multiple virtual functions of the PF driver, wherein each respective VF driver obtains the mapping value of the global CSR and, according to the certain mapping, maps multiple BARs of the VF driver specified for the multiple BAR roles to corresponding I / O device BARs of the multiple virtual functions, and the multiple virtual functions are mapped to the multiple BAR roles.

[0006] According to a second aspect, a computing device that executes a virtual machine VM, the computing device being configured to: execute a PF driver and a virtual function VF driver corresponding to an input / output I / O device that provides virtualized hardware resources, and in response to a startup or reset of the VF driver: access a mapping value stored in a global CSR, the mapping value defining a certain mapping among a plurality of BAR roles opened by the I / O device and a plurality of I / O device BARs of the plurality of virtual functions, wherein the mapping value is set by at least one of the PF driver and the I / O device, and according to the certain mapping, map a plurality of BARs of the VF driver specified for the plurality of BAR roles to the corresponding I / O device BARs of the plurality of virtual functions, map the plurality of virtual functions to the plurality of BAR roles, and use the mapping of the plurality of BARs of the VF specified for the plurality of BAR roles to access a memory region assigned to each of the plurality of BAR roles.

[0007] According to a third aspect, a method for providing virtualized hardware resources of an input / output I / O device for use by a plurality of virtual function VF drivers of a plurality of virtual machines VM, the method comprising: executing a virtual machine manager VMM that implements a physical function PF driver and a plurality of base address register BAR roles, wherein the plurality of BAR roles are supported by a plurality of virtual functions opened by the I / O device, the PF driver, and the plurality of virtual functions implemented by the plurality of VMs; in response to a startup or reset of the I / O device and a load of the PF driver: set a global configuration status register CSR to a mapping value by at least one of the PF driver and the I / O device, the mapping value defining a certain mapping among the plurality of BAR roles and the plurality of I / O device BARs of the plurality of virtual functions, wherein in response to the setting, load the plurality of VF drivers corresponding to the plurality of virtual functions of the PF driver, wherein each corresponding VF driver obtains the mapping value of the global CSR, and according to the certain mapping, map a plurality of BARs of the VF driver specified for the plurality of BAR roles to the corresponding I / O device BARs of the plurality of virtual functions, and map the plurality of virtual functions to the plurality of BAR roles.

[0008] The standard method locks the PF driver and / or VF driver to the I / O device. Different versions of the same I / O device can map different BARs of these virtual functions to different roles. Changes in the mapping of the I / O device in its new version require an upgrade / new installation of the PF driver and / or VF driver to correspond to the new mapping of BAR to role for the virtual functions in the new I / O device. In some environments, such as cloud-based environments where a large number (e.g., thousands) of VMs are running, each with a corresponding VF driver, when the I / O device changes, each VF driver needs to be upgraded / new installed.

[0009] In at least some of the implementations described herein, for each change in the I / O device where the mapping between the BAR of the virtual function and the role changes, the VF driver does not need to be upgraded by installing a new version to reflect the new mapping of the new I / O device. By changing the mapping value to reflect the new mapping of the new I / O device, the VF driver performs the corresponding mapping for the new I / O device.

[0010] In additional implementations of the first, second, and third aspects, the mapping value is stored on the I / O device, and the mapping value of the global CSR is set by the I / O device, and the computing device is further configured to: obtain the mapping value, and the PF driver sets the addresses of the multiple BARs of the PF driver specified for the multiple BAR roles to map to the corresponding BARs of the multiple virtual functions according to the certain mapping corresponding to the mapping value.

[0011] At least some of the implementations described herein provide that for each change in the I / O device where the mapping between the BAR of the virtual function and the role changes, the PF driver does not need to be upgraded by installing a new version to reflect the new mapping of the new I / O device. By changing the mapping value to reflect the new mapping of the new I / O device, the PF driver performs the corresponding mapping for the new I / O device.

[0012] In additional implementations of the first, second, and third aspects, the computing device is configured to: issue a request of the PF driver to the I / O device, the request indicating at least one change in at least one mapping between: (i) at least one of the multiple BAR roles and at least one I / O device BAR of the multiple virtual functions, and (ii) at least one of the multiple BAR roles and at least one I / O device BAR of the multiple physical functions, and in response to approval of the request, set the mapping value of the global CSR according to the change in the at least one mapping.

[0013] The PF driver can negotiate the mapping with the I / O device to enable support for backward compatibility versions.

[0014] In additional implementations of the first, second, and third aspects, the computing device is configured to: mirror the mapped value of the global CSR to each of a plurality of global VF BAR registers specified for the plurality of VF drivers, wherein each respective VF driver obtains the mapped value from a corresponding respective global VF BAR register.

[0015] The mirroring enables selection of which VF drivers to update based on the mapped value; for example, some VF drivers do not update in response to the mapped value.

[0016] In additional implementations of the first, second, and third aspects, the PF driver maps, according to the certain mapping, the plurality of BARs of each respective VF driver specified for the plurality of BAR roles to the corresponding I / O device BARs of the plurality of virtual functions, the plurality of virtual functions being mapped to the plurality of BAR roles, reflecting the mapping of the I / O device global CSR value.

[0017] In additional implementations of the first, second, and third aspects, the computing device is further configured to: set each of a plurality of global VF driver registers assigned to the plurality of VF drivers to a respective mapped value by at least one of the PF driver and the I / O device, wherein each respective VF driver obtains the respective mapped value from the one respective global VF BAR register and maps, according to the mapping defined by the respective mapped value, the plurality of BARs of the VF driver specified for the plurality of roles to the corresponding I / O device BARs of the plurality of virtual functions, the plurality of virtual functions being mapped to the plurality of BAR roles.

[0018] Using global registers for each VF driver can provide finer control, enabling different mappings for different VF drivers; for example, different versions of VF drivers can provide different mappings, enabling backward compatibility.

[0019] In additional implementations of the first, second, and third aspects, the mapped value is set according to the corresponding version of the I / O device, wherein different mapped values defining different mappings are set for different versions of the I / O device.

[0020] Mapping according to the version of the I / O device provides backward compatibility for different versions of the I / O device, and / or can support maintaining the same device ID for different versions of the I / O device.

[0021] In additional implementations of the first, second, and third aspects, the startup or reset of the I / O device includes at least one of single root input / output virtualization, SR-IOV, enabling, and VF driver exposure operations.

[0022] Remapping can be dynamically performed in response to SR-IOV enabling and / or VF driver exposure.

[0023] In additional implementations of the first, second, and third aspects, the global CSR includes a plurality of global role CSRs, each global role CSR corresponding to one of the plurality of roles, wherein each of the plurality of global role CSRs is set with a corresponding role mapping value defining a certain mapping among a certain role and at least one I / O device BAR of the plurality of virtual functions, and wherein each corresponding VF driver obtains the corresponding role mapping value from the plurality of global role CSRs and maps at least one BAR of the VF driver specified for each corresponding role.

[0024] The plurality of global role CSRs can provide additional control over a single role mapping, thereby enabling adjustment of the mapping of each BAR role independently of other BAR roles. Positioning the global CSR consistently on the same BAR enables the use of the same VF driver each time. If the global CSR is located on a different BAR each time at startup (or other event), a different VF driver is required each time.

[0025] In additional implementations of the first, second, and third aspects, the I / O device implements a protocol for virtualizing its hardware resources based on the Peripheral Component Interconnect Express (PCIe) standard.

[0026] The PCIe BAR enumeration process that occurs when PCIe is initialized includes all possible BAR regions for the PF driver and VFs (without knowing their roles). The implementations described herein are compatible with the PCIe enumeration process and do not require re-enumeration of PCIe.

[0027] In additional implementations of the first, second, and third aspects, the PCIe implements SR-IOV.

[0028] In additional implementations of the first, second, and third aspects, the global CSR is located at a constant position that does not change during at least one member of the group consisting of: subsequent startups, resets, initialization processes, changes in the identification of the I / O device, and changes in the version of the I / O device.

[0029] Using the fixed location of the global CSR, the enabling driver can know in advance where to find the mapping, enabling computationally efficient and automatic mapping triggered by events such as startup and / or reset and / or initialization.

[0030] In additional implementations of the first, second, and third aspects, multiple instances of self-adapting VFs, AVFs, and / or assignable device interfaces (ADIs) are implemented as the multiple VF drivers, and the multiple instances of the AVF are mapped to a PF driver implemented as a single common PF driver, where multiple BARs in the multiple VF drivers that can be implemented by the multiple instances of the AVF are mapped simultaneously.

[0031] When the VF driver is specific to the hardware of (e.g., an I / O device), the ADF is designed to run on any type of hardware rather than being specific to the hardware.

[0032] In additional implementations of the first, second, and third aspects, the mapping value is defined by at least one member selected from the group consisting of: a data set mapped between the mapping value and the multiple mappings, a condition code for selecting the certain mapping according to the mapping value, a bit mapping where each bit corresponds to a different mapping, and a predefined structure of the mapping value that defines positions within the mapping value corresponding to different mappings.

[0033] The mapping defined by the mapping value can be implemented using computationally efficient data structures and / or within the mapping value itself, such that the mapping value itself provides the mapping and another data structure is not necessarily required. The implementation method can be selected for each update of the new mapping.

[0034] The method according to the third aspect can be executed by a computer-readable storage medium storing program code, the program code including instructions that, when executed on a computer, cause the computer to execute the method according to the third aspect.

[0035] Unless otherwise defined, all technical and / or scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the technical field to which this invention belongs. Although methods and materials similar or equivalent to those described herein can be used in the practice or testing of embodiments of the present invention, exemplary methods and / or materials are described below. In case of conflict, the present patent specification (including definitions) shall prevail. In addition, these materials, methods, and examples are merely illustrative and are not intended to be necessarily limiting. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] This invention is described by way of example only, in conjunction with the accompanying drawings, of some embodiments. Now specifically in conjunction with the drawings, it should be emphasized that the details shown are for illustrative purposes only and for the purpose of an illustrative discussion of the embodiments of this invention. In this regard, it will be apparent to those skilled in the art how to practice the embodiments of this invention based on the description of the drawings.

[0037] In the drawings:

[0038] Figure 1 is a block diagram of components of a computing device that maps, according to some embodiments, between a BAR role and an I / O device BAR of a virtual function based on mapping values stored in a global CSR;

[0039] Figure 2 depicts an exemplary data flow between components of a computing device in accordance with some embodiments in combination with Figure 1 as described;

[0040] Figure 3A is a flowchart of a method for setting mapping values and mapping according to the mapping values according to some embodiments;

[0041] Figure 3B is a schematic diagram depicting a mapping between a BAR role and an I / O device BAR of a virtual function according to mapping values according to some embodiments;

[0042] Figure 4 is a flowchart of an overall process method for establishing a virtual operating environment based on a mapping between a BAR role and an I / O device BAR of a virtual function according to mapping values stored in a global CSR according to some embodiments;

[0043] Figure 5 depicts an exemplary virtualization environment according to some embodiments, in which the mapping between a BAR role and an I / O device BAR of a virtual function is performed according to mapping values stored in a global CSR. Detailed Description of the Embodiments

[0044] In some of its embodiments, the present invention relates to virtual machines (VMs), and more specifically, but not exclusively, to communication between VMs and virtualized resources of physical hardware devices.

[0045] One aspect of some implementations of the system methods, apparatus, and / or code instructions described herein relates to a global configuration status register (CSR) set to a mapped value. The mapped value defines a certain mapping between the BAR roles exposed by an input / output (I / O) device and the I / O device BARs of virtual functions. The I / O device provides virtualized hardware resources for use by multiple virtual function (VF) drivers of multiple virtual machines (VMs). The BAR role indicates the purpose (i.e., role) to which the corresponding BAR is assigned. For example, one BAR is assigned the role for message-signaled interrupt (MSI-X), another BAR is assigned to the role for doorbell, yet another BAR is assigned for mailbox, and yet another BAR is assigned for use by control and status registers (CSR). Each mapped value defines a different mapping between the BAR role and the I / O device BAR, such that different mappings can be selected by varying the mapped value. Each VF driver obtains the mapped value from the global CSR and maps the BAR of the VF driver specified for the BAR role to the corresponding I / O device BAR of the virtual function according to the mapping defined by the mapped value. The mapping between the BAR of the VF driver designed for the BAR role and the corresponding I / O device BAR of the virtual function can be adapted by adapting the mapped value. For example, the BAR for MSI-X can be mapped to the I / O device BAR 4-5 for one mapped value, and for another mapped value, the BAR for MSI-X can be mapped to the I / O device BAR 2-3.

[0046] At least some implementations of the methods, apparatus, and / or code instructions described herein solve the technical problem of improving the efficiency of upgrading I / O devices whose hardware resources are virtualized and used by VF drivers running on VM machines. The standard method locks the PF driver and / or VF driver to the I / O device. Different versions of the same I / O device can map different BARs of these virtual functions to different roles. Changes to the mapping of the I / O device in its new version require upgrading / new installing the PF driver and / or VF driver to correspond to the new mapping of the BAR to role of the virtual functions in the new I / O device. In some environments, such as cloud-based environments where a large number (e.g., thousands) of VMs are running and each VM has a corresponding VF driver, when the I / O device changes, each VF driver needs to be upgraded / new installed.

[0047] This problem is particularly significant in data centers, such as cloud services, where a large number of VMs (e.g., thousands) are executed. In addition, the code executed on the VMs can be imported by external customers using the cloud service. Maximizing the compatibility between the capabilities of the hardware devices available to the VMs and the capabilities expected by the VMs helps improve performance by maximizing the number of capabilities and / or parameters of the capabilities that the VMs can execute on the underlying hardware devices.

[0048] At least some implementations of the systems, methods, and code instructions described herein provide a technical solution to a technical problem by, in the case of a change in the mapping between virtual functions and roles of the BAR for each change in the I / O device, the VF driver does not need to be upgraded by installing a new version to reflect the new mapping of the new I / O device. By changing the mapping value to reflect the new mapping of the new I / O device, the VF driver performs the corresponding mapping for the new I / O device.

[0049] Before explaining in detail at least one embodiment of the present invention, it should be understood that the present invention is not necessarily limited to the details of the construction and arrangement of components and / or methods set forth in the following description and / or the accompanying drawings and / or examples when applied. The present invention can have other embodiments or can be practiced or carried out in various ways.

[0050] The present invention can be a system, a method, and / or a computer program product. The computer program product can include a computer-readable storage medium (or media) having computer-readable program instructions thereon that cause a processor to perform aspects of the present invention.

[0051] The computer-readable storage medium can be a tangible device capable of retaining and storing instructions for use by an instruction execution device. The computer-readable storage medium can be, but is not limited to, for example, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing devices.

[0052] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to a corresponding computing / processing device, or downloaded to an external computer or external storage device via a network such as the Internet, a local area network, a wide area network, and / or a wireless network.

[0053] The computer-readable program instructions may be executed entirely on the user's computer, partially on the user's computer; executed as a stand-alone software package partially on the user's computer and partially on a remote computer, or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer via any type of network connection, including a local area network (LAN) or a wide area network (WAN), and may also be connected to an external computer (e.g., via the Internet using an Internet service provider). In some embodiments, an electronic circuit, such as a programmable logic circuit, a field-programmable gate array (FPGA), or a programmable logic array (PLA), may personalize the electronic circuit by utilizing the status information of the computer-readable program instructions and execute the computer-readable program instructions to perform aspects of the present invention.

[0054] Aspects of the present invention are described herein in conjunction with the flowchart illustrations and / or block diagrams of the methods, apparatus (systems), and computer program products provided in the embodiments of the present invention. It should be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer-readable program instructions.

[0055] The flowcharts and block diagrams in the figures illustrate the structure, functionality, and operation of possible implementations of the systems, methods, and computer program products provided by various embodiments of the present invention. In this regard, each block in the flowchart or block diagram may represent a module, segment, or portion of instructions, which includes one or more executable instructions for implementing one or more specified logical functions. In some alternative implementations, the functions described in the blocks may not be implemented in the order illustrated in the figures. For example, in fact, two consecutive blocks shown may be executed substantially simultaneously, or sometimes in the reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented by a system based on dedicated hardware that performs specific functions or actions, or by a combination of dedicated hardware and computer instructions.

[0056] Now refer to Figure 1 , Figure 1 FIG. 13 is a block diagram of components of a computing device 104 that maps between a BAR role and an I / O device BAR of a virtual function according to mapping values stored in a global CSR, according to some embodiments. Also refer to Figure 2 , Figure 2 FIG. 17 depicts, according to some embodiments, in combination with Figure 1Exemplary data flow between components of the described computing device 104. Also refer to Figure 3A , Figure 3A which is a flowchart of a method for setting mapping values and mapping according to mapping values according to some embodiments. Also refer to Figure 3B , Figure 3B which is a schematic diagram depicting the mapping between BAR roles and I / O device BARs of virtual functions according to mapping values according to some embodiments. Also refer to Figure 4 , Figure 4 which is a flowchart of an overall process method for establishing a virtual operating environment based on the mapping between BAR roles and I / O device BARs of virtual functions according to mapping values stored in the global CSR according to some embodiments. Also refer to Figure 5 , Figure 5 which depicts an exemplary virtualization environment 502 according to some embodiments, where the mapping between BAR roles and I / O device BARs of virtual functions is performed according to mapping values stored in the global CSR. In combination with FIGS. 3 to Figure 5 The features described can be implemented by components of the computing device 104 in combination with Figure 1 and / or Figure 2 described, for example, by one or more processors 102 of the computing device 104 executing code instructions (e.g., code 106A) stored in the memory 106.

[0057] The computing device 104 can be implemented as one or more of the following: a computing cloud, a single computing device (e.g., a client terminal), a group of computing devices arranged in parallel, a network server, a local server, a remote server, a client terminal, a mobile device, a fixed device, a kiosk, a smart phone, a laptop computer, a tablet computer, a wearable computing device, a glasses computing device, a watch computing device, and a desktop computer, etc.

[0058] One or more processors 102 are implemented as one or more central processing units (CPUs), one or more graphics processing units (GPUs), one or more field programmable gate arrays (FPGAs), one or more digital signal processors (DSPs), one or more application specific integrated circuits (ASICs), one or more custom circuits, processors for interfacing with other units, and / or dedicated hardware accelerators, etc. One or more processors 102 can be implemented as a single processor, a multi-core processor, and / or a cluster of processors arranged for parallel processing (which can include homogeneous and / or heterogeneous processor architectures).

[0059] The memory 106 stores code instructions that can be implemented by one or more processors 102. The memory 106 is implemented as a random access memory (RAM), a read-only memory (ROM), and / or a storage device, etc., such as a non-volatile memory, a magnetic medium, a semiconductor memory device, a hard disk drive, a removable memory, and an optical medium (e.g., DVD, CD-ROM).

[0060] The memory 106 may store a virtual machine monitor (VMM) 108 that manages and / or runs one or more virtual machines (VMs) 110. The VMM 108 may be implemented as a hypervisor. The VMM 108 may be implemented in hardware, software, firmware, and / or a combination of the above.

[0061] Each VM 110 executes one or more virtual function (VF) drivers 112.

[0062] Mapping values 160 that define a plurality of mappings between the BAR roles of the virtual functions 128 and the I / O device BAR 126 may be stored on a memory of, for example, an I / O device 114.

[0063] Each VF driver is provided access to a corresponding BAR 120 of the VF driver, which is designated for a plurality of BAR roles and mapped according to the mapping values 160, as described herein.

[0064] Optionally, access to one or more of the following: the BAR 132 of the PF driver, the BAR 120 of the VF driver, the global CSR 122, and the global VF BAR register 124 may be via MMIO access mapped on a computing device 104 (e.g., acting as a host), but accessing the memory is via the I / O device 114 because the BAR 132 120 124 and CSR 122 are memory-mapped registers. The computing device 104 (e.g., the host) interfaces with the BARs 132 120 124 and CSR 122 that may be physically located on the I / O device 114 via the corresponding mapped BAR 120A of the VF driver and the mapped BAR 132A of the PF driver that is locally located on the computing device 104. The computing device 104 may access the global CSR 122 via the BAR.

[0065] One or more global CSRs 122 store mapping values that define the mappings, as described herein. Optionally, each of the plurality of global VF BAR registers 124 stores its own mapping value, which may be a mirror of the mapping value stored in the global CSR 122, and / or set independently, as described herein.

[0066] The computing device 104 includes and / or communicates with one or more I / O devices 114. The I / O devices 114 can be input / output (I / O) devices such as universal serial bus, network adapters (for wired and / or wireless networks), network interface cards, accelerators, graphics devices, and storage devices.

[0067] The I / O device 114 includes an I / O device BAR 126 for virtual functions 128, as described herein. The I / O device BAR 126 is mapped to a BAR role, as described herein.

[0068] Each I / O device 114 is associated with one or more physical function (PF) drivers 116. The I / O device 114 includes a physical function 130 corresponding to the VF function driver 116, as described herein. The VF function driver 116 can access the BAR 132 of the PF driver, as described herein.

[0069] The computing device 104 can include one or more data storage devices 118 and / or communicate with the one or more data storage devices. The data storage devices 118 can store, for example, different versions of VMs, VF drivers, PF drivers, and / or VMMs and / or other data. It should be noted that code instructions can be selectively loaded from the data storage device 118 into the memory 106 for execution by one or more processors 102. The one or more data storage devices 118 can be implemented as a memory, a local hard disk drive, a removable storage unit, an optical disk, a storage device, and / or implemented as a remote server and / or a computing cloud (e.g., accessed via a network connection), etc.

[0070] The computing device 104 can communicate with a network 152, such as the Internet, a local area network, a virtual network, a wireless network, a cellular network, a local bus, a point-to-point link (e.g., wired), and / or a combination of the above.

[0071] The computing device 104 can include a network interface for communicating with the network 152. The network interface can be implemented as one or more of the I / O devices 114 having associated one or more PF drivers 116. The network interface can be virtualized for use by multiple VMs 110 via corresponding VF drivers 112 that are executed. For example, different VMs 110 can access the network 152 through one or more VF drivers 112 that communicate with one or more PF drivers 116 of the network interface.

[0072] The computing device 104 may include one or more physical user interfaces 150 and / or communicate with the one or more physical user interfaces, which include mechanisms for user interaction, such as inputting data (e.g., selecting a version of a VF to load) and / or viewing data (e.g., viewing a mapping).

[0073] Exemplary physical user interfaces 150 include one or more of a touch screen, a display, a gesture-activated device, a keyboard, a mouse, voice-activated software using speakers and microphones, and a coordinator that sends data via a network interface, among others.

[0074] Now referring back to Figure 2 The I / O device 114 is virtualized via the PF driver 116. The physical resources of the I / O device 114 are partitioned and are accessible and usable by multiple VMs 110A-D via the corresponding VF drivers 112A-D that are executed. Each VF driver 112A-D communicates with the PF 116 associated with the I / O device 114. The VF drivers 112A-D can be used without regard to the actual underlying I / O device 114 that is being used.

[0075] The VF drivers 112 and the PF driver 116 are defined, for example, by the high-speed PCI (PCIe) format, particularly the single-root input / output (I / O) virtualization (SR-IOV) feature of PCIe. SR-IOV enables the allocation of resources of the I / O device 114 (e.g., a network adapter) for use by multiple VMs 110A-D. For example, the memory and / or the network ports of the I / O device 114, such as a network adapter, are partitioned and shared by the VF drivers 112A-D. The network traffic flows between each VF 112A-D and the PF 116 can be differentiated and identified, allowing memory and / or interrupt translation to be applied between the corresponding VF 112A-D and PF 116. The network traffic flows can flow between the PF 116 and each corresponding VF 112A-D without affecting the VF. The network traffic can achieve performance approaching that of a bare-metal (i.e., non-virtualized) performance.

[0076] Optionally, the VF drivers 112A-D are implemented as Adaptive Virtual Function (AVF) drivers and / or Assignable Device Interface (ADI). As used herein, the term AVF may sometimes refer to the term ADI, and / or be interchangeable with that term. Multiple instances of AVF and / or ADI are implemented on multiple VMs 110. The instances of AVF and / or ADI are mapped to a single common PF driver 116. The instances of AVF and / or ADI are adapted simultaneously and similarly. AVF is adapted to the changing capabilities of the Physical Function driver (PF) associated therewith. Using AVF enables updating the PF without having to update all the relevant VF drivers. AVF has a single common device ID and vendor string. The Adaptive Virtual Function (AVF) may be implemented as an SR-IOV virtual function having the same device ID on different vendor I / O devices 114. In some implementations, the AVF driver is a VF driver that supports all future vendor devices without requiring VM updates. For the AVF driver, each new drop of the VF driver adds additional advanced capabilities, which can be launched in the VM in a device-agnostic manner without compromising the basic functions when the underlying HW device supports these advanced capabilities.

[0077] Now refer back to Figure 3A , at 302, the VMM is executed. The VMM includes code for implementing the PF driver and multiple BAR roles supported by the virtual functions exposed by the I / O device. The I / O device provides virtualized hardware resources for use by the VF drivers of the VMs. The PF driver and the virtual functions correspond to the VF drivers implemented by the VMs.

[0078] At 304, the PF driver is loaded.

[0079] At 306, the I / O device is started and / or reset, e.g., the I / O device is upgraded to a new version.

[0080] Optionally, the I / O device implements a protocol for virtualizing its hardware resources based on the Peripheral Component Interconnect Express (PCIe) standard. PCIe can implement Single Root I / O Virtualization (SR-IOV). The PCIe BAR enumeration process that occurs when PCIe is initialized includes all possible BAR regions for the PF driver and VFs (without knowing their roles). The implementations described herein are compatible with the PCIe enumeration process and do not require re-enumerating PCIe.

[0081] The start and / or reset of the I / O device may include an SR-IOV enablement process and / or a VF driver exposure operation. Remapping may be dynamically performed in response to SR-IOV enablement and / or VF driver exposure.

[0082] At 308, the global CSR is set to a mapping value that defines the mapping between the BAR of the I / O device that roles the BAR and virtual functions. This mapping is one of multiple different possible mappings. Changing the mapping value changes the mapping.

[0083] The mapping value can be stored in the flash memory (e.g., NVM) of the I / O device.

[0084] The mapping can be set by the PF driver and / or the I / O device.

[0085] Optionally, the mapping value is set according to the corresponding version of the I / O device. Different mapping values that define different mappings are set for different versions of the I / O device. The mapping according to the version of the I / O device provides backward compatibility for different versions of the I / O device, and / or can support maintaining the same device ID for different versions of the I / O device.

[0086] Optionally, the global CSR is in a constant position that does not change during one or more of the following: subsequent startup, reset, initialization process, change in I / O device identification, and change in I / O device version. Using the fixed position of the global CSR enables the enabling driver to know in advance where to find the mapping, enabling computationally efficient and automatic mapping triggered by events such as startup and / or reset and / or initialization.

[0087] Optionally, a single global CSR is set.

[0088] Alternatively, each of multiple global VF CSRs is set. Each global VF CSR is assigned to one of multiple VF drivers. Each global VF CSR can be independently set to a corresponding mapping value implemented by the corresponding VF driver. Using global registers for each VF driver can provide finer control, enabling different mappings for different VF drivers. For example, different versions of VF drivers can provide different mappings, enabling backward compatibility.

[0089] Alternatively or in addition, a plurality of global role CSRs are provided. Each global role CSR corresponds to a subset (e.g., one or more) of the BAR roles. Each of the global role CSRs may be set with a corresponding role mapping value that defines a certain mapping (selected from a plurality of alternative mappings) between a certain role (or subset of roles) and one or more I / O device BARs of the virtual function. The plurality of global role CSRs may provide additional control over a single role mapping, thereby enabling adjustment of the mapping of each BAR role independently of other BAR roles. Positioning the global CSRs consistently on the same BAR enables the use of the same VF driver each time. If the global CSRs are located on different BARs at each startup (or other event), different VF drivers are required each time.

[0090] Alternatively or in addition, the mapping values of the global CSRs are mirrored to each of the plurality of global VFCSRs specified for the VF driver. The mirroring enables selection of which VF drivers to update based on the mapping values. For example, some VF drivers are not updated in response to the mapping values.

[0091] Different implementation manners of the mapping values that define the corresponding mappings may be implemented. The mapping defined by the mapping values may be implemented using computationally efficient data structures, and / or implemented within the mapping values themselves, such that the mapping values themselves provide the mapping and another data structure is not necessarily required. The implementation manner may be selected for each update of the new mapping. Exemplary implementation manners include:

[0092] · A data set that maps between the mapping values and the mappings. For example, one array stores different mapping values, another array stores alternative mappings, and a pointer points between the two arrays. In another example, a table is used, where one column stores the mapping values and another column stores the mappings, and each row maps between the mapping values and the mappings.

[0093] · A conditional code that selects a mapping based on the mapping value. The conditional code may be implemented using an if...then structure. For example, if the mapping value = the first value, the first mapping is implemented, and if the mapping value = the second value, the second mapping is implemented.

[0094] · A bitmap and / or bit array, where each bit corresponds to a different mapping. The mapping value may indicate the index of the bitmap and / or array used to obtain the corresponding mapping.

[0095] · The mapping value itself can be set according to a predefined structure that defines the mapping, without necessarily requiring additional data that defines the mapping. For example, positions within the mapping value corresponding to different mappings. For example, the mapping value is structured into multiple regions (e.g., elements of an array, each region having a predefined number of bits), where each region corresponds to a respective BAR role. The value stored within the corresponding region indicates the I / O device BAR of the virtual function. In another example, each region corresponds to a respective I / O device BAR of the virtual function, and the value stored within the corresponding region indicates the BAR role of the corresponding mapping.

[0096] At 310, the PF driver can negotiate a mapping with the I / O device to enable support for a backward compatibility version. The PF driver can send a request message to the I / O device. The request indicates a change in the mapping between one or more of the BAR roles and one or more of the I / O device BARs of the virtual function. Alternatively or additionally, the request indicates a change in the mapping between one or more of the BAR roles and one or more of the I / O device BARs of the physical function. The I / O device can approve or reject the request. In response to approval of the request, the mapping value of the global CSR is set according to the change in the mapping defined by the request.

[0097] At 312, optionally, the PF driver obtains the mapping value from the global CSR. The global CSR can be set to the mapping value by the I / O device using the mapping value stored on the I / O device. The PF driver sets the BAR address of the PF driver specified for the BAR role to the corresponding BAR of the virtual function mapped to the BAR role according to the mapping corresponding to the mapping value. For each change in the I / O device, where there is a change in the mapping between the virtual function and the BAR of the role, the PF driver does not need to be upgraded by installing a new version to reflect the new mapping of the new I / O device. By changing the mapping value to reflect the new mapping of the new I / O device, the PF driver performs the corresponding mapping for the new I / O device.

[0098] At 314, load and / or reset the VF driver corresponding to the PF driver. The loading and / or resetting of the VF driver may occur after the global CSR is set with the mapping value to enable the VF driver to automatically access the mapping value.

[0099] At 316, each respective VF driver obtains the mapping value of the global CSR. Alternatively, each VF driver obtains the mapping value from the corresponding global VF BAR mirrored to the global CSR.

[0100] Each respective VF driver maps the BAR of the VF driver specified for the BAR role to the corresponding I / O device BAR of the virtual function according to the mapping defined by the mapping value, where these virtual functions are mapped to the BAR role.

[0101] Optionally, when multiple global VF BARs are assigned to a VF driver, e.g., each VF driver corresponds to its own dedicated global VF BAR, each VF driver obtains its corresponding mapping value from its corresponding global VF BAR. Each corresponding VF driver maps the BAR of the VF driver specified for the role to the corresponding I / O device BAR of the virtual function according to the mapping defined by the corresponding mapping value, and these virtual functions are mapped to the BAR role.

[0102] Optionally, when multiple global role CSRs are set, where each global role CSR corresponds to a subset of one or more in the BAR role, each corresponding VF driver obtains the corresponding role mapping value from the corresponding global role CSR. For example, each VF driver accesses each of the global role CSRs to obtain a set of mapping values. Each VF driver maps the BAR of the VF driver specified for each corresponding role according to the corresponding mapping value.

[0103] Optionally, multiple instances of AVF and / or ADI are implemented as VF drivers. When the VF driver is specific to hardware (e.g., of an I / O device), AVF is designed to run on any type of hardware rather than being specific to hardware.

[0104] At 318, each of the VF drivers accesses the region of the memory assigned to each of the BAR roles using the mapping of the BAR of the virtual function specified for the BAR role.

[0105] Now refer back to Figure 3B , the schematic diagram 340 depicts the I / O device BARs 0 - 5 (350 - 355) of the virtual functions opened by the I / O device before initialization. The mapping value 360 (represented as the global_csr_value 360) is set to 0x11 (represented by 362).

[0106] The pseudocode 364 represents an exemplary implementation of selecting the mapping for the BAR roles MSIX_BAR_0 and MSIX_BAR_1 based on the mapping value 360. If the mapping value 360 is equal to 0x11 (362), then MSI_BAR_0 is set to I / O device BAR 4 (354), and MSIX_BAR_1 is set to I / O device BAR 5 (355), e.g., corresponding to version 2 of the I / O device 370. Alternatively, for other mapping values 360 (i.e., not 0x11 (362)), then MSI_BAR_0 is set to I / O device BAR 2 (352), and MSIX_BAR_1 is set to I / O device BAR 3 (353), e.g., corresponding to version 1 of the I / O device 372.

[0107] The I / O device version 2 (370) can be an upgrade of the I / O device version 1 (372), for example, different versions of the same silicon, or different devices from the same vendor (e.g., different generations). In the I / O version 2 (370), the BAR role CSR space 380 is allocated to the I / O device BAR 0 (350), the BAR role mailbox space 382 is allocated to the I / O device BAR 1 (351), the BAR role doorbell space 384 is allocated to the I / O device BARs 2 - 3 (352 - 3), and the BAR role MSI-X space 386 is allocated to the I / O device BARs 4 - 5 (354 - 5). In the I / O version 1 (372), the BAR role CSR space 380 is allocated to the I / O device BAR 0 (350), the BAR role mailbox space 382 is allocated to the I / O device BAR 1 (351), the BAR role doorbell space 384 is allocated to the I / O device BARs 4 - 5 (354 - 5), and the BAR role MSI-X space 386 is allocated to the I / O device BARs 2 - 3 (352 - 3).

[0108] Using standard methods, the PF driver and the VF driver need to be updated to correspond to the changes between the I / O device version 1 (372) and the I / O device version 2 (370), for example, downloading, recompiling, and reloading on each VM, which requires a lot of work and is very inefficient. Alternatively, using at least some of the embodiments described herein, for example, based on the version of the I / O device, the mapping between the BAR role (the MSIX role is shown as an example) and the I / O device BARs 350 - 355 of the virtual function is selected according to the mapping value 360. When implementing the mapping value 360, the existing installed VF driver and / or PF driver can be maintained as described herein.

[0109] The mapping value 360 can be set according to the version of the I / O device (e.g., by the I / O device itself and / or the PF driver). For example, when the PF driver determines that the installed I / O device is version 2 (370), the PF driver and / or the I / O device set the global CSR to the mapping value 0x11.

[0110] Now referring back to Figure 4 At 400, the VF (which can alternatively be implemented as an AVF) and / or ADI (the terms VF driver and ADI can be interchanged) probe function is executed.

[0111] At 401, the global CSR set to the mapping value (as described in conjunction with Figure 3A ) is read. The mapping of the BAR is performed based on the mapping value as described herein.

[0112] At 402, the VF driver and / or the ADI are initialized. For example, the VM may initialize the VF driver corresponding to the desired capabilities of the I / O device, e.g., load a new version of the VF driver to provide additional capabilities enabled on the I / O device. For example, initialization may occur upon reset and / or startup of the VM, VF driver, PF driver, and / or the hardware device.

[0113] Each VF driver obtains a mapping value from the global CSR and performs the mapping corresponding to the mapping value, as described in conjunction with Figure 3A that which is

[0114] At 404, communication between the VF driver and the PF driver corresponding to the I / O device is initiated. Optionally, the VF driver initiates communication with the PF driver.

[0115] At 406, the VF driver sends a message to the PF driver with request parameters for capabilities requested and / or supported by the VF driver to be enabled on or by the I / O device. The VF may request capabilities in the message to be enabled on the hardware device for the VF and / or an open virtual interface to the hardware device for the VF.

[0116] These capabilities may include a set of basic capabilities and / or another set of advanced capabilities. Some implementations of VF drivers (e.g., AVF) define a minimum feature set referred to as "basic mode", but may provide additional advanced capabilities based on the capabilities available in the PF associated with the AVF. Basic mode includes a set of basic capabilities on the PF driver and the I / O device for use by the VF driver. As a standard, basic capabilities can be assumed to be available on the hardware device. Examples of basic capabilities of a wired network adapter include basic receive and transmit queues for data transfer, signaling events sent to software, basic stateless operations such as checksum, segmentation offload, jumbo frames, RSS, etc.

[0117] At 408, the VF driver and the PF driver may enable the set of basic capabilities for operation in basic mode.

[0118] The VF driver may send another message to the PF driver with request parameters for advanced capabilities requested and / or supported by the VF driver to be enabled on or by the I / O device.

[0119] At 414, each advanced feature is processed independently to determine whether the PF driver and the I / O device support the advanced feature.

[0120] At 416, each capability (e.g., advanced feature) supported by the PF driver and the I / O device is enabled (e.g., started) by the I / O device and the PF driver for use by the VF driver. At 418, iterate through the features described in 414 and / or 416. The iteration can be performed to enable each corresponding advanced capability, or to disable the corresponding advanced capability.

[0121] At 420, the enabling of the capabilities is completed. The VF driver can use the BAR role mapping to use the enabled functions, as described herein.

[0122] Now refer back to Figure 5 、Scalable I / O virtualization (S-IOV) can be implemented in a virtualization environment 502. The mapping between the BAR role and the I / O device BAR of the virtual function is based on the mapping value stored in the global CSR, as described herein.

[0123] The virtualization environment 502 includes one or more of the following exemplary components:

[0124] The user space 504 includes one or more VMs 506, each of which implements a virtual network interface controller (vNic) driver 508 that communicates with the ADI 516. It should be noted that no VFs are implemented in the scalable IOV virtualization environment 502. Instead of using the ADI.

[0125] The hypervisor / host kernel space 510 includes a PF driver 512, a virtual device (VDEV) 514 that implements one or more assignable device interfaces (ADIs) 516, and a virtual device composition module (VDCM) 518. The virtual device composition module 518 can provide a software management resource mapping between the VDEV 514 and the ADI 516.

[0126] The input / output memory management unit (IOMMU) 550 and the direct memory access (DMA) 520 with process address space ID (PASID) remapping code implement one or more ADIs 516 and PF 520. Each ADI 516 is tagged with a unique PASID.

[0127] The I / O device is implemented as a network card (NETC) 522. The NETC 522 can conform to PCIe. The hardware resources of the NETC 522 are virtualized via the ADI 516, enabling each of the multiple VMs 506 to access its own allocated ADI 516 to receive and / or transmit traffic via the attached network, e.g., via one or more corresponding queues (Q) 524.

[0128] The NETC 522 includes a set of PF base address registers (BARs) 526 mapped to the ADI 516. Each ADI 516 can access a different isolated portion of the PF BAR 526 and cannot access other portions of the PF BAR 526. The NETC 522 can include additional registers, such as PF configuration (Conf) registers 528 and MSI-X registers 530.

[0129] Using software to virtualize the resources of the NETC 522 can deliver near bare-metal performance.

[0130] The virtual device combination module 518 can provide slow path enumeration (represented by the dashed line 532) and fast path enumeration (represented by the solid line 534) pass-through. The slow path enumeration (represented by the dashed line 532) is performed by software. The fast path enumeration (represented by the solid line 534) is performed by hardware allocated for direct access. DMA provides isolation between the fast paths. Each vNic driver 508 is provided with an isolated fast path to the partitioned resources of the NETC 522 via DMA, using the corresponding unique PASID via its allocated ADI 516.

[0131] After studying the following drawings and detailed description, other systems, methods, features, and advantages of the present invention will be or become apparent to those skilled in the art. It is intended that all such other systems, methods, features, and advantages be included in this specification, within the scope of the present invention, and protected by the appended claims.

[0132] The description of the various embodiments of the present invention is for illustrative purposes only and is not intended to be exhaustive or limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terms used herein are chosen to best explain the principles, practical applications, or technical advancements of the embodiments, or to enable other skilled artisans in the art to understand the embodiments disclosed herein, as compared to the technologies existing in the market.

[0133] It appears that during the term of the patents that expire on this application, many related drivers will be developed, and the scope of the term driver is intended to include all such new technologies a priori.

[0134] As used herein, the term "about" means ± 10%.

[0135] The terms "comprising," "having," and variations thereof mean "including but not limited to." This term encompasses the terms "consisting of" and "consisting essentially of."

[0136] The phrase "consisting essentially of" means that a composition or method may include additional ingredients and / or steps, provided that the additional ingredients and / or steps do not materially change the basic and novel characteristics of the claimed composition or method.

[0137] Unless the context clearly dictates otherwise, the singular forms "a," "an," and "the" as used herein include plural referents. For example, the term "complex" or "at least one complex" may include multiple complexes, including mixtures thereof.

[0138] As used herein, the word "exemplary" means "serving as an example, instance, or illustration." Any embodiment described as "exemplary" is not necessarily to be construed as preferred or more advantageous than other embodiments, and / or excludes combinations of features of other embodiments.

[0139] As used herein, the word "optionally" means "provided in some embodiments and not provided in other embodiments." Any particular embodiment of the invention may include a plurality of "optional" features, except in cases where such features are mutually exclusive.

[0140] In this application, various embodiments of the invention may be presented in a range format. It should be understood that the description in range format is merely for convenience and brevity and should not be construed as a fixed limitation on the scope of the invention. Thus, the description of a range should be considered to have specifically disclosed all possible sub-ranges as well as the individual numerical values within that range. For example, a description of a range such as from 1 to 6 should be considered to have specifically disclosed sub-ranges such as from 1 to 3, from 1 to 4, from 1 to 5, from 2 to 4, from 2 to 6, from 3 to 6, etc., as well as the individual numbers within that range, e.g., 1, 2, 3, 4, 5, and 6. This applies regardless of how broad the range is.

[0141] When a numerical range is indicated herein, it is meant to include any recited number (fractional or integral) within the indicated range. The phrases "a range between a first indicated number and a second indicated number" and "a range from a first indicated number to a second indicated number" are used interchangeably herein to mean including the first and second indicated numbers and all fractional and integral numbers therebetween.

[0142] It should be understood that, for the sake of brevity of description, certain features of the present invention described in the context of separate embodiments may also be provided in combination in a single embodiment. Conversely, for the sake of brevity of description, the various features of the present invention described in the context of a single embodiment may also be provided separately or in any suitable sub-combination or as any other suitable embodiment of the present invention. Certain features described in the context of various embodiments are not considered to be essential features of these embodiments unless the embodiment is inoperable without these elements.

[0143] Here, all publications, patents, and patent applications mentioned in this specification are incorporated herein by reference in their entirety, and similarly, each individual publication, patent, or patent application is specifically and individually incorporated herein by reference. In addition, the citation or identification of any reference to this application should not be taken as allowing such reference to take precedence over the present invention in the prior art. With respect to the use of section headings, the section headings should not be construed as necessarily limiting.

Claims

1. A computing device (104) that communicates with an input / output (I / O) device (114), characterized in that, The I / O device provides virtualized hardware resources for use by multiple virtual function (VF) drivers (112) of multiple virtual machines (VMs) (110), and the computing device is configured to: Execute a virtual machine manager (VMM) (108), which implements a physical function (PF) driver (116) and multiple base address register (BAR) roles, where the multiple BAR roles are supported by the multiple virtual functions (128) exposed by the I / O device, the multiple virtual functions (128) corresponding to the multiple VF drivers (112) implemented by the PF driver (116) and the multiple VMs (110), and a BAR role in the multiple BAR roles is used to indicate the destination to which the corresponding BAR is assigned; In response to startup or reset of the I / O device and loading of the PF driver: Set a global configuration status register (CSR) (122) to a mapping value (160) by at least one of the PF driver and the I / O device, the mapping value defining a certain mapping among multiple mappings between the multiple BAR roles and I / O device BARs (126) of the multiple virtual functions (128), and in response to the setting, load the multiple VF drivers (112) corresponding to the multiple virtual functions (128) of the PF driver (116); Wherein each respective VF driver obtains the mapping value of the global CSR and maps multiple BARs (120) of the VF driver specified for the multiple BAR roles to the corresponding I / O device BARs (126) of the multiple virtual functions according to the certain mapping, and the multiple virtual functions are mapped to the multiple BAR roles.

2. The computing device according to claim 1, wherein The mapping value is stored on the I / O device, and the mapping value of the global CSR is set by the I / O device. The computing device is further configured to: Obtain the mapping value, and The PF driver sets the addresses of multiple BARs (132) of the PF driver specified for the multiple BAR roles to the corresponding BARs of the multiple virtual functions according to the certain mapping corresponding to the mapping value, and the multiple virtual functions are mapped to the multiple BAR roles.

3. The computing device according to claim 1 or 2, characterized in that, The computing device is configured to: Issue a request for the PF driver to the I / O device, the request indicating a change in at least one mapping between at least one of the following: (i) at least one of the multiple BAR roles and at least one I / O device BAR (126) of the multiple virtual functions (128), and (ii) at least one of the multiple BAR roles and at least one I / O device BAR (126) of the multiple physical functions (130). In response to approval of the request, set the mapping value of the global CSR according to the change in the at least one mapping.

4. The computing device according to claim 3, wherein, The computing device is configured to: Mirror the mapping value of the global CSR to each of a plurality of global VF BAR registers (124) specified for the plurality of VF drivers. Wherein each respective VF driver obtains the mapping value from the corresponding respective global VF BAR register.

5. The computing device according to claim 4, wherein The PF driver, according to the certain mapping, maps each respective plurality of BARs specified for the plurality of BAR roles to the corresponding I / O device BARs of the plurality of virtual functions, and the plurality of virtual functions are mapped to the plurality of BAR roles, reflecting the mapping of the I / O device global CSR value.

6. The computing device according to claim 5, wherein The computing device is further configured to: At least one of the PF driver and the I / O device sets each of a plurality of global VF driver registers assigned to the plurality of VF drivers to a corresponding mapping value, wherein each respective VF driver obtains the corresponding mapping value from the one corresponding global VF BAR register and maps the plurality of BARs of the VF driver specified for the plurality of roles to the corresponding I / O device BARs of the plurality of virtual functions, and the plurality of virtual functions are mapped to the plurality of BAR roles.

7. The computing device according to claim 6, wherein The mapping value is set according to the corresponding version of the I / O device, wherein different mapping values defining different mappings are set for different versions of the I / O device.

8. The computing device according to claim 7, wherein The startup or reset of the I / O device includes at least one of single root input / output virtualization, SR-IOV, enabling, and VF driver exposure operations.

9. The computing device according to claim 8, wherein The global CSR includes a plurality of global role CSRs, each global role CSR corresponding to one of the plurality of roles, wherein each of the plurality of global role CSRs is set with a corresponding role mapping value of a certain mapping defining a plurality of mappings between a certain role and at least one I / O device BAR of the plurality of virtual functions, and each respective VF driver obtains the corresponding role mapping value from the plurality of global role CSRs and maps at least one BAR of the VF driver specified for each respective role.

10. The computing device according to claim 9, wherein The I / O device implements a protocol for virtualizing its hardware resources based on the Peripheral Component Interconnect Express (PCIe) standard.

11. The computing device according to claim 10, wherein, The PCIe implements SR-IOV.

12. The computing device according to claim 11, wherein The global CSR is located at a constant position that does not change during at least one member of the group consisting of: subsequent startup, reset, initialization process, change in identification of the I / O device, and change in version of the I / O device.

13. The computing device according to claim 12, wherein Multiple instances of self-adapting VFs, AVFs (112A-D), and / or assignable device interfaces (ADIs) (508) are implemented as the multiple VF drivers, and the multiple instances of the AVF are mapped to a PF driver implemented as a single common PF driver, wherein multiple BARs in the multiple VF drivers that can be implemented by the multiple instances of the AVF are mapped simultaneously.

14. The computing device according to claim 13, wherein The mapping value defines a certain mapping selected from at least one member of the group consisting of: a data set mapped between the mapping value and the multiple mappings, a condition code for selecting the certain mapping according to the mapping value, a bit mapping in which each bit corresponds to a different mapping, and a predefined structure of the mapping value that defines positions within the mapping value corresponding to different mappings.

15. A computing device (104) that executes a virtual machine (VM) (110), characterized in that, The computing device is configured to: Execute a virtual function (VF) driver (112) corresponding to a PF driver (116) and an input / output (I / O) device (1140) that provides virtualized hardware resources, In response to startup or reset of the VF driver: Access a mapping value stored in a global CSR (122), the mapping value defining a certain mapping of multiple mappings between multiple BAR roles opened by the I / O device and I / O device BARs (126) of multiple virtual functions (128), wherein the mapping value is set by at least one of the PF driver and the I / O device, and a BAR role among the multiple BAR roles is used to indicate the purpose to which a corresponding BAR is assigned; According to the certain mapping, map multiple BARs (120) of the VF driver specified for the multiple BAR roles to corresponding I / O device BARs of the multiple virtual functions, the multiple virtual functions being mapped to the multiple BAR roles, and Use the mapping of the multiple BARs of the VF specified for the multiple BAR roles to access memory regions assigned to each of the multiple BAR roles.

16. A method for providing virtualized hardware resources of an input / output (I / O) device for use by multiple virtual function (VF) drivers of multiple virtual machines (VMs), characterized in that, The method includes: Execute a virtual machine manager (VMM), where the VMM implements a physical function (PF) driver and multiple base address register (BAR) roles. Among them, the multiple BAR roles are supported by multiple virtual functions opened by an I / O device, the PF driver, and the multiple virtual function (VF) drivers corresponding to the multiple virtual functions implemented by the multiple VMs (302). The BAR role in the multiple BAR roles is used to indicate the destination to which the corresponding BAR is assigned; In response to the startup or reset of the I / O device (306) and the loading of the PF driver (304): At least one of the PF driver and the I / O device sets a global configuration status register (CSR) to a mapping value, and the mapping value defines a certain mapping (308) among multiple mappings between the multiple BAR roles and the I / O device BARs of the multiple virtual functions. Among them, in response to the setting, the multiple VF drivers corresponding to the multiple virtual functions of the PF driver are loaded, (314) Among them, each corresponding VF driver obtains the mapping value of the global CSR, and according to the certain mapping, maps multiple BARs of the VF driver specified for the multiple BAR roles to the corresponding I / O device BARs of the multiple virtual functions, and the multiple virtual functions are mapped to the multiple BAR roles (316).

17. A computer-readable storage medium storing program code, characterized in that, The program code includes instructions that, when executed on a computer, cause the computer to execute the method according to claim 16.

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