A microwave signal generating device with time-frequency domain signal agility

Abstract

The present invention discloses a microwave signal generating device with time-frequency domain signal agility, belonging to the technical field of frequency synthesis, and is used to solve the problem that existing single signals are vulnerable to detection and reverse active interference. It includes: an FPGA, a DDS chip, a first to third switching unit, a first mixer, a second mixer, and a frequency hopping source group; the DDS chip has a high-speed serial interface, and the FPGA serially configures the DDS chip through the high-speed serial interface to generate 4 waveform signals; the 4 signals are evenly divided into 2 groups, one group corresponding to the waveform signal IF1 is output to the first mixer, and one group corresponding to the waveform signal IF2 is output to the second mixer; the first switching unit is between the DDS chip and the first mixer, and the second switching unit is between the DDS chip and the second mixer; the frequency hopping source group is used to generate local oscillator signals of different frequencies and output them to the first mixer and the second mixer; the third switching unit is arranged between the first mixer, the second mixer and the frequency hopping source group. This device can achieve rapid agility of time-domain waveforms and carrier frequencies.

Description

Technical Field

[0001] The present invention belongs to the technical field of frequency synthesis, and particularly relates to a microwave signal generating device with time-frequency domain signal agility. Background Art

[0002] Ordinary coherent radars use multi-period pulse coherent integration methods to enhance the signal-to-noise ratio of target echoes. The repetition period of the radar transmitted signal is several hundred μs to several ms, and the pulse width is several μs to several hundred μs. During a specific time period, the time-domain waveform and carrier frequency of each period remain fixed. With the development of electronic warfare technology, signals with the above single characteristics are extremely vulnerable to detection and reverse active interference by other party's electronic devices. Summary of the Invention

[0003] In view of the above analysis, the present invention aims to provide a microwave signal generating device with time-frequency domain signal agility. The transmitted signal generated by this microwave signal generating device has the characteristics of time-domain waveform and carrier frequency agility, and can realize rapid switching between the main transmitted signal and the cover pulse signal. It is used to solve the following technical problems: Signals with existing single characteristics are extremely vulnerable to detection and reverse active interference by other party's electronic devices.

[0004] The purpose of the present invention is mainly achieved through the following technical solutions:

[0005] The present invention provides a microwave signal generating device with time-frequency domain signal agility. The microwave signal generating device includes: an FPGA, a DDS chip, a first switching unit, a second switching unit, a first mixer, a second mixer, a frequency hopping source group, and a third switching unit; where: The DDS chip has a high-speed serial interface, and the FPGA serially configures the DDS chip through the high-speed serial interface to generate 4 waveform signals; The 4 output signals are evenly divided into 2 groups, one group corresponding to the waveform signal IF1 and output to the first mixer, and the other group corresponding to the waveform signal IF2 and output to the second mixer;

[0006] The FPGA is further configured to control 2 channels in the same group to generate different forms of waveform signals and control the timing of the 2 channels within the same group during each serial configuration;

[0007] The first switching unit is arranged between the DDS chip and the first mixer and is used to realize the ping-pong switching of the same group of waveform signals IF1. The second switching unit is arranged between the DDS chip and the second mixer, and the second switching unit is used to realize the ping-pong switching of the same group of waveform signals IF2;

[0008] The frequency hopping source group is used to generate local oscillator signals of different frequencies and output them to the first mixer and the second mixer; the third switching unit is arranged between the first mixer, the second mixer and the frequency hopping source group, and the third switching unit is used for switching local oscillator signals of different frequencies to achieve free switching between different frequencies of the local oscillator signals output to the first mixer and the second mixer; the first mixer is used for superimposing the waveform signal IF1 and the local oscillator signal input by the frequency hopping source group to generate a microwave signal RF1; the second mixer is used for superimposing the waveform signal IF2 and the local oscillator signal input by the frequency hopping source group to generate a microwave signal RF2; the high-speed serial interface is an 8-bit high-speed serial interface.

[0009] Further, the first switching unit is configured as a first switch; the second switching unit is configured as a second switch.

[0010] Further, both the first switch and the second switch are single-pole double-throw switches.

[0011] Further, the DDS chip integrates 4 independent channels inside, namely the first channel, the second channel, the third channel and the fourth channel; the FPGA serially configures the registers of the 4 independent channels through the high-speed serial interface to generate 4 path waveform signals; among them, the first channel and the second channel correspondingly generate the waveform signal IF1, the third channel and the fourth channel correspondingly generate the waveform signal IF2. In each serial configuration process, the FPGA sets 2 channels in the same group to generate different forms of waveform signals and controls the timing of the 2 signals in the same group, and at the same time performs ping-pong switching on the first switch 1 and the second switch 2 to achieve seamless switching in the time domain between the waveform signals IF1 and IF2 among 2 kinds of waveform signals.

[0012] Further, the DDS chip is a GM4941 type DDS chip integrating 4 independent channels inside.

[0013] Further, the serial clock of the 8-bit high-speed serial interface is up to 200MHz at most, each clock transmits 8bit data, and the total duration for sequentially completing the configuration of all registers of the 4 channels does not exceed 5μs.

[0014] Further, the frequency hopping source group consists of a first frequency hopping source and a second frequency hopping source.

[0015] Further, the first frequency hopping source and the second frequency hopping source are independent of each other, and the frequency hopping time of both the first frequency hopping source and the second frequency hopping source is less than 10μs.

[0016] Further, the third switching unit is set as a third switch, and the third switch is a 2×2 microwave switch matrix, and the 2×2 microwave switch matrix enables the local oscillator signal of the RF1 or RF2 frequency conversion circuit to be freely switched between the first frequency hopping source and the second frequency hopping source at any time.

[0017] Furthermore, the switching speed of the 2×2 microwave switch matrix is less than 50 ns.

[0018] Compared with the prior art, the present invention can achieve at least one of the following beneficial effects:

[0019] a) The microwave signal generating device with time-frequency domain signal agility provided by the present invention realizes the grouped agility of time-domain waveforms by designing multi-channel serial high-speed communication and multi-channel switching; at the same time, in cooperation with the above-mentioned time-domain switching, the carrier is quickly switched by designing the combination of a frequency hopping source group and a microwave switch matrix. The device of the present invention realizes the fast agility characteristics of the time-domain waveform and the carrier frequency of the radar transmitting signal, and the transformation time of both the time-domain waveform and the carrier frequency is less than 50 ns.

[0020] b) The same group of waveform signals of the microwave signal generating device with time-frequency domain signal agility of the present invention can be respectively set as real signals and cover signals. In this way, the grouped agility of time-domain waveforms can be realized through the above-mentioned multi-channel serial high-speed communication and multi-channel switching method, that is, the real signal and the cover pulse signal can be quickly switched, and the real signal of the radar can be effectively covered during electronic countermeasures.

[0021] Other features and advantages of the present invention will be described in the following specification, and some of them will become obvious from the specification, or be understood by implementing the present invention. The objectives and other advantages of the present invention can be realized and obtained by the structure specifically pointed out in the written specification and the drawings. Description of the Drawings

[0022] The drawings are only for the purpose of showing specific embodiments, and are not considered as a limitation to the present invention. Throughout the drawings, the same reference numerals represent the same components.

[0023] Figure 1 is a schematic structural diagram of the microwave signal generating device with time-frequency domain signal agility of the present invention;

[0024] Figure 2 is a circuit structure block diagram of the 2×2 microwave switch matrix of the microwave signal generating device with time-frequency domain signal agility of the present invention;

[0025] Figure 3 is a circuit diagram of the 2×2 microwave switch matrix of the microwave signal generating device with time-frequency domain signal agility of the present invention.

[0026] Reference numerals:

[0027] 1 - First switch, 2 - Second switch, 3 - Third switch, 4 - First frequency hopping source, 5 - Second frequency hopping source. Detailed Embodiments

[0028] The preferred embodiments of the present invention will be specifically described below with reference to the accompanying drawings. The drawings form a part of the present invention and are used together with the embodiments of the present invention to explain the principles of the present invention. To enhance the understanding of the present invention, specific details are described in detail in the following preferred embodiments. For those skilled in the art, the present invention can be fully understood without these detailed descriptions. Except for special instructions, the device models in the embodiments of the present invention are not subject to other restrictions, as long as the devices that can perform the corresponding functions can be used. In addition, well-known elements, circuits, and methods are not described in detail to avoid unnecessary confusion to the essence of the present invention.

[0029] With the development of electronic warfare technology, signals with a single characteristic are extremely vulnerable to detection and reverse active interference by other parties' electronic devices. Through long-term in-depth research, the inventor found that: to enhance the electronic countermeasure ability of a radar, multiple cover pulse signals can be added before and after the main radar transmission signal. The time-domain waveform and carrier frequency of the cover signal need to be different from those of the main transmission signal, and the closer the cover signal is to the main transmission signal in the time domain, the greater the difference in carrier frequency, which is more conducive to deceiving and inducing other parties' devices and enhancing the anti-interference performance. This requires that the transmission signal of the radar has the characteristics of time-domain waveform and carrier frequency agility, and can quickly switch between the main transmission signal and the cover pulse signal to achieve rapid agility of the time-domain waveform and carrier frequency.

[0030] Combined with the above requirements, as Figure 1As shown in the figure, the present invention provides a microwave signal generating device with time-frequency domain signal agility. Among them, the microwave signal generating device includes: an FPGA, a DDS chip, a first switching unit, a second switching unit, a first mixer and a second mixer, a frequency hopping source group, and a third switching unit; where: The DDS chip has a high-speed serial interface, and the FPGA serially configures the DDS chip through the high-speed serial interface to generate 4 waveform signals; the 4 output signals are evenly divided into 2 groups, one group corresponds to the waveform signal IF1 and is output to the first mixer, and the other group corresponds to the waveform signal IF2 and is output to the second mixer; the FPGA is also used to control 2 channels in the same group to generate different forms of waveform signals and control the timing of the 2 signals in the same group during each serial configuration; the first switching unit is arranged between the DDS chip and the first mixer and is used to realize the ping-pong switching of the same group of waveform signals IF1, and the second switching unit is arranged between the DDS chip and the second mixer. The second switching unit is used to realize the ping-pong switching of the same group of waveform signals IF2; the frequency hopping source group is used to generate local oscillator signals of different frequencies and output them to the first mixer and the second mixer; the third switching unit is arranged between the first mixer, the second mixer and the frequency hopping source group, and the third switching unit is used for switching local oscillator signals of different frequencies to realize the free switching of the local oscillator signals output to the first mixer and the second mixer between different frequencies; the first mixer is used to superimpose the waveform signal IF1 and the local oscillator signal input by the frequency hopping source group to generate a microwave signal RF1; the second mixer is used to superimpose the waveform signal IF2 and the local oscillator signal input by the frequency hopping source group to generate a microwave signal RF2.

[0031] Specifically, in order to realize the waveform switching of different channels in the same group, the first switching unit is configured as the first switch 1; the second switching unit is configured as the second switch 2.

[0032] Specifically, both the first switch 1 and the second switch 2 are single-pole double-throw switches.

[0033] Specifically, in order to further generate 4 waveform signals, 4 independent channels are integrated inside the DDS chip, namely the first channel, the second channel, the third channel and the fourth channel; the FPGA serially configures the registers of the 4 independent channels through the high-speed serial interface to generate 4 waveform signals; among them, the first channel and the second channel correspond to generating the waveform signal IF1, and the third channel and the fourth channel correspond to generating the waveform signal IF2. During each serial configuration process, the FPGA is used to set 2 channels in the same group to generate different forms of waveform signals and control the timing of the 2 signals in the same group, and at the same time perform ping-pong switching on the first switch 1 and the second switch 2 to realize the seamless switching of the waveform signals IF1 and IF2 between 2 waveform signals in the time domain.

[0034] That is, the 4 output signals of the DDS are divided into 2 groups. The waveform signals IF1 correspond to the first and second channels, and the waveform signals IF2 correspond to the third and fourth channels. During each serial configuration process, different forms of waveform signals are set for the 2 channels within the same group. By controlling the timing of the 2 signals within the same group and performing ping-pong switching on the first switch 1 and the second switch 2, seamless switching in the time domain between 2 waveform signals can be achieved for IF1 and IF2 respectively.

[0035] For example, the waveform signals IF1 in the same group can be set as real signals and cover signals respectively. In this way, through the above-mentioned multi-channel serial high-speed communication and multi-channel switching methods, group agile change of the time-domain waveform can be achieved, that is, rapid switching between real signals and cover pulse signals can be realized.

[0036] Specifically, the waveform signals are generated based on the DDS circuit. For a single-channel DDS chip, the switching time of its output waveform signals depends on the DDS register configuration time and the internal pipeline delay of the chip. Among them, the register configuration time depends on the serial interface configuration rate and data bit width of the DDS, usually requiring several μs to dozens of μs; while the pipeline delay of the DDS chip is a fixed several hundred ns. Due to the existence of these two types of time delays, it is impossible to achieve rapid agile change of the output waveform signals in the time domain using a single-channel DDS. And when using a multi-channel DDS, there are also multi-chip synchronization problems, and at the same time, the volume and power consumption will increase significantly. In summary, through the design of the DDS circuit, the present invention can overcome the above technical problems and enable seamless switching in time between different waveforms of the output signals.

[0037] As a specific embodiment of the present invention, the DDS chip is a GM4941 type DDS chip internally integrated with 4 independent channels.

[0038] Preferably, the high-speed serial interface is an 8-bit high-speed serial interface.

[0039] More preferably, the serial clock of the 8-bit high-speed serial interface is up to 200 MHz at most, 8-bit data is transmitted per clock, and the total duration for sequentially completing the configuration of all registers of the 4 channels does not exceed 5 μs.

[0040] Specifically, in order to provide local oscillator signals of different frequencies, the frequency hopping source group is configured to be composed of a first frequency hopping source 4 and a second frequency hopping source 5.

[0041] As a specific embodiment of the present invention, both the first frequency hopping source 4 and the second frequency hopping source 5 are phase-locked frequency hopping sources.

[0042] Preferably, the hopping times of the first frequency hopping source 4 and the second frequency hopping source 5 are both less than 10 μs. Through this design method, it can be ensured that the local oscillator signal frequency provided by the same frequency hopping source at the next moment is different from the local oscillator signal frequency provided by this frequency hopping source at the previous moment.

[0043] In this embodiment, the hopping time can be designed by setting the phase discrimination frequency of the phase-locked loop of the frequency hopping source and the size of the loop bandwidth.

[0044] For example, if the phase discrimination frequency of the phase-locked loop is 20 MHz and the loop bandwidth is adjusted to 1 MHz bandwidth, the hopping time of the phase-locked frequency hopping source can be made less than 10 μs.

[0045] In the above embodiment, in order to enable the local oscillator signal of the RF1 or RF2 frequency conversion circuit to freely switch between the first frequency hopping source 4 and the second frequency hopping source 5, the third switching unit is set as the third switch 3, and the third switch 3 is a 2×2 microwave switch matrix. The 2×2 microwave switch matrix enables the local oscillator signal of the RF1 or RF2 frequency conversion circuit to freely switch between the first frequency hopping source 4 and the second frequency hopping source 5 at any moment.

[0046] As Figures 2-3 shown is the circuit diagram of the 2×2 microwave switch matrix. The internal circuit of the 2×2 microwave switch matrix is a planar layout. The device includes a first power divider, a second power divider, 4 single-pole single-throw switches (SPST) and 2 single-pole double-throw switches (SPDT); among them, the first output end of the first power divider is connected to the input end of the first single-pole single-throw switch SPST_1c, the output end of the first single-pole single-throw switch SPST_1c is connected to the first input end of the first single-pole double-throw switch SPDT_1, the second output end of the first power divider is connected to the input end of the third single-pole single-throw switch SPST_2c, and the output end of the third single-pole single-throw switch SPST_2c is connected to the first input end of the second single-pole double-throw switch SPDT_2; the first output end of the second power divider is connected to the input end of the second single-pole single-throw switch SPST_1d, the output end of the second single-pole single-throw switch SPST_1d is connected to the second input end of the first single-pole double-throw switch SPDT_1, the second output end of the second power divider is connected to the input end of the fourth single-pole single-throw switch SPST_2d, and the output end of the fourth single-pole single-throw switch SPST_2c is connected to the second input end of the second single-pole double-throw switch SPDT_2; the first power divider matches the first frequency hopping source 4, and the second power divider matches the second frequency hopping source 5. At any moment, the LO1 or LO2 signal can select the first frequency hopping source 4 or the second frequency hopping source 5, and the frequency hopping source selection of LO1 and LO2 is independent of each other and does not affect each other. The first frequency hopping source 4 and the second frequency hopping source 5 cooperate with the 2×2 microwave switch matrix to provide two paths of variable-frequency local oscillator signals LO1 and LO2 that can be of the same frequency or different frequencies.

[0047] Specifically, in the different-frequency mode, LO1 and LO2 need to meet the channel isolation index of 60 dB. The switch isolation of the SPDT in the circuit is generally 35 - 50 dB, which does not meet the isolation requirement of 60 dB. One SPST is connected in series on each branch before the SPDT. The isolation of the SPST is generally 35 - 50 dB. After the two-stage switches are cascaded, the switch isolation index better than 60 dB is achieved. In the same-frequency mode, LO1 and LO2 may simultaneously select the first frequency-hopping source 4, or may simultaneously select the second frequency-hopping source 5. At this time, LO1 and LO2 are required to have phase consistency. Since the power dividers, SPSTs, and SPDT devices of the same model and specification inherently have good phase consistency, in the circuit design, it is mainly necessary to control the phase consistency of the transmission lines, that is, the electrical length of the transmission lines. For Figure 3 For the circuit, the branch where the first power divider is connected to the first single-pole single-throw switch SPST_1c is the a1 signal branch, the branch where the first power divider is connected to the third single-pole single-throw switch SPST_2c is the a2 signal branch, the branch where the second power divider is connected to the second single-pole single-throw switch SPST_1d is the b2 signal branch, the branch where the second power divider is connected to the fourth single-pole single-throw switch SPST_2d is the b1 signal branch, the branch where the first single-pole single-throw switch SPST_1c is connected to the first single-pole double-throw switch SPDT_1 is the c1 signal branch, the branch where the second single-pole single-throw switch SPST_1d is connected to the first single-pole double-throw switch SPDT_1 is the d1 signal branch, the branch where the third single-pole single-throw switch SPST_2c is connected to the second single-pole double-throw switch SPDT_2 is the c2 signal branch, and the branch where the fourth single-pole single-throw switch SPST_2d is connected to the second single-pole double-throw switch SPDT_2 is the d1 signal branch; the a1 and b1 signal branches maintain equal electrical length; the a2 and b2 signal branches maintain equal electrical length; the c1 and d1 signal branches maintain equal electrical length; the c2 and d2 signal branches maintain equal electrical length. The above equal electrical length requirements are mainly controlled by controlling the printed circuit board transmission line length and designing the same perforation structure for different signal branches.

[0048] Preferably, the switching rate of the 2×2 microwave switch matrix is less than 50 ns. That is, since the switching rate of the high-speed switch in the switch matrix is less than 50 ns, the carrier frequency conversion time of RF1 or RF2 is less than 50 ns, realizing the frequency agility of the carrier frequency.

[0049] It should be noted that due to volume and power consumption limitations, it is not advisable to adopt a relatively complex direct frequency synthesis scheme for the frequency hopping source that provides the carrier signal. Instead, using a phase-locked frequency hopping source scheme not only has a simple circuit, a wide output frequency range, but also can ensure relatively high signal quality. However, the phase-locked frequency hopping source does not have the frequency agility characteristic, the frequency hopping time is on the order of dozens of μs, and the wider the bandwidth covered by the frequency hopping source, the longer the frequency hopping time. The present invention realizes fast carrier switching by designing the first frequency hopping source 4 and the second frequency hopping source 5 in cooperation with a 2×2 microwave switch matrix.

[0050] The test results show that this scheme realizes the fast frequency agility characteristics of the time-domain waveform and carrier frequency of the radar transmission signal, and the transformation time of both the time-domain waveform and the carrier frequency is less than 50 ns.

[0051] Compared with the prior art, the microwave signal generating device with time-frequency domain signal agility of the present invention realizes the grouped agility of the time-domain waveform by designing a multi-channel serial high-speed communication and multi-channel switching method; at the same time, in cooperation with the above time-domain switching, it realizes fast carrier switching by designing a combination of a frequency hopping source group and a high-speed microwave switch matrix. The device of the present invention realizes the fast frequency agility characteristics of the time-domain waveform and carrier frequency of the radar transmission signal, and the transformation time of both the time-domain waveform and the carrier frequency is less than 50 ns.

[0052] It should be emphasized that the term "comprising / including" when used herein refers to the presence of features, whole things, steps or components, but does not exclude the presence or addition of one or more other features, whole things, steps, components or combinations thereof.

[0053] The above method of the present invention can be implemented by hardware or by a combination of hardware and software. The present invention relates to such a computer-readable program that when executed by a logic component, can enable the logic component to implement the device or component described above, or enable the logic component to implement the various methods or steps described above. The present invention also relates to a storage medium for storing the above program, such as a hard disk, a magnetic disk, an optical disk, a DVD, a flash memory, etc.

[0054] The above is only a preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention.

Claims

1. A microwave signal generating device with time-frequency domain signal agility, characterized in that, The microwave signal generating device includes: an FPGA, a DDS chip, a first switching unit, a second switching unit, a first mixer, a second mixer, a frequency hopping source group, and a third switching unit; wherein: the DDS chip has a high-speed serial interface, and the FPGA serially configures the DDS chip through the high-speed serial interface to generate 4 waveform signals; the 4 output signals are evenly divided into 2 groups, one group corresponds to the waveform signal IF1 and is output to the first mixer, and the other group corresponds to the waveform signal IF2 and is output to the second mixer; The FPGA is further configured to control 2 channels in the same group to generate different forms of waveform signals and control the timing of the 2 signals in the same group during each serial configuration; The first switching unit is arranged between the DDS chip and the first mixer and is used to realize the ping-pong switching of the same group of waveform signals IF1. The second switching unit is arranged between the DDS chip and the second mixer, and the second switching unit is used to realize the ping-pong switching of the same group of waveform signals IF2; The frequency hopping source group is used to generate local oscillator signals of different frequencies and output them to the first mixer and the second mixer; the third switching unit is arranged between the first mixer, the second mixer and the frequency hopping source group, and the third switching unit is used for switching local oscillator signals of different frequencies to realize the free switching of the local oscillator signals output to the first mixer and the second mixer between different frequencies; the first mixer is used to superimpose the waveform signal IF1 and the local oscillator signal input by the frequency hopping source group to generate a microwave signal RF1; the second mixer is used to superimpose the waveform signal IF2 and the local oscillator signal input by the frequency hopping source group to generate a microwave signal RF2; the high-speed serial interface is an 8-bit high-speed serial interface.

2. The microwave signal generating device according to claim 1, wherein The first switching unit is configured as a first switch (1); the second switching unit is configured as a second switch (2).

3. The microwave signal generating device according to claim 2, wherein Both the first switch (1) and the second switch (2) are single-pole double-throw switches.

4. The microwave signal generating device according to claim 1, wherein, The DDS chip internally integrates 4 independent channels, namely a first channel, a second channel, a third channel, and a fourth channel; the FPGA serially configures the registers of the 4 independent channels through the high-speed serial interface to generate 4 waveform signals; wherein, the first channel and the second channel correspondingly generate the waveform signal IF1, and the third channel and the fourth channel correspondingly generate the waveform signal IF2. During each serial configuration process, the FPGA is used to set 2 channels in the same group to generate different forms of waveform signals and control the timing of the 2 signals in the same group, and at the same time perform ping-pong switching on the first switch 1 and the second switch 2 to realize the seamless switching of the waveform signals IF1 and IF2 between 2 waveform signals in the time domain.

5. The microwave signal generating device according to claim 4, characterized in that, The DDS chip is a GM4941 type DDS chip internally integrating 4 independent channels.

6. The microwave signal generating device according to claim 5, wherein, The serial clock of the 8-bit high-speed serial interface is up to 200 MHz at most, 8-bit data is transmitted per clock, and the total duration for sequentially completing the configuration of all registers of the 4 channels does not exceed 5 μs.

7. The microwave signal generating device according to claim 1, wherein, The frequency hopping source group is composed of a first frequency hopping source (4) and a second frequency hopping source (5).

8. The microwave signal generating device according to claim 7, characterized in that, The first frequency hopping source (4) and the second frequency hopping source (5) are independent of each other, and the frequency hopping times of the first frequency hopping source (4) and the second frequency hopping source (5) are both less than 10 μs.

9. The microwave signal generating device according to any one of claims 1-8, characterized in that, The third switching unit is set as a third switch (3), and the third switch (3) is a 2×2 microwave switch matrix. The 2×2 microwave switch matrix enables the local oscillator signal of the RF1 or RF2 frequency conversion circuit to be freely switched between the first frequency hopping source (4) and the second frequency hopping source (5) at any time.

10. The microwave signal generating device according to claim 9, wherein, The switching rate of the 2×2 microwave switch matrix is less than 50 ns.

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