Method and system for fully randomized benchmarking of quantum circuits

Abstract

A method, apparatus, and system for fully randomized benchmarking of quantum circuits include: generating representations of m1 random unitary quantum gates based on parameters of quantum gates; determining a representation of a first quantum gate sequence equivalent to an identity operator; determining a representation of a second quantum gate sequence equivalent to the identity operator; sending hardware instructions corresponding to the representation of the first quantum gate sequence and hardware instructions corresponding to the representation of the second quantum gate sequence to a quantum computing device; receiving a first number of measurements of the quantum bit from the quantum computing device after the quantum computing device applies the first quantum gate sequence to the quantum bit for a first number, and receiving a second number of measurements of the quantum bit from the quantum computing device after the quantum computing device applies the second quantum gate sequence to the quantum bit for a second number; and determining a fidelity value of the quantum gate based on a first probability and a second probability.

Description

Technical Field

[0001] The present disclosure relates to the field of quantum computing technology, and in particular to a method, system, and non-volatile computer-readable medium for fully randomized benchmark testing of quantum circuits. Background Art

[0002] Quantum computers can perform tasks that are infeasible to classical computers. These tasks could lead to significant advances in numerous engineering disciplines and achieve valuable goals, such as discovering new materials, synthesizing better drugs, and creating more energy-dense batteries. The performance of quantum computers can be evaluated based on various metrics, a process known as benchmarking. However, existing quantum computer benchmarking techniques have limitations and cannot be universally applied to arbitrary quantum circuits. Summary of the Invention

[0003] The present invention discloses a method, system, and non-volatile computer-readable medium for benchmarking quantum circuits. In an exemplary embodiment, a non-volatile computer-readable medium is provided that stores an instruction set that can be executed by at least one processor of a device to cause the device to perform a method. The method includes: generating representations of m1 random unitary quantum gates based on parameters of the quantum gates, where m1 is an integer; determining a representation of a first quantum gate sequence by inserting the quantum gate between each adjacent unitary quantum gate of the m1 random unitary quantum gates and attaching the quantum gate and a first recovery quantum gate to the m1 random unitary quantum gates so that the first quantum gate sequence is equivalent to an identity operator; determining a representation of a second quantum gate sequence by connecting the m1 random unitary quantum gates and attaching a second recovery quantum gate to the m1 random unitary quantum gates so that the second quantum gate sequence is equivalent to the identity operator; and sending hardware corresponding to the representation of the first quantum gate sequence to a quantum computing device. The invention further comprises hardware instructions corresponding to the instructions and a representation of the second sequence of quantum gates; receiving a first number of measurements of the qubit from the quantum computing device after the quantum computing device applies the first sequence of quantum gates to the qubit the first number of times, and receiving a second number of measurements of the qubit from the quantum computing device after the quantum computing device applies the second sequence of quantum gates to the qubit the second number of times; and determining a fidelity value for the quantum gate based on a first probability that the quantum state of the qubit is unchanged over the first number of measurements of the qubit and a second probability that the quantum state of the qubit is unchanged over the second number of measurements of the qubit.

[0004] In another aspect, a device for video processing is provided. The device includes a memory configured to store an instruction set, and one or more processors communicatively coupled to the memory and configured to execute the instruction set to cause the device to perform: generating representations of m1 random unitary quantum gates based on parameters of the quantum gates, where m1 is an integer; determining a representation of a first quantum gate sequence by inserting the quantum gate between each adjacent unitary quantum gate of the m1 random unitary quantum gates and appending the quantum gate and a first recovery quantum gate to the m1 random unitary quantum gates such that the first quantum gate sequence is equivalent to an identity operator; determining a representation of a second quantum gate sequence by connecting the m1 random unitary quantum gates and appending a second recovery quantum gate to the m1 random unitary quantum gates such that the second quantum gate sequence is equivalent to the identity operator. sending hardware instructions corresponding to the representation of the first sequence of quantum gates and hardware instructions corresponding to the representation of the second sequence of quantum gates to a quantum computing device; receiving a first number of measurements of the qubit from the quantum computing device after the quantum computing device applies the first sequence of quantum gates to the qubit a first number of times, and receiving a second number of measurements of the qubit from the quantum computing device after the quantum computing device applies the second sequence of quantum gates to the qubit a second number of times; and determining a fidelity value for the quantum gate based on a first probability that the quantum state of the qubit is unchanged over the first number of measurements of the qubit and a second probability that the quantum state of the qubit is unchanged over the second number of measurements of the qubit.

[0005] In another exemplary embodiment, a method is provided. The method includes: generating representations of m1 random unitary quantum gates based on parameters of the quantum gates, where m1 is an integer; determining a representation of a first quantum gate sequence by inserting the quantum gate between each adjacent unitary quantum gate of the m1 random unitary quantum gates and attaching the quantum gate and a first recovery quantum gate to the m1 random unitary quantum gates so that the first quantum gate sequence is equivalent to an identity operator; determining a representation of a second quantum gate sequence by connecting the m1 random unitary quantum gates and attaching a second recovery quantum gate to the m1 random unitary quantum gates so that the second quantum gate sequence is equivalent to the identity operator; and sending hardware corresponding to the representation of the first quantum gate sequence to a quantum computing device. The invention further comprises hardware instructions corresponding to a representation of the second sequence of quantum gates and a quantum computing device; receiving a first number of measurements of the qubit from the quantum computing device after the quantum computing device applies the first sequence of quantum gates to the qubit the first number of times, and receiving a second number of measurements of the qubit from the quantum computing device after the quantum computing device applies the second sequence of quantum gates to the qubit the second number of times; and determining a fidelity value for the quantum gate based on a first probability that the quantum state of the qubit is unchanged over the first number of measurements of the qubit and a second probability that the quantum state of the qubit is unchanged over the second number of measurements of the qubit. BRIEF DESCRIPTION OF THE DRAWINGS

[0006]

[0014] Embodiments and corresponding aspects of the present disclosure are illustrated in the following detailed description and accompanying drawings, in which the various features shown are not drawn to scale.

[0007] Figure 1 shows a schematic diagram of a qubit represented in a Bloch sphere according to some embodiments of the present disclosure;

[0008] Figure 2 A schematic diagram of a quantum gate sequence according to some embodiments of the present disclosure is shown;

[0009] Figure 3 A schematic diagram illustrating another quantum gate sequence according to some embodiments of the present disclosure is shown;

[0010] Figure 4 A schematic diagram illustrating another quantum gate sequence according to some embodiments of the present disclosure is shown;

[0011] Figure 5 A schematic diagram illustrating another quantum gate sequence according to some embodiments of the present disclosure is shown;

[0012] Figure 6 A structural block diagram of a system for operating a quantum circuit according to some embodiments of the present disclosure is shown;

[0013] Figure 7 A schematic diagram of a quantum controller for operating a quantum circuit according to some embodiments of the present disclosure is shown;

[0014] Figure 8 A flowchart of a method for operating a quantum circuit according to some embodiments of the present disclosure is shown. DETAILED DESCRIPTION

[0015] Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings, in which the same numbers in different drawings represent the same or similar elements unless otherwise indicated. The implementations set forth in the following description of the exemplary embodiments do not represent all implementations consistent with the present invention. Instead, they are merely examples of devices and methods consistent with the aspects related to the present invention listed in the appended claims. Specific aspects of the present disclosure are described in more detail below. In the event of a conflict with terms and / or definitions incorporated by reference, the terms and definitions provided herein shall prevail.

[0016] As used in this article, a "computer" is a machine capable of executing instructions, calculations, computational processes, or algorithms for carrying out an ordered series of procedures or operations designed to solve a task. Computers are ubiquitous in modern society, both directly (such as smartphones and laptops) and indirectly (such as microcontrollers in cars or control systems in water purification plants). Computers must be implemented on some type of hardware (e.g., the physical configuration of matter) and are subject to various limitations imposed by physics, which impose an upper limit on the performance characteristics of a computer (e.g., the amount of available memory or the number of operations allowed per second). Furthermore, in order to solve a task, a computer must provide a set of instructions that, when followed, enable the computer to complete the task.

[0017] The quantum computer used in this disclosure refers to a computer that can perform quantum computing. Quantum computing in this disclosure refers to computing through quantum phenomena (e.g., superposition or entanglement) of a quantum computer. In contrast, the classical computer in this disclosure refers to a computer that cannot perform quantum computing, such as an electronic computer. Quantum computers can perform certain tasks that are considered difficult for classical computers to solve and have unique advantages. For example, quantum computers can be used to simulate molecular dynamics (essentially controlled by quantum physics), factorize integers (which is the basis of many cryptographic theories), search unstructured data, optimize quantum annealing and adiabatic processes, accelerate machine learning algorithms, or perform many computing tasks that are difficult for classical computers to handle. This technological advantage can benefit a variety of industries and research, such as the creation of new materials, the synthesis of new drugs, or the development of high-energy batteries.

[0018] Classical computers operate based on digital logic. The digital logic used in this disclosure refers to a logical system that operates on information units (called "bits"). As the smallest unit of information, a bit can be one of two numerical values, usually represented by "0" and "1". Digital logic can use digital logic gates to create, remove or modify bit values. Digital logic gates can be constructed using transistors, where a bit can be represented as the voltage level of the wire connecting the transistors. A digital logic gate can take one or more bits as input and give one or more bits as output. For example, a logical "AND" gate can take two bits as input and give one bit as output. If the values ​​of both inputs are "1", the output of the "AND" gate can be "1", otherwise the output is "0". By connecting the inputs and outputs of various digital logic gates together in a specific way, a classical computer can implement arbitrarily complex algorithms to complete various computing tasks.

[0019] On the surface, quantum computers operate in a similar way to classical computers. Quantum computers operate using quantum logic. Quantum logic, as used in this article, refers to a logical system that operates on units of information called "qubits," or simply "qubits." A qubit is the smallest unit of information in a quantum computer and can be any linear combination of two values, typically represented as |0> and |1>. The value of a qubit can be represented as |ψ>. Unlike a digital bit, which can have a value of "0" or "1," |ψ> can have values ​​of α|0>+β|1>, where α and β are complex numbers (called "amplitudes") that are not affected by division by |α| 2 +|β| 2 = 1. Qubits can be constructed in various forms and can be represented as quantum states of quantum computer components. For example, qubits can use photons (for example, in lasers) with their polarization states as quantum states, or use electrons or ions (for example, electrons or ions trapped in electromagnetic fields) with their spin states as quantum states, or use Josephson junctions (for example, in superconducting quantum systems) with charge, current flux or phase as quantum states, or use quantum dots (for example, in semiconductor structures) with their dot spin as quantum states, as well as topological quantum systems, or any system that can provide two or more quantum states to be physically implemented. Quantum logic can be physically implemented using quantum logic gates (referred to as "quantum gates" for short) to create, remove or modify qubits.

[0020] Mathematically speaking, a quantum gate is a propagator that acts on a quantum state. Physically, a quantum gate can be a hardware device that generates laser pulses, electromagnetic waves (for example, microwave pulses), electromagnetic fields, or any means for changing, maintaining, or controlling the quantum state of a quantum bit. A quantum gate can accept one or more quantum bits as input and give one or more quantum bits as output, so it can be represented as a matrix. Unlike classical logic gates (for example, an AND gate), a quantum gate has a property that its input can be determined based on its output and the information about the transformation applied to it. This property is called "reversibility." This reversibility property requires that the number of outputs of a quantum gate equals or exceeds the number of its inputs to ensure that the input of a known quantum gate can be constructed given the output of the quantum gate.

[0021] The advantages of quantum computers stem from their ability to reduce the computational complexity of some tasks that are difficult for classical computers to handle (for example, tasks that are mathematically possible but physically impossible). In general, a computational task can be conceptualized as determining a specific property of an instance of some mathematical object (for example, a graph, a number, or a string) that represents the computational task, and an instance of a mathematical object can usually be conceptualized as a sequence of bits (for example, 1s and 0s). In general, larger instances require more time or space to solve. The time or space required to solve a computational task depends on the size of the instance, which is usually considered to be the size of the instance input in bits. For example, the input length of the instance can be n. In this case, the computational complexity of the computational task can be defined as the resources required to use a better algorithm to determine a specific property of an instance of a mathematical object.

[0022] Typically, this computational complexity varies with n. For example, for an input of size n, the algorithm may take 5n 3 +12n 2 +2n+log n+113 steps. However, in general, only the asymptotic complexity of an algorithm is evaluated, and this evaluation is usually done using the Big O notation system. The Big O notation system evaluates the rate of increase in computational complexity as n approaches infinity, in which case only the fastest growing factor of n is considered. For example, in the Big O notation system, the above algorithm (i.e., 5n 3 +12n 2 +2n+log n+113) The number of items used is O(n 3 ). If the asymptotic complexity of the algorithm is O(n k )(k is a finite number), then it is usually considered applicable if its asymptotic complexity is O(k n ) (e.g., with more than polynomial growth), is generally considered infeasible. A computational task whose optimal algorithm has an asymptotic complexity of O(k n) or higher, the computational task is considered difficult to solve.

[0023] The computational complexity of solving the same task on different classical computers varies only by a constant factor. In contrast, by applying quantum mechanics, quantum computers can solve certain computations in a polynomial number of steps, while classical computers can only solve them with exponential steps. For these computations, the computational complexity of a quantum computer can be related to the size of the polynomial input, while the computational complexity of a classical computer can be exponential.

[0024] These characteristics of quantum computers stem from the fact that qubits can be in a superposition of quantum states (which can represent an infinite number of values). For example, a qubit |ψ〉 can be in a superposition of quantum states |0〉 and |1〉, represented as α|0〉+β|1〉, where α and β can be arbitrary complex numbers and |α| 2 +|β| 2 =1, and can make the value of |ψ> not constrained to "0" or "1" like a digital bit. In addition, a group of qubits can expand the dimension of values ​​that a qubit can represent. For example, a two-state qubit system can include a first qubit |ψ1>=α|0>+β|1> and a second qubit |ψ2>=γ|0>+δ|1>. The qubits in such a two-state qubit system can represent a combination of two quantum states (for example, |0> and |1>). When the first and second qubits are entangled, they can form a four-state qubit system, where the qubits in such a four-state qubit system It can be expressed as (where |αγ| 2 +|αδ| 2 +|βγ| 2 +|βδ| 2 =1). The qubits in such a four-state qubit system can represent four quantum states (e.g., combinations of |00>, |01>, |10>, |11>, called "product states"). In general, a system of n entangled two-state qubits (e.g., with a binary basis such as |0> and |1>) can represent 2n quantum states, which can be represented as qubits:

[0025]

[0026] (where |x1| 2 +|x1| 2 +…+|x n | 2 =1). Information can be encoded and stored in the amplitude (e.g., x1, x2, ..., x nBy manipulating qubits with quantum gates, quantum computers can manipulate an arbitrary number of amplitudes simultaneously, which offers a significant speed advantage for certain computing tasks over classical computers (which can only manipulate a limited number of values ​​simultaneously).

[0027] One way to visualize the value of a qubit is to present it as a point on the Bloch sphere. As an example, Figure 1 is a diagram illustrating a qubit represented in a Bloch sphere 100 consistent with some embodiments of the present disclosure. Bloch sphere 100 can be conceptualized as existing in a three-dimensional (3D) space having coordinate axes x, y, and z, respectively. It takes two values ​​(e.g., latitude and longitude, or Figure 1 Angle in and θ) to represent a point on the surface of the Bloch sphere 100. Figure 1 In the equation, the positive and negative poles of the z-axis correspond to |0> and |1>, respectively. For the qubit |ψ>=α|0>+β|1>, since α and β are affected by |α| 2 +|β| 2 = 1 constraint, |ψ> can be expressed as a complex number a+bi. The values ​​of a and b can be mapped to the azimuthal and equatorial angles in the Bloch sphere 100. and θ, which can be expressed as Figure 1 A point on the surface of the middle ball 100.

[0028] In general, quantum algorithms can be represented by basic quantum circuits. A quantum circuit consists of one or more quantum gates. Because quantum gates can transform qubits in an infinite number of ways (for example, by changing the values ​​of α and β in the qubit α|0>+β|1>), there can be an infinite number of quantum gate types. For example, there are an infinite number of quantum gates for performing unitary transformations on qubits because there are infinite ways to perform unitary transformations. A type of quantum gate called a "Pauli operator" or "Pauli gate" can also be used to perform unitary transformations on qubits. There are four Pauli operators, called I, X, Y, and Z, where I is the identity operator and X, Y, and Z represent 180° rotations around the X, Y, and Z axes in 3D space, respectively. For example, in a two-state qubit system, a Pauli gate can be represented as the matrix as well as as well as The set of Pauli operators on n qubits can be defined as and where the subscripts indicate the qubits on which the operators act. For a set of n qubits, there are 4 n Pauli matrices, each for σ i ∈[I, X, Y, Z] possible tensor products (in For example, in a three-qubit system consisting of three qubits |ψ1>, |ψ2>, and |ψ3>, the Pauli X-gate acting on |ψ1> and the Pauli Z-gate acting on |ψ2> can be expressed as

[0029] The Pauli gate can be understood as a rotation around the three principal axes of the Bloch sphere. As an example, see Figure 1 The Pauli X-gate, Pauli Y-gate, and Pauli Z-gate can be understood as rotating the point representing |ψ> by 180° around the X-axis, Y-axis, and Z-axis in the Bloch sphere 100, respectively.

[0030] Some quantum gates can be used to implement other quantum gates. In some cases, such quantum gates can form a group, and the quantum gates in the group can be used to implement other quantum gates in the group with arbitrary precision (if a sufficient number of quantum gates are provided). An example of such a quantum gate group is the Clifford group, which includes a set of Pauli gates. The quantum gates in the Clifford group can be called "Clifford gates". When a Pauli gate in the Clifford group is multiplied by a Clifford gate on the left (called "left multiplication") and by the Hermitian adjoint of the Clifford gate on the right (called "right multiplication"), the resulting quantum gate is still a Pauli gate that exists in the Clifford group. In the case of n qubits (denoted as C n ) includes the Clifford gate, i.e.

[0031] In some embodiments, a Hadamard gate may be used, i.e. and phase gate, i.e. A combination of can be used to generate a Clifford group (e.g., C1) that can operate on a qubit. In some embodiments, a Hadamard gate, a phase gate, and a controlled NOT (CNOT) gate can be used, i.e. The combination of can generate two or more Clifford groups (e.g., C2) that can operate on qubits. For example, the Clifford group generated by the combination of Hadamard gate, phase gate, and NOT gate can form a unitary 2-design. To realize a universal quantum computer, the Clifford gate can be combined with the T gate (also called "π / 4 gate"), that is, For example, a T-gate can be set up to rotate about the π / 4 phase of a single-qubit Pauly Z-gate: Quantum circuits of Hadamard gates, phase gates, CNOT gates, and T gates (e.g., for any quantum gate U∈[H, S, CNOT, T] in a quantum circuit) can be used to implement a universal quantum computer. Such circuits are referred to as "Clifford+T circuits."

[0032] One challenge facing quantum computers is that it is difficult to create qubits and maintain them in an operational state (for example, entangled with other qubits). The accuracy of a quantum circuit depends on the accuracy of the qubits and the state preparation and measurement errors (SPAM errors) of the quantum circuit. However, qubits are essentially analog devices, so they are very susceptible to noise from the surrounding environment or quantum gate operations. Once a qubit becomes incoherent due to interference from noise, the calculation of the qubit is lost and cannot be recovered. Existing quantum computing systems can only prepare and entangle a limited number of qubits and perform a limited number of operations on these qubits before the entanglement is destroyed by noise.

[0033] Due to the susceptibility of qubits, the total fidelity of quantum gates is an important performance indicator of quantum circuits. As used in this article, the total fidelity or total infidelity of a quantum gate refers to the ratio of correct or incorrect results relative to the total number of results of the quantum gate, respectively. The total infidelity of a quantum gate may have two sources: qubit incoherence caused by the application of the quantum gate and the operation of the quantum gate (such as preparation, calibration or measurement) (referred to as "state preparation and measurement error" or "SPAM error"). For example, qubit incoherence may be an unexpected and undesirable result of applying a quantum gate on a qubit, while SPAM errors may affect the total infidelity without affecting the qubit incoherence. Although the source of total infidelity may be related to both of the above sources, the development of quantum computers is more affected by qubit incoherence because qubit incoherence can reflect the performance of quantum circuit hardware.

[0034] Benchmarking as used herein refers to a procedure or process for evaluating the fidelity of a quantum computing system comprising one or more quantum gates. Based on the above benchmarking results, quantum error correction can be applied to quantum computing systems to improve their fidelity. For example, for quantum circuits built on superconducting qubits (e.g., cross-sub qubits using Josephson junctions), the quantum properties of the quantum circuit come from the properties of Cooper pairs (e.g., bound electron pairs in superconducting metals). Cooper pairs are bosons that conform to the Bose-Einstein distribution, and their quantum states exhibit macroscopic electrical properties. On a macroscopic scale, the quantum state of a superconducting qubit device can be represented by the electrical properties of the superconducting qubit device (e.g., charge, phase, or current flux), and can be modified or controlled by an electromagnetic signal applied to the superconducting qubit device (e.g., a microwave pulse generated by an oscillator circuit). An electromagnetic signal with a specific frequency can cause a superconducting qubit to jump between different energy levels (e.g., between a ground state and an excited state). Quantum error correction can be performed on quantum circuits by tuning the electromagnetic signal (e.g., changing its frequency, amplitude, or waveform) and the parameters of the superconducting qubits (e.g., the capacitance across the sub-qubits).

[0035] One way to check the fidelity of a quantum circuit is to apply a unitary operation to a qubit implemented on a hardware component of the quantum circuit and measure the qubit after applying the unitary operation to determine whether the qubit is still in the same quantum state. If the quantum state of the qubit changes, it indicates that a non-fidelity error has occurred in the quantum circuit, which may be due to incoherence of the qubit or a SPAM error of the quantum gate operating on the qubit. In some embodiments, the above-mentioned unitary operation can be implemented by a Pauli gate or a Clifford gate because they are reversible. For example, the unitary gate can be implemented as a Pauli gate (e.g., X) and a Hermite adjoint of the Pauli gate (e.g., X) connected in series. + ).

[0036] Existing quantum circuit benchmarking techniques are either only applicable to specific types of quantum gates or cannot identify the total infidelity caused by qubit incoherence (for example, not caused by SPAM errors). For example, random benchmarking techniques based on Clifford groups can be used to benchmark Clifford gates. Random benchmarking techniques can randomly select m (m is an integer) Clifford gates U1, U2, ..., U from the Clifford group. m , by connecting m Clifford gates in series to form a gate U = U1·U2·...·U m . And form a reverse gate For example, U and U + It can be constructed by building the corresponding quantum circuit hardware. Then, gates U and U + can be applied to one or more ground state qubits (e.g., |0>), and the resulting qubits can be measured. For example, U and U + Applications on ground state qubits can be U + ·U|0>. By repeatedly randomly selecting m Clifford gates, generating and applying m unitary gates, and measuring the resulting qubits, the fidelity of the quantum gates in the Clifford group can be determined. If this repetitive operation is performed for many values ​​of m, the relationship between the fidelity of the Clifford gate and the value of m can be determined (for example, by fitting). For example, if this relationship can be fitted as an exponential decay, then the decay rate can be used as a measure of the average fidelity of the quantum gates in the Clifford group. However, random benchmarking techniques based on the Clifford group cannot be used for other types of quantum gates. In some cases, the quantum gates implemented in the quantum circuit may include non-Clifford quantum gates (for example, implemented as a single physical device), which cannot be generated by a combination of Clifford gates. If random benchmarking techniques based on the Clifford group are used in these cases, the compilation performance of the quantum circuit will be degraded.

[0037] As another example, quantum process tomography (QPT) technology can be used to benchmark non-Clifford quantum gates. For a particular quantum computing system, its qubits can form a Hilbert space. The QPT technology can provide a set of input states that can span the Hilbert space and apply a unitary gate on each input state. Based on the output of the unitary gate, the output density matrix corresponding to each input state can be reconstructed. Then, based on the input states and the output density matrix, the process matrix representing the mapping between the input states and the output can be determined (for example, by maximum likelihood estimation). The difference between the process matrix and the matrix representing the unitary gate can be used to represent the fidelity of the non-Clifford quantum gate. However, the QPT technology cannot distinguish between the non-fidelity caused by the decoherence of the qubit and the non-fidelity caused by the SPAM error of the non-Clifford quantum gate.

[0038] In yet another example, the cross-entropy benchmarking (XEB) technique can be used to benchmark fermion simulation ("fSim") quantum gates. The XEB technique can randomly generate a series of quantum gates, including fSim quantum gates and a certain type of quantum gate that operates on a single qubit (called a "single-qubit gate"), and cyclically interleave the fSim quantum gates and single-qubit gates. By comparing with the simulation results, the cross-entropy of a series of quantum gates can be calculated, and its fidelity can be determined based on this. However, the XEB technique is only applicable to fSim-type quantum gates, and can only determine the average fidelity of all fSim quantum gates in the generated quantum gate series. In other words, the XEB technique cannot determine the fidelity of a single fSim quantum gate.

[0039] The present disclosure provides a technical solution for benchmarking quantum circuits using a technique called "completely randomized benchmarking". The complete randomized benchmarking technique can be used to benchmark any type of quantum gate (e.g., including but not limited to Clifford gates) to separate quantum gate non-fidelity caused by qubit decoherence from quantum gate non-fidelity caused by the operation of the quantum gate (e.g., preparation, calibration, or measurement). Based on the results of the complete randomized benchmarking, the hardware corresponding to the quantum circuit can be corrected (e.g., by adjusting physical parameters) to achieve better performance. The methods, devices, and systems provided above are applicable to benchmarking any type of quantum computing system, thereby enhancing its versatility and advantages in compilation.

[0040] The present disclosure relates to fully randomized benchmarking of quantum circuits, including systems, devices, methods, and non-volatile computer-readable media. For ease of description, the methods described below are also applicable to the systems, devices, and non-volatile computer-readable media. For example, some aspects of the methods can be implemented by the system, device, or as program code or computer instructions stored in non-volatile computer-readable media. In the broadest sense, the methods are not limited to any specific physical or electronic tools, but can be implemented using many different tools.

[0041] Consistent with some embodiments of the present disclosure, a method for operating (e.g., benchmarking, controlling qubits for computation, controlling qubits for compilation, or any manipulation of qubits) a quantum circuit may include causing a computer (e.g., a classical computer) to generate representations (e.g., matrices or tensors) of m1 (m1 is an integer) random unitary quantum gates based on the parameters of the quantum gates. The unitary quantum gates can perform unitary transformations on the qubit. The qubit can be physically implemented using a photon (e.g., in a laser) with its polarization state as the quantum state, an electron or ion (e.g., trapped in an electromagnetic field) with its spin state as the quantum state, a Josephson junction (e.g., in a superconducting quantum system) with its charge, current flux, or phase as the quantum state, a quantum dot (e.g., in a semiconductor structure) with its dot spin as the quantum state, a topological quantum system, or any other system that can provide two or more quantum states. The quantum gate can be implemented as a hardware device capable of generating laser pulses, electromagnetic waves (e.g., microwave pulses), electromagnetic fields, or any other means for changing, maintaining, or controlling the quantum state of the qubit. In some embodiments, the qubit may be implemented as a superconducting qubit, and the quantum gate may be implemented as an electromagnetic signal (e.g., a microwave pulse signal generated by an external oscillator). In this case, the parameters of the quantum gate may include at least one of the length, amplitude, or shape of the electromagnetic signal.

[0042] In some embodiments, in order to generate m1 random unitary representation quantum gates, the method may include causing a computer to generate representations of m1 random unitary quantum gates based on Haar measurements. Haar measurements in the present disclosure refer to a uniform probability distribution over all quantum states or all unitary operators. For example, a computer may randomly sample a unitary matrix m1 times from a set of unitary matrices that conform to Haar measurements to generate m1 random unitary quantum gates. In some embodiments, in order to generate m1 random unitary quantum gates, the method may include pseudo-randomly sampling the unitary operator space through a uniform probability distribution, causing the computer to generate m1 random unitary quantum gates. It should be noted that the generated m1 random unitary quantum gates are not limited to Clifford gates or any other type of quantum gates.

[0043] Consistent with some embodiments of the present disclosure, the method for operating a quantum circuit may further include inserting a quantum gate between each adjacent unitary quantum gate of m1 random unitary quantum gates, and applying (e.g., by connecting to the end) the quantum gate and the first recovery quantum gate to the m1 random unitary quantum gates so that the first quantum gate sequence is equivalent to the identity operator, thereby causing the computer to determine a first quantum gate sequence (e.g., a matrix or tensor). A quantum gate sequence in the present disclosure refers to a set of quantum gates arranged in sequence. The first quantum gate sequence includes m1 random unitary quantum gates and m1 inserted quantum gates, which are arranged after each m1 random unitary quantum gate to form a replacement or staggered manner, wherein the first quantum gate sequence includes a total of 2m1+1 quantum gates (including the additional first recovery quantum gate).

[0044] As used herein, a restoring quantum gate corresponding to a quantum gate can perform a transformation on a qubit to reverse the transformation performed by the quantum gate on the qubit. The net effect of applying a quantum gate on a qubit and then applying its restoring quantum gate is equivalent to applying an identification operator (e.g., identifying a Pauli gate I) on the qubit. Unlike classical logic gates, quantum gates have a restoring quantum gate due to their reversible nature. For example, if a quantum gate can modify a qubit from 0.6|0>+0.8|1> to 0.8|0>+0.6|1>, then the restoring quantum gate of the quantum gate can modify the qubit from 0.8|0>+0.6|1> back to 0.6|0>+0.8|1>. In some embodiments, the first (2m1-1) quantum gates in the first sequence of quantum gates can be considered a combined quantum gate (e.g., as a product matrix of (2m1-1) matrices), and the restoring quantum gate is the restoring quantum gate corresponding to the combined quantum gate.

[0045] As an example, Figure 2 is a diagram illustrating an example quantum gate sequence 200 consistent with some embodiments of the present disclosure. The quantum gate sequence 200 may be the first quantum gate sequence described above. Figure 2 As shown, the quantum gate sequence 200 includes m1 random unitary quantum gates U1, U2, ..., U m1 In addition, by each adjacent unitary quantum gate U in the m1 random unitary quantum gates i and U i+1 (i=1, 2, ..., m1), and by attaching the quantum gate G and the first recovery quantum gate R1 (for example, by connecting to U m1 ) to m1 random unitary quantum gates to generate the quantum gate sequence 200. R1 is the combination of quantum gates U1·G·U2·...·G·U m1 ·G recovery quantum gate. In fact, the quantum gate sequence 200 is equivalent to the identity operator, that is, U1·G·U2·...·G·U m1·G·R1=I·R1. R1 can be the first restoring quantum gate as described above. Figure 2 In the example, a quantum gate sequence 200 is applied to an input qubit QI (e.g., |0>) and outputs an output qubit Q O The quantum gates of the quantum gate sequence 200 can be sequentially applied to the input qubit Q I , the output qubit of each quantum gate is the input qubit of the subsequent quantum gate. If there is no non-fidelity in the process, then after applying all the quantum gates in the quantum gate sequence 200, Q I The quantum state of Q o same.

[0046] Consistent with some embodiments of the present disclosure, the method for operating a quantum circuit may further include causing a computer to determine a representation (e.g., a matrix or tensor) of a second sequence of quantum gates by connecting m1 random unitary quantum gates and appending a second restoring quantum gate to the m1 random unitary quantum gates (e.g., by connecting to the end thereof) so that the second sequence of quantum gates is equivalent to an identity operator. The second restoring quantum gate may perform a transformation on the qubit to reverse the transformation performed by the second sequence of quantum gates on the qubit. The second sequence of quantum gates is applied to the qubit, wherein the net effect of the second restoring quantum gate is equivalent to applying an identification operator (e.g., identification Pauli gate I) to the qubit.

[0047] As an example, Figure 3 is a diagram illustrating an example quantum gate sequence 300 consistent with some embodiments of the present disclosure. The quantum gate sequence 300 may be the second quantum gate sequence described above. Figure 3 As shown, the quantum gate sequence 300 includes n1 random unitary quantum gates U′1, U′2, ..., U′ n1 Where n1 is an integer. For example, n1 can be the same as or different from m1. In some embodiments, U′ i =(i=1, 2, ..., n1) can be compared with Figure 2 The unitary quantum gates U1, U2, ..., U described m1 In addition, the quantum gate sequence 300 is formed by connecting n1 random unitary quantum gates and attaching a second restoring quantum gate R′1 (e.g., by connecting to U n1 ) to n1 random unitary quantum gates. R′1 is a combination of quantum gates U′1·U′2·..., U′ n1 ·R′1’s recovery quantum gate. As mentioned above, R′1 can be the first recovery quantum gate. In fact, the quantum gate sequence 300 is equivalent to the identity operator, that is, U′1·U′2·..., U′ n1 ·R′1=1. Figure 3In the example, a sequence of quantum gates 300 is applied to the input qubit Q I (e.g., |0>) and outputs an output qubit Q′ O The quantum gates of the quantum gate sequence 300 can be sequentially applied to the input qubit Q I , where the output qubit of each quantum gate is the input qubit of the subsequent quantum gate. If there is no non-fidelity in the process, after applying all the quantum gates in the quantum gate sequence 300, Q I The quantum state of Q′ can be O same.

[0048] Consistent with some embodiments of the present disclosure, a method for operating a quantum circuit may further include causing a computer to send hardware instructions corresponding to a representation of a first sequence of quantum gates and hardware instructions corresponding to a representation of a second sequence of quantum gates to a quantum computing device. In some embodiments, the computer may send the hardware instructions (e.g., represented as electronic signals encoded to carry information) to the quantum computing device via a wired or wireless connection. In some embodiments, the quantum computing device may be a physical device configured to store qubits, apply quantum gates to the qubits to operate on their quantum states, and measure the qubits after applying the quantum gates, according to the provided hardware instructions. In some embodiments, the computer may encode or compile a representation (e.g., a matrix or tensor) into hardware instructions.

[0049] For example, the quantum computing device may be a superconducting quantum computing device that stores one or more superconducting qubits (e.g., spanning sub-qubits) and is coupled to an external electromagnetic signal oscillator to receive a microwave pulse signal for changing the quantum state of the superconducting qubits. Figure 1 , the superconducting qubit in such a quantum computing device can be represented as a qubit |ψ> represented in the Bloch sphere 100. If a computer (e.g., a classical computer) sends a hardware instruction corresponding to a Pauli X-gate to the quantum computing device, the quantum computing device can cause an electromagnetic signal oscillator to generate a microwave pulse signal according to the hardware instruction, and the microwave pulse signal can cause the qubit |ψ> to flip 180° around the X-axis of the bulk sphere 100.

[0050] In some embodiments, the quantum computing device can be independent of the computer (e.g., a classical computer) that sends hardware instructions. In some embodiments, the quantum computing device can be an integral part of the computer (e.g., a computer system that integrates a classical computing device and a quantum computing device).

[0051] Consistent with some embodiments of the present disclosure, a method for operating a quantum circuit may further include measuring, by a computer, a first number of qubits (e.g., superconducting qubits) after the quantum computing device applies a first sequence of quantum gates to the qubits for a first time, and measuring, by the computer, a second number of qubits after the quantum computing device applies a second sequence of quantum gates to the qubits for a second time. Optionally, the first number and the second number may be the same or different times. In some embodiments, the computer may receive the first number and the second number of measurements from the quantum computing device via a wired or wireless connection (e.g., both represented as electronic signals encoded to carry information).

[0052] As an example, refer to Figure 2 , the quantum computing device can apply each quantum gate in the first quantum gate sequence (e.g., quantum gate sequence 200) to the input quantum bit Q according to the hardware instructions I N times (N is an integer). In each application of the first sequence of quantum gates, the output qubits of each quantum gate (e.g., U1, G, U2, G, ..., G, U m1 , G) is the input qubit of the subsequent quantum gate. After applying the first sequence of quantum gates, the quantum computing device can measure the output qubit Q O To obtain the measured value (e.g., Q O After the measurement, the quantum computing device can re-prepare the input qubit Q I , apply a quantum gate sequence 200 to it, and measure the output qubit Q O , to obtain new measurement results again. The quantum computing device can iterate this process N times and finally generate Q O If there is no non-fidelity in the iteration, then the Q of the iteration O The measured value should have the same value as the input qubit Q I The same quantum state. If an error occurs in the iteration, the Q O The measured value should have a different value than the input qubit Q I quantum state.

[0053] As an example, refer to Figure 3 , the quantum computing device can apply each quantum gate in the second quantum gate sequence (e.g., quantum gate sequence 300) to the input quantum bit Q according to the hardware instructions I M times (M is an integer, which may be the same as or different from N). Each time the second quantum gate sequence is applied, the output qubits of each quantum gate (e.g., U1, U2, ..., U m1 ) is the input qubit of the subsequent quantum gate. After applying the second sequence of quantum gates, the quantum computing device can measure the output qubit Q′ OTo obtain the measured value (e.g., Q′ O After the measurement, the quantum computing device can re-prepare the input qubit Q I , apply a quantum gate sequence 300 to it, and measure the output qubit Q′ O To obtain a new measurement again. The quantum computing device can iterate this process N times and finally generate Q' O If no non-fidelity occurs in an iteration, then Q′ of that iteration is O The measured value should have the same value as the input qubit Q I The same quantum state. If an error occurs in the iteration, the Q′ of the iteration O The measured value of should have a different value from the input qubit Q I quantum state.

[0054] Consistent with some embodiments of the present disclosure, a method for operating a quantum circuit may further cause a computer to determine a fidelity value for a quantum gate based on a first probability that a quantum state of a qubit remains unchanged over a first number of measurements of the qubit and a second probability that the quantum state of the qubit remains unchanged over a first number of measurements of the qubit. The fidelity value in the present disclosure may include a value representing the fidelity of the quantum gate. Alternatively, the fidelity value may be a percentage value (e.g., the probability itself). In some embodiments, the computer may determine the fidelity value for the quantum gate as a ratio of the first probability value to the second probability value.

[0055] For example, if the computer receives 100 first measurements of a qubit, 96 of which indicate that the first sequence of quantum gates (e.g., Figure 2 The quantum gate sequence 200 in FIG. 2 is applied to a qubit (e.g., Figure 2 Q I ) 100 times, the quantum state of the qubit has not changed, then the first probability can be determined to be 96%. If the computer receives 200 second measurements of the qubit, 196 of which indicate that after applying the second sequence of quantum gates (e.g., Figure 2 The quantum gate sequence 300 in FIG. 3 is applied to a qubit (e.g., Figure 3 Q I ) 200 times, the quantum state of the qubit has not changed, then the second probability can be determined to be 98%. Based on the first probability of 96% and the second probability of 98%, the fidelity value of the quantum gate (e.g., Figure 2 G) in can be 97.96%=96% / 98%.

[0056] Consistent with some embodiments of the present disclosure, after determining the fidelity value, the method for operating a quantum circuit may further cause the computer to update parameters of the quantum gate based on the fidelity value of the quantum gate. In some embodiments, based on determining that the qubit is a superconducting qubit, the quantum gate is an electromagnetic signal (e.g., a microwave pulse signal), and the parameter of the quantum gate is at least one of the length, amplitude, or shape of the electromagnetic signal, the computer may update the parameter by modifying at least one of the length, amplitude, or shape of the electromagnetic signal. In some embodiments, the computer may update the parameter to optimize the quantum gate such that, if the new parameter is applied in a valid situation, the fidelity value may increase.

[0057] Consistent with some embodiments of the present disclosure, the method for operating a quantum circuit may further include an operation for determining a fidelity value using different quantum gate sequences of generated random unitary quantum gates having different lengths. In some embodiments, the method may cause the computer to generate m2 (m2 is an integer different from m1) random unitary quantum gates (e.g., a matrix or tensor) based on the parameters of the quantum gates. The above method may also cause the computer to determine a representation (e.g., a matrix or tensor) of the third quantum gate sequence by inserting a quantum gate between each adjacent unitary quantum gate of the m2 random unitary quantum gates and appending the quantum gate and a third recovery quantum gate to the m2 random unitary quantum gates, so that the third quantum gate sequence is equivalent to the identity operator.

[0058] In some embodiments, to generate m2 random unitary quantum gates, the method may include causing a computer to generate m2 random unitary quantum gates based on a Haar measurement. For example, the computer may randomly sample a unitary matrix m2 times from a set of unitary matrices that conform to the Haar measurement to generate m2 random unitary quantum gates. In some embodiments, to generate m2 random unitary quantum gates, the method may include pseudo-randomly sampling a unitary operator space using a uniform probability distribution, causing the computer to generate m2 random unitary quantum gates. It should be noted that the generated m2 random unitary quantum gates are not limited to Clifford gates or any other type of quantum gates.

[0059] As an example, Figure 4 is a diagram illustrating an example quantum gate sequence 400 consistent with some embodiments of the present disclosure. The quantum gate sequence 400 may be the third quantum gate sequence described above. Figure 4 As shown, the quantum gate sequence 400 includes m2 random unitary quantum gates V1, V1, ..., V1 generated based on the parameters of the quantum gate G. m2 In addition, the quantum gate sequence 400 is formed by adding a random unitary quantum gate V to each adjacent unitary quantum gate of m random unitary quantum gates. i and V i+1(i=1, 2, ..., m2), and by attaching the quantum gate G and the third recovery quantum gate R2 to the m2 random unitary quantum gates (e.g., by connecting to V m2 ) is generated. R2 is a combination of quantum gates V1·G·V2·...·G·V m2 ·G recovery quantum gate. In fact, the quantum gate sequence 400 is equivalent to the identity operator, that is, V1·G·V2·...·G·V m2 ·G·R2=I. Figure 4 In the example, a quantum gate sequence 400 is applied to the input qubit Q I And output an output qubit S O The quantum gates of the quantum gate sequence 400 can be sequentially applied to the input qubit Q I , where the output qubit of each quantum gate is the input qubit of the subsequent quantum gate. If there is no infidelity in the process, after applying all the quantum gates in the quantum gate sequence 400, Q I The quantum state of S O same.

[0060] In some embodiments, the method may further cause the computer to determine a fourth quantum gate sequence (e.g., a matrix or tensor) by connecting m2 random unitary quantum gates and appending a fourth restoring quantum gate to the m2 random unitary quantum gates so that the fourth quantum gate sequence is equivalent to the identity operator.

[0061] As an example, Figure 5 is a diagram illustrating an example quantum gate sequence 500 consistent with some embodiments of the present disclosure. The quantum gate sequence 500 may be the fourth quantum gate sequence described above. Figure 5 As shown, the quantum gate sequence 500 includes n2 random unitary quantum gates V1′, V′2, ..., V′ n2 , where n2 is an integer. In some embodiments, n2 can be an integer that is the same as or different from m2. In some embodiments, V i ′=(i=1,2,...,n2) can be compared with Figure 4 The unitary quantum gates V1, V1, ..., V1 are shown m2 In addition, the quantum gate sequence 500 is formed by connecting n2 random unitary quantum gates V1′, V′2, ..., V′ n2 And the fourth recovery quantum gate R′2 is attached (for example, by connecting to Vn2) to the n2 random unitary quantum gates to generate. R′2 is the combination of quantum gates V1′·V1′...·V′ n2 In fact, the quantum gate sequence 500 is equivalent to the identity operator, that is, V1′·V′2·..., V′ n2 ·R2=I. Figure 5 In the example, a sequence of quantum gates 500 is applied to the input qubit Q I And output an output qubit S O The quantum gates of the quantum gate sequence 500 can be applied sequentially to the input qubit Q I , where the output qubit of each quantum gate is the input qubit for the subsequent quantum gate. If there is no infidelity in the process, then after applying all the quantum gates in the quantum gate sequence 500, Q I The quantum state of S O same.

[0062] In some embodiments, the method may further cause the computer to send hardware instructions corresponding to a representation of a third sequence of quantum gates and hardware instructions corresponding to a representation of a fourth sequence of quantum gates to the quantum computing device. Subsequently, the method may further cause the computer to receive a third qubit measurement result from the quantum computing device after the quantum computing device applies the third sequence of quantum gates to the qubit for a third time, and to receive a fourth qubit measurement result from the quantum computing device after the quantum computing device applies the fourth sequence of quantum gates to the qubit for a fourth time. Optionally, the first and third times may be the same or different times. In another example, the third and fourth times may be the same or different times. In some embodiments, the computer may receive the third measurement value (e.g., represented as an electronic signal encoded to carry information) from the quantum computing device via a wired or wireless connection. In some embodiments, the quantum computing device may determine the third and fourth measurements in operations similar to those used to determine the first and second measurements, respectively, which have already been described and will not be repeated below.

[0063] After receiving the third and fourth measurement results of the qubit, the method may further cause the computer to determine a third probability that the quantum state of the qubit is unchanged in the third measurement of the qubit and a fourth probability that the quantum state of the qubit is unchanged in the fourth measurement of the qubit. In some embodiments, the computer may determine the third and fourth probabilities by operations similar to those for determining the first and second probabilities, respectively, which have been described and will not be repeated below.

[0064] After determining the third probability and the fourth probability, the method may further cause the computer to determine an average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability. In some embodiments, to determine the average fidelity value, the computer may determine the first average probability as the average of the first probability and the third probability, determine the second average probability as the average of the second probability and the fourth probability, and determine the average fidelity value as the ratio of the first average probability to the second average probability.

[0065] For example, if the computer receives 100 first measurements of a qubit, 96 of which indicate that the first sequence of quantum gates (e.g., Figure 2 The quantum gate sequence 200 in FIG. 2 is applied to a qubit (e.g., Figure 2 Q I ) 100 times, the quantum state of the qubit has not changed, then the first probability can be determined to be 96%. If the computer receives 200 second measurements of the qubit, 196 of which indicate that after applying the second sequence of quantum gates (e.g., Figure 2 The quantum gate sequence 300 in FIG. 3 is applied to a qubit (e.g., Figure 3 Q I ) 200 times, the quantum state of the qubit has not changed, then the second probability can be determined to be 98%. If the computer receives 300 third measurements of the qubit, 285 of which indicate that after applying the third quantum gate sequence (e.g., Figure 4 The quantum gate sequence 400 in FIG. 4 is applied to a qubit (e.g., Figure 4 Q I ) 300 times, the quantum state of the qubit has not changed, then the third probability can be determined to be 95%. If the computer receives 400 fourth measurements of the qubit, 388 of which indicate that after applying the fourth quantum gate sequence (e.g., Figure 5 The quantum gate sequence 500 in FIG. 5 is applied to a qubit (e.g., Figure 5 Q I ) 388 times, the quantum state of the qubit has not changed, then the fourth probability can be determined to be 97%. Based on the first probability of 96%, the second probability of 98%, the third probability of 95%, and the fourth probability of 97%, the computer can determine the first average probability to be 95.5% = (96% + 95%) / 2, and the second average probability to be 97.5% = (98% + 97%) / 2. The computer can then determine the fidelity value of the quantum gate (such as Figure 2 and Figure 4 G) in is 97.95%=95.5% / 97.5%.

[0066] In some embodiments, a computer may use exponential decay regression to determine an average fidelity value of a quantum gate. The computer may determine a first fidelity value by performing a first exponential decay regression using m1 and m2 as independent variables and a first probability and a third probability as response variables. The computer may then determine a second fidelity value by performing a second exponential decay regression using independent variables m1 and m2 and a second probability and a fourth probability as response variables. The computer may also determine an average fidelity value as a ratio of the first fidelity value to the second fidelity value.

[0067] For example, a computer can perform a first exponential decay regression by fitting equation (1):

[0068] p(m)=Au m +B (1)

[0069] In equation (1), m represents the number of random quantum gates in the quantum gate sequence (e.g., m1+1 for the first quantum gate sequence and m2+1 for the third quantum gate sequence), and p(m) represents the quantum bit (e.g., Figure 2 or Figure 4 Q I ) in a quantum gate sequence (e.g., m1+1 or m2+1) of random quantum gates. Figure 2 The quantum gate sequence in 200 or Figure 4 The probability that the quantum gate sequence 400 in FIG. 4 remains unchanged under multiple measurements (e.g., the first measurement or the third measurement) of the quantum gate sequence 400 in FIG. The quantity u represents the fidelity value of the quantum gate sequence as a whole. Parameters A and B can capture information about SPAM errors. After fitting equation (1), using multiple values ​​of m and p(m), a computer can determine the value of the variable u.

[0070] For example, a computer can perform a first exponential decay regression by fitting equation (2):

[0071] p′(m)=A′v m +B′ (2)

[0072] In equation (2), m has the same meaning as m in equation (1). p′(m) represents a quantum bit (e.g., Figure 3 or Figure 5 Q I ) in a quantum gate sequence (e.g., m1+1 or m2+1) of random quantum gates. Figure 3 The quantum gate sequence in 300 or Figure 5 The probability that the quantum gate sequence 500 in FIG. 5 is constant under multiple measurements (e.g., the second measurement or the fourth measurement) of the quantum gate sequence 500 in FIG. 5 is constant under multiple measurements (e.g., the second measurement or the fourth measurement) of the quantum gate sequence 500 in FIG. The variable v represents the fidelity value of the quantum gate sequence as a whole. The parameters A′ and B′ can obtain information about the SPAM error. After fitting equation (2), using multiple values ​​of m and p′(m), the computer can determine the value of the quantity v. After determining the quantities u and v, the computer can further determine the average fidelity value as

[0073] In some embodiments, after determining the average fidelity value of the quantum gate, the method for operating a quantum circuit may further cause the computer to update parameters of the quantum gate based on the average fidelity value of the quantum gate.

[0074] Consistent with some embodiments of the present disclosure, Figure 6 is a block diagram of an example system 600 for operating a quantum circuit consistent with some embodiments of the present disclosure. In some embodiments, the system 600 may include a processor configured to perform operations such as combining Figure 1-5 The operation of the quantum circuit described is performed by a computer (e.g., a classical computer). Figure 6 As shown, system 600 includes a processor 602 that may be operatively connected to a memory 604 , an input / output (I / O) module 606 , and a network interface controller (NIC) 610 .

[0075] When the processor 602 executes the instructions described herein, the system 600 can become a special-purpose machine for benchmarking quantum circuits. The processor 602 can be any type of circuit capable of manipulating or processing information. For example, the processor 602 can include any number of central processing units (CPUs), graphics processing units (GPUs), neural processing units (NPUs), microcontroller units (MCUs), optical processors, programmable logic controllers, microcontrollers, microprocessors, digital signal processors, intellectual property (IP) cores, programmable logic arrays (PLAs), programmable array logic (PALs), general array logic (GALs), complex programmable logic devices (CPLDs), field programmable gate arrays (FPGAs), systems on chips (SoCs), application-specific integrated circuits (ASICs), and the like. In some embodiments, the processor 602 can also be a group of processors grouped into a single logical component ( Figure 6 not shown).

[0076] The memory 604 may include a single memory or multiple memories that may be configured to store data 606 (e.g., instruction sets, computer code, intermediate data, or data for output). The memory 604 may include a high-speed random access memory device or a non-volatile memory device. In some embodiments, the memory 604 may include any number of random access memories (RAM), read-only memories (ROM), optical disks, magnetic disks, hard drives, solid-state drives, flash drives, secure digital (SD) cards, memory sticks, compact flash (CF) cards, etc. The memory 604 may also be a group of memories grouped into a single logical component ( Figure 6 (not shown). Processor 602 can access program instructions and data 606 and execute program instructions to perform operations or manipulations on data 606. Figure 6 As shown, the memory 604 may store an operating system 612 and a benchmark executor 614. For example, the benchmark executor 614 may include a processor for implementing a combined Figure 1-5Describes methods and instructions for benchmarking quantum circuits.

[0077] For ease of explanation and to avoid ambiguity, the processor 602 and other data processing circuitry are collectively referred to as "data processing circuitry" in this disclosure. The data processing circuitry may be implemented entirely in hardware, or as a combination of software, hardware, or firmware. Furthermore, the data processing circuitry may be a single standalone module, or may be incorporated in whole or in part into any other component of the system 600.

[0078] Input / output module (I / O) 608 can store data to and retrieve data from database 616. For example, database 616 can include data structures describing quantum circuits and data structures describing quantum gates. NIC 610 can provide wired or wireless communication between system 600 and a network (e.g., the Internet 618, an intranet, a local area network, a mobile communication network, etc.). System 600 can use NIC 610 to receive data and instructions over the network, and can use NIC 610 to send data and instructions over the network. In some embodiments, NIC 610 can include any combination of a radio frequency (RF) module, a repeater, a transceiver, a modem, a router, a gateway, a wired network adapter, a wireless network adapter, a Bluetooth adapter, an infrared adapter, a near field communication (NFC) adapter, or a cellular network chip.

[0079] like Figure 6 As shown, system 600 may also be communicatively coupled to quantum computing device 620 (e.g., via I / O 608 or NIC 610). In some embodiments, system 600 may be a classical computer (e.g., a desktop computer, laptop computer, or tablet computer) independent of quantum computing device 620. In some embodiments, system 600 may include a classical computing device (e.g., processor 602, memory 604, I / O 608, NIC 610, or database 616) and a quantum computing device (e.g., including quantum computing device 620). Quantum computing device 620 may include any number of any type of quantum circuits (including quantum gates) for operating on qubits, as well as peripherals for maintaining and supporting the quantum circuits (e.g., cryostats, laser generators, electrical oscillators). In some embodiments, quantum computing device 620 may include hardware components, a quantum data plane for preparing and storing qubits, a control and measurement plane for performing operations on qubits and measuring the resulting qubits, and a control processor plane for determining a sequence of operations and measurements based on an algorithm or measurement results. When system 600 is a classical computer, it can facilitate network access (e.g., via NIC 610), large-scale storage (e.g., using database 610), and user interaction (e.g., via I / O 608) for quantum computing device 620.

[0080] Consistent with some embodiments of the present disclosure, Figure 7 is a schematic diagram illustrating an example quantum controller 722 for operating (e.g., benchmarking, controlling qubits for computation, controlling qubits for compilation, or any manipulation of qubits) a quantum circuit (e.g., quantum circuit 702 as shown). Quantum circuit 702 may include one or more qubits. Figure 7 In the non-limiting example shown, quantum circuit 702 may include qubits 704 and 706. For example, qubits 704 and 706 may be fluoride ion qubits. To continue with this example, each of qubits 704 and 706 may be implemented using a Josephson junction (e.g., Josephson junction 708 or 710) shunted by a capacitor (e.g., capacitor 712 or 714) and an inductor (e.g., inductor 716 or 718). Each of inductors 716 and 718 may be implemented by a Josephson junction array ( Figure 7 (not shown) to achieve this. Each of qubits 704 and 706 can be configured to operate at a local minimum frequency relative to the bias magnetic flux. In this non-limiting example, qubits 704 and 706 can be coupled using capacitor 720 to achieve transverse resonant coupling (e.g., charge coupling, etc.) between qubits 704 and 706. This coupling may require aligning the qubit frequencies. When quantum circuit 702 is not operating, qubits 704 and 706 can be maintained at different frequencies.

[0081] In some embodiments, quantum circuit 702 may be implemented using a chip containing qubits 704 and 706 and the coupling therebetween. In some embodiments, quantum circuit 702 may be implemented as Figure 6 A chip in quantum computing device 620.

[0082] In some embodiments, the chip may include one or more couplings to a quantum controller 722. Quantum controller 722 may be a digital computing device (e.g., a computing device including a central processing unit, a graphics processing unit, an application-specific integrated circuit, a field-programmable gate array, or other suitable processor). Quantum controller 722 may configure quantum circuit 702 for computation (e.g., by manipulating qubits 704 and 706), provide computational gates, or read state information from quantum circuit 702.

[0083] Consistent with some embodiments of the present disclosure, quantum controller 722 can configure quantum circuit 702 by enabling gate operations on one or more qubits (e.g., including qubits 704 and 706) of quantum circuit 702. In some embodiments, quantum circuit 702 can be configured by providing one or more bias drivers to move two qubits into a resonant state. Quantum controller 722 can provide one or more bias drivers directly to circuit 702, or can provide instructions to a bias driver source (e.g., a waveform generator, etc.) to cause the bias driver source to provide bias drivers to circuit 702. In some embodiments, providing the bias drivers can include passing current through a coil external to circuit 702. In various embodiments, providing the bias drivers can include passing current through an on-chip coil. The disclosed embodiments are not limited to a particular method of providing the bias drivers or a particular method of biasing the qubits.

[0084] Consistent with some embodiments of the present disclosure, quantum controller 722 can implement computational gates on circuit 702. Quantum controller 722 can implement such gates by providing one or more computational drivers to corresponding qubits in circuit 702, or by providing instructions to a computational driver source (e.g., a waveform generator, etc.) to cause the computational driver source to provide one or more computational drivers to circuit 702. Such computational drivers may include microwave drivers. The computational drivers may include sine waves, square waves, pulse trains, or other quantum gate drivers with parameters selected by quantum controller 722 to implement quantum gates on the qubits. The one or more computational drivers may be provided to the corresponding qubits using one or more coils coupled to the corresponding qubits. The coils may be external to circuit 702 or on the chip containing circuit 702.

[0085] Consistent with some embodiments of the present disclosure, quantum controller 722 can be configured to determine state information of quantum circuit 702. In some embodiments, quantum controller 722 can measure the state of one or more qubits of circuit 702. The state can be measured upon completion of one or more sequences of quantum operations. In some embodiments, quantum controller 722 can provide a probe signal (e.g., a microwave probe tone) to a coupled resonator of circuit 702, or provide instructions to a readout device (e.g., an arbitrary waveform generator) that provides the probe signal. In various embodiments, quantum controller 722 can include, or be configured to receive information from, a detector configured to determine the amplitude and phase of an output signal received from the coupled resonator in response to the microwave probe tone. The amplitude and phase of the output signal can be used to determine the state of the probed qubit. The disclosed embodiments are not limited to any particular method of measuring the state of a qubit.

[0086] The disclosed embodiments are not limited to embodiments in which quantum controller 722 controls a single quantum circuit. In some embodiments, quantum controller 722 can control multiple quantum circuits (which may be identical in implementation or may be different in implementation). For example, quantum controller 722 can control a first quantum circuit based on fluxonium qubits and a second quantum circuit based on flux qubits. In some embodiments, quantum controller 722 can independently control multiple quantum circuits. For example, in some cases, each of the multiple quantum circuits can perform a different, simultaneous computation. In various cases, multiple quantum circuits can participate in the same computation (e.g., parallel computation, etc.).

[0087] Consistent with some embodiments of the present disclosure, quantum controller 722 may configure quantum circuit 702 and may provide computational gates to circuit 702 based at least in part on the obtained state information. In some embodiments, quantum controller 722 may be used as Figure 6 Part of the computing device 620.

[0088] As an example, Figure 8 800 is a flow chart illustrating an example method 800 for operating a quantum circuit consistent with some embodiments of the present disclosure. The method 800 may be performed by at least one data processing circuit (e.g., Figure 6 In some embodiments, the method 800 may be implemented as a computer program product (eg, embodied in a computer-readable medium) that includes instructions to be executed by a computer (eg, Figure 6 In some embodiments, the method 800 may be implemented as a hardware product (e.g., a computer program product) storing computer executable instructions (e.g., program code). Figure 6 ), and the hardware product can be a standalone or integrated part of any system 600.

[0089] refer to Figure 8 In step 802, a data processing circuit (eg, a data processing circuit of a classical computer) may be based on a quantum gate (eg, Figure 2 The parameters of the quantum gate G in the _G_ are used to generate m1 (m1 is an integer) random unitary quantum gates (for example, Figure 2 The unitary quantum gates U1, U2, ..., U m1 ) representation (e.g., a matrix or tensor). In some embodiments, the quantum gate can be implemented as an electromagnetic signal (e.g., a microwave pulse signal generated by an external oscillator). In this case, the parameters of the quantum gate can include at least one of the length, amplitude, or shape of the electromagnetic signal.

[0090] In some embodiments, to generate representations of m1 random unitary quantum gates, the data processing circuitry may generate representations of the m1 random unitary quantum gates based on Haar measurements. In some embodiments, the data processing circuitry may generate representations of the m1 random unitary quantum gates by pseudo-randomly sampling the unitary operator space based on a uniform probability distribution. It should be noted that the generated m1 random unitary quantum gates are not limited to Clifford gates or any other type of quantum gates.

[0091] In step 804, the data processing circuit can process the data by connecting the quantum gate (e.g., Figure 2 The quantum gate G in the example is inserted into each adjacent unitary quantum gate of m1 random unitary quantum gates (e.g., Figure 2 Unitary quantum gate U i and U i+1 where i = 1, 2, ..., m1), and the quantum gate and the first restored quantum gate (e.g., Figure 2 The first recovery quantum gate R1 in is attached (e.g., by connecting to Figure 2 U in m1 ) to m1 random unitary quantum gates to determine the first quantum gate sequence (e.g., Figure 2 ) such that the first quantum gate sequence is equivalent to the identity operator (e.g., the unit Pauli gate I). As an example, Figure 2 As shown, R1 can be a combination of quantum gates U1·G·U2·...·G·U m1 ·G's recovery quantum gate. In fact, Figure 2 The quantum gate sequence 200 in the equation can be equivalent to the identity operator, namely U1·G·U2·...·G·U m1 ·G·R1=I.

[0092] In step 806, the data processing circuit can connect m1 random unitary quantum gates and the second restoration quantum gate (e.g., Figure 3 The second restoring quantum gate R′1 in Figure 3 U′ in m1 ) to m1 random unitary quantum gates to determine the second quantum gate sequence (e.g., Figure 3 , such that the second quantum gate sequence is equivalent to the identity operator (e.g., the unit Pauli gate I). Figure 3 As shown, R′1 can be a combination of quantum gates U′1·U′2·..., U′ n1 The recovery quantum gate. Effectively, Figure 3 The quantum gate sequence 300 in the equation can be equivalent to the identity operator, namely U′1·U′2·..., U′ n1·R′1=1.

[0093] At step 808, the data processing circuit may (eg, via Figure 6 NIC 610 in the quantum computing device (e.g., Figure 6 In some embodiments, the quantum computing device may include a quantum circuit (e.g., Figure 7 ) and a quantum controller configured to operate the quantum circuit (e.g., Figure 7 722 in the quantum controller). A quantum circuit may include qubits (e.g., Figure 7 qubit 704 or 706 in).

[0094] At step 810, the data processing circuit may apply a first quantum gate sequence (e.g., quantum gate sequence 200) to a qubit (e.g., Figure 2 The input qubit Q in I ) after the first number, received from the quantum computing device (e.g., via Figure 6 NIC 610) qubits (e.g., Figure 2 The output qubit Q in O In some embodiments, the qubit may be implemented as a superconducting qubit.

[0095] At step 812 , the data processing circuitry may determine a fidelity value for the quantum gate based on a probability that the quantum state of the qubit is unchanged over a first number of measurements of the qubit.

[0096] Consistent with some embodiments of the present disclosure, after determining the fidelity value, the data processing circuitry may further update parameters of the quantum gate based on the fidelity value of the quantum gate. In some embodiments, the computer may update the parameters to optimize the quantum gate such that the fidelity value may increase if valid new parameters are applied to the quantum gate.

[0097] Consistent with some embodiments of the present disclosure, after determining the fidelity value, the data processing circuit may further process the data based on quantum gates (e.g., Figure 4 The parameters of the quantum gate G in the above example generate m2 (m2 is an integer different from m1) random unitary quantum gates (for example, Figure 4 The unitary quantum gates V1, V, ..., V in m2 ) representation (e.g., a matrix or tensor). The data processing circuit can then process the data by switching between each adjacent unitary quantum gate (e.g., Figure 4 Unitary quantum gate V in i and V i+1where i = 1, 2, ..., m2) and quantum gates are inserted between them (e.g., Figure 4 ), and convert the quantum gate G into a second recovery quantum gate (e.g., Figure 4 The second recovery quantum gate R2 in Figure 4 V in m2 ) to m2 random unitary quantum gates, so that the second quantum gate sequence is equivalent to the identity operator (e.g., the identity Pauli gate I) to determine the second quantum gate sequence (e.g., Figure 4 As an example, Figure 4 As shown, R2 can be a combination of quantum gates V1·G·V2·...·G·V m2 ·G's recovery quantum gate. In fact, Figure 4 The quantum gate sequence 400 in is equivalent to the identity operator, that is, V1·G·V2·...·G·V m2 ·G·R2=I.

[0098] In some embodiments, to generate representations of m2 random unitary quantum gates, the method may include causing a computer to generate representations of the m2 random unitary quantum gates based on Haar measurements. In some embodiments, to generate representations of the m2 random unitary quantum gates, the method may include causing a computer to generate representations of the m2 random unitary quantum gates by pseudo-randomly sampling a unitary operator space according to a uniform probability distribution. It should be noted that the generated m2 random unitary quantum gates are not limited to Clifford gates or any other type of quantum gates.

[0099] After determining the representation of the second sequence of quantum gates, the data processing circuit may further transmit the data to the quantum computing device (e.g., Figure 6 The quantum computing device 620 in Figure 6 The NIC 610 in FIG. 4 corresponds to the hardware instructions for the representation of the second quantum gate sequence. Thereafter, the quantum computing device applies the second quantum gate sequence (e.g., quantum gate sequence 400) to the qubit (e.g., Figure 4 The input qubit Q in I ) After the second number, the data processing circuit can receive (e.g., via Figure 6 The second number of measurements of the qubits (e.g., Figure 4 The output qubit Q in O After receiving a second number of measurements of the qubit, the data processing circuitry may determine a second fidelity value for the quantum gate based on a probability that the quantum state of the qubit is unchanged across the second number of measurements of the qubit.

[0100] After determining the second fidelity value, the data processing circuitry may determine an average fidelity value of the quantum gate based on the fidelity value and the second fidelity value. In some embodiments, the computer may determine the average fidelity value as the average of the fidelity value and the second fidelity value. In some embodiments, the data processing circuitry may determine the average fidelity value of the quantum gate by performing an exponential decay regression, where m1 and m2 are independent variables and the fidelity value and the second fidelity value are response variables. The computer may further determine the average fidelity value as a decay rate of the exponential decay regression.

[0101] In some embodiments, after determining the average fidelity value of the quantum gate, the data processing circuit may further update the parameters of the quantum gate based on the average fidelity value of the quantum gate.

[0102] In some embodiments, a non-volatile computer-readable storage medium including instructions is also provided, and these instructions can be executed by a device for performing the above method (e.g., the disclosed encoder and decoder). Common forms of non-volatile media include, for example, a floppy disk, a flexible disk, a hard disk, a solid-state drive, a tape or any other magnetic data storage medium, a compact disk read-only memory (CD-ROM), any other optical data storage medium, any physical medium with a hole pattern, a random access memory (RAM), a programmable read-only memory (PROM) and an erasable programmable read-only memory (EPROM), a flash memory (FLASH)-EPROM or any other flash memory, a volatile random access memory (NVRAM), a cache, a register, any other memory chip or cartridge, and network versions thereof. The device may include one or more processors (CPUs), input / output interfaces, a network interface, and / or memory.

[0103] The embodiments may be further described using the following terms:

[0104] 1. A non-transitory computer-readable medium storing a set of instructions, the set of instructions being executable by at least one processor of a device to cause the device to perform a method, the method comprising:

[0105] Based on the parameters of the quantum gate, generate m1 random unitary quantum gate representations, where m1 is an integer;

[0106] Determine a representation of a first quantum gate sequence by inserting the quantum gate between each adjacent unitary quantum gate of the m1 random unitary quantum gates and appending the quantum gate and a first restoring quantum gate to the m1 random unitary quantum gates so that the first quantum gate sequence is equivalent to an identity operator;

[0107] determining a representation of a second quantum gate sequence by connecting the m1 random unitary quantum gates and appending a second restoring quantum gate to the m1 random unitary quantum gates so that the second quantum gate sequence is equivalent to the identity operator;

[0108] Sending hardware instructions corresponding to the representation of the first quantum gate sequence and hardware instructions corresponding to the representation of the second quantum gate sequence to a quantum computing device;

[0109] receiving, from the quantum computing device, a first number of measurements of the qubit after the quantum computing device applies the first sequence of quantum gates to the qubit the first number of times, and receiving, from the quantum computing device, a second number of measurements of the qubit after the quantum computing device applies the second sequence of quantum gates to the qubit the second number of times; and

[0110] The fidelity value of the quantum gate is determined based on a first probability that the quantum state of the qubit is unchanged over the first number of measurements of the qubit and a second probability that the quantum state of the qubit is unchanged over the second number of measurements of the qubit.

[0111] 2. The non-transitory computer-readable medium of clause 1, wherein the set of instructions executable by the at least one processor of the device causes the device to further perform:

[0112] Parameters of the quantum gate are updated based on the fidelity value of the quantum gate.

[0113] 3. The non-transitory computer-readable medium of clause 1, wherein the set of instructions executable by the at least one processor of the device causes the device to further perform:

[0114] Based on the parameters of the quantum gate, generating representations of m2 random unitary quantum gates, where m2 is an integer different from m1;

[0115] Determine a representation of a third quantum gate sequence by inserting the quantum gate between each adjacent unitary quantum gate of the m2 random unitary quantum gates and appending the quantum gate and a third restoring quantum gate to the m2 random unitary quantum gates so that the third quantum gate sequence is equivalent to the identity operator;

[0116] determining a representation of a fourth quantum gate sequence by connecting the m2 random unitary quantum gates and appending a fourth restoring quantum gate to the m2 random unitary quantum gates so that the fourth quantum gate sequence is equivalent to the identity operator;

[0117] Sending hardware instructions corresponding to the representation of the third quantum gate sequence and hardware instructions corresponding to the representation of the fourth quantum gate sequence to the quantum computing device;

[0118] receiving, from the quantum computing device, a third number of measurements of the qubit after the quantum computing device applies the third sequence of quantum gates to the qubit the third number of times, and receiving, from the quantum computing device, a fourth number of measurements of the qubit after the quantum computing device applies the fourth sequence of quantum gates to the qubit the fourth number of times;

[0119] determining a third probability that the quantum state of the qubit is unchanged over the third number of measurements of the qubit and a fourth probability that the quantum state of the qubit is unchanged over the fourth number of measurements of the qubit; and

[0120] An average fidelity value of the quantum gate is determined based on the first probability, the second probability, the third probability, and the fourth probability.

[0121] 4. The non-transitory computer-readable medium of clause 3, wherein determining the average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability comprises:

[0122] determining an average of the first probability and the third probability as a first average probability, and determining an average of the second probability and the fourth probability as a second average probability; and

[0123] The average fidelity value is determined as a ratio between the first average probability and the second average probability.

[0124] 5. The non-transitory computer-readable medium of clause 3, wherein determining the average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability comprises:

[0125] performing a first exponential decay regression to determine a first fidelity value by using m1 and m2 as independent variables and using the first probability and the third probability as response variables;

[0126] determining a second fidelity value by performing a second exponential decay regression using m1 and m2 as independent variables and using the second probability and the fourth probability as response variables; and

[0127] The average fidelity value is determined as a ratio between the first fidelity value and the second fidelity value.

[0128] 6. The non-transitory computer-readable medium of clause 3, wherein the set of instructions executable by the at least one processor of the device causes the device to further perform:

[0129] The parameters of the quantum gate are updated based on the average fidelity value of the quantum gate.

[0130] 7. The non-transitory computer-readable medium of any one of clauses 1 to 6, wherein the representation of the m1 random unitary quantum gates comprises a matrix.

[0131] 8. The non-transitory computer-readable medium of any one of clauses 1 to 7, wherein generating the representation of m1 random unitary quantum gates comprises:

[0132] The representation of m1 random unitary quantum gates is generated according to Haar measurement.

[0133] 9. The non-transitory computer-readable medium of any one of clauses 1 to 7, wherein generating the representation of m1 random unitary quantum gates comprises:

[0134] The representation of m1 random unitary quantum gates is generated by pseudo-random sampling of the unitary operator space and combining it with a uniform probability distribution.

[0135] 10. The non-transitory computer-readable medium of any one of clauses 1 to 9, wherein the qubit comprises a superconducting qubit.

[0136] 11. The non-transitory computer-readable medium of clause 10, wherein the quantum gate comprises an electromagnetic signal, and the parameter of the quantum gate comprises at least one of a length, an amplitude, or a shape of the electromagnetic signal.

[0137] 12. The non-transitory computer-readable medium of any one of clauses 1 to 11, wherein determining the fidelity value of the quantum gate comprises:

[0138] A fidelity value of the quantum gate is determined as a ratio between the first probability and the second probability.

[0139] 13. The non-transitory computer-readable medium of any one of clauses 1 to 12, wherein the quantum computing device comprises a quantum circuit and a quantum controller configured to operate the quantum circuit, and the quantum circuit comprises the qubit.

[0140] 14. A device comprising:

[0141] a memory configured to store an instruction set; and

[0142] one or more processors communicatively coupled to the memory and configured to execute the set of instructions to cause the device to perform:

[0143] Based on the parameters of the quantum gate, generate m1 random unitary quantum gate representations, where m1 is an integer;

[0144] Determine a representation of a first quantum gate sequence by inserting the quantum gate between each adjacent unitary quantum gate of the m1 random unitary quantum gates and appending the quantum gate and a first restoring quantum gate to the m1 random unitary quantum gates so that the first quantum gate sequence is equivalent to an identity operator;

[0145] determining a representation of a second quantum gate sequence by connecting the m1 random unitary quantum gates and appending a second restoring quantum gate to the m1 random unitary quantum gates so that the second quantum gate sequence is equivalent to the identity operator;

[0146] Sending hardware instructions corresponding to the representation of the first quantum gate sequence and hardware instructions corresponding to the representation of the second quantum gate sequence to a quantum computing device;

[0147] receiving, from the quantum computing device, a first number of measurements of the qubit after the quantum computing device applies the first sequence of quantum gates to the qubit the first number of times, and receiving, from the quantum computing device, a second number of measurements of the qubit after the quantum computing device applies the second sequence of quantum gates to the qubit the second number of times; and

[0148] The fidelity value of the quantum gate is determined based on a first probability that the quantum state of the qubit is unchanged over the first number of measurements of the qubit and a second probability that the quantum state of the qubit is unchanged over the second number of measurements of the qubit.

[0149] 15. The apparatus of clause 14, wherein the one or more processors are further configured to execute the set of instructions to cause the apparatus to perform:

[0150] The parameters of the quantum gate are updated based on the fidelity value of the quantum gate.

[0151] 16. The apparatus of clause 14, wherein the one or more processors are further configured to execute the set of instructions to cause the apparatus to perform:

[0152] Based on the parameters of the quantum gate, generating representations of m2 random unitary quantum gates, where m2 is an integer different from m1;

[0153] Determine a representation of a third quantum gate sequence by inserting the quantum gate between each adjacent unitary quantum gate of the m2 random unitary quantum gates and appending the quantum gate and a third restoring quantum gate to the m2 random unitary quantum gates so that the third quantum gate sequence is equivalent to the identity operator;

[0154] determining a representation of a fourth quantum gate sequence by connecting the m2 random unitary quantum gates and appending a fourth restoring quantum gate to the m2 random unitary quantum gates so that the fourth quantum gate sequence is equivalent to the identity operator;

[0155] Sending hardware instructions corresponding to the representation of the third quantum gate sequence and hardware instructions corresponding to the representation of the fourth quantum gate sequence to the quantum computing device;

[0156] receiving, from the quantum computing device, a third number of measurements of the qubit after the quantum computing device applies the third sequence of quantum gates to the qubit the third number of times, and receiving, from the quantum computing device, a fourth number of measurements of the qubit after the quantum computing device applies the fourth sequence of quantum gates to the qubit the fourth number of times;

[0157] determining a third probability that the quantum state of the qubit is unchanged over the third number of measurements of the qubit and a fourth probability that the quantum state of the qubit is unchanged over the fourth number of measurements of the qubit; and

[0158] An average fidelity value of the quantum gate is determined based on the first probability, the second probability, the third probability, and the fourth probability.

[0159] 17. The apparatus of clause 16, wherein determining the average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability comprises:

[0160] determining an average of the first probability and the third probability as a first average probability, and determining an average of the second probability and the fourth probability as a second average probability; and

[0161] The average fidelity value is determined as a ratio between the first average probability and the second average probability.

[0162] 18. The apparatus of clause 16, wherein determining the average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability comprises:

[0163] performing a first exponential decay regression to determine a first fidelity value by using m1 and m2 as independent variables and using the first probability and the third probability as response variables;

[0164] determining a second fidelity value by performing a second exponential decay regression using m1 and m2 as independent variables and using the second probability and the fourth probability as response variables; and

[0165] The average fidelity value is determined as a ratio between the first fidelity value and the second fidelity value.

[0166] 19. The apparatus of clause 16, wherein the one or more processors are further configured to execute the set of instructions to cause the apparatus to perform:

[0167] The parameters of the quantum gate are updated based on the average fidelity value of the quantum gate.

[0168] 20. Apparatus according to any of clauses 14-19, wherein the representation of the m1 random unitary quantum gates comprises a matrix.

[0169] 21. The apparatus of any of clauses 14-20, wherein generating a representation of m1 random unitary quantum gates comprises:

[0170] Generate representations of m1 random unitary quantum gates based on Haar measurements.

[0171] 22. The apparatus of any of clauses 14-20, wherein generating a representation of m1 random unitary quantum gates comprises:

[0172] The representation of m1 random unitary quantum gates is generated by pseudo-random sampling of the unitary operator space and combining it with a uniform probability distribution.

[0173] 23. Apparatus according to any of clauses 14-22, wherein the qubit comprises a superconducting qubit.

[0174] 24. The apparatus of clause 23, wherein the quantum gate comprises an electromagnetic signal, and the parameters of the quantum gate comprise at least one of a length, an amplitude, or a shape of the electromagnetic signal.

[0175] 25. The apparatus of any of clauses 14-24, wherein determining the fidelity value of the quantum gate comprises:

[0176] A fidelity value of the quantum gate is determined as a ratio between the first probability and the second probability.

[0177] 26. The apparatus of any of clauses 14-25, wherein the quantum computing device comprises a quantum circuit and a quantum controller configured to operate the quantum circuit, and the quantum circuit comprises the qubit.

[0178] 27. A computer-implemented method comprising:

[0179] Based on the parameters of the quantum gate, generate m1 random unitary quantum gate representations, where m1 is an integer;

[0180] Determine a representation of a first quantum gate sequence by inserting the quantum gate between each adjacent unitary quantum gate of the m1 random unitary quantum gates and appending the quantum gate and a first restoring quantum gate to the m1 random unitary quantum gates so that the first quantum gate sequence is equivalent to an identity operator;

[0181] determining a representation of a second quantum gate sequence by connecting the m1 random unitary quantum gates and appending a second restoring quantum gate to the m1 random unitary quantum gates so that the second quantum gate sequence is equivalent to the identity operator;

[0182] Sending hardware instructions corresponding to the representation of the first quantum gate sequence and hardware instructions corresponding to the representation of the second quantum gate sequence to a quantum computing device;

[0183] receiving, from the quantum computing device, a first number of measurements of the qubit after the quantum computing device applies the first sequence of quantum gates to the qubit the first number of times, and receiving, from the quantum computing device, a second number of measurements of the qubit after the quantum computing device applies the second sequence of quantum gates to the qubit the second number of times; and

[0184] The fidelity value of the quantum gate is determined based on a first probability that the quantum state of the qubit is unchanged over the first number of measurements of the qubit and a second probability that the quantum state of the qubit is unchanged over the second number of measurements of the qubit.

[0185] 28. The computer-implemented method of clause 27, further comprising:

[0186] Parameters of the quantum gate are updated based on the fidelity value of the quantum gate.

[0187] 29. The computer-implemented method of clause 27, further comprising:

[0188] Based on the parameters of the quantum gate, generating representations of m2 random unitary quantum gates, where m2 is an integer different from m1;

[0189] Determine a representation of a third quantum gate sequence by inserting the quantum gate after each adjacent unitary quantum gate of the m2 random unitary quantum gates and appending a third restoring quantum gate to the m2 random unitary quantum gates so that the third quantum gate sequence is equivalent to the identity operator;

[0190] determining a representation of a fourth quantum gate sequence by connecting the m2 random unitary quantum gates and appending a fourth restoring quantum gate to the m2 random unitary quantum gates so that the fourth quantum gate sequence is equivalent to the identity operator;

[0191] Sending hardware instructions corresponding to the representation of the third quantum gate sequence and hardware instructions corresponding to the representation of the fourth quantum gate sequence to the quantum computing device;

[0192] receiving, from the quantum computing device, a third number of measurements of the qubit after the quantum computing device applies the third sequence of quantum gates to the qubit the third number of times, and receiving, from the quantum computing device, a fourth number of measurements of the qubit after the quantum computing device applies the fourth sequence of quantum gates to the qubit the fourth number of times;

[0193] determining a third probability that the quantum state of the qubit is unchanged over the third number of measurements of the qubit and a fourth probability that the quantum state of the qubit is unchanged over the fourth number of measurements of the qubit; and

[0194] An average fidelity value of the quantum gate is determined based on the first probability, the second probability, the third probability, and the fourth probability.

[0195] 30. The computer-implemented method of clause 29, wherein determining the average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability comprises:

[0196] determining an average of the first probability and the third probability as a first average probability, and determining an average of the second probability and the fourth probability as a second average probability; and

[0197] The average fidelity value is determined as a ratio between the first average probability and the second average probability.

[0198] 31. The computer-implemented method of clause 29, wherein determining the average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability comprises:

[0199] performing a first exponential decay regression to determine a first fidelity value by using m1 and m2 as independent variables and using the first probability and the third probability as response variables;

[0200] determining a second fidelity value by performing a second exponential decay regression using m1 and m2 as independent variables and using the second probability and the fourth probability as response variables; and

[0201] The average fidelity value is determined as a ratio between the first fidelity value and the second fidelity value.

[0202] 32. The computer-implemented method of clause 29, further comprising:

[0203] Based on the average fidelity value of the quantum gate, the parameters of the quantum gate are updated.

[0204] 33. The computer-implemented method of any of clauses 27-32, wherein the representation of the m1 random unitary quantum gates comprises a matrix.

[0205] 34. A computer-implemented method according to any of clauses 27 to 33, wherein generating a representation of m1 random unitary quantum gates comprises:

[0206] Generate representations of m1 random unitary quantum gates based on Haar measurements.

[0207] 35. The computer-implemented method of any of clauses 27-33, wherein generating a representation of m1 random unitary quantum gates comprises:

[0208] By pseudo-randomly sampling the unitary operator space and combining it with a uniform probability distribution, representations of m1 random unitary quantum gates are generated.

[0209] 36. A computer-implemented method according to any of clauses 27-35, wherein the qubit comprises a superconducting qubit.

[0210] 37. The computer-implemented method of clause 36, wherein the quantum gate comprises an electromagnetic signal, and the parameters of the quantum gate comprise at least one of a length, an amplitude, or a shape of the electromagnetic signal.

[0211] 38. A computer-implemented method according to any of clauses 27-37, wherein determining the fidelity value of the quantum gate comprises:

[0212] A fidelity value of the quantum gate is determined as a ratio between the first probability and the second probability.

[0213] 39. A computer-implemented method according to any of clauses 27-38, wherein the quantum computing device comprises a quantum circuit and a quantum controller configured to operate the quantum circuit, and the quantum circuit comprises the qubit.

[0214] It should be noted that the relational terms herein such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation and do not require or imply any actual relationship or order between these entities or operations. In addition, the words "comprise", "have", "include" and "include" and other similar forms are intended to be equivalent in meaning and are open ended, because one or more items following any of these words do not mean an exhaustive list of such items or multiple items, or to be limited to the one or more items listed. As used herein, the indefinite articles "a" and "an" mean "one or more". Similarly, the use of plural terms does not necessarily indicate plural number unless it is clear in a given context.

[0215] As used herein, unless otherwise stated, the term "or" includes all possible combinations unless otherwise feasible. For example, if it is stated that a component can include A or B, then, unless otherwise stated or otherwise feasible, the component can include A, or B, or A and B. As a second example, if it is stated that a component can include A, B, or C, then, unless otherwise stated or otherwise feasible, the component can include A, or B, or C, or A and B, or A and C, or B and C, or A, B, and C.

[0216] It should be understood that the above embodiments can be implemented by hardware or software (program code) or a combination of hardware and software. If implemented by software, it can be stored in the above-mentioned computer-readable medium. When executed by a processor, the software can perform the disclosed method. The computing units and other functional units described in this disclosure can be implemented by hardware or software or a combination of hardware and software. Those of ordinary skill in the art will also understand that multiple modules / units in the above-mentioned modules / units can be combined into one module / unit, and each of the above-mentioned modules / units can be further divided into multiple sub-modules / sub-units.

[0217] In the foregoing description, embodiments have been described with reference to many specific details, which may vary depending on the implementation. Certain adaptations and modifications may be made to the described embodiments. Other embodiments will be apparent to those skilled in the art from consideration of the description and practice of the invention disclosed herein. The description and examples are to be considered as examples only, with the true scope and spirit of the invention being indicated by the following claims. The sequence of steps shown in the figures is also intended to be illustrative only and is not intended to be limited to any particular sequence of steps. Therefore, it will be understood by those skilled in the art that these steps may be performed in different orders while implementing the same method.

[0218] Other embodiments will be apparent from consideration of the specification and practice of the embodiments disclosed herein. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosed embodiments being indicated by the following claims.

Claims

1. A non-transitory computer-readable medium storing a set of instructions, the set of instructions being executable by at least one processor of a device to cause the device to perform a method, the method comprising: Based on the parameters of the quantum gate, generate m1 random unitary quantum gate representations, where m1 is an integer; Determine a representation of the first quantum gate sequence by inserting the quantum gate between each adjacent unitary quantum gate of the m1 random unitary quantum gates and appending the quantum gate and the first restoring quantum gate to the m1 random unitary quantum gates so that the first quantum gate sequence is equivalent to the identity operator; determining a representation of the second quantum gate sequence by connecting the m1 random unitary quantum gates and appending a second restoring quantum gate to the m1 random unitary quantum gates so that the second quantum gate sequence is equivalent to the identity operator; Sending hardware instructions corresponding to the representation of the first quantum gate sequence and hardware instructions corresponding to the representation of the second quantum gate sequence to a quantum computing device; receiving, from the quantum computing device, a measurement of the qubit a first number of times after the quantum computing device applies the first sequence of quantum gates to the qubit a first number, and receiving, from the quantum computing device, a measurement of the qubit a second number of times after the quantum computing device applies the second sequence of quantum gates to the qubit a second number; and The fidelity value of the quantum gate is determined based on a first probability that the quantum state of the qubit is unchanged over the first number of measurements of the qubit and a second probability that the quantum state of the qubit is unchanged over the second number of measurements of the qubit.

2. The non-transitory computer-readable medium of claim 1, wherein: The set of instructions executable by the at least one processor of the device causes the device to further perform: Parameters of the quantum gate are updated based on the fidelity value of the quantum gate.

3. The non-transitory computer-readable medium of claim 1 , wherein: The set of instructions executable by the at least one processor of the device causes the device to further perform: Based on the parameters of the quantum gate, generate representations of m2 random unitary quantum gates, where m2 is an integer different from m1 Determine a representation of the third quantum gate sequence by inserting the quantum gate between each adjacent unitary quantum gate of the m2 random unitary quantum gates and appending the quantum gate and a third restoring quantum gate to the m2 random unitary quantum gates so that the third quantum gate sequence is equivalent to the identity operator; determining a representation of the fourth quantum gate sequence by connecting the m2 random unitary quantum gates and attaching a fourth restoring quantum gate to the m2 random unitary quantum gates so that the fourth quantum gate sequence is equivalent to the identity operator; Sending hardware instructions corresponding to the representation of the third quantum gate sequence and hardware instructions corresponding to the representation of the fourth quantum gate sequence to the quantum computing device; receiving, from the quantum computing device, a measurement of the qubit a third number of times after the quantum computing device applies the third sequence of quantum gates to the qubit a third number of times, and receiving, from the quantum computing device, a measurement of the qubit a fourth number of times after the quantum computing device applies the fourth sequence of quantum gates to the qubit a fourth number of times; determining a third probability that the quantum state of the qubit is unchanged over the third number of measurements of the qubit and a fourth probability that the quantum state of the qubit is unchanged over the fourth number of measurements of the qubit; and An average fidelity value of the quantum gate is determined based on the first probability, the second probability, the third probability, and the fourth probability.

4. The non-transitory computer-readable medium of claim 3, wherein: Determining the average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability includes: determining an average of the first probability and the third probability as a first average probability, and determining an average of the second probability and the fourth probability as a second average probability; and The average fidelity value is determined as a ratio between the first average probability and the second average probability.

5. The non-transitory computer-readable medium of claim 3, wherein: Determining the average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability includes: performing a first exponential decay regression to determine a first fidelity value by using m1 and m2 as independent variables and using the first probability and the third probability as response variables; determining a second fidelity value by performing a second exponential decay regression using m1 and m2 as independent variables and using the second probability and the fourth probability as response variables; and The average fidelity value is determined as a ratio between the first fidelity value and the second fidelity value.

6. The non-transitory computer-readable medium of claim 3, wherein: The set of instructions executable by the at least one processor of the device causes the device to further perform: The parameters of the quantum gate are updated based on the average fidelity value of the quantum gate.

7. The non-transitory computer-readable medium of claim 1 , wherein: The representation of the m1 random unitary quantum gates includes a matrix.

8. The non-transitory computer-readable medium of claim 1, wherein: The representation of generating m1 random unitary quantum gates includes: The representation of m1 random unitary quantum gates is generated according to Haar measurement.

9. The non-transitory computer-readable medium of claim 1, wherein: The representation of generating m1 random unitary quantum gates includes: The representation of m1 random unitary quantum gates is generated by pseudo-random sampling of the unitary operator space and combining it with a uniform probability distribution.

10. The non-transitory computer readable medium of claim 1, wherein: The qubits include superconducting qubits.

11. The non-transitory computer readable medium of claim 10, wherein: The quantum gate comprises an electromagnetic signal, and the parameter of the quantum gate comprises at least one of a length, an amplitude, or a shape of the electromagnetic signal.

12. The non-transitory computer-readable medium of claim 1, wherein: Determining the fidelity value of the quantum gate includes: The fidelity value of the quantum gate is determined as a ratio between the first probability and the second probability.

13. A device comprising: a memory configured to store an instruction set; as well as one or more processors communicatively coupled to the memory and configured to execute the set of instructions to cause the device to perform: Based on the parameters of the quantum gate, generate m1 random unitary quantum gate representations, where m1 is an integer; Determine a representation of the first quantum gate sequence by inserting the quantum gate between each adjacent unitary quantum gate of the m1 random unitary quantum gates and appending the quantum gate and the first restoring quantum gate to the m1 random unitary quantum gates so that the first quantum gate sequence is equivalent to the identity operator; determining a representation of the second quantum gate sequence by connecting the m1 random unitary quantum gates and appending a second restoring quantum gate to the m1 random unitary quantum gates so that the second quantum gate sequence is equivalent to the identity operator; Sending hardware instructions corresponding to the representation of the first quantum gate sequence and hardware instructions corresponding to the representation of the second quantum gate sequence to a quantum computing device; receiving, from the quantum computing device, a measurement of the qubit a first number of times after the quantum computing device applies the first sequence of quantum gates to the qubit a first number, and receiving, from the quantum computing device, a measurement of the qubit a second number of times after the quantum computing device applies the second sequence of quantum gates to the qubit a second number; and The fidelity value of the quantum gate is determined based on a first probability that the quantum state of the qubit is unchanged over the first number of measurements of the qubit and a second probability that the quantum state of the qubit is unchanged over the second number of measurements of the qubit.

14. The apparatus according to claim 13, wherein The one or more processors are further configured to execute the set of instructions to cause the device to perform: The parameters of the quantum gate are updated based on the fidelity value of the quantum gate.

15. The apparatus according to claim 13, wherein The one or more processors are further configured to execute the set of instructions to cause the device to perform: Based on the parameters of the quantum gate, generating representations of m2 random unitary quantum gates, where m2 is an integer different from m1; Determine a representation of the third quantum gate sequence by inserting the quantum gate between each adjacent unitary quantum gate of the m2 random unitary quantum gates and appending the quantum gate and a third restoring quantum gate to the m2 random unitary quantum gates so that the third quantum gate sequence is equivalent to the identity operator; determining a representation of the fourth quantum gate sequence by connecting the m2 random unitary quantum gates and attaching a fourth restoring quantum gate to the m2 random unitary quantum gates so that the fourth quantum gate sequence is equivalent to the identity operator; Sending hardware instructions corresponding to the representation of the third quantum gate sequence and hardware instructions corresponding to the representation of the fourth quantum gate sequence to the quantum computing device; receiving, from the quantum computing device, a measurement of the qubit a third number of times after the quantum computing device applies the third sequence of quantum gates to the qubit a third number of times, and receiving, from the quantum computing device, a measurement of the qubit a fourth number of times after the quantum computing device applies the fourth sequence of quantum gates to the qubit a fourth number of times; determining a third probability that the quantum state of the qubit is unchanged over the third number of measurements of the qubit and a fourth probability that the quantum state of the qubit is unchanged over the fourth number of measurements of the qubit; and An average fidelity value of the quantum gate is determined based on the first probability, the second probability, the third probability, and the fourth probability.

16. The apparatus according to claim 15, wherein Determining the average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability includes: determining an average of the first probability and the third probability as a first average probability, and determining an average of the second probability and the fourth probability as a second average probability; and The average fidelity value is determined as a ratio between the first average probability and the second average probability.

17. The apparatus according to claim 15, wherein Determining the average fidelity value of the quantum gate based on the first probability, the second probability, the third probability, and the fourth probability includes: performing a first exponential decay regression to determine a first fidelity value by using m1 and m2 as independent variables and using the first probability and the third probability as response variables; determining a second fidelity value by performing a second exponential decay regression using m1 and m2 as independent variables and using the second probability and the fourth probability as response variables; and The average fidelity value is determined as a ratio between the first fidelity value and the second fidelity value.

18. The apparatus according to claim 15, wherein The one or more processors are further configured to execute the set of instructions to cause the device to perform: The parameters of the quantum gate are updated based on the average fidelity value of the quantum gate.

19. A computer-implemented method comprising: Based on the parameters of the quantum gate, generate m1 random unitary quantum gate representations, where m1 is an integer; Determine a representation of the first quantum gate sequence by inserting the quantum gate between each adjacent unitary quantum gate of the m1 random unitary quantum gates and appending the quantum gate and the first restoring quantum gate to the m1 random unitary quantum gates so that the first quantum gate sequence is equivalent to the identity operator; determining a representation of the second quantum gate sequence by connecting the m1 random unitary quantum gates and appending a second restoring quantum gate to the m1 random unitary quantum gates so that the second quantum gate sequence is equivalent to the identity operator; Sending hardware instructions corresponding to the representation of the first quantum gate sequence and hardware instructions corresponding to the representation of the second quantum gate sequence to a quantum computing device; receiving, from the quantum computing device, a measurement of the qubit a first number of times after the quantum computing device applies the first sequence of quantum gates to the qubit a first number, and receiving, from the quantum computing device, a measurement of the qubit a second number of times after the quantum computing device applies the second sequence of quantum gates to the qubit a second number; and The fidelity value of the quantum gate is determined based on a first probability that the quantum state of the qubit is unchanged over the first number of measurements of the qubit and a second probability that the quantum state of the qubit is unchanged over the second number of measurements of the qubit.

20. The computer-implemented method of claim 19, further comprising: Based on the parameters of the quantum gate, generating representations of m2 random unitary quantum gates, where m2 is an integer different from m1; Determine a representation of the third quantum gate sequence by inserting the quantum gate between each adjacent unitary quantum gate of the m2 random unitary quantum gates and appending the quantum gate and a third restoring quantum gate to the m2 random unitary quantum gates so that the third quantum gate sequence is equivalent to the identity operator; determining a representation of the fourth quantum gate sequence by connecting the m2 random unitary quantum gates and attaching a fourth restoring quantum gate to the m2 random unitary quantum gates so that the fourth quantum gate sequence is equivalent to the identity operator; Sending hardware instructions corresponding to the representation of the third quantum gate sequence and hardware instructions corresponding to the representation of the fourth quantum gate sequence to the quantum computing device; receiving, from the quantum computing device, a measurement of the qubit a third number of times after the quantum computing device applies the third sequence of quantum gates to the qubit a third number of times, and receiving, from the quantum computing device, a measurement of the qubit a fourth number of times after the quantum computing device applies the fourth sequence of quantum gates to the qubit a fourth number of times; determining a third probability that the quantum state of the qubit is unchanged over the third number of measurements of the qubit and a fourth probability that the quantum state of the qubit is unchanged over the fourth number of measurements of the qubit; and An average fidelity value of the quantum gate is determined based on the first probability, the second probability, the third probability, and the fourth probability.

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