An MCU chip with large power adjustable output function

Abstract

This invention discloses an MCU chip with high-power adjustable output function, belonging to the field of MCU chip technology. The circuit includes a control core circuit unit, a current detection circuit unit, an analog-to-digital conversion circuit unit, a pulse width modulation circuit unit, and a high-power output circuit unit. The high-power output circuit unit includes a P-type metal-oxide-semiconductor field-effect transistor (MOSFET) and a power output pin. The gate of the P-type MOSFET is connected to the pulse width modulation signal output terminal of the pulse width modulation circuit unit, the drain of the P-type MOSFET is connected to the power output pin, and the source of the P-type MOSFET is connected to a DC voltage. By designing the functions of the first four units, the required duty cycle can be calculated to achieve the required power at different output currents and / or different output voltages. This expands application scenarios and avoids additional costs, facilitating practical application and promotion.

Description

Technical Field

[0001] This invention belongs to the field of MCU chip technology, specifically relating to an MCU chip with high-power adjustable output function. Background Technology

[0002] MCU chip refers to Microcontroller Unit (MCU), also known as a single-chip microcomputer or microcontroller. It is a chip-level computer that integrates a central processing unit (CPU) with a reduced frequency and specifications, along with peripheral interfaces such as memory, counters, USB (Universal Serial Bus), A / D conversion, UART (Universal Asynchronous Receiver / Transmitter), PLC (Programmable Logic Controller), and DMA (Direct Memory Access), and even LCD (Liquid Crystal Display) driver circuitry, all on a single chip. This allows for different combinations of control for different applications, hence the name MCU chip.

[0003] While existing MCU chips generally support output current sourcing and sinking via their I / O output pins, the output current is typically only tens of milliamps, failing to support high-power output. Furthermore, although existing MCU chips have PWM (Pulse Width Modulation) functionality, they generally lack the ability to output adjustable high power. Therefore, existing MCU chips still suffer from the following technical problems:

[0004] (1) Due to the limited pull-up / sink current of only tens of milliamps, although it can be used for general drive applications, it is difficult to meet the requirements of some applications that require high power output. It is often necessary to add an external MOS (Metal-Oxide-Semiconductor Field-Effect Transistor) or other power transistors to achieve this, which will further increase the cost.

[0005] (2) Current high-power transistors often cannot precisely control output power. For example, in lithium battery applications, the battery voltage gradually decreases after use. When the output power decreases, it leads to differences in user perception and affects the user experience. For instance, when driving high-power LED lights, the inconsistent output power results in different brightness levels at different voltages. When driving e-cigarette atomizers, as an e-cigarette application chip, inconsistent external atomizer loads also cause inconsistent output currents, resulting in inconsistent output power. This leads to uneven heating of the e-liquid by the atomizer, resulting in a poor smoking experience for the user. When used in electric toothbrush applications, the decrease in lithium battery power may also cause changes in output power, resulting in noticeable differences in vibration effects during use. Therefore, controlling output power is also very important.

[0006] To address the aforementioned issues, providing a design solution for an MCU chip with high-power adjustable output is a crucial research topic for those skilled in the art. Furthermore, existing MCU chips lack built-in power management and charging management functions, necessitating the addition of an external power management chip for rechargeable electronic applications, which significantly increases application costs. Summary of the Invention

[0007] The purpose of this invention is to provide an MCU chip with high-power adjustable output function, in order to solve the problem that existing MCU chips only support tens of milliamps of pull-up / sink current, which limits their application scenarios and increases additional costs.

[0008] To achieve the above objectives, the present invention adopts the following technical solution:

[0009] In a first aspect, an MCU chip with high-power adjustable output function is provided, including a control core circuit unit, a current detection circuit unit, an analog-to-digital conversion circuit unit, a pulse width modulation circuit unit, and a high-power output circuit unit. The high-power output circuit unit includes a first P-type metal-oxide-semiconductor field-effect transistor and a power output pin. The gate of the first P-type metal-oxide-semiconductor field-effect transistor is connected to the pulse width modulation signal output terminal of the pulse width modulation circuit unit, the drain of the first P-type metal-oxide-semiconductor field-effect transistor is connected to the power output pin, and the source of the first P-type metal-oxide-semiconductor field-effect transistor is connected to a first DC voltage.

[0010] The current signal input terminal of the current detection circuit unit is connected to the power output pin, and the voltage signal output terminal of the current detection circuit unit is connected to the analog-to-digital conversion circuit unit. The current detection circuit unit is used to acquire the current signal output through the power output pin through the current signal input terminal, convert the current signal into a second voltage signal, and then transmit the second voltage signal to the analog-to-digital conversion circuit unit through the voltage signal output terminal.

[0011] The voltage signal input terminal of the analog-to-digital converter (ADC) unit is connected to the power output pin, and the digital signal output terminal of the ADC unit is connected to the control core circuit unit. The ADC unit is used to acquire a first voltage signal on the power output pin through the voltage signal input terminal, perform analog-to-digital conversion on the first voltage signal to obtain an output voltage value, and perform analog-to-digital conversion on the second voltage signal to obtain an output current value. Then, the synchronously sampled output voltage value and output current value are transmitted to the control core circuit unit through the digital signal output terminal.

[0012] The first control signal output terminal of the control core circuit unit is connected to the pulse width modulation circuit unit. After acquiring an adjustable target power value, the control core circuit unit calculates the duty cycle based on the target power value, the output voltage value, and the output current value. Then, it sends a pulse width modulation control command to the pulse width modulation circuit unit according to the duty cycle, so as to control the pulse width modulation circuit unit to output a pulse width modulation signal with the specified duty cycle. The duty cycle is calculated as follows:

[0013]

[0014] In the formula, η represents the duty cycle, and P T U represents the target power value, U represents the output voltage value, and I represents the output current value.

[0015] Based on the above-mentioned invention, a new MCU chip solution is provided that can achieve high-power adjustable output. This solution includes a control core circuit unit, a current detection circuit unit, an analog-to-digital conversion circuit unit, a pulse width modulation circuit unit, and a high-power output circuit unit. The high-power output circuit unit includes a P-type metal-oxide-semiconductor field-effect transistor (MOSFET) and a power output pin. The gate of the P-type MOSFET is connected to the pulse width modulation signal output terminal of the pulse width modulation circuit unit, the drain of the P-type MOSFET is connected to the power output pin, and the source of the P-type MOSFET is connected to a DC voltage. Through the functional design of the first four units, when the output voltage or output current decreases due to lithium battery use or changes in load resistance, the required duty cycle can be calculated after detecting changes in voltage and current to achieve the required power at different output currents and / or different output voltages. This solves the problem that existing MCU chips cannot be directly applied to products driven by higher power, expands application scenarios, avoids additional costs, and facilitates practical application and promotion.

[0016] In one possible design, a bandgap reference voltage supply circuit unit is also included, wherein the bandgap reference voltage supply circuit unit is used to output a stable bandgap reference voltage;

[0017] The enable control terminal of the bandgap reference voltage supply circuit unit is connected to the second control signal output terminal of the control core circuit unit, and the voltage output terminal of the bandgap reference voltage supply circuit unit is connected to the power supply terminal of the current detection circuit unit and the power supply terminal of the analog-to-digital conversion circuit unit, respectively.

[0018] In one possible design, the digital signal output terminal of the analog-to-digital converter circuit unit is also connected to the pulse width modulation circuit unit, and the analog-to-digital converter circuit unit is also used to transmit the synchronously sampled output voltage value and the output current value to the pulse width modulation circuit unit through the digital signal output terminal.

[0019] The pulse width modulation circuit unit is further configured to calculate the duty cycle based on the target power value, the output voltage value, and the output current value when only the target power value is received from the control core circuit unit, and then output a pulse width modulation signal having the duty cycle.

[0020] In one possible design, the output voltage value is stored in the first set of registers of the pulse width modulation circuit unit after being received, and the output current value is stored in the second set of registers of the pulse width modulation circuit unit after being received, wherein the voltage value corresponding to the least significant bit in the first set of registers and the current value corresponding to the least significant bit in the second set of registers are numerically consistent.

[0021] In one possible design, the width W of the first P-type metal-oxide-semiconductor field-effect transistor is designed according to the following formula:

[0022]

[0023] In the formula, P max This represents the maximum output power value designed for a 1-ohm load, where L represents the length of the first P-type metal-oxide-semiconductor field-effect transistor, and μ represents the maximum output power value. p C represents the carrier migration rate. ox V represents the capacitance of the gate oxide layer per unit area, VS represents the source voltage of the first P-type metal-oxide-semiconductor field-effect transistor, VG represents the gate voltage of the first P-type metal-oxide-semiconductor field-effect transistor, and VTH represents the turn-on voltage of the first P-type metal-oxide-semiconductor field-effect transistor.

[0024] In one possible design, a power management circuit unit is also included, wherein the power management circuit unit includes a battery power supply pin, a charging power supply pin, a first crystal diode, a second crystal diode, a first resistor, a second resistor, a third resistor, a voltage-controlled current source, a voltage comparator, a second P-type metal-oxide-semiconductor field-effect transistor, and a third P-type metal-oxide-semiconductor field-effect transistor.

[0025] The battery power supply pin is connected to the anode of the first crystal diode, the negative input terminal of the voltage comparator, and the source of the second P-type metal-oxide-semiconductor field-effect transistor, respectively. The charging power supply pin is connected to the anode of the second crystal diode, the positive input terminal of the voltage comparator, and the source of the third P-type metal-oxide-semiconductor field-effect transistor. The cathodes of the first crystal diode and the second crystal diode are respectively connected to one end of the first resistor.

[0026] The other end of the first resistor is connected to one end of the second resistor, the positive terminal of the voltage-controlled current source, and the power supply terminal of the voltage comparator. The other end of the second resistor is connected to one end of the third resistor and the voltage input terminal of the voltage-controlled current source. The other end of the third resistor, the negative terminal of the voltage-controlled current source, and the ground terminal of the voltage comparator are grounded.

[0027] The output terminal of the voltage comparator is connected to the gate of the second P-type metal-oxide-semiconductor field-effect transistor, and the inverting output terminal of the voltage comparator is connected to the gate of the third P-type metal-oxide-semiconductor field-effect transistor.

[0028] The drain of the second P-type metal-oxide-semiconductor field-effect transistor and the drain of the third P-type metal-oxide-semiconductor field-effect transistor are respectively connected to the source of the first P-type metal-oxide-semiconductor field-effect transistor in order to provide the first DC voltage.

[0029] In one possible design, an analog reset circuit unit is also included, wherein the power supply terminal of the analog reset circuit unit is connected to the power supply terminal of the voltage comparator, and the ground terminal of the analog reset circuit unit is grounded.

[0030] In one possible design, a charging management circuit unit is also included, wherein the charging management circuit unit includes a fourth P-type metal-oxide-semiconductor field-effect transistor, a fifth P-type metal-oxide-semiconductor field-effect transistor, a first operational amplifier, an N-type metal-oxide-semiconductor field-effect transistor, a second operational amplifier, and a digital potentiometer, wherein the design width of the fifth P-type metal-oxide-semiconductor field-effect transistor is multiple times the design width of the fourth P-type metal-oxide-semiconductor field-effect transistor.

[0031] The source of the fourth P-type MOSFET and the source of the fifth P-type MOSFET are respectively connected to the charging power supply pin. The gate of the fourth P-type MOSFET and the gate of the fifth P-type MOSFET are respectively connected to the output terminal of the first operational amplifier. The drain of the fourth P-type MOSFET is respectively connected to the non-inverting input terminal of the first operational amplifier and the source of the N-type MOSFET. The drain of the fifth P-type MOSFET is connected to the inverting input terminal of the first operational amplifier.

[0032] The gate of the N-type metal-oxide-semiconductor field-effect transistor is connected to the output terminal of the second operational amplifier. The non-inverting input terminal of the second operational amplifier is connected to the second DC voltage. The inverting input terminal of the second operational amplifier is connected to the drain of the N-type metal-oxide-semiconductor field-effect transistor and one end of the resistor of the digital potentiometer. The controlled terminal of the digital potentiometer is connected to the third control signal output terminal of the control core circuit unit. The other end of the resistor of the digital potentiometer is grounded.

[0033] The drain of the fifth P-type metal-oxide-semiconductor field-effect transistor is connected to the battery power supply pin in order to charge the secondary battery connected to the battery power supply pin.

[0034] In one possible design, a bandgap reference voltage supply circuit unit and a voltage divider circuit unit are also included, wherein the bandgap reference voltage supply circuit unit is used to output a stable bandgap reference voltage, and the voltage divider circuit unit includes a fourth resistor and a fifth resistor.

[0035] The voltage output terminal of the bandgap reference voltage supply circuit unit is connected to one end of the fourth resistor, the other end of the fourth resistor is connected to one end of the fifth resistor, and the other end of the fifth resistor is grounded.

[0036] The other end of the fourth resistor is also connected to the non-inverting input of the second operational amplifier in order to provide the second DC voltage.

[0037] In one possible design, the output or inverting output of the voltage comparator is connected to the charging mode trigger terminal of the control core circuit unit so that when the drain-source of the third P-type metal-oxide-semiconductor field-effect transistor is turned on, a trigger signal is sent to the charging mode trigger terminal to instruct the control core circuit unit to start the charging mode.

[0038] The beneficial effects of the above scheme are:

[0039] (1) This invention creatively provides a new MCU chip solution that can achieve high-power adjustable output, which includes a control core circuit unit, a current detection circuit unit, an analog-to-digital conversion circuit unit, a pulse width modulation circuit unit, and a high-power output circuit unit. The high-power output circuit unit includes a P-type metal-oxide-semiconductor field-effect transistor and a power output pin. The gate of the P-type metal-oxide-semiconductor field-effect transistor is connected to the pulse width modulation signal output terminal of the pulse width modulation circuit unit, the drain of the P-type metal-oxide-semiconductor field-effect transistor is connected to the power output pin, and the source of the P-type metal-oxide-semiconductor field-effect transistor is connected to a DC voltage. By designing the functions of the first four units, when the output voltage or output current decreases due to the use of lithium battery or the load resistance changes, after detecting the change in voltage and current, the required duty cycle can be calculated to achieve the required power under different output currents and / or different output voltages. This can solve the problem that existing MCU chips cannot be directly applied to products driven by higher power, achieve the purpose of expanding application scenarios and avoiding additional costs, and facilitate practical application and promotion.

[0040] (2) It can also solve the problem that existing MCU chips cannot perform power management and charging management by integrating the charging power tube and charging control circuit into the chip, so that a single chip can be used in rechargeable electronic products. Attached Figure Description

[0041] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1 This is a structural example diagram of an MCU chip with high-power adjustable output function provided in an embodiment of this application.

[0043] Figure 2 A comparison diagram showing the circuit improvements of the high-power output circuit unit provided in the embodiments of this application compared to existing I / O output circuit units.

[0044] Figure 3 A circuit diagram of a power management circuit unit provided in an embodiment of this application.

[0045] Figure 4 A circuit diagram of a charging management circuit unit provided in an embodiment of this application. Detailed Implementation

[0046] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the embodiments of this application will be briefly described below in conjunction with the accompanying drawings and descriptions of the embodiments or the prior art. Obviously, the following description of the structure of the accompanying drawings is only some embodiments of this application. For those skilled in the art, other embodiments can be obtained based on these descriptions without creative effort. It should be noted that the description of these embodiments is for the purpose of helping to understand the present invention, but does not constitute a limitation of the present invention.

[0047] It should be understood that although the terms "first" and "second", etc., may be used herein to describe various objects, these objects should not be limited by these terms. These terms are only used to distinguish one object from another. For example, the first object may be referred to as the second object, and similarly, the second object may be referred to as the first object, without departing from the scope of the exemplary embodiments of this application.

[0048] It should be understood that the term "and / or" that may appear in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A exists alone, B exists alone, or A and B exist simultaneously. Another example is A, B and / or C, which can mean that any one of A, B, and C or any combination thereof exists. The term " / and" that may appear in this document describes another relationship between related objects, indicating that two relationships can exist. For example, A / and B can mean: A exists alone or A and B exist simultaneously. In addition, the character " / " that may appear in this document generally indicates that the related objects before and after it are in an "or" relationship.

[0049] Example 1

[0050] like Figures 1-2 As shown, the MCU chip with high-power adjustable output provided in this embodiment includes, but is not limited to, a control core circuit unit (i.e., Figure 1 The CTRLCORE and current detection circuit unit (i.e.) Figure 1 The CDET (Current Detector) and analog-to-digital conversion circuit unit (i.e., CDET) are mentioned. Figure 1 The ADC (Analog-to-Digital Converter) and pulse width modulation circuit unit (i.e.) Figure 1 PWM in the middle) and high-power output circuit unit (i.e. Figure 1 In the PowerIO section, "high power" refers to the output power based on a pull-in / sink-out current of only tens of milliamps. The high-power output circuit unit includes, but is not limited to, a first P-type metal-oxide-semiconductor field-effect transistor (PMOS1) and a power output pin OUT. The gate of the first PMOS1 is connected to the pulse width modulation signal output terminal PWMB of the pulse width modulation circuit unit, the drain of the first PMOS1 is connected to the power output pin OUT, and the source of the first PMOS1 is connected to a first DC voltage VMAX.

[0051] like Figure 2 As shown, compared to existing I / O output circuit units, the high-power output circuit unit removes the traditional digital input / output functions, analog input / output functions, and NMOS (Negative channel Metal Oxide Semiconductor) output and open-drain output functions, retaining only the PMOS (Positive channel Metal Oxide Semiconductor) output function. However, the width of the PMOS can be appropriately increased according to the required power. That is, to address the issue of MCU chips not being able to output high power, a high-power transistor needs to be integrated into the MCU chip design. Therefore, this embodiment uses a PMOS integrated transistor (i.e., the first P-type metal-oxide-semiconductor field-effect transistor PMOS1) as the high-power transistor, and its driving capability can be increased by increasing the size of the PMOS integrated transistor. Specifically, the width W of the first P-type metal-oxide-semiconductor field-effect transistor PMOS1 is designed according to the following formula:

[0052]

[0053] In the formula, P max This represents the maximum output power value designed for a 1-ohm load, where L represents the length of the first P-type metal-oxide-semiconductor field-effect transistor PMOS1 (e.g., 0.5 micrometers), and μ represents the maximum output power value. p C represents the carrier migration rate. ox The capacitance per unit area of ​​the gate oxide layer (μ) p ×C ox The magnitude is generally 10 -6For example, a value of 0.00001 is used. VS represents the source voltage of the first P-type MOSFET PMOS1 (typically 5V), VG represents the gate voltage of the first P-type MOSFET PMOS1 (typically 0V), and VTH represents the turn-on voltage of the first P-type MOSFET PMOS1 (typically 0.7V). For example, when a maximum output power of 10W is required to output to a 1-ohm load, the width W of the first P-type MOSFET PMOS1 can be designed to be approximately 20009 micrometers.

[0054] The current signal input terminal of the current detection circuit unit is connected to the power output pin OUT, and the voltage signal output terminal of the current detection circuit unit is connected to the analog-to-digital conversion circuit unit. The current detection circuit unit is used to acquire the current signal output through the power output pin OUT via the current signal input terminal, convert the current signal into a second voltage signal, and then transmit the second voltage signal to the analog-to-digital conversion circuit unit via the voltage signal output terminal. The specific methods of the aforementioned signal acquisition and signal conversion are all existing conventional technologies.

[0055] The voltage signal input terminal of the analog-to-digital converter (ADC) unit is connected to the power output pin OUT, and the digital signal output terminal of the ADC unit is connected to the control core circuit unit. The ADC unit is used to acquire a first voltage signal on the power output pin OUT through the voltage signal input terminal, perform analog-to-digital conversion on the first voltage signal to obtain an output voltage value, and perform analog-to-digital conversion on the second voltage signal to obtain an output current value. Then, it transmits the synchronously sampled output voltage value and output current value to the control core circuit unit through the digital signal output terminal. The specific methods of signal acquisition and analog-to-digital conversion described above are all existing conventional technologies.

[0056] The first control signal output terminal of the control core circuit unit is connected to the pulse width modulation circuit unit. After acquiring an adjustable target power value, the control core circuit unit calculates the duty cycle based on the target power value, the output voltage value, and the output current value. Then, it sends a pulse width modulation control command to the pulse width modulation circuit unit according to the duty cycle, so as to control the pulse width modulation circuit unit to output a pulse width modulation signal with the specified duty cycle. The duty cycle is calculated as follows:

[0057]

[0058] In the formula, η represents the duty cycle, and P TThe target power value is represented by U, the output voltage value by I, and the output current value by U. The target power value can be obtained through conventional input from other chip pins. For example, the user can send the desired output mode to the MCU chip via peripherals such as buttons on electronic products. Then, the control core circuit unit controls the pulse width modulation circuit unit and the high-power output circuit unit to output power. For example, an electric toothbrush has a gentle mode and a powerful mode. After the user selects a mode, the rated power corresponding to the selected gentle / powerful mode is the target power value.

[0059] The technical principle behind the high-power adjustable output function of the MUC chip provided in this embodiment is as follows: To make the output power controllable, the PWM function is needed. The PWM function can modulate the output waveform by adjusting the duty cycle (the ratio of the effective output time to the total output time). Thus, when the output voltage or output current decreases due to lithium battery usage or changes in load resistance, the required duty cycle can be calculated after detecting the changes in voltage and current to achieve the desired power under different output currents and / or different output voltages. For example, if the power output is set to 10W, and the detected output voltage is 4V and the output current is 4A, the required duty cycle of the PWM waveform can be calculated to be 10 / (4*4) = 0.625. Then, a PWM output waveform with a duty cycle of 62.5% can maintain the output power at 10W under this condition. If the output current is limited to 3A, the required duty cycle can be calculated to be 10 / (3*4) = 83.33%, thus achieving the set power output. This solves the problem that existing MCU chips cannot be directly applied to products with higher power drives. Originally, they could only support the drive of low-power electrical components with tens of milliamps, and the maximum output power of 50mA in 5V applications was 0.25W. After the improvement, they can output ampere-level current, and the output power can reach up to 25W with 5A output in 5V applications.

[0060] Preferably, it also includes a bandgap reference voltage supply circuit unit (i.e. Figure 1The bandgap reference voltage (VBG) is used in the circuit. The bandgap reference voltage supply circuit unit outputs a stable bandgap reference voltage. The enable control terminal of the bandgap reference voltage supply circuit unit is connected to the second control signal output terminal of the control core circuit unit. The voltage output terminal of the bandgap reference voltage supply circuit unit is connected to the power supply terminals of the current detection circuit unit and the analog-to-digital conversion circuit unit, respectively. The bandgap reference voltage is typically a stable 1.2V, less affected by power supply voltage and temperature. Therefore, through the aforementioned connection design, the current detection circuit unit and the analog-to-digital conversion circuit unit can be started by the bandgap reference voltage supply circuit unit while both units operate stably, ensuring the sampling accuracy of the output voltage and current values.

[0061] Preferably, the digital signal output terminal of the analog-to-digital converter (ADC) unit is also connected to the pulse width modulation (PWM) circuit unit. The ADC unit is further configured to transmit the synchronously sampled output voltage and output current values ​​to the PWM circuit unit via the digital signal output terminal. The PWM circuit unit is further configured to calculate the duty cycle based on the target power value, the output voltage value, and the output current value when only the target power value is received from the control core circuit unit, and then output a PWM signal with the duty cycle. This allows the required duty cycle to be calculated directly on the PWM side, and PWM modulation to be performed directly based on the calculation result, thereby improving the power control response speed. To further facilitate duty cycle calculation on the pulse width modulation side, preferably, the output voltage value is stored in the first set of registers of the pulse width modulation circuit unit after being received, and the output current value is stored in the second set of registers of the pulse width modulation circuit unit after being received. The voltage value corresponding to the least significant bit (LSB) in the first set of registers and the current value corresponding to the least significant bit in the second set of registers are numerically consistent (for example, if 1 bit of the first set of data represents a voltage value of 1mV, then 1 bit of the second set of data should also represent a current value of 1mA).

[0062] Preferably, the circuit also includes a power management circuit unit, wherein the power management circuit unit includes a battery power supply pin (Battery), a charging power supply pin (USB), a first crystal diode D1, a second crystal diode D2, a first resistor R1, a second resistor R2, a third resistor R3, a voltage-controlled current source, a voltage comparator, a second P-type metal-oxide-semiconductor field-effect transistor (PMOS2), and a third P-type metal-oxide-semiconductor field-effect transistor (PMOS3); the battery power supply pin (Battery) is connected to the anode of the first crystal diode D1, the negative input terminal of the voltage comparator, and the source of the second P-type metal-oxide-semiconductor field-effect transistor (PMOS2); the charging power supply pin (USB) is connected to the anode of the second crystal diode D2, the positive input terminal of the voltage comparator, and the source of the third P-type metal-oxide-semiconductor field-effect transistor (PMOS3); and the cathode of the first crystal diode D1 and the cathode of the second crystal diode D2 are connected to the source of the third P-type metal-oxide-semiconductor field-effect transistor (PMOS3). The first resistor R1 is connected to one end of the first resistor R1; the other end of the first resistor R1 is connected to one end of the second resistor R2, the positive terminal of the voltage-controlled current source, and the power supply terminal of the voltage comparator; the other end of the second resistor R2 is connected to one end of the third resistor R3 and the voltage input terminal of the voltage-controlled current source; the other end of the third resistor R3, the negative terminal of the voltage-controlled current source, and the ground terminal of the voltage comparator are grounded; the output terminal of the voltage comparator is connected to the gate of the second P-type metal-oxide-semiconductor field-effect transistor PMOS2; the inverting output terminal of the voltage comparator is connected to the gate of the third P-type metal-oxide-semiconductor field-effect transistor PMOS3; the drains of the second P-type metal-oxide-semiconductor field-effect transistor PMOS2 and the third P-type metal-oxide-semiconductor field-effect transistor PMOS3 are connected to the source of the first P-type metal-oxide-semiconductor field-effect transistor PMOS1 to provide the first DC voltage VMAX.

[0063] The aforementioned power management circuit unit operates as follows: Since the chip has both battery power and charging power (USB 5V), if the battery discharges below the chip's minimum operating voltage, the chip's original power system will not support its operation, and it will not be able to charge even when a charger is connected. Therefore, a completely new power management system needs to be designed to support more stable chip operation. Figure 3As shown, the two power supplies of the chip are connected to diodes and then to a series of resistors. The diodes are unidirectional conductors. If the battery voltage is completely discharged to 0V, the upper end of the resistor series is supplied with voltage and current from the USB 5V, while the diode at the battery end acts as an isolation point. If the charger is unplugged, the USB 5V is 0V, and the upper end of the resistor series is powered by the battery. The resistor series divides the voltage after the diodes, and the divided voltage controls a voltage-controlled current source. The efficiency of this voltage-to-current conversion of the voltage-controlled current source should be carefully designed. When the voltage at the upper end of the resistor increases, the control voltage of the current source also increases, leading to an increase in current. This, in turn, lowers the voltage at the upper end of the current source, thus forming a negative feedback loop that keeps the CMP's power supply relatively stable. A stable comparator compares the battery voltage and the USB voltage. When the USB voltage is higher than the battery voltage, it outputs a signal to turn on the USB 5V switch. At this time, the VMAX potential will be equal to the USB 5V voltage, which will supply other circuits in the chip, enabling the entire chip to operate. Conversely, when the USB voltage is lower than the battery voltage, it turns on the battery switch, supplying the battery voltage to other circuits in the chip.

[0064] Preferably, it also includes an analog reset circuit unit (i.e. Figure 1 In this context, RST, or reset, generally refers to the analog reset system of the MCU chip. In special cases, it provides a reset signal to restore the digital registers to their default values ​​(typically including power-on reset and undervoltage reset). The power supply terminal of the analog reset circuit unit is connected to the power supply terminal of the voltage comparator, and the ground terminal of the analog reset circuit unit is grounded. This ensures a relatively stable power supply for the MCU chip's analog reset system, guaranteeing the stability of the MCU chip.

[0065] Preferably, the system further includes a charging management circuit unit, wherein the charging management circuit unit includes a fourth P-type MOSFET PMOS4, a fifth P-type MOSFET PMOS5, a first operational amplifier OP1, an N-type MOSFET NMOS, a second operational amplifier OP2, and a digital potentiometer DP. The design width of the fifth P-type MOSFET PMOS5 is multiple times the design width of the fourth P-type MOSFET PMOS4. The sources of the fourth P-type MOSFET PMOS4 and the fifth P-type MOSFET PMOS5 are respectively connected to the charging power supply pin USB. The gates of the fourth P-type MOSFET PMOS4 and the fifth P-type MOSFET PMOS5 are respectively connected to the output terminal of the first operational amplifier OP1. The drain of the fourth P-type MOSFET PMOS4 is respectively connected to the charging power supply pin USB. The non-inverting input of the first operational amplifier OP1 is connected to the source of the N-type metal-oxide-semiconductor field-effect transistor (NMOS). The drain of the fifth P-type metal-oxide-semiconductor field-effect transistor (PMOS5) is connected to the inverting input of the first operational amplifier OP1. The gate of the NMOS is connected to the output of the second operational amplifier OP2. The non-inverting input of the second operational amplifier OP2 is connected to a second DC voltage VX. The inverting input of the second operational amplifier OP2 is connected to the drain of the NMOS and one end of the resistor of the digital potentiometer DP. The controlled end of the digital potentiometer DP is connected to the third control signal output of the control core circuit unit. The other end of the resistor of the digital potentiometer DP is grounded. The drain of the fifth PMOS5 is connected to the battery power supply pin (Battery) to charge the secondary battery connected to the battery power supply pin (Battery).

[0066] The working principle of the aforementioned charging management circuit unit is as follows: Figure 4As shown, the PMOS5 on the right is a ChargePMOS, which is the charging power transistor. When the product is connected to an external USB port, a 5V voltage is connected to the source of PMOS5, and the drain of PMOS5 is connected to the positive terminal of the battery through the Battery power supply pin. The PMOS4 on the left and the charging power transistor on the right form a current mirror. Their sources and gates are connected together one-to-one, and an operational amplifier (i.e., the first operational amplifier) ​​is connected to their drains. Due to the virtual short characteristic of the loop operational amplifier, the drains on both sides of the current mirror are also the same. The total width W of the power transistor on the right is designed to be 1000 times that of the PMOS transistor on the left, so the current value on the right is 1000 times that of the current value on the left. Therefore, by making the current on the left a precise and controllable reference current, the charging current can be controlled. Below the PMOS transistor on the left is the current generation module, which consists of an operational amplifier loop and a resistor. If half a VBG voltage (approximately 0.6V) is applied to the non-inverting input of the second operational amplifier, then the inverting input of the operational amplifier will also be 0.6V. The value of the resistor below 0.6V can be controlled by the control core circuit unit. If a charging current of 600mA is required, then the value of this resistor can be controlled to 1000Ω. When the battery power is low, too large a current can easily damage the chip and the battery, so the value of the resistor can be controlled to 10000Ω, i.e., outputting 60mA.

[0067] Specifically, it also includes a bandgap reference voltage supply circuit unit and a voltage divider circuit unit. The bandgap reference voltage supply circuit unit outputs a stable bandgap reference voltage. The voltage divider circuit unit includes a fourth resistor R4 and a fifth resistor R5. The voltage output terminal of the bandgap reference voltage supply circuit unit is connected to one end of the fourth resistor R4, and the other end of the fourth resistor R4 is connected to one end of the fifth resistor R5. The other end of the fifth resistor R5 is grounded. The other end of the fourth resistor R4 is also connected to the non-inverting input terminal of the second operational amplifier OP2 to provide the second DC voltage VX. Figure 4 As shown, when the fourth resistor R4 and the fifth resistor R5 have the same resistance value, the non-inverting input terminal of the second operational amplifier can be connected to a voltage of 1 / 2 VBG.

[0068] Preferably, the output or inverting output of the voltage comparator is connected to the charging mode trigger terminal of the control core circuit unit, so that when the drain-source of the third P-type metal-oxide-semiconductor field-effect transistor (PMOS3) is turned on, a trigger signal is sent to the charging mode trigger terminal to instruct the control core circuit unit to start the charging mode. This also allows for automatic triggering of entering the battery charging mode when the battery voltage is insufficient.

[0069] In summary, the MCU chip with high-power adjustable output provided in this embodiment has the following technical advantages:

[0070] (1) This embodiment provides a new MCU chip solution that can achieve high-power adjustable output, which includes a control core circuit unit, a current detection circuit unit, an analog-to-digital conversion circuit unit, a pulse width modulation circuit unit and a high-power output circuit unit. The high-power output circuit unit includes a P-type metal-oxide-semiconductor field-effect transistor and a power output pin. The gate of the P-type metal-oxide-semiconductor field-effect transistor is connected to the pulse width modulation signal output terminal of the pulse width modulation circuit unit. The drain of the P-type metal-oxide-semiconductor field-effect transistor is connected to the power output pin. The source of the P-type metal-oxide-semiconductor field-effect transistor is connected to a DC voltage. By designing the functions of the first four units, when the output voltage or output current decreases due to the use of lithium battery or the load resistance changes, the required duty cycle can be calculated after detecting the change in voltage and current to achieve the required power under different output currents and / or different output voltages. This can solve the problem that existing MCU chips cannot be directly applied to products driven by higher power, achieve the purpose of expanding application scenarios and avoiding additional costs, and facilitate practical application and promotion.

[0071] (2) It can also solve the problem that existing MCU chips cannot perform power management and charging management by integrating the charging power tube and charging control circuit into the chip, so that a single chip can be used in rechargeable electronic products.

[0072] Finally, it should be noted that the above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. An MCU chip with high-power adjustable output function, characterized in that, It includes a control core circuit unit, a current detection circuit unit, an analog-to-digital conversion circuit unit, a pulse width modulation circuit unit, and a high-power output circuit unit. The high-power output circuit unit includes a first P-type metal-oxide-semiconductor field-effect transistor (PMOS1) and a power output pin (OUT). The gate of the PMOS1 is connected to the pulse width modulation signal output terminal (PWMB) of the pulse width modulation circuit unit, the drain of the PMOS1 is connected to the power output pin (OUT), and the source of the PMOS1 is connected to a first DC voltage (VMAX). The width of the PMOS1... Design according to the following formula: In the formula, This indicates the maximum output power value designed for a 1-ohm load. This indicates the length of PMOS1. Indicates the carrier migration rate. This represents the capacitance of the gate oxide layer per unit area. This represents the source voltage of PMOS1. This represents the gate voltage of PMOS1. This indicates the turn-on voltage of PMOS1; The current signal input terminal of the current detection circuit unit is connected to the power output pin (OUT), and the voltage signal output terminal of the current detection circuit unit is connected to the analog-to-digital conversion circuit unit. The current detection circuit unit is used to acquire the current signal output through the power output pin (OUT) through the current signal input terminal, convert the current signal into a second voltage signal, and then transmit the second voltage signal to the analog-to-digital conversion circuit unit through the voltage signal output terminal. The voltage signal input terminal of the analog-to-digital converter (ADC) unit is connected to the power output pin (OUT), and the digital signal output terminal of the ADC unit is connected to the control core circuit unit. The ADC unit is used to acquire a first voltage signal on the power output pin (OUT) through the voltage signal input terminal, perform analog-to-digital conversion on the first voltage signal, sample the output voltage value, and perform analog-to-digital conversion on the second voltage signal to sample the output current value. Then, the synchronously sampled output voltage value and output current value are transmitted to the control core circuit unit through the digital signal output terminal. The first control signal output terminal of the control core circuit unit is connected to the pulse width modulation circuit unit. After acquiring an adjustable target power value, the control core circuit unit calculates the duty cycle based on the target power value, the output voltage value, and the output current value. Then, it sends a pulse width modulation control command to the pulse width modulation circuit unit according to the duty cycle, so as to control the pulse width modulation circuit unit to output a pulse width modulation signal with the specified duty cycle. The duty cycle is calculated as follows: In the formula, This indicates the duty cycle. This represents the target power value. This indicates the output voltage value. This indicates the output current value.

2. The MCU chip according to claim 1, characterized in that, It also includes a bandgap reference voltage supply circuit unit, wherein the bandgap reference voltage supply circuit unit is used to output a stable bandgap reference voltage; The enable control terminal of the bandgap reference voltage supply circuit unit is connected to the second control signal output terminal of the control core circuit unit, and the voltage output terminal of the bandgap reference voltage supply circuit unit is connected to the power supply terminal of the current detection circuit unit and the power supply terminal of the analog-to-digital conversion circuit unit, respectively.

3. The MCU chip according to claim 1, characterized in that, The digital signal output terminal of the analog-to-digital converter circuit unit is also connected to the pulse width modulation circuit unit. The analog-to-digital converter circuit unit is also used to transmit the output voltage value and output current value obtained by synchronous sampling to the pulse width modulation circuit unit through the digital signal output terminal. The pulse width modulation circuit unit is further configured to calculate the duty cycle based on the target power value, the output voltage value, and the output current value when only the target power value is received from the control core circuit unit, and then output a pulse width modulation signal having the duty cycle.

4. The MCU chip according to claim 3, characterized in that, The output voltage value is stored in the first set of registers of the pulse width modulation circuit unit after being received, and the output current value is stored in the second set of registers of the pulse width modulation circuit unit after being received. The voltage value corresponding to the least significant bit in the first set of registers and the current value corresponding to the least significant bit in the second set of registers are numerically consistent.

5. The MCU chip according to claim 1, characterized in that, It also includes a power management circuit unit, wherein the power management circuit unit includes a battery power supply pin (Battery), a charging power supply pin (USB), a first crystal diode (D1), a second crystal diode (D2), a first resistor (R1), a second resistor (R2), a third resistor (R3), a voltage-controlled current source, a voltage comparator, a second P-type metal-oxide-semiconductor field-effect transistor (PMOS2), and a third P-type metal-oxide-semiconductor field-effect transistor (PMOS3); The battery power supply pin (Battery) is connected to the anode of the first crystal diode (D1), the negative input terminal of the voltage comparator, and the source of the PMOS2, respectively. The charging power supply pin (USB) is connected to the anode of the second crystal diode (D2), the positive input terminal of the voltage comparator, and the source of the PMOS3, respectively. The cathodes of the first crystal diode (D1) and the second crystal diode (D2) are respectively connected to one end of the first resistor (R1). The other end of the first resistor (R1) is connected to one end of the second resistor (R2), the positive terminal of the voltage-controlled current source, and the power supply terminal of the voltage comparator. The other end of the second resistor (R2) is connected to one end of the third resistor (R3) and the voltage input terminal of the voltage-controlled current source. The other end of the third resistor (R3), the negative terminal of the voltage-controlled current source, and the ground terminal of the voltage comparator are grounded. The output terminal of the voltage comparator is connected to the gate of PMOS2, and the inverting output terminal of the voltage comparator is connected to the gate of PMOS3. The drains of PMOS2 and PMOS3 are respectively connected to the source of PMOS1 to provide the first DC voltage (VMAX).

6. The MCU chip according to claim 5, characterized in that, It also includes an analog reset circuit unit, wherein the power supply terminal of the analog reset circuit unit is connected to the power supply terminal of the voltage comparator, and the ground terminal of the analog reset circuit unit is grounded.

7. The MCU chip according to claim 5, characterized in that, It also includes a charging management circuit unit, wherein the charging management circuit unit includes a fourth P-type metal-oxide-semiconductor field-effect transistor PMOS4, a fifth P-type metal-oxide-semiconductor field-effect transistor PMOS5, a first operational amplifier (OP1), an N-type metal-oxide-semiconductor field-effect transistor NMOS, a second operational amplifier (OP2), and a digital potentiometer (DP). The design width of PMOS5 is multiple times that of PMOS4. The source of PMOS4 and the source of PMOS5 are respectively connected to the charging power supply pin (USB), the gate of PMOS4 and the gate of PMOS5 are respectively connected to the output terminal of the first operational amplifier (OP1), the drain of PMOS4 is respectively connected to the non-inverting input terminal of the first operational amplifier (OP1) and the source of the NMOS, and the drain of PMOS5 is connected to the inverting input terminal of the first operational amplifier (OP1). The gate of the NMOS is connected to the output of the second operational amplifier (OP2). The non-inverting input of the second operational amplifier (OP2) is connected to the second DC voltage (VX). The inverting input of the second operational amplifier (OP2) is connected to the drain of the NMOS and one end of the resistor of the digital potentiometer (DP). The controlled end of the digital potentiometer (DP) is connected to the third control signal output of the control core circuit unit. The other end of the resistor of the digital potentiometer (DP) is grounded. The drain of the PMOS5 is connected to the battery power supply pin (Battery) to charge the secondary battery connected to the battery power supply pin (Battery).

8. The MCU chip according to claim 7, characterized in that, It also includes a bandgap reference voltage supply circuit unit and a voltage divider circuit unit, wherein the bandgap reference voltage supply circuit unit is used to output a stable bandgap reference voltage, and the voltage divider circuit unit includes a fourth resistor (R4) and a fifth resistor (R5). The voltage output terminal of the bandgap reference voltage supply circuit unit is connected to one end of the fourth resistor (R4), the other end of the fourth resistor (R4) is connected to one end of the fifth resistor (R5), and the other end of the fifth resistor (R5) is grounded. The other end of the fourth resistor (R4) is also connected to the non-inverting input of the second operational amplifier (OP2) to provide the second DC voltage (VX).

9. The MCU chip according to claim 7, characterized in that, The output terminal or inverting output terminal of the voltage comparator is connected to the charging mode trigger terminal of the control core circuit unit so that when the drain-source terminal of the PMOS3 is turned on, a trigger signal is sent to the charging mode trigger terminal to instruct the control core circuit unit to start the charging mode.

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