Pixel circuit, driving method thereof, display device and display panel thereof

Abstract

This invention discloses a pixel circuit and its driving method, as well as a display device and its display panel. The device includes a driving module for providing driving current; a compensation module connected to the driving module at a third node; and a light-emitting element for emitting light under the driving current. The pixel circuit is configured to, in the initial stage, raise a first power supply voltage to a preset voltage value and lower the voltage of the third node to the initial voltage. In the data voltage writing stage, the first power supply voltage is lowered by a preset voltage value, causing the voltage of the third node to be lowered by the first power supply voltage to open the current path between the data voltage and the third node, charging the third node to the absolute difference between the data voltage and the threshold voltage. In the light-emitting stage, the driving module provides driving current by controlling the voltage of the third node and the first power supply voltage. This not only solves the problem of uneven display brightness in the display panel caused by the manufacturing process but also balances PPI.

Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a pixel circuit and its driving method, as well as a display device and its display panel. Background Technology

[0002] OLED (Organic Light-Emitting Diode) is an emerging flat panel display device. Due to its advantages such as self-illumination, high contrast, and wide color gamut, as well as its simple manufacturing process, low cost, low power consumption, and ease of realizing flexible displays, it has broad application prospects.

[0003] In existing technologies, the luminous intensity of an organic light-emitting diode (OLED) is determined by the data voltage VDATA, the power supply voltage VDD, and the threshold voltage Vth of the driving transistor that drives the OLED. Due to manufacturing process factors, the threshold voltage Vth of the driving transistors fabricated on a large-area glass substrate varies, resulting in differences in brightness between adjacent pixels even when the same data voltage VDATA is input.

[0004] To solve the above problems, existing technologies employ... Figure 1 The pixel circuit shown compensates for the threshold voltage Vth of the driving transistor, but Figure 1 The pixel circuit of the 6T1C shown has too many components, which will reduce the PPI (Pixels Per Inch) of the display panel.

[0005] Therefore, a new pixel circuit needs to be proposed to solve the above problems. Summary of the Invention

[0006] In view of the above problems, the purpose of the present invention is to provide a pixel circuit and its driving method, as well as a display device and its display panel, which can not only solve the problem of uneven display brightness of the display panel caused by the manufacturing process, but also take into account PPI.

[0007] According to one aspect of the present invention, a pixel circuit is provided, comprising a first thin-film transistor for transmitting a data voltage corresponding to grayscale data; a driving module connected between a first power supply voltage and a first node, and connected to the first thin-film transistor at a second node, for providing a driving current; a compensation module connected between the first power supply voltage and the first node, and connected to the driving module at a third node; a light-emitting element for emitting light under the drive of the driving current; and a second thin-film transistor connected between the first node and the light-emitting element, wherein the pixel circuit is configured to, in an initial stage, pull the first power supply voltage up to a preset voltage value, and pull down the voltage of the third node to an initial voltage through the compensation module and the second thin-film transistor; in a data voltage writing stage, pull down the first power supply voltage to a preset voltage value, so that the voltage of the third node is pulled down by the preset voltage value along with the first power supply voltage, thereby conducting a current path between the data voltage and the third node, charging the third node to be equal to the absolute value difference between the data voltage and a threshold voltage; and in an emitting stage, controlling the driving module to provide the driving current through the voltage of the third node and the first power supply voltage.

[0008] Optionally, the preset voltage value is set according to the voltage difference of the voltage domain of the data voltage.

[0009] Optionally, the driving module includes: a third thin-film transistor, with a first terminal receiving the first power supply voltage, a second terminal connected to the second node, and a control terminal receiving a first light emission signal; and a fourth thin-film transistor, with a first terminal connected to the second node, a second terminal connected to the first node, and a control terminal connected to the third node, wherein the threshold voltage is the threshold voltage of the fourth thin-film transistor.

[0010] Optionally, the compensation module includes: a capacitor, with a first end receiving the first power supply voltage and a second end connected to the third node; and a fifth thin-film transistor, with a first end connected to the third node, a second end connected to the first node, and a control terminal receiving a first control signal.

[0011] Optionally, the first terminal of the first thin-film transistor receives the data voltage, the second terminal of the first thin-film transistor is connected to the second node, and the control terminal of the first thin-film transistor receives a second control signal; the first terminal of the light-emitting element receives the driving current, and the second terminal of the light-emitting element receives a second power supply voltage, wherein the first power supply voltage is greater than the second power supply voltage.

[0012] Optionally, the first end of the second thin-film transistor is connected to the first node, the second end of the second thin-film transistor is connected to the first end of the light-emitting element, and the control terminal of the second thin-film transistor receives a second light-emitting signal, wherein the initial voltage is related to the duration of the pixel circuit in the initial stage.

[0013] Optionally, the first terminal of the second thin-film transistor is connected to the first terminal of the light-emitting element at the first node, the second terminal of the second thin-film transistor is grounded, and the control terminal of the second thin-film transistor receives a second light-emitting signal, wherein the initial voltage is the ground voltage.

[0014] According to a second aspect of the present invention, a display panel is provided, comprising a plurality of pixel circuits as described above arranged in an array.

[0015] According to a third aspect of the present invention, a display device is provided, comprising a display panel as described above; and a source drive circuit for providing a data voltage to the display panel.

[0016] According to a fourth aspect of the present invention, a driving method for a pixel circuit is provided for driving the pixel circuit as described above, comprising: an initial stage, raising a first power supply voltage to a preset voltage value and lowering the voltage of a third node to the initial voltage; a data voltage writing stage, lowering the first power supply voltage to a preset voltage value and using the bootstrap principle of a capacitor to lower the voltage of the third node by a preset voltage value along with the first power supply voltage, thereby opening a current path between the data voltage and the third node, and charging the voltage of the third node to be equal to the absolute difference between the data voltage and a threshold voltage; and a light emission stage, providing a driving current according to the first power supply voltage and the voltage of the third node to drive a light-emitting element to emit light, wherein the threshold voltage is the threshold voltage of a driving transistor.

[0017] The pixel circuit, driving method, display device, and display panel provided in this invention solve the problem of poor low-voltage writing of the driving transistor by raising the first power supply voltage to a preset value and lowering the voltage of the third node to the initial voltage in the initial stage, and lowering the first power supply voltage to a preset value in the data voltage writing stage. This utilizes the bootstrap characteristic of the capacitor to lower the voltage of the third node to a preset value, thereby enabling the third node to write the data voltage corresponding to the grayscale data from a lower voltage to a higher voltage in the data voltage writing stage. Furthermore, the pixel circuit provided in this invention can reduce the number of thin-film transistors compared to the existing 6T1C pixel circuit, thereby reducing the PPI of the display panel. Attached Figure Description

[0018] The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0019] Figure 1 A circuit diagram of a prior art pixel circuit is shown;

[0020] Figure 2 A circuit connection diagram of a pixel circuit according to a first embodiment of the present invention is shown;

[0021] Figure 3 A signal timing diagram of a pixel circuit according to a first embodiment of the present invention is shown;

[0022] Figure 4 A circuit connection diagram of a pixel circuit according to a second embodiment of the present invention is shown;

[0023] Figure 5 A signal timing diagram of a pixel circuit according to a second embodiment of the present invention is shown. Detailed Implementation

[0024] Various embodiments of the invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements or modules are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0025] It should be understood that, in the following description, "circuit" may include single or combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by the programmable circuit. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it may be directly coupled or connected to the other element, or there may be intermediate elements; the connection between elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0026] Furthermore, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0027] This invention provides a display device, which includes a display panel and a source driving circuit that provides data voltage to the display panel. The display panel includes a plurality of pixel circuits arranged in an array, and each pixel circuit receives a data voltage corresponding to grayscale data provided by the source driving circuit through a corresponding data line.

[0028] Figure 2 A circuit connection diagram of a pixel circuit according to a first embodiment of the present invention is shown. See also Figure 2 The pixel circuit 100 includes a thin-film transistor T1, a thin-film transistor T2, a driving module 110, a compensation module 120, and a light-emitting element 130.

[0029] The first terminal of thin-film transistor T1 receives the data voltage VDATA corresponding to the grayscale data. The second terminal of thin-film transistor T1 is connected to node B of the driving module 110. The control terminal of thin-film transistor T1 receives the control signal G1. <n>The switching on and off of thin-film transistor T1 is controlled by signal G1. <n>Control is used to transmit the data voltage VDATA to node B when it is turned on.

[0030] The first terminal of thin-film transistor T2 is connected to node D of driving module 110, the second terminal of thin-film transistor T2 is connected to the first terminal of light-emitting element 130, and the control terminal of thin-film transistor T2 receives light-emitting signal E1. <n>.

[0031] The drive module 110 is connected between the first power supply voltage ELVDD1 and node D to provide drive current Ids.

[0032] The compensation module 120 is connected between the first power supply voltage ELVDD1 and node D, and is connected to the drive module at node A.

[0033] The first terminal of the light-emitting element 130 is connected to the second terminal of the thin-film transistor T2, and the second terminal of the light-emitting element 130 receives the second power supply voltage ELVSS (emission layer VSS). The light-emitting element 130 is, for example, an organic light-emitting diode (OLED), with its first terminal being the anode of the OLED and its second terminal being the cathode of the OLED. It is understood that the light-emitting element 130 of the present invention is not limited to OLED, but can also be an LED, etc.

[0034] The driving module 110 includes a thin-film transistor T3 and a thin-film transistor T4. The first terminal of the thin-film transistor T3 receives a first power supply voltage ELVDD1. The second terminal of the thin-film transistor T3 is connected to the second terminal of the thin-film transistor T1 and the first terminal of the thin-film transistor T4 at node B. The control terminal of the thin-film transistor T3 receives a light emission signal E. <n>The second terminal of thin-film transistor T4 is connected to the first terminal of thin-film transistor T2 at node D, and the control terminal of thin-film transistor T4 is connected to node A. Thin-film transistor T4 is the driving transistor.

[0035] The compensation module 120 includes a capacitor C and a thin-film transistor T5. The first terminal of capacitor C receives a first power supply voltage ELVDD1. The second terminal of capacitor C is connected to the first terminal of thin-film transistor T5 at node A. The second terminal of thin-film transistor T5 is connected to node D. The control terminal of thin-film transistor T5 receives a control signal G. <n>.

[0036] In this embodiment, thin-film transistors T1-T5 are all P-type thin-film transistors, where the first terminal can be the source and the second terminal can be the drain. Of course, thin-film transistors T1-T5 can also all be N-type thin-film transistors, or some T1-T5 can be N-type and some P-type. This can be achieved by simply changing the port polarities of the selected types of thin-film transistors T1-T5 in the connection configuration according to the port polarities of the thin-film transistors T1-T5 in this embodiment.

[0037] Figure 3 A signal timing diagram of a pixel circuit according to a first embodiment of the present invention is shown. See also Figure 3 The pixel circuit 100 can be divided into three stages: the initial stage ①, the data voltage writing stage ②, and the light emission stage ③.

[0038] See Figure 2 as well as Figure 3 In the initial stage①, the emitted signal E <n>and control signal G1 <n>High level, control signal G <n>and the light emission signal E1 <n>When the voltage is low, both thin-film transistors T2 and T5 are turned on, while both thin-film transistors T1 and T3 are turned off. At this time, the first power supply voltage ELVDD1 rises from voltage ELVDD (emission layer VDD) to ELVDD+VX, causing the voltage at the first terminal of capacitor C to rise to a preset voltage value VX. The voltage at node A is pulled down to the initial voltage through thin-film transistors T2 and T5. The preset voltage value VX can be adjusted according to the actual situation. The preset voltage value VX is related to the voltage difference of the data voltage VDATA voltage domain. For example, if the voltage domain of the data voltage VDATA is 1-5V, then the preset voltage value VX can be set to 4V. Of course, the preset voltage value can also be selected between 3.8-4.2V. The initial voltage is related to the duration of the pixel circuit 100 in the initial stage ①. The longer the duration of the pixel circuit 100 in the initial stage ①, the lower the initial voltage.

[0039] During the data voltage writing stage ②, the light emission signal E... <n>and the light emission signal E1 <n>High level, control signal G <n>and control signal G1 <n>When the voltage is low, both thin-film transistors T1 and T5 are turned on, while both thin-film transistors T2 and T3 are turned off. At this time, the first power supply voltage ELVDD1 drops from ELVDD+VX to ELVDD, causing the voltage at the first terminal of capacitor C to drop by a preset voltage value VX. According to the bootstrap characteristic of the capacitor, the voltage at the second terminal of capacitor C, i.e., the voltage at node A, will also drop by a preset voltage value VX, thus making the voltage at node A negative and turning on thin-film transistor T4. At this time, the current path between the data voltage VDATA and node A is opened. The data voltage VDATA charges node A through thin-film transistors T1, T4, and T5 until the voltage at node A is charged to VDATA-|Vth|, where |Vth| is the absolute value of the threshold voltage of thin-film transistor T4.

[0040] In the luminescence stage ③, the luminescence signal E <n>and the light emission signal E1 <n>When the signal is low, the control signal G <n>and control signal G1 <n>When the voltage is high, thin-film transistors T1 and T5 are both off, and thin-film transistors T2 and T3 are both on. The voltage at node A is maintained at VDATA-|Vth|. Thin-film transistor T4 provides driving current according to the first power supply voltage ELVDD1 and the voltage at node A to drive the light-emitting element 130 to emit light.

[0041] The driving current Ids provided by thin-film transistor T4 is Ids = K*(Vsg - |Vth|). 2 =K*(ELVDD-VDATA) 2 .

[0042] In a preferred embodiment, if the voltage at node A is sufficient to turn off thin-film transistor T4 in the initial stage ①, then thin-film transistor T1 does not need to be turned off in the initial stage ①, and control signal G can be used. <n>Simultaneous control of thin-film transistors T1 and T5 is possible without setting a control signal G1. <n>.

[0043] Figure 4 A circuit connection diagram of a pixel circuit according to a second embodiment of the present invention is shown. Figure 4 The pixel circuit 200 shown is Figure 2 The pixel circuits 100 shown have basically the same structure. The differences between the two will be explained below.

[0044] See Figure 4 The thin-film transistor T2 of the pixel circuit 200 is no longer connected between node D and the light-emitting element 230, but is connected between node D and ground GND, and node D and the light-emitting element 230 are directly connected.

[0045] Figure 5 A signal timing diagram of a pixel circuit according to a second embodiment of the present invention is shown. See also Figure 4 and Figure 5 The pixel circuit 200 also includes three stages: the initial stage ①, the data voltage writing stage ②, and the light emission stage ③.

[0046] In the initial stage①, the emitted signal E <n>and control signal G1 <n>High level, control signal G <n>and the light emission signal E1 <n>When the voltage is low, both thin-film transistors T2 and T5 are turned on, while both thin-film transistors T1 and T3 are turned off. At this time, the first power supply voltage ELVDD1 rises from ELVDD to ELVDD+VX, causing the voltage at the first terminal of capacitor C to rise by a preset voltage value VX. The voltage at node A is pulled down to the initial voltage, i.e., the ground voltage GND, through thin-film transistor T2. The preset voltage value VX can be adjusted according to the actual situation. The preset voltage value VX is related to the voltage difference of the data voltage VDATA voltage range. For example, if the voltage range of the data voltage VDATA is 1-5V, then the preset voltage value VX can be set to 4V. Of course, the preset voltage value can also be selected between 3.8-4.2V.

[0047] During the data voltage writing stage ②, the light emission signal E... <n>and the light emission signal E1 <n>High level, control signal G <n>and control signal G1 <n>When the voltage is low, both thin-film transistors T1 and T5 are turned on, while both thin-film transistors T2 and T3 are turned off. At this time, the first power supply voltage ELVDD1 drops from ELVDD+VX to ELVDD, causing the voltage at the first terminal of capacitor C to drop by a preset voltage value VX. According to the bootstrap characteristic of the capacitor, the voltage at the second terminal of capacitor C, i.e., the voltage at node A, will also drop by a preset voltage value VX, thus making the voltage at node A negative and turning on thin-film transistor T4. At this time, the current path between the data voltage VDATA and node A is opened. The data voltage VDATA charges node A through thin-film transistors T1, T4, and T5 until the voltage at node A is charged to VDATA-|Vth|, where |Vth| is the absolute value of the threshold voltage of thin-film transistor T4.

[0048] In the luminescence stage ③, the luminescence signal E <n>When the signal is low, the control signal G <n>Control signal G1 <n>and the light emission signal E1 <n>When the voltage is high, thin-film transistors T1, T2, and T5 are all off, thin-film transistor T3 is on, the voltage at node A is maintained at VDATA-|Vth|, and thin-film transistor T4 provides driving current according to the first power supply voltage ELVDD1 and the driving voltage to drive the light-emitting element 230 to emit light.

[0049] The driving current Ids provided by thin-film transistor T4 is Ids = K*(Vsg - |Vth|). 2 =K*(ELVDD-VDATA) 2 .

[0050] As can be seen from the formula, in the light-emitting stage ③, the driving current Ids provided by the thin-film transistor T4 to the light-emitting element is independent of its threshold voltage Vth. This eliminates the differences in the threshold voltage Vth distribution of the thin-film transistor T4 caused by the manufacturing process, enabling the display panel to display uniformly and improving the display effect. Furthermore, this circuit also has a PWM dimming function, which can be adjusted by controlling the light-emitting signal E... <n>and the light emission signal E1 <n>The brightness of the light-emitting element is adjusted by the pulse width.

[0051] The pixel circuit provided by the embodiments of the present invention, by initially raising the first power supply voltage to a preset voltage value and lowering the voltage of node A to the initial voltage, and then lowering the first power supply voltage to a preset voltage value during the data voltage writing phase, utilizes the bootstrap characteristic of the capacitor to lower the voltage of node A by a preset voltage value. This allows node A to write data voltage corresponding to grayscale data from a lower voltage to a higher voltage during the data voltage writing phase, solving the problem of poor low-voltage writing in the prior art thin-film transistor T4. Furthermore, the pixel circuit provided by the embodiments of the present invention is superior to... Figure 1 The 6T1C pixel circuit shown can reduce the number of thin-film transistors, thereby lowering the PPI of the display panel.

[0052] As described above, these embodiments of the present invention do not exhaustively describe all details, nor do they limit the invention to specific embodiments. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to effectively utilize the invention and its modifications. The scope of protection of this invention should be determined by the scope defined in the claims and their equivalents.< / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n> < / n>

Claims

1. A pixel circuit, comprising: a first thin film transistor configured to transmit a data voltage corresponding to a gray scale data; a driving module connected between a first power voltage and a first node and connected to a second node with the first thin film transistor, and configured to provide a driving current; a compensation module connected between the first power voltage and the first node and connected to a third node with the driving module; a light emitting element configured to emit light under the driving of the driving current; a second thin film transistor connected between the first node and the light emitting element, wherein the pixel circuit is configured to pull up the first power voltage by a preset voltage value in an initial stage, and to pull down a voltage of the third node to an initial voltage through the compensation module and the second thin film transistor, to pull down the first power voltage by the preset voltage value in a data voltage writing stage, to turn on a current path between the data voltage and the third node by pulling down the voltage of the third node by the preset voltage value, to charge the third node to a difference between the data voltage and a threshold voltage, and to control the driving module to provide the driving current through the voltage of the third node and the first power voltage in a light emitting stage, the preset voltage value is set according to a voltage difference of a voltage domain of the data voltage.

2. The pixel circuit of claim 1, wherein, the driving module comprises: a third thin film transistor having a first end receiving the first power voltage, a second end connected to the second node, and a control end receiving a first light emitting signal; a fourth thin film transistor having a first end connected to the second node, a second end connected to the first node, and a control end connected to the third node, wherein the threshold voltage is a threshold voltage of the fourth thin film transistor.

3. The pixel circuit of claim 1, wherein, the compensation module comprises: a capacitor having a first end receiving the first power voltage and a second end connected to the third node; a fifth thin film transistor having a first end connected to the third node, a second end connected to the first node, and a control end receiving a first control signal. 4.The pixel circuit of claim 1, wherein a first end of the first thin film transistor receives the data voltage, a second end of the first thin film transistor is connected to the second node, and a control end of the first thin film transistor receives a second control signal; a first end of the light emitting element receives the driving current, and a second end of the light emitting element receives a second power voltage, wherein the first power voltage is greater than the second power voltage.

5. The pixel circuit of claim 4, wherein, a first end of the second thin film transistor is connected to the first node, a second end of the second thin film transistor is connected to a first end of the light emitting element, and a control end of the second thin film transistor receives a second light emitting signal, wherein the initial voltage is related to a maintaining time of the pixel circuit in the initial stage.

6. The pixel circuit of claim 4, wherein, a first end of the second thin film transistor and a first end of the light emitting element are connected to the first node, a second end of the second thin film transistor is grounded, and a control end of the second thin film transistor receives a second light emitting signal, wherein the initial voltage is a ground voltage.

7. A display panel comprising a plurality of pixel circuits according to any one of claims 1-6 arranged in an array.

8. A display device comprising: a display panel according to claim 7; and a source driver circuit for providing data voltages to the display panel.

9. A driving method of a pixel circuit for driving a pixel circuit according to any one of claims 1-6, comprising: in an initial stage, pulling up a first power supply voltage by a preset voltage value and pulling down a voltage of a third node to an initial voltage; in a data voltage writing stage, pulling down the first power supply voltage by a preset voltage value and using a bootstrap principle of a capacitor to make the voltage of the third node follow the first power supply voltage to be pulled down by the preset voltage value, so as to turn on a current path between a data voltage and the third node, and charge the voltage of the third node to be equal to a difference between absolute values of the data voltage and a threshold voltage; in a light emitting stage, providing a driving current according to the first power supply voltage and the voltage of the third node to drive a light emitting element to emit light, wherein the threshold voltage is a threshold voltage of a driving transistor, and the preset voltage value is set according to a voltage difference of a voltage domain of the data voltage.

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