Thyristor forward voltage signal fault detection system and detection method
By designing an IP fault detection system and method to monitor the triggering and voltage recovery of thyristors, the problem of signal discontinuity in the inspection of bypass thyristor valve groups was solved, and accurate detection and continuous monitoring of their faults were achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- NR ELECTRIC CO LTD
- Filing Date
- 2022-02-25
- Publication Date
- 2026-05-01
AI Technical Summary
Existing thyristor IP signal fault detection methods are not applicable to bypass thyristor valve assemblies because they are subjected to positive DC voltage for a long time and remain off, the inspection duration is limited, and the signal transmission is discontinuous and irregular.
An IP fault detection enable module, a statistics module, and an action output module were designed. By monitoring the thyristor's trigger conduction and recovery of positive voltage during the inspection period, the module determines whether the thyristor is working properly and outputs a fault alarm signal or an action output signal.
It enables effective fault detection of bypass thyristor valve assemblies, is suitable for their unique long-term shutdown and discontinuous signal characteristics, and provides a state latching function to ensure the accuracy and continuity of detection results.
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Figure CN116699347B_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of high voltage direct current transmission technology, specifically relating to a thyristor forward voltage signal fault detection system and detection method. Background Technology
[0002] In DC transmission systems based on voltage source converters, to avoid DC voltage and current surges from the rectifier side, a voltage source valve group can be connected to an inductor and then connected in parallel with a bypass thyristor valve group switching circuit.
[0003] In the existing technology, the bypass thyristor valve group is subjected to positive DC voltage for a long time and is kept in the off operating condition. Therefore, the thyristor positive voltage signal (IP) does not have the characteristic of periodic transmission. The thyristor IP signal using the inspection method is affected by the specific trigger control method. The inspection duration is limited, the transmission of thyristor IP signal is discontinuous, and the transmission time is irregular.
[0004] Based on the aforementioned inspection characteristics of bypass thyristors, existing thyristor IP signal fault detection methods are not applicable. Summary of the Invention
[0005] Purpose of the Invention: This application provides a thyristor forward voltage signal fault detection system to solve the problems of the operating mode of bypass thyristor valve groups being subjected to forward DC voltage for a long time and kept off, and the limited inspection duration under the inspection mode, resulting in discontinuous and irregular transmission of thyristor IP signals. This application also provides a thyristor forward voltage signal fault detection method to solve the problem that previous thyristor IP fault detection methods are not applicable to bypass thyristor valve groups.
[0006] Technical solution: The thyristor forward voltage signal fault detection system described in this application includes:
[0007] The IP fault detection enable module is used to receive control signals from the control host and generate statistical initialization enable, statistical output enable, and action output enable.
[0008] The IP fault detection and statistics module is connected to the IP fault detection enable module and is used to collect bypass thyristor-level IP signals during the inspection state, receive the statistics initialization enable and the statistics output enable, and output the real-time statistics results or latched statistics results of the thyristor-level report IP signals.
[0009] The IP fault action output module is connected to the IP fault detection enable module and the IP fault detection statistics module respectively. It is used to compare the latched statistics results with the configuration settings, receive the action output enable, and output an IP fault alarm signal or an action output signal.
[0010] In some embodiments, the IP fault detection enable module is configured to: determine whether the detection result of the received IP signal under the inspection state is reliable by receiving the inspection state, configuration setting, characteristic signal and channel monitoring state, and generate the states of statistical initialization enable, statistical output enable and action output enable.
[0011] In some embodiments, the statistical initialization enable signal clears the real-time statistical results of each thyristor-level IP signal at the start of the current inspection state. The initialization enable signal ensures that the real-time statistical results reflect the statistical status of the thyristor-level reported IP signals during the current inspection period; the statistical initialization enable signal does not clear the latched statistical results of each thyristor-level reported IP signal in the IP fault statistics module, nor does it reset the IP fault alarm signal or action output signal in the IP fault detection output module.
[0012] In some embodiments, the detection result of the IP signal is determined by detecting whether each thyristor can recover its positive voltage and return an IP signal after being triggered to conduct. During the inspection state, for the bypass thyristor that is subjected to a positive DC voltage and is in the off state, each thyristor is triggered to conduct in sequence. By detecting whether each thyristor can recover its positive voltage and return an IP signal after being triggered to conduct, it is determined whether each thyristor is working normally.
[0013] In some embodiments, the configuration settings include any one of the following: thyristor IP fault detection function activation settings, alarm settings, action settings, or thyristor channel configuration settings.
[0014] In some embodiments, the feature signal includes any one of charging status, unlocked status, or on-duty status.
[0015] In some embodiments, the channel monitoring status includes the receiving channel of the characteristic signal or the receiving channel of the monitored thyristor-level IP report signal.
[0016] In some embodiments, the IP fault detection and statistics module is configured to: at the beginning of the inspection, clear the real-time statistical results according to the statistical initialization enable, and simultaneously detect and latch the thyristor-level reported IP signals as real-time statistical results; at the end of the inspection, determine whether to update the latched statistical results based on the status of the statistical output enable. Specifically, if the statistical output enable status is valid, update the latched statistical results of the thyristor IP signals to the real-time statistical results of the thyristor-level reported IP signals during the inspection; if the statistical output enable status is invalid, retain the previous latched statistical results of the thyristor-level reported IP signals.
[0017] In some embodiments, the state of the statistical output enable is determined at the end of the inspection period. The determination process is as follows: if the detection result of the IP signal during the inspection period is reliable, the state of the statistical output enable is valid; if the detection result of the IP signal during the inspection period is unreliable, the state of the statistical output enable is invalid.
[0018] In some embodiments, the IP fault action exit module is configured to: at the end of the inspection phase, by comparing the latched statistical results with the configured settings, determine whether to update the IP fault alarm signal or action exit signal latched in the IP fault action exit module based on the status of the action exit enable. Specifically, when the action exit is enabled, the latched IP fault alarm signal or action exit signal status is updated accordingly; when the action exit is disabled, the previously latched IP fault alarm signal or action exit signal status is maintained.
[0019] In some embodiments, the state of the action output enable is determined at the end of the inspection state, and the determination process is as follows: if the detection result of the IP signal during the inspection is reliable, the state of the action output enable is valid; if the detection result of the IP signal during the inspection is unreliable, the state of the action output enable is invalid.
[0020] In some embodiments, the timing of the action output enable is coordinated with the timing of the statistical output enable. This allows the determination of the IP fault alarm signal or action output signal status based on the latest thyristor-level IP signal latching statistics.
[0021] Methods for detecting faults in the forward voltage signal of a thyristor include:
[0022] The IP fault detection enable module receives the inspection status, configures the set values, characteristic signals and channel monitoring status, judges whether the detection results of the IP signals received under the inspection status are reliable, and generates statistical initialization enable, statistical output enable and action output enable.
[0023] The IP fault detection and statistics module detects the thyristor-level reporting IP signal in real time and outputs the real-time statistical results or latched statistical results of the thyristor-level reporting IP signal based on the status of the statistical output enable.
[0024] The IP fault action exit module compares the latched statistics with the configured settings and outputs an IP fault alarm signal or an action exit signal based on the enable status of the action exit.
[0025] In some embodiments, the IP fault detection enabling module is implemented as follows:
[0026] Statistical initialization is enabled by detecting the inspection status;
[0027] By detecting the status monitoring of characteristic signals, channel monitoring, and normal system operation status signals, abnormal inspection status is determined. Based on the abnormal inspection status, statistical output is enabled.
[0028] By detecting the inspection status, statistically analyzing the enabled status, and combining the abnormal inspection status and the normal operating status signals of the system, the action output enable is determined.
[0029] In some embodiments, the IP fault detection and statistics module is implemented as follows:
[0030] At the beginning of the inspection, based on the statistical initialization enable reset real-time statistical results, the thyristor-level report IP signal is detected and latched as real-time statistical results.
[0031] At the end of the inspection phase, if the statistical output is enabled, the latched statistical results of the thyristor IP signal will be updated to the real-time statistical results of the thyristor reported IP signal during the inspection; if the statistical output is disabled, the latched statistical results of the thyristor reported IP signal will be retained.
[0032] In some embodiments, the implementation method of the IP fault action exit module is as follows:
[0033] At the end of the inspection phase, if the action exit is enabled, update the latched IP fault alarm signal or action exit signal; if the action exit is disabled, retain the previously latched IP fault alarm signal or action exit signal.
[0034] In some embodiments, the real-time statistical results and latched statistical results of the thyristor-level reporting IP signal, as well as the IP fault alarm signal or action output signal, have independent latching and update control methods. Operation is not affected by the specific triggering control method of the inspection function.
[0035] The thyristor forward voltage signal fault detection method of the present invention determines whether the thyristor can be normally triggered to turn on, turn off, and restore forward voltage by monitoring whether an IP signal is returned after a trigger command is issued to each stage of the thyristor during the inspection period.
[0036] Beneficial Effects: Compared with existing technologies, the thyristor forward voltage signal fault detection system of this application is equipped with an IP fault detection enable module, providing statistical initialization enable, statistical output enable, and action output enable for the thyristor forward voltage signal fault detection method; an IP fault detection statistics module is set up to detect the thyristor IP signal and latch the statistical results; and an IP fault action output module is set up to output the latched IP fault alarm / action signal status. The thyristor forward voltage signal fault detection system of this application has a status latching function. The thyristor forward voltage signal fault detection method of this application is suitable for inspection methods where bypass thyristors are turned on separately. For bypass thyristor valve groups subjected to positive DC voltage and long-term off conditions, the inspection method has a limited duration, and the thyristor IP signal is discontinuous, with monitoring results sent intermittently. This effectively solves the problem that previous thyristor IP fault detection methods are not applicable to bypass thyristor valve groups. Attached Figure Description
[0037] The technical solution and other beneficial effects of this application will become apparent from the following detailed description of specific embodiments in conjunction with the accompanying drawings.
[0038] Figure 1 This is a flowchart of a bypass thyristor inspection method in an embodiment of this application;
[0039] Figure 2 This is a schematic diagram of the thyristor forward voltage signal fault detection system module structure and signal in an embodiment of this application;
[0040] Figure 3 This is a schematic diagram illustrating the implementation method of the IP fault detection enable module in the embodiments of this application;
[0041] Figure 4 This is a schematic diagram of the IP fault detection timing during a single inspection process in an embodiment of this application;
[0042] Figure 5 This is a schematic diagram of the IP fault detection timing during a multiple inspection process in an embodiment of this application. Detailed Implementation
[0043] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0044] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "connected" and "linked" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection, an electrical connection, or a connection that allows for mutual communication; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances. In the description of this application, "multiple" means two or more, unless otherwise expressly and specifically limited. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features.
[0045] The following disclosure provides many different implementations or examples for carrying out different structures of this application. To simplify the disclosure of this application, the components and arrangements of specific examples are described below. Of course, these are merely examples and are not intended to limit this application.
[0046] The applicant discovered that in the inspection method for bypass thyristor valve assemblies, because the bypass thyristor valve assemblies are subjected to a positive DC voltage for a long period of time and remain off, the thyristor positive voltage signal IP does not have a periodic uploading characteristic. The thyristor IP signal using the inspection method is affected by the specific triggering control method, resulting in a limited inspection duration, discontinuous uploading of the thyristor IP signal, and irregular uploading time. Therefore, previous thyristor IP fault detection methods are not suitable for this situation. The applicant improved the traditional solution, resulting in the technical solution of this application.
[0047] like Figure 1 As shown, this process is used for routine testing of bypass thyristor valve assemblies. After the routine test is started, during the test period, the bypass thyristors subjected to positive DC voltage are triggered to conduct in a certain sequence. After a single-stage thyristor is triggered to conduct, it turns off due to intermittent current, and a positive DC voltage is re-established across the thyristor. During this period, an IP signal is returned. The thyristor IP fault detection method determines whether the thyristor can be normally triggered to conduct, turn off, and restore positive voltage by monitoring whether an IP signal is returned after triggering commands to each stage of the thyristor during the routine test.
[0048] See Figure 2This structure describes a thyristor forward voltage signal fault detection system, comprising an IP fault detection enable module, an IP fault detection statistics module, and an IP fault action output module. The IP fault detection enable module receives control signals from the control host and generates statistical initialization enable, statistical output enable, and action output enable. The IP fault detection statistics module, connected to the IP fault detection enable module, collects bypass thyristor-level IP signals during inspection, receives statistical initialization enable and statistical output enable, and outputs real-time statistical results and latched statistical results of the thyristor-level reported IP signals. The IP fault action output module, connected to both the IP fault detection enable module and the IP fault detection statistics module, compares the latched statistical results of the thyristor-level reported IP signals, receives the action output enable, and outputs an IP fault alarm signal or an action output signal.
[0049] See Figure 3 This is a schematic diagram illustrating the implementation method of the IP fault detection enable module. In this method, statistical initialization enable is generated by detecting the inspection status; abnormal inspection status is determined by detecting the status monitoring of characteristic signals, channel monitoring, and normal system operation status signals; abnormal inspection status, combined with the detected inspection status, determines the statistical output enable; and the action exit enable is determined by detecting the inspection status, statistically outputting the enable status, and combining the abnormal inspection status and the normal system operation status signals.
[0050] In some embodiments, the statistical initialization enable signal clears the real-time statistical results of each thyristor-level IP signal when the current inspection state begins; the initialization enable signal allows the real-time statistical results to reflect the statistical situation of the thyristor-level reported IP signals during the current inspection period; the statistical initialization enable signal does not clear the latched statistical results of each thyristor-level reported IP signal in the IP fault statistics module, and does not reset the IP fault alarm signal or action output signal in the IP fault detection output module.
[0051] In some embodiments, the IP fault detection enable module receives the inspection status, configuration settings, characteristic signals and channel monitoring status, determines whether the detection result of the IP signal received under the system inspection status is reliable, and outputs the status of statistical initialization enable, statistical output enable and action output enable.
[0052] In some embodiments, the configuration settings include, but are not limited to, the configuration settings related to the IP fault detection method, such as the thyristor IP fault detection function activation settings, alarm settings, action settings, thyristor channel configuration settings, etc.
[0053] In some embodiments, the characteristic signals include, but are not limited to, signals relating to the operating status of the bypass thyristor and the control host, such as charging status, unlocking status, and duty status.
[0054] In some embodiments, the channel monitoring status includes, but is not limited to, channel monitoring involving signal interactions related to the control host inspection status, such as the receiving channel of the characteristic signal, the receiving channel of the monitored thyristor IP report signal, etc.
[0055] In some embodiments, the statistical output enable function updates the latched statistical results of the thyristor-level reported IP signals in the IP fault detection statistics module when the current inspection state ends. The statistical output enable function determines at the end of the inspection state that if the IP signal detection results during the inspection period are reliable, the statistical output enable function is effective; otherwise, if the IP signal detection results during the inspection period are unreliable, the statistical output enable function is ineffective.
[0056] In some embodiments, the action exit enable updates the state of the IP fault alarm signal or action exit signal latched in the IP fault action exit module when the current inspection state ends; the action exit enable determines at the end of the inspection state that if the IP signal detection result during the inspection is reliable, the action exit enable is effective, otherwise if the IP signal detection result during the inspection is unreliable, the action exit enable is ineffective; the action exit enable, in conjunction with the timing of the statistical output enable state, ensures that the IP fault alarm signal or action exit signal is judged based on the latest thyristor-level IP signal latching statistical results.
[0057] In some embodiments, the IP fault detection statistics module receives statistical initialization enable, statistical output enable status and thyristor-level reporting IP signal, and outputs real-time statistical results and latched statistical results. At the beginning of the inspection, the real-time statistical results are cleared according to the statistical initialization enable, the thyristor-level reporting IP signal is detected and latched in real time as real-time statistical results. At the end of the inspection, if the statistical output enable is valid, the latched statistical results of the thyristor IP signal are updated to the real-time statistical results of the thyristor reporting IP signal during the inspection period; if the statistical output enable is invalid, the latched statistical results of the thyristor reporting IP signal are retained.
[0058] In some embodiments, the IP fault action output module compares the latched statistical results of the thyristor-reported IP signal with the configured setting value, and outputs an IP fault alarm signal or an action output signal according to the action output enable status. When the action output is enabled, the latched IP fault alarm signal or action output signal status is updated accordingly based on the comparison result between the latched statistical results and the setting value of the corresponding alarm action output signal. When the action output is disabled, the previously latched IP fault alarm signal or action output signal status is maintained.
[0059] In some embodiments, the real-time statistical results of thyristor IP fault detection, the latched statistical results, and the IP fault alarm signal or action output signal in the detection method have independent latching and update control methods, and their operation is not affected by the specific triggering control method of the inspection function.
[0060] See Figure 4 IP1, IP2...IPn represent the report signals of thyristor-level optical channels 1, 2...n, respectively. At time t1, the inspection function is started, the statistical initialization is enabled, and the IP fault detection and statistics module receives the IP report signals generated after the inspection of each thyristor is triggered. At time t2, the inspection process ends, the statistical output is enabled, the IP fault detection and statistics module updates the latched statistical results and sends them to the IP fault action output module. At time t3, the action output is enabled, and the IP fault action output module compares the received latched statistical results with the configured setpoint and updates the IP fault alarm signal or action output signal status. At time t4, the action output is reset, and the IP fault action output module latches the current IP fault alarm signal or action output signal status until the next action output is enabled.
[0061] See Figure 5 IPn represents the report signal of the thyristor-level optical channel n. T1, T2, and T3 represent the inspection function activation process in different time periods. During the inspection in time period T1, the thyristor's nth-level optical channel does not receive an IP report signal, but the action output enable is invalid due to some reason, so the IP fault alarm status is not updated. During the inspection in time period T2, since the thyristor's nth-level optical channel does not receive an IP report signal, the inspection result is updated and the IP fault alarm signal is output after the action output enable is activated. During the inspection in time period T3, assuming that the fault of the thyristor's nth-level optical channel disappears after fault handling and the IP report signal is correctly received, the inspection result is updated and the IP fault alarm signal or action output signal is reset after the action output enable is activated.
[0062] The foregoing description of the thyristor forward voltage signal fault detection system and detection method with state latching function for bypass thyristor inspection provided in the embodiments of this application has been detailed. Specific examples have been used in this application to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the technical solutions and core ideas of this application. Those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.
Claims
1. A thyristor forward voltage signal fault detection system, characterized in that, include: The IP fault detection enable module is used to receive control signals from the control host and generate statistical initialization enable, statistical output enable, and action output enable. The IP fault detection enable module is configured to: determine whether the detection result of the received IP signal under the inspection state is reliable by receiving the inspection state, configuration setting, characteristic signal and channel monitoring state, and generate the states of statistical initialization enable, statistical output enable and action output enable; the characteristic signal includes any one of charging state, unlocking state or duty state; the channel monitoring state includes the receiving channel of the characteristic signal or the receiving channel of the monitored thyristor-level IP report signal; The IP fault detection and statistics module is connected to the IP fault detection enable module and is used to collect bypass thyristor-level IP signals during the inspection state, receive the statistics initialization enable and the statistics output enable, and output the real-time statistics results or latched statistics results of the thyristor-level report IP signals. The IP fault action output module is connected to the IP fault detection enable module and the IP fault detection statistics module respectively. It is used to compare the latched statistics results with the configuration settings, receive the action output enable, and output an IP fault alarm signal or an action output signal.
2. The thyristor forward voltage signal fault detection system according to claim 1, characterized in that, The statistical initialization enable resets the real-time statistical results of each thyristor-level IP signal to zero when the current inspection state begins.
3. The thyristor forward voltage signal fault detection system according to claim 1, characterized in that, The detection result of the IP signal is determined by detecting whether each stage of the thyristor can recover the positive voltage and return the IP signal after being triggered and turned on.
4. The thyristor forward voltage signal fault detection system according to claim 1, characterized in that, The configuration settings include any one of the following: thyristor IP fault detection function activation settings, alarm settings, action settings, or thyristor channel configuration settings.
5. The thyristor forward voltage signal fault detection system according to claim 1, characterized in that, The IP fault detection and statistics module is configured to: at the beginning of the inspection, clear the real-time statistics results according to the statistical initialization enable, and at the same time detect the thyristor-level report IP signal and latch it as the real-time statistics result. At the end of the inspection phase, the latch statistics result is updated based on the status of the statistical output enable.
6. The thyristor forward voltage signal fault detection system according to claim 5, characterized in that, The state of the statistical output enable is determined at the end of the inspection state, and the determination process is as follows: If the IP signal detection results during the inspection are reliable, the statistical output enable state is valid; If the IP signal detection results during the inspection are unreliable, the statistical output enable state will be invalid.
7. The thyristor forward voltage signal fault detection system according to claim 1, characterized in that, The IP fault action exit module is configured to: at the end of the inspection phase, by comparing the latched statistical results with the configured set value, determine whether to update the IP fault alarm signal or action exit signal latched in the IP fault action exit module based on the status of the action exit enable.
8. The thyristor forward voltage signal fault detection system according to claim 7, characterized in that, The state of the action output enable is determined at the end of the inspection state. The determination process is as follows: If the IP signal detection results during the inspection are reliable, the action output enable state is valid; if the IP signal detection results during the inspection are unreliable, the action output enable state is invalid.
9. The thyristor forward voltage signal fault detection system according to claim 1, characterized in that, The timing sequence of the action output enable is coordinated with the statistical output enable.
10. A method for detecting faults in the forward voltage signal of a thyristor, characterized in that, include: The IP fault detection enable module receives the inspection status, configures setpoints, characteristic signals, and channel monitoring status. It then determines whether the detection results of the received IP signals under the inspection status are reliable and generates statistical initialization enable, statistical output enable, and action output enable. The characteristic signals include any one of the charging status, unlocking status, or duty status. The channel monitoring status includes the receiving channel of the characteristic signals or the receiving channel of the monitored thyristor-level IP report signals. The IP fault detection and statistics module detects the thyristor-level reporting IP signal in real time and outputs the real-time statistical results or latched statistical results of the thyristor-level reporting IP signal based on the status of the statistical output enable. The IP fault action exit module compares the latched statistics with the configured settings and outputs an IP fault alarm signal or an action exit signal based on the enable status of the action exit.
11. The thyristor forward voltage signal fault detection method according to claim 10, characterized in that, The implementation method of the IP fault detection enable module is as follows: Statistical initialization is enabled by detecting the inspection status; By detecting the status monitoring of characteristic signals, channel monitoring, and normal system operation status signals, abnormal inspection status is determined. By detecting the inspection status and combining the abnormal inspection status, the statistical output is enabled. By detecting the inspection status, statistically analyzing the enabled status, and combining the abnormal inspection status and the normal operating status signals of the system, the action output enable is determined.
12. The thyristor forward voltage signal fault detection method according to claim 10, characterized in that, The implementation method of the IP fault detection and statistics module is as follows: At the beginning of the inspection, based on the statistical initialization enable reset real-time statistical results, the thyristor-level report IP signal is detected and latched as real-time statistical results. At the end of the inspection phase, if the statistical output enable is valid, the latched statistical results of the thyristor IP signal will be updated to the real-time statistical results of the thyristor reported IP signal during the inspection. If the statistical output enable is disabled, the latched statistical results of the thyristor report IP signal will be retained.
13. The thyristor forward voltage signal fault detection method according to claim 10, characterized in that, The implementation method of the IP fault action exit module is as follows: At the end of the inspection phase, if the action exit is enabled, update the latched IP fault alarm signal or action exit signal; if the action exit is disabled, retain the previously latched IP fault alarm signal or action exit signal.
14. The thyristor forward voltage signal fault detection method according to claim 10, characterized in that, The real-time statistical results, the latched statistical results, and the IP fault alarm signal or action exit signal are latched and updated independently of each other.
Citation Information
Patent Citations
Thyristor fault detecting device
CN104730441A
Bypass thyristor valve group inspection method and control device
CN108258715A