Method, device, equipment and storage medium for monitoring register state of drive chip

Abstract

The application provides a method, device, equipment and storage medium for monitoring a register state of a driving chip, and the method comprises the following steps: monitoring a key register of the driving chip in operation, that is, obtaining a write value and a read value of the register of the driving chip, and resetting the driving chip when the write value and the read value are inconsistent, so as to ensure that the write value and the read value of the register of the driving chip are consistent, to ensure that the working state of the register can be monitored in real time within a certain time after the driving chip is powered on, and the abnormal state of the register can be processed, so as to ensure that a pulse width modulation signal is output.

Description

Technical Field

[0001] This invention relates to the field of motor drive chips, and more specifically to a method, apparatus, device, and storage medium for monitoring the state of a drive chip register. Background Technology

[0002] Currently, controlling IGBTs (Insulated Gate Bipolar Transistors) typically requires controlling the IGBT driver chip via SPI commands to ensure correct PWM output. However, in actual production and applications, due to the long SPI communication loop and the driver chip's weak anti-interference capability, discrepancies sometimes occur between the values ​​written to the driver chip's register and the actual values ​​read. This leads to abnormal IGBT states and prevents correct PWM (Pulse Width Modulation) output.

[0003] The publication number is CN103944144A, which discloses a method for detecting IGBT fault states via software. The method includes a digital signal processor (DSP), an isolation drive fault protection circuit, a fault detection signal synthesis circuit, and an IGBT drive H-bridge. The fault detection signal synthesis circuit detects various fault states of the IGBT drive H-bridge, synthesizes these fault states, and sends the individual fault states and the synthesized total fault state together to the DSP. The DSP then uses a software detection algorithm to complete the fault state detection and protection. However, this method does not perform real-time monitoring of the IGBT drive chip register state; therefore, when the IGBT drive chip state is abnormal, there may still be situations where PWM cannot be output. Summary of the Invention

[0004] This invention provides a method, apparatus, device, and storage medium for monitoring the state of a driver chip register, in order to solve the aforementioned technical problem of the inability to monitor registers in real time.

[0005] This invention provides a method for monitoring the state of a driver chip register. The method includes: acquiring the write value and read value of the driver chip register; setting a monitoring timeout and timing the monitoring events to obtain a first monitoring timeout; if the first monitoring timeout is less than the monitoring timeout, determining the consistency between the write value and the read value to monitor the register.

[0006] In one embodiment of the present invention, after determining the consistency between the written value and the read value, the method for monitoring the state of the driver chip register further includes: if the written value is equal to the read value, ending the register monitoring event; if the written value is greater than or less than the read value, triggering a driver chip reset.

[0007] In one embodiment of the present invention, after setting the monitoring set time, the method for monitoring the state of the driver chip register further includes: if the monitoring time is greater than or equal to the monitoring set time, determining the type of motor mode, and sending a preset motor control command that has a mapping relationship with the type of motor mode according to the type of motor mode, wherein the type of motor mode includes non-torque mode and torque mode.

[0008] In one embodiment of the present invention, a preset motor control command that has a mapping relationship with the type of the motor mode is sent according to the type of the motor mode. The preset motor control command includes a reset command, comprising:

[0009] If the motor mode is non-torque mode, a reset command is sent to reset the drive chip and clear the monitoring timer to zero.

[0010] In one embodiment of the present invention, a preset motor control instruction that has a mapping relationship with the type of motor mode is sent according to the type of motor mode. The preset motor control instruction includes a fault reporting instruction. The method for monitoring the state of the driver chip register further includes: if the motor mode is torque mode, then a fault reporting instruction is sent to report a power module fault to the server.

[0011] In one embodiment of the present invention, resetting the driver chip includes: setting a power-down delay time and disconnecting the power supply to the driver chip; timing the restart time of the driver chip to obtain a restart timing time; and restarting the driver chip if the restart timing time is greater than the power-down delay time.

[0012] In one embodiment of the present invention, after resetting the driver chip, the method further includes: timing the monitoring event to obtain a second monitoring timing time; if the second monitoring timing time is less than the monitoring set time, determining the register monitoring status through the write value and the read value, until the write value is determined to be equal to the read value, and ending the register monitoring event.

[0013] This invention provides an apparatus for monitoring the registers of a driver chip. The apparatus includes: an acquisition module for acquiring the write and read values ​​of the driver chip; a timing module for setting a monitoring time and timing the monitoring events to obtain a first monitoring time; and a monitoring module for determining the consistency status of the write and read values ​​if the first monitoring time is less than the monitoring time, so as to monitor the register.

[0014] This invention provides a device for storing one or more programs, which, when executed by one or more processors, enable the device to implement the method described above for monitoring the state of a driver chip register.

[0015] This invention provides a computer-readable storage medium storing computer-readable instructions. When the computer-readable instructions are executed by a computer's processor, the computer performs the method described above for monitoring the state of a driver chip register.

[0016] The beneficial effects of this invention are: to monitor the key registers of the driver chip during operation, that is, to obtain the write and read values ​​of the driver chip registers, to time the monitoring events through a timer, and to compare them with the monitoring set time at all times, so as to determine the consistency status of the write and read values ​​when the monitoring time is less than the monitoring time, so as to monitor the monitoring events in real time and ensure the output pulse width modulation signal.

[0017] In addition, when the written value and the read value are inconsistent, the driver chip is reset to ensure that the values ​​read and written to the driver chip register are consistent. This ensures that the working status of the register can be monitored in real time within a certain period of time after the driver chip is powered on, and that abnormal states of the register can be handled to ensure the output pulse width modulation signal.

[0018] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and do not limit this application. Attached Figure Description

[0019] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application. It is obvious that the drawings described below are merely some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort. In the drawings:

[0020] Figure 1 This is a detailed flowchart illustrating a method for monitoring the state of a driver chip register, as shown in an exemplary embodiment of the present invention.

[0021] Figure 2 This is a flowchart illustrating the status monitoring of a driver chip, as shown in an exemplary embodiment of the present invention.

[0022] Figure 3 This is a flowchart illustrating the interrupt control process of a driver chip, as shown in an exemplary embodiment of the present invention.

[0023] Figure 4 This is a flowchart illustrating the driver chip reset control process in an exemplary embodiment of the present invention;

[0024] Figure 5 This is a flowchart illustrating a method for monitoring the state of a driver chip register, as shown in an exemplary embodiment of the present invention.

[0025] Figure 6 This is a schematic diagram of an apparatus for monitoring the state of a driver chip register, as illustrated in an exemplary embodiment of the present invention.

[0026] Figure 7 This is a schematic diagram of the structure of a computer system used to implement the embodiments of the present invention. Detailed Implementation

[0027] The embodiments of the present invention will be described below with reference to the accompanying drawings and preferred embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be understood that the preferred embodiments are only for illustrating the present invention and not for limiting the scope of protection of the present invention.

[0028] It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0029] In the following description, numerous details are explored to provide a more thorough explanation of embodiments of the invention. However, it will be apparent to those skilled in the art that embodiments of the invention may be practiced without these specific details. In other embodiments, well-known structures and devices are shown in block diagram form rather than in detail to avoid obscuring embodiments of the invention.

[0030] Please see Figure 1 , Figure 1 A flowchart illustrating a method for monitoring the state of a driver chip register according to an embodiment of this application is shown. Figure 1 As shown, the speech intent recognition method includes at least steps S110 to S130, which are described in detail below:

[0031] Step S110: Obtain the write and read values ​​of the driver chip registers.

[0032] In one embodiment of this application, the driving chip is an IGBT (Insulated Gate Bipolar Transistor), a composite fully controllable voltage-driven power semiconductor device composed of a BJT (Bipolar Junction Transistor) and a MOS (Metal Oxide Semiconductor). It combines the advantages of a high input impedance of a MOSFET and a low on-state voltage drop of a Giant Transistor (GTR). GTRs have a low saturation voltage drop and high current density, but also a large drive current; MOSFETs have very low drive power and fast switching speed, but also a large on-state voltage drop and low current density. The IGBT combines the advantages of both devices, offering low drive power and a low saturation voltage drop.

[0033] In one embodiment of this application, registers are components within a central processing unit (CPU). Registers are high-speed storage devices with limited storage capacity, used to temporarily store instructions, data, and addresses. The control unit of the CPU includes an instruction register and a program counter. The arithmetic and logic unit of the CPU includes an accumulator.

[0034] Step S120: Set the monitoring time and start timing the monitoring events to obtain the first monitoring time.

[0035] In one embodiment of this application, the monitoring time is set to 3 seconds, and a general timer is used to time the monitoring events.

[0036] Step S130: If the first monitoring time is less than the monitoring set time, the consistency status of the written value and the read value is determined in order to monitor the register.

[0037] In the above embodiment, the monitoring event is to determine the operating status of the monitoring register by determining the consistency between the written and read values ​​of the register. In this embodiment, the first monitoring time is 2 seconds and the monitoring set time is 3 seconds. Since the first monitoring time "2 seconds" is less than the monitoring set time "3 seconds", the monitoring event is triggered at this time, that is, the operating status of the monitoring register is determined by determining the consistency between the written and read values ​​of the register, thereby realizing real-time monitoring of the register.

[0038] It should be noted that the above-mentioned monitoring setting time of 3 seconds is only an exemplary example in this embodiment. The actual monitoring setting time can be specifically set based on the monitoring and implementation requirements of this solution in the application process. The specific duration of the above-mentioned monitoring setting time is not limited here.

[0039] exist Figure 1 In the technical solution shown, by monitoring the key registers of the driver chip during operation, that is, by monitoring the consistency status of the written and read values, the values ​​read and written to the driver chip registers are consistent. This ensures that the driver chip outputs a PWM (Pulse Width Modulation) signal within a certain period of time after power-on.

[0040] In one embodiment of this application, two general-purpose timers, a register state reset request flag, an interrupt reset request flag, an upper-bridge power module fault interrupt, and a lower-bridge power module fault interrupt are included. The first general-purpose timer tracks the register state of the driver chip until a first monitoring timeout is reached. The second general-purpose timer tracks the power-off restart of the driver chip. The register state reset request flag is used to determine if there is an abnormality in the read / write state of the driver chip's registers. The interrupt reset request flag is the result of the motor mode judgment within the power module interrupt. The upper and lower-bridge power module fault interrupts are triggered by a fault level; a fault generated or detected by the driver chip will trigger this fault interrupt.

[0041] In one embodiment of this application, after determining the consistency between the written value and the read value, the method for monitoring the state of the driver chip register further includes: if the written value equals the read value, then ending the register monitoring event.

[0042] In one embodiment of this application, after determining the consistency between the written value and the read value, the method for monitoring the state of the driver chip register further includes triggering a driver chip reset if the written value is greater than or less than the read value.

[0043] In one embodiment of this application, when the written value is greater than or less than the read value, the register state reset request flag Reg_Reset_req is set to 1, thereby triggering the driver chip to reset.

[0044] In one embodiment of this application, when the written value and read value of the register are consistent, the register state reset request flag Reg_Reset_req is set to 0, and the register monitoring event ends.

[0045] In one embodiment of this application, such as Figure 2 As shown, Figure 2 A driver chip status monitoring diagram illustrated as an exemplary embodiment of the present invention, such as... Figure 2 As shown, it includes the following steps:

[0046] Step S210: Set the monitoring time and start timing via a general timer.

[0047] Step S220: If the time elapsed by the general timer is less than the monitoring set time, a monitoring event is triggered.

[0048] In one embodiment of this application, if the time taken by the general timer is greater than or equal to the monitoring set time, a fault interruption is triggered.

[0049] Step S230: Determine the consistency status of the written value and the read value. If the read value and the written value are inconsistent, proceed to step S240. If the read value and the written value are consistent, proceed to step S250.

[0050] Step S240: Trigger the driver chip to reset.

[0051] Step S250: End register monitoring event.

[0052] In such Figure 2 In the technical solution shown, the key registers of the driver chip are monitored during operation. Specifically, the write and read values ​​of the driver chip registers are obtained, and the monitoring events are timed by a timer. The timer is constantly compared with the monitoring set time. When the monitoring time is less than the monitoring set time, the consistency status of the write and read values ​​is determined to monitor the monitoring events in real time, so as to ensure the output pulse width modulation signal.

[0053] In one embodiment of this application, a monitoring time Reg_MonitorTime for the driver chip register state is set, and a first monitoring time is obtained by timing using a first general-purpose timer GPT_Timer1. The first monitoring time is compared with the monitoring time set. If the first monitoring time is less than the monitoring time set, the driver chip register state is monitored to determine if the driver chip's written value matches the read value. In this embodiment, the driver chip is reset by assigning a value to the register state reset request flag. Specifically, the register read value Reg_Read and the register write value Reg_Write are used to assign a value to the register state reset request flag Reg_Reset_req. That is, if the read value Reg_Read is greater than or less than the write value Reg_Write, the register state reset request flag Reg_Reset_req = 1, and the driver chip is reset. If the read value Reg_Read equals the write value Reg_Write, the register state reset request flag Reg_Reset_req = 0, and the register monitoring event ends. In this embodiment, if the first monitoring time set is greater than the monitoring time set, the register monitoring event ends. Through the above control, it can be ensured that the register state of the driver chip is correct within the monitoring set time and before the PWM is output, so as to ensure the correct PWM output.

[0054] In one embodiment of this application, after setting the monitoring set time, the method for monitoring the state of the driver chip register further includes: if the monitoring time is greater than or equal to the monitoring set time, determining the type of motor mode, and sending a preset motor control command that has a mapping relationship with the type of motor mode. The types of motor modes include non-torque mode and torque mode.

[0055] In one embodiment of this application, a preset motor control command with a mapping relationship to the motor mode type is sent according to the motor mode type. The preset motor control command includes a reset command. Specifically, if the motor mode is a non-torque mode, a reset command is sent to reset the driver chip and clear the monitoring timer. In this embodiment, if the motor mode is a non-torque mode, the interrupt reset request flag Interrupt_Reg_Reset is set to 1, thereby triggering the driver chip to reset.

[0056] In one embodiment of this application, such as Figure 3 As shown, Figure 3 An interrupt monitoring diagram of a driver chip, as shown in an exemplary embodiment of the present invention, is as follows: Figure 3 As shown, it includes the following steps:

[0057] Step S310: Set the monitoring time and start timing via a general timer.

[0058] In step S320, if the monitoring time is greater than or equal to the monitoring set time, the type of motor mode is determined. If the motor mode is a non-torque mode, step S330 is executed; if the motor mode is a torque mode, step S340 is executed.

[0059] In one embodiment of this application, if the monitoring time is less than the monitoring set time, the state of the driver chip register is monitored.

[0060] Step S330: Send a reset command to reset the driver chip and clear the monitoring timer to zero.

[0061] Step S340: Send a fault reporting command to the server.

[0062] exist Figure 3 In the technical solution shown, the motor mode type is determined when the monitoring time is greater than or equal to the monitoring set time. Based on the motor mode type, it is determined whether to reset the driver chip. This ensures that the motor mode is always in torque mode, thereby better driving the car.

[0063] In one embodiment of this application, if the monitoring timeout is greater than or equal to the first monitoring set time, a power module fault interrupt is initiated. This involves determining the motor mode (Mot_TrqMod). If the motor mode (Mot_TrqMod) is in torque mode, a power module fault report (Lsn_ErrFlg = 1) is correctly submitted. If the motor mode (Mot_TrqMod) is not in torque mode, a reset command is sent. Based on the reset command, the interrupt reset request flag (Interrupt_Reg_Reset) is set to 1, triggering a driver chip reset control. Simultaneously, the first general-purpose timer (GPT_Timer1) is cleared. When the monitoring timeout is greater than or equal to the monitoring set time, the type of motor mode is determined. Based on the motor mode type, a decision is made regarding whether to reset the driver chip. This ensures that the motor mode remains in torque mode, thereby better driving the vehicle.

[0064] In one embodiment of this application, resetting the driver chip includes setting a power-down delay time and disconnecting the power supply to the driver chip; timing the restart time of the driver chip to obtain a restart timing time; and restarting the driver chip if the restart timing time is greater than the power-down delay time.

[0065] In one embodiment of this application, please refer to Figure 4 , Figure 4 A chip reset control diagram is shown as an exemplary embodiment of the present invention, such as... Figure 4As shown, it includes the following steps:

[0066] Step S410: Receive a reset command or detect inconsistency between the read value and the write value.

[0067] Step S420: Set the power-down delay time and disconnect the power supply to the driver chip.

[0068] Step S430: The timer is stopped when the driver chip powers on, and the restart time is obtained.

[0069] Step S440: Determine whether the restart time is greater than the power-down delay time. If the restart time is greater than the power-down delay time, proceed to step S450. If the restart time is less than or equal to the power-down delay time, proceed to step S430.

[0070] In step S450, the power supply to the driver chip is pulled high.

[0071] In such Figure 4 In the technical solution shown, when an abnormal state of the driver chip register is detected, the driver chip is restarted and reset by disconnecting the power supply to the driver chip. This avoids the problem that software restart cannot achieve consistent read and write of the register state, thereby ensuring the stable operation of the driver chip and ensuring the correct output of PWM.

[0072] In one embodiment of this application, when the register state reset request flag Reg_Reset_req = 1 or the interrupt reset request flag Interrupt_Reg_Reset = 1, the driver chip enters reset control. At this time, the power supply to the driver chip Reg_PowerEn is disconnected, a power-down delay time Reg_TimeDelay is set, and the restart time of the driver chip is timed using a second general-purpose timer GPT_Timer2. When the restart time is greater than the power-down delay time, the power supply to the driver chip is pulled high. After the driver chip completes restart, the register state is monitored again until the register state monitoring is normal, at which point the monitoring event ends. Restarting the driver chip by disconnecting its power supply avoids the problem of inconsistent register state read / write operations caused by software restarts, thus ensuring stable operation of the driver chip and ensuring correct PWM output.

[0073] In one embodiment of this application, after resetting the driver chip, the method further includes timing the monitoring event to obtain a second monitoring time; if the second monitoring time is less than the monitoring set time, the register monitoring status is determined by the written value and the read value until the written value is equal to the read value, and the register monitoring event ends.

[0074] In one embodiment of this application, Figure 5A flowchart illustrating a method for monitoring the register status of a driver chip, as shown in the exemplary embodiment of the present invention, is as follows: Figure 5 As shown, a monitoring time for the driver chip is set, and a first general-purpose timer starts counting down to obtain the monitoring time. If the monitoring time is less than the set time, indicating a driver chip register error within the set time, the driver chip will be reset and restarted. If the monitoring time is greater than or equal to the set time, driver chip monitoring will cease. Register errors include discrepancies between the written and read values ​​of the driver chip. Resetting and restarting the driver chip ensures consistency between the read and written values. If the monitoring time is greater than or equal to the set time, a fault interrupt is initiated. This involves determining whether the motor is in torque mode. In torque mode, if the motor functions correctly, a fault report is sent to the server. In non-torque mode, a reset and restart are initiated, ensuring the driver chip can correctly output PWM.

[0075] In summary, this invention requires monitoring key registers of the driver chip during operation. A timer tracks the monitored events and constantly compares them with a set monitoring time. When the monitored time is less than the set time, the consistency between the written and read values ​​of the registers is determined. If the written and read values ​​are inconsistent, the driver chip is reset to ensure consistency between the read and written values ​​of the driver chip registers. This ensures real-time monitoring of the register's operating state for a certain period after the driver chip is powered on, guaranteeing PWM output. Furthermore, when the monitored time exceeds the set time, the driver chip is reset based on the motor mode type. This ensures the motor remains in torque mode, thus better driving the vehicle.

[0076] Figure 6 The diagram schematically illustrates a device block diagram for monitoring driver chip registers according to an exemplary embodiment of the present invention.

[0077] refer to Figure 6 As shown, a device 600 for monitoring driver chip registers according to an embodiment of the present invention includes: an acquisition module 610, a timing module 620, and a monitoring module 630.

[0078] The acquisition module 610 acquires the write and read values ​​of the driver chip; the timing module 620 sets the monitoring set time and times the monitoring events to obtain the first monitoring time; the monitoring module 630 determines the consistency status of the write and read values ​​if the first monitoring time is less than the monitoring set time, so as to monitor the register.

[0079] In an exemplary embodiment of the present invention, the acquisition module 610 is configured to, after determining the consistency status of the written value and the read value, terminate the register monitoring event if the written value is equal to the read value, and trigger the driver chip to reset if the written value is not equal to the read value.

[0080] In an exemplary embodiment of the present invention, the monitoring module 630 is further configured to determine the type of motor mode if the monitoring time is greater than or equal to the monitoring set time, and send a preset motor control command that has a mapping relationship with the type of motor mode according to the type of motor mode. The types of motor modes include non-torque mode and torque mode.

[0081] In an exemplary embodiment of the present invention, the monitoring module 630 is further configured to send a reset command to reset the drive chip and clear the monitoring timer if the motor mode is a non-torque mode.

[0082] In an exemplary embodiment of the present invention, the monitoring module 630 is further configured to send a fault reporting command to the server if the motor mode is torque mode.

[0083] In an exemplary embodiment of the present invention, the monitoring module 630 is further configured to time the monitoring event to obtain a second monitoring time; if the second monitoring time is less than the monitoring set time, the register monitoring status is determined by the written value and the read value until the written value is equal to the read value, and the register monitoring event ends.

[0084] In an exemplary embodiment of the present invention, the device 600 for monitoring the register of the driver chip further includes a reset module 640. The reset module 640 is also used to set a power-down delay time and disconnect the power supply to the driver chip; to time the restart time of the driver chip to obtain a restart time; and if the restart time is greater than the power-down delay time, to pull up the power supply to the driver chip.

[0085] It should be noted that the apparatus and method provided in the above embodiments belong to the same concept, and the specific ways in which each module and unit performs operations have been described in detail in the method embodiments, and will not be repeated here. In practical applications, the apparatus provided in the above embodiments can be assigned to different functional modules as needed, that is, the internal structure of the apparatus can be divided into different functional modules to complete all or part of the functions described above, and this is not a limitation.

[0086] Figure 7 A schematic diagram of a computer system suitable for implementing the embodiments of this application is shown. It should be noted that... Figure 7The computer system 700 of the device shown is merely an example and should not impose any limitation on the functionality and scope of use of the embodiments of this application.

[0087] like Figure 7 As shown, the computer system 700 includes a Central Processing Unit (CPU) 701, which can perform various appropriate actions and processes based on programs stored in Read-Only Memory (ROM) 702 or programs loaded from storage portion 708 into Random Access Memory (RAM) 703, such as performing the methods described in the above embodiments. The RAM 703 also stores various programs and data required for system operation. The CPU 701, ROM 702, and RAM 703 are interconnected via a bus 704. An Input / Output (I / O) interface 705 is also connected to the bus 704.

[0088] The following components are connected to I / O interface 705: an input section 706 including a keyboard, mouse, etc.; an output section 707 including a cathode ray tube (CRT), liquid crystal display (LCD), and speakers, etc.; a storage section 708 including a hard disk, etc.; and a communication section 709 including a network interface card such as a LAN (Local Area Network) card and a modem, etc. The communication section 709 performs communication processing via a network such as the Internet. A drive 710 is also connected to I / O interface 705 as needed. A removable medium 711, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., is installed on drive 710 as needed so that computer programs read from it can be installed into storage section 708 as needed.

[0089] Specifically, according to embodiments of this application, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of this application include a computer program product comprising a computer program carried on a computer-readable medium, the computer program including a computer program for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via communication section 709, and / or installed from removable medium 711. When the computer program is executed by central processing unit (CPU) 701, it performs various functions defined in the system of this application.

[0090] It should be noted that the computer-readable medium shown in the embodiments of this application can be a computer-readable signal medium or a computer-readable storage medium, or any combination of the two. A computer-readable storage medium can be, for example, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), flash memory, optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this application, a computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, carrying a computer-readable computer program. Such propagated data signals can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media can also be any computer-readable medium other than computer-readable storage media, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The computer program contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to wireless, wired, etc., or any suitable combination thereof.

[0091] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this application. Each block in a flowchart or block diagram may represent a module, segment, or portion of code, which contains one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0092] The units described in the embodiments of this application can be implemented in software or hardware, and the described units can also be located in a processor. The names of these units do not necessarily limit the specific unit itself.

[0093] Another aspect of this application provides a computer-readable storage medium storing a computer program thereon, which, when executed by a computer's processor, causes the computer to perform the method for monitoring the state of a driver chip register as described above. This computer-readable storage medium may be included in the device described in the above embodiments, or it may exist independently and not assembled into that device.

[0094] Another aspect of this application provides a computer program product or computer program including computer instructions stored in a computer-readable storage medium. A processor of a computer device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computer device to perform the method for monitoring the state of the driver chip registers provided in the various embodiments described above.

[0095] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.

Claims

1. A method for monitoring the state of a driver chip register, characterized in that, The method for monitoring the status of the driver chip registers includes: obtaining the write values ​​and read values ​​of the driver chip registers; Set the monitoring time and start timing the monitored events to obtain the first monitoring time. If the first monitoring timeout is less than the monitoring set time, the consistency status of the written value and the read value is determined in order to monitor the register. After setting the monitoring time, the method for monitoring the state of the driver chip register further includes: if the monitoring time is greater than or equal to the monitoring time, determining the type of motor mode, and sending a preset motor control command that has a mapping relationship with the type of motor mode, wherein the types of motor modes include non-torque mode and torque mode, and the preset motor control command includes a reset command and a fault reporting command, wherein if the motor mode is non-torque mode, a reset command is sent to reset the driver chip and clear the monitoring time; if the motor mode is torque mode, a fault reporting command is sent to the server.

2. The method for monitoring the state of a driver chip register according to claim 1, characterized in that, After determining the consistency between the written value and the read value, the method for monitoring the state of the driver chip register further includes: if the written value is equal to the read value, ending the register monitoring event; If the written value is greater than or less than the read value, the driver chip is triggered to reset.

3. The method for monitoring the state of the driver chip register according to claim 1 or 2, characterized in that, Resetting the driver chip includes: setting the power-down delay time and disconnecting the power supply to the driver chip; The restart time of the driver chip is timed to obtain the restart time. If the restart timing time is greater than the power-down delay time, the power supply to the driver chip will be pulled high.

4. The method for monitoring the state of the driver chip register according to claim 1 or 2, characterized in that, After resetting the driver chip, the process also includes timing the monitoring events to obtain a second monitoring timing time. If the second monitoring timeout is less than the monitoring set time, the register monitoring status is determined by the write value and the read value until the write value is equal to the read value, at which point the register monitoring event ends.

5. A device for monitoring the state of a driver chip register, characterized in that, The device for monitoring the state of the driver chip registers includes: an acquisition module for acquiring the write and read values ​​of the driver chip; The timing module sets the monitoring time and times the monitored events to obtain the first monitoring time. The monitoring module, if the first monitoring timeout is less than the monitoring set time, determines the consistency status of the written and read values ​​to monitor the register; after setting the monitoring set time, if the monitoring timeout is greater than or equal to the monitoring set time, it determines the type of motor mode and sends a preset motor control command that has a mapping relationship with the type of motor mode. The types of motor modes include non-torque mode and torque mode. The preset motor control command includes a reset command and a fault reporting command. If the motor mode is non-torque mode, a reset command is sent to reset the driver chip and clear the monitoring timeout; if the motor mode is torque mode, a fault reporting command is sent to the server.

6. A device, characterized in that, The device includes: One or more processors; A storage device for storing one or more programs, which, when executed by one or more processors, cause the device to implement the method for monitoring the state of a driver chip register as described in any one of claims 1 to 4.

7. A computer-readable storage medium, characterized in that, It stores a computer program that, when executed by the computer's processor, causes the computer to perform any one of the methods for monitoring the state of the driver chip registers as claimed in claims 1 to 4.

Images