Protection circuits and converters

Abstract

This application provides a protection circuit and converter that, by setting up a relay, a transistor, and a pull-up resistor, connects one end of the relay coil to the base of the lower bridge arm transistor in the power device, and the other end of the coil to the emitter of the lower bridge arm transistor. The moving contact of the relay is connected to the pull-up resistor and the base of the transistor, and the stationary contact of the relay is connected to the collector of the transistor and the emitter of the upper bridge arm transistor in the power device. The emitter of the transistor is connected to the base of the upper bridge arm transistor. This circuit can interlock the upper and lower bridge arm transistors when there is a program abnormality (simultaneously sending conduction signals to the upper and lower bridge arm transistors), thereby preventing the upper and lower transistors from conducting simultaneously.

Description

Technical Field

[0001] This application relates to the field of converter technology, and in particular to a control method, control circuit and device. Background Technology

[0002] In the main circuit of converters, full-bridge, half-bridge, and NPC circuit topologies are widely used. When applying these topologies, the dead-time issue needs to be considered. Typically, a dead-time is set in the program to control the switching on and off of the transistors, preventing simultaneous conduction of the upper and lower transistors. Alternatively, a bleeder circuit is added at the power transistor to protect it in case of a short circuit. However, if a program control error causes simultaneous conduction of the upper and lower transistors, a short circuit occurs in the bridge arm, leading to shoot-through. Due to the excessive current during shoot-through, the IGBT / MOS transistors are damaged by the instantaneous high current, causing converter failure. Currently used hardware protection circuits only provide protection after a short circuit has already occurred in the power transistor, which affects the lifespan of the power transistor. Summary of the Invention

[0003] To address the aforementioned problems, this application provides a protection circuit and converter that can interlock the transistors of the upper and lower bridge arms, thereby preventing the transistors of the upper and lower bridge arms from conducting simultaneously.

[0004] This application provides a protection circuit, including: a relay, a transistor, and a pull-up resistor. One end of the relay coil is connected to the base of the lower bridge arm transistor in the power device, and the other end of the coil is connected to the emitter of the lower bridge arm transistor. The moving contact of the relay is connected to the pull-up resistor and the base of the transistor, and the stationary contact of the relay is connected to the collector of the transistor and the emitter of the upper bridge arm transistor in the power device. The emitter of the transistor is connected to the base of the upper bridge arm transistor.

[0005] In some embodiments, the protection circuit further includes:

[0006] A sampling circuit, connected to the transistor, is used to sample the voltage difference between the collector and emitter of the transistor;

[0007] A control circuit, connected to the sampling circuit, is used to stop sending PWM signals when the voltage difference is less than the on-state voltage drop of the transistor. The PWM signal is used to control the drive circuit to send drive signals, which are used to drive the upper bridge arm transistor and / or the lower bridge arm transistor to turn on and off.

[0008] In some embodiments, the sampling circuit includes: an operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first capacitor, and a second capacitor. One end of the first resistor is connected to the emitter of the transistor, and the other end of the first resistor is connected to the first input terminal of the operational amplifier, one end of the third resistor, and one end of the first capacitor. One end of the second resistor is connected to the collector of the transistor, and the other end of the second resistor is connected to the second input terminal of the operational amplifier and one end of the fourth resistor. The output terminal of the operational amplifier is connected to the other end of the first capacitor, the other end of the third resistor, and one end of the fifth resistor. The other end of the fifth resistor is connected to the control circuit and one end of the second capacitor. The other end of the second capacitor and the other end of the fourth resistor are grounded.

[0009] In some embodiments, the protection circuit further includes:

[0010] An alarm circuit is provided, which is connected to the control circuit and is used to receive signals from the control circuit to trigger an alarm.

[0011] In some embodiments, the alarm circuit includes:

[0012] A sixth resistor and a light-emitting diode (LED) are connected in series. The control circuit is used to send a low-level signal to make the LED blink.

[0013] In some embodiments, the protection circuit further includes:

[0014] A comparison circuit, connected to the sampling circuit, is used to compare the magnitude of the voltage difference and the on-state voltage drop of the transistor, and output the comparison result of the magnitude relationship to the control circuit.

[0015] In some embodiments, the protection circuit further includes:

[0016] A first driving circuit and a second driving circuit are provided. The output terminal of the control circuit is connected to the first driving circuit. The output terminal of the first driving circuit is connected to the base of the upper bridge arm transistor. The output terminal of the control circuit is connected to the second driving circuit. The output terminal of the second driving circuit is connected to the base of the lower bridge arm transistor. The first driving circuit is used to drive the upper bridge arm transistor to turn on and off. The second driving circuit is used to drive the lower bridge arm transistor to turn on and off.

[0017] In some embodiments, the protection circuit further includes:

[0018] The level conversion chip is used to connect the output of the control circuit to the first driver chip and the second driver circuit.

[0019] In some embodiments, the first driving circuit includes: a first driving chip and a first driving resistor, wherein the input terminal of the first driving chip is connected to the output terminal of the level conversion chip, the output terminal of the first driving chip is connected to one end of the first driving resistor, and the other end of the first driving resistor is connected to the base of the upper bridge arm transistor.

[0020] The second driving circuit includes a second driving chip and a second driving resistor. The input terminal of the second driving chip is connected to the output terminal of the level conversion chip, the output terminal of the second driving chip is connected to one end of the second driving resistor, and the other end of the second driving resistor is connected to the base of the lower bridge arm transistor.

[0021] This application provides a converter, including: a power module and the protection circuit described in any of the above claims.

[0022] This application provides a protection circuit and converter that, by setting up a relay, a transistor, and a pull-up resistor, connects one end of the relay coil to the base of the lower bridge arm transistor in the power device, and the other end of the coil to the emitter of the lower bridge arm transistor. The moving contact of the relay is connected to the pull-up resistor and the base of the transistor, and the stationary contact of the relay is connected to the collector of the transistor and the emitter of the upper bridge arm transistor in the power device. The emitter of the transistor is connected to the base of the upper bridge arm transistor. This circuit can interlock the upper and lower bridge arm transistors when there is a program abnormality (simultaneously sending conduction signals to the upper and lower bridge arm transistors), thereby preventing the upper and lower transistors from conducting simultaneously. Attached Figure Description

[0023] The present application will be described in more detail below based on embodiments and with reference to the accompanying drawings.

[0024] Figure 1 This is a schematic diagram of the topology of a power device provided in related technologies;

[0025] Figure 2 This is a schematic diagram of a protection circuit provided in an embodiment of this application.

[0026] In the accompanying drawings, the same parts are referred to by the same reference numerals, and the drawings are not drawn to scale. Detailed Implementation

[0027] To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings. The described embodiments should not be regarded as limitations on this application. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0028] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0029] If the application documents contain similar descriptions such as "first, second, third", the following explanation shall be added: In the following description, the terms "first, second, third" are used only to distinguish similar objects and do not represent a specific order of objects. It is understood that "first, second, third" may be interchanged in a specific order or sequence where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.

[0030] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing embodiments of this application only and is not intended to limit this application.

[0031] Before introducing the embodiments of this application, a brief introduction will be given to the power devices of converters in related technologies. Figure 1 This is a schematic diagram of the topology of a power device provided in related technologies, such as... Figure 1 As shown, T1A, T1B, and T1C are the upper bridge arm transistors in the power device; T2A, T2B, and T3C are the lower bridge arm transistors in the power device; T3A, T3B, T3C, T4A, T4B, and T4C are auxiliary transistors in the power device; and T2A, T2B, and T3C are the lower bridge arm transistors in the power device. T1A and T2A form one bridge arm, T1B and T2B form another bridge arm, and T1C and T2C form yet another bridge arm. Taking one bridge arm as an example, if the program malfunctions, the controller may simultaneously send drive signals to both T1A and T2A. Both T1A and T2A will conduct at the same time, resulting in excessive current flowing through one bridge arm. This could cause T1A and T2A to break down, leading to a short circuit in the bridge arm and affecting the lifespan of the power device.

[0032] Based on the problems existing in related technologies, this application provides a protection circuit, including: a relay, a transistor, and a pull-up resistor. One end of the coil of the relay is connected to the base of the lower bridge arm transistor in the power device, and the other end of the coil is connected to the emitter of the lower bridge arm transistor. The moving contact of the relay is connected to the pull-up resistor and the base of the transistor. The stationary contact of the relay is connected to the collector of the transistor and the emitter of the upper bridge arm transistor in the power device. The emitter of the transistor is connected to the base of the upper bridge arm transistor.

[0033] In this embodiment, the relay includes a coil, a moving contact, and a stationary contact. When the coil of the relay is energized, it controls the moving contact to move, thereby enabling the moving contact to conduct with the stationary contact.

[0034] In this embodiment, the transistor can also be a PNP or NPN transistor. Each transistor has a base, an emitter, and a collector.

[0035] In this embodiment, the pull-up resistor may include a power supply and a resistor. The pull-up resistor can clamp an uncertain signal to a high level, while the resistor also serves as a current limiter.

[0036] In this embodiment, the lower bridge arm transistor can be Figure 1 One or more of T2A, T2B, and T3C in the transistor, wherein the lower bridge arm transistor can be Figure 1 One or more of T1A, T1B, and T1C. In the embodiments of this application, the bases of the lower bridge arm transistor and the upper bridge arm transistor are connected to the driving circuit, which is used to receive control signals to drive the lower bridge arm transistor and the upper bridge arm transistor to turn on or off.

[0037] In this embodiment of the application, any bridge arm of the power device is taken as an example. Figure 2 This is a schematic diagram of a protection circuit provided in an embodiment of this application, such as... Figure 2 As shown, the device includes: a relay J1, a transistor T6, and a pull-up resistor R8. One end of the coil of the relay J1 is connected to the base of the lower bridge arm transistor T5 (also called the lower transistor) in the power device, and the other end of the coil is connected to the emitter of the lower bridge arm transistor T5. The moving contact of the relay J1 is connected to the pull-up resistor R8 and the base of the transistor T6. The stationary contact of the relay J1 is connected to the collector of the transistor T6 and the emitter of the upper bridge arm transistor T4 in the power device. The emitter of the transistor T6 is connected to the base of the upper bridge arm transistor T4 (also called the upper transistor).

[0038] When the upper transistor T4 is working normally, the Digital Signal Processing (DSP) sends a PWM1 signal to drive the upper transistor to turn on. The PWM1 signal passes through the level conversion chip U1 and then enters the driver chip U2. The driver chip outputs a drive signal, which, after passing through the drive resistor R1, is sent to the base of T4, turning T4 on. When the program malfunctions and simultaneously sends a PWM2 signal to drive the lower transistor to turn on, the coil of relay J1 is energized, and the relay is energized, thereby pulling the base of transistor T6 low. A voltage difference is generated between the collector and base of T6, turning T6 on and pulling the base of the upper transistor T4 low, turning T4 off. This interlocking of the transistors in the upper and lower bridge arms (i.e., one is on, the other is off) prevents the upper and lower transistors from conducting simultaneously.

[0039] When transistor T5 is working normally, the DSP sends a PWM2 signal to drive it to turn on. The PWM2 signal passes through level conversion chip U1 and then enters driver chip U3. The driver chip outputs a drive signal, which, after passing through drive resistor R2, is sent to the base of T5. T5 turns on, the coil of relay J1 is energized, the relay is energized, and the base of transistor T6 is pulled low. When a program malfunction occurs and simultaneously sends PWM1 to drive the upper transistor to turn on, transistor T6 turns on, the base of the upper transistor is pulled low, and upper transistor T4 turns off. This interlocks the transistors of the upper and lower bridge arms (i.e., one is on, the other is off), thus preventing the upper and lower transistors from turning on simultaneously.

[0040] This application provides a protection circuit that, by setting up a relay, a transistor, and a pull-up resistor, connects one end of the relay coil to the base of the lower bridge arm transistor in the power device, and the other end of the coil to the emitter of the lower bridge arm transistor. The moving contact of the relay is connected to the pull-up resistor and the base of the transistor, and the stationary contact of the relay is connected to the collector of the transistor and the emitter of the upper bridge arm transistor in the power device. The emitter of the transistor is connected to the base of the upper bridge arm transistor. This circuit can interlock the upper and lower bridge arm transistors when a program malfunction occurs (simultaneously sending conduction signals to both upper and lower bridge arm transistors), thereby preventing both transistors from conducting simultaneously.

[0041] In some embodiments, the protection circuit further includes:

[0042] A sampling circuit, connected to the transistor, is used to sample the voltage difference between the collector and emitter of the transistor; a control circuit, connected to the sampling circuit, is used to stop sending a PWM signal when the voltage difference is less than the on-state voltage drop of the transistor, the PWM signal being used to control the drive circuit to issue a drive signal, the drive signal being used to drive the upper bridge arm transistor and / or the lower bridge arm transistor to turn on and off.

[0043] In this embodiment, the control circuit can be a DSP. The control circuit can compare the voltage difference with the on-state voltage drop of the transistor to perform control.

[0044] In this embodiment of the application, the PWM signal may include: PWM1 signal and PWM2 signal, where PWM1 signal is used to drive the upper bridge arm transistor and PWM2 signal is used to drive the lower bridge arm transistor.

[0045] In some embodiments, the sampling circuit includes: an operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first capacitor, and a second capacitor. One end of the first resistor is connected to the emitter of the transistor, and the other end of the first resistor is connected to the first input terminal of the operational amplifier, one end of the third resistor, and one end of the first capacitor. One end of the second resistor is connected to the collector of the transistor, and the other end of the second resistor is connected to the second input terminal of the operational amplifier and one end of the fourth resistor. The output terminal of the operational amplifier is connected to the other end of the first capacitor, the other end of the third resistor, and one end of the fifth resistor. The other end of the fifth resistor is connected to the control circuit and one end of the second capacitor. The other end of the second capacitor and the other end of the fourth resistor are grounded.

[0046] See also Figure 2 The system includes an operational amplifier U4, a first resistor R3, a second resistor R4, a third resistor R5, a fourth resistor R6, a fifth resistor R7, a first capacitor C1, and a second capacitor C2. One end of the first resistor R3 is connected to the emitter of the transistor T6, and the other end of the first resistor R3 is connected to the first input terminal of the operational amplifier U4, one end of the third resistor R5, and one end of the first capacitor C1. One end of the second resistor R4 is connected to the collector of the transistor T6, and the other end of the second resistor R4 is connected to the second input terminal of the operational amplifier U4 and one end of the fourth resistor R6. The output terminal of the operational amplifier U4 is connected to the other end of the first capacitor C1, the other end of the third resistor R5, and one end of the fifth resistor R7. The other end of the fifth resistor R7 is connected to the control circuit DSP and one end of the second capacitor C2. The other end of the second capacitor C2 is grounded to the other end of the fourth resistor R6.

[0047] In the sampling circuit, R7 and C2 have a filtering function, which can send the filtered and sampled voltage signal into the DSP.

[0048] The sampling circuit provided in this application embodiment can sample the voltage difference between the collector and emitter of the transistor and output the voltage difference to the control circuit. The control circuit can stop sending the PWM signal when the voltage difference is less than the on-state voltage drop of the transistor.

[0049] In some embodiments, the protection circuit further includes:

[0050] An alarm circuit is provided, which is connected to the control circuit and is used to receive signals from the control circuit to trigger an alarm.

[0051] In this embodiment of the application, the alarm circuit can be an audible alarm or an optical alarm.

[0052] In some embodiments, the alarm circuit includes:

[0053] A sixth resistor and a light-emitting diode (LED) are connected in series. The control circuit is used to send a low-level signal to make the LED blink.

[0054] See also Figure 2 The circuit consists of a sixth resistor R9 and a light-emitting diode D1, with the sixth resistor R9 connected in series with the light-emitting diode D1. The control circuit DSP is used to send a low-level signal to cause the light-emitting diode D1 to blink. Blinking D1 indicates an abnormality in the upper bridge arm transistor and / or the lower bridge arm transistor.

[0055] Based on the foregoing embodiments, this application further provides a protection circuit comprising: a relay, a transistor, a pull-up resistor, a sampling circuit, a comparator circuit, and a control circuit. One end of the relay coil is connected to the base of the lower bridge arm transistor in the power device, and the other end of the coil is connected to the emitter of the lower bridge arm transistor. The moving contact of the relay is connected to the pull-up resistor and the base of the transistor, and the stationary contact of the relay is connected to the collector of the transistor and the emitter of the upper bridge arm transistor in the power device. The emitter of the transistor is connected to the base of the upper bridge arm transistor. The sampling circuit is connected to the transistor and is used to sample the voltage difference between the collector and emitter of the transistor. The comparator circuit is connected to the sampling circuit and is used to compare the magnitude of the voltage difference and the on-state voltage drop of the transistor, and output the comparison result to the control circuit.

[0056] A control circuit, connected to the comparator circuit, is used to stop sending the PWM signal when the voltage difference is less than the on-state voltage drop of the transistor. The PWM signal is used to control the drive circuit to send a drive signal, which is used to drive the upper bridge arm transistor and / or the lower bridge arm transistor to turn on and off.

[0057] In this embodiment, a comparison circuit is added after the sampling circuit to directly compare the sampled voltage value with the on-state voltage drop of T6, and finally the comparison result is sent to the DSP. The DSP issues a command to make the LED flash, indicating an abnormality in the upper or lower bridge arm, and at the same time, the DSP stops transmitting waves, and the system shuts down. Using hardware to compare the voltage provides a more sensitive response and can protect power devices more quickly.

[0058] In some embodiments, the protection circuit further includes:

[0059] A first driving circuit and a second driving circuit are provided. The output terminal of the control circuit is connected to the first driving circuit. The output terminal of the first driving circuit is connected to the base of the upper bridge arm transistor. The output terminal of the control circuit is connected to the second driving circuit. The output terminal of the second driving circuit is connected to the base of the lower bridge arm transistor. The first driving circuit is used to drive the upper bridge arm transistor to turn on and off. The second driving circuit is used to drive the lower bridge arm transistor to turn on and off.

[0060] In some embodiments, the protection circuit further includes:

[0061] The level conversion chip is used to connect the output of the control circuit to the first driver chip and the second driver circuit.

[0062] See also Figure 2 The level conversion chip U1 is used to send PWM1 signals from the DSP to the first and second drive circuits.

[0063] In some embodiments, the first driving circuit includes: a first driving chip and a first driving resistor, wherein the input terminal of the first driving chip is connected to the output terminal of the level conversion chip, the output terminal of the first driving chip is connected to one end of the first driving resistor, and the other end of the first driving resistor is connected to the base of the upper bridge arm transistor.

[0064] The second driving circuit includes a second driving chip and a second driving resistor. The input terminal of the second driving chip is connected to the output terminal of the level conversion chip, the output terminal of the second driving chip is connected to one end of the second driving resistor, and the other end of the second driving resistor is connected to the base of the lower bridge arm transistor.

[0065] See also Figure 2 The first driving circuit includes: a first driving chip U2 and a first driving resistor R1. The input terminal of the first driving chip U2 is connected to the output terminal of the level conversion chip U1. The output terminal of the first driving chip U2 is connected to one end of the first driving resistor R1. The other end of the first driving resistor R1 is connected to the base of the upper bridge arm transistor T4.

[0066] The second driving circuit includes: a second driving chip U3 and a second driving resistor R2. The input terminal of the second driving chip U3 is connected to the output terminal of the level conversion chip U1. The output terminal of the second driving chip U3 is connected to one end of the second driving resistor R2. The other end of the second driving resistor R2 is connected to the base of the lower bridge arm transistor T5.

[0067] The protection circuit provided in this application embodiment pulls down the base voltage of transistor T6 by closing a relay. When both the gate signals of the upper and lower transistors are at a high level, the upper transistor is turned off, thereby avoiding the bridge arm short circuit problem and protecting the power device.

[0068] Based on the foregoing embodiments, this application provides a converter, a power device, and a protection circuit. The protection circuit includes a relay, a transistor, and a pull-up resistor. One end of the relay coil is connected to the base of the lower bridge arm transistor in the power device, and the other end of the coil is connected to the emitter of the lower bridge arm transistor. The moving contact of the relay is connected to the pull-up resistor and the base of the transistor. The stationary contact of the relay is connected to the collector of the transistor and the emitter of the upper bridge arm transistor in the power device. The emitter of the transistor is connected to the base of the upper bridge arm transistor.

[0069] In some embodiments, the protection circuit further includes:

[0070] A sampling circuit, connected to the transistor, is used to sample the voltage difference between the collector and emitter of the transistor;

[0071] A control circuit, connected to the sampling circuit, is used to stop sending PWM signals when the voltage difference is less than the on-state voltage drop of the transistor. The PWM signal is used to control the drive circuit to send drive signals, which are used to drive the upper bridge arm transistor and / or the lower bridge arm transistor to turn on and off.

[0072] In some embodiments, the sampling circuit includes: an operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first capacitor, and a second capacitor. One end of the first resistor is connected to the emitter of the transistor, and the other end of the first resistor is connected to the first input terminal of the operational amplifier, one end of the third resistor, and one end of the first capacitor. One end of the second resistor is connected to the collector of the transistor, and the other end of the second resistor is connected to the second input terminal of the operational amplifier and one end of the fourth resistor. The output terminal of the operational amplifier is connected to the other end of the first capacitor, the other end of the third resistor, and one end of the fifth resistor. The other end of the fifth resistor is connected to the control circuit and one end of the second capacitor. The other end of the second capacitor and the other end of the fourth resistor are grounded.

[0073] In some embodiments, the protection circuit further includes:

[0074] An alarm circuit is provided, which is connected to the control circuit and is used to receive signals from the control circuit to trigger an alarm.

[0075] In some embodiments, the alarm circuit includes:

[0076] A sixth resistor and a light-emitting diode (LED) are connected in series. The control circuit is used to send a low-level signal to make the LED blink.

[0077] In some embodiments, the protection circuit further includes:

[0078] A comparison circuit, connected to the sampling circuit, is used to compare the magnitude of the voltage difference and the on-state voltage drop of the transistor, and output the comparison result of the magnitude relationship to the control circuit.

[0079] In some embodiments, the protection circuit further includes:

[0080] A first driving circuit and a second driving circuit are provided. The output terminal of the control circuit is connected to the first driving circuit. The output terminal of the first driving circuit is connected to the base of the upper bridge arm transistor. The output terminal of the control circuit is connected to the second driving circuit. The output terminal of the second driving circuit is connected to the base of the lower bridge arm transistor. The first driving circuit is used to drive the upper bridge arm transistor to turn on and off. The second driving circuit is used to drive the lower bridge arm transistor to turn on and off.

[0081] In some embodiments, the protection circuit further includes:

[0082] The level conversion chip is used to connect the output of the control circuit to the first driver chip and the second driver circuit.

[0083] In some embodiments, the first driving circuit includes: a first driving chip and a first driving resistor, wherein the input terminal of the first driving chip is connected to the output terminal of the level conversion chip, the output terminal of the first driving chip is connected to one end of the first driving resistor, and the other end of the first driving resistor is connected to the base of the upper bridge arm transistor.

[0084] The second driving circuit includes a second driving chip and a second driving resistor. The input terminal of the second driving chip is connected to the output terminal of the level conversion chip, the output terminal of the second driving chip is connected to one end of the second driving resistor, and the other end of the second driving resistor is connected to the base of the lower bridge arm transistor.

[0085] It should be understood that the phrase "one embodiment" or "an embodiment" throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in the various embodiments of this application, the sequence numbers of the above-described processes do not imply a sequential order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. The sequence numbers of the above-described embodiments are merely descriptive and do not represent the superiority or inferiority of the embodiments.

[0086] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0087] In the several embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components can be combined, or integrated into another system, or some features can be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the controlled or discussed components can be through some interfaces, and the indirect coupling or communication connection between devices or units can be electrical, mechanical, or other forms.

[0088] The units described above as separate components may or may not be physically separate. The components controlled by the units may or may not be physical units. They may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs.

[0089] In addition, each functional unit in the various embodiments of this application can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit; the integrated unit can be implemented in hardware or in the form of hardware plus software functional units.

[0090] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media that can store program code, such as mobile storage devices, read-only memory (ROM), magnetic disks, or optical disks.

[0091] Alternatively, if the integrated units described above are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, or the parts that contribute to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a controller to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROMs, magnetic disks, or optical disks.

[0092] The above description is merely an embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A protection circuit, characterized by, Comprise: a relay, a transistor and a pull-up resistor, one end of a coil of the relay is connected with a base of a transistor of a lower bridge arm in a power device, the other end of the coil is connected with an emitter of the transistor of the lower bridge arm, a moving contact of the relay is connected with a base of the transistor and an emitter of a transistor of an upper bridge arm in the power device, a collector of the transistor is connected with the emitter of the transistor and the emitter of the transistor of the upper bridge arm, an emitter of the transistor is connected with a base of the transistor of the upper bridge arm; The protection circuit further comprises: a sampling circuit connected with the transistor, for sampling a voltage difference between the collector and the emitter of the transistor; a control circuit connected with the sampling circuit, for stopping sending a PWM signal in the case that the voltage difference is less than a turn-on voltage drop of the transistor, the PWM signal being used for controlling a driving circuit to send a driving signal, the driving signal being used for driving the upper bridge arm transistor and / or the lower bridge arm transistor to turn on and turn off.

2. The protection circuit of claim 1, wherein The sampling circuit comprises: an operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a first capacitor and a second capacitor, one end of the first resistor is connected with the emitter of the transistor, the other end of the first resistor is connected with a first input end of the operational amplifier, one end of the third resistor and one end of the first capacitor, one end of the second resistor is connected with the collector of the transistor, the other end of the second resistor is connected with a second input end of the operational amplifier and one end of the fourth resistor, an output end of the operational amplifier is connected with the other end of the first capacitor, the other end of the third resistor and one end of the fifth resistor, the other end of the fifth resistor is connected with the control circuit and one end of the second capacitor, the other end of the second capacitor is grounded with the other end of the fourth resistor.

3. The protection circuit of claim 1, wherein, The protection circuit further comprises: an alarm circuit connected with the control circuit, the alarm circuit being used for receiving a signal of the control circuit to alarm.

4. The protection circuit of claim 3, wherein, The alarm circuit comprises: a sixth resistor and a light emitting diode, the sixth resistor being connected with the light emitting diode in series, the control circuit being used for sending a low-level signal to make the light emitting diode flash.

5. The protection circuit of claim 1, wherein The protection circuit further comprises: a comparison circuit connected with the sampling circuit, for comparing a size relationship between the voltage difference and the turn-on voltage drop of the transistor, and outputting a comparison result of the size relationship to the control circuit.

6. The protection circuit of claim 1, wherein The protection circuit further comprises: a first driving circuit and a second driving circuit, an output end of the control circuit is connected with the first driving circuit, an output end of the first driving circuit is connected with the base of the upper bridge arm transistor, an output end of the control circuit is connected with the second driving circuit, an output end of the second driving circuit is connected with the base of the lower bridge arm transistor, the first driving circuit being used for driving the upper bridge arm transistor to turn on and turn off, the second driving circuit being used for driving the lower bridge arm transistor to turn on and turn off.

7. The protection circuit of claim 6, wherein, The protection circuit further comprises: A level conversion chip, an output end of the control circuit is connected with the first driving circuit and the second driving circuit through the level conversion chip.

8. The protection circuit of claim 7, wherein, The first driving circuit comprises a first driving chip and a first driving resistor, an input end of the first driving chip is connected with an output end of the level conversion chip, an output end of the first driving chip is connected with one end of the first driving resistor, and the other end of the first driving resistor is connected with a base of the upper bridge arm transistor. The second driving circuit comprises a second driving chip and a second driving resistor, an input end of the second driving chip is connected with an output end of the level conversion chip, an output end of the second driving chip is connected with one end of the second driving resistor, and the other end of the second driving resistor is connected with a base of the lower bridge arm transistor.

9. A current transformer, characterized by Comprise: A power module and the protection circuit in any one of claims 1 to 8.

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