A test method and device for a high-voltage gate drive chip
By employing a fully automated testing method that utilizes a test PCB board and a host computer to test high-voltage gate driver chips, the high cost and insufficient safety protection of traditional testing methods are resolved, achieving efficient and safe chip testing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-06-25
- Publication Date
- 2026-03-17
AI Technical Summary
Traditional high-voltage gate driver chip testing methods are costly, inefficient, and lack equipment and personnel protection measures.
The fully automated testing method is adopted, which utilizes a test PCB board, a host computer and an FPGA chip. Low voltage and high voltage power are provided through the power module, the test module performs signal processing and parameter testing, and a protective cover is used for safety protection to achieve fully automated testing.
It reduces testing costs, improves testing efficiency, and provides reliable protection for the chip under test, testing equipment, and personnel, making it suitable for large-scale testing.
Smart Images

Figure CN116754927B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit testing technology, and in particular to a testing method and apparatus for a high-voltage gate driver chip. Background Technology
[0002] High-voltage gate driver chips can convert input low-voltage logic signals into drive signals to drive power MOSFETs or insulated-gate bipolar transistors. Generally, the drive signal output of the high-voltage gate driver chip under test can reach around 500V, unlike common low-voltage drive devices (whose power supply voltage and signal voltage are usually less than 50V). Therefore, efficient, accurate, and safe testing methods are required to test the chip under test.
[0003] Traditional testing methods for high-voltage gate driver chips often employ oscilloscopes with high-voltage probes to test the high-voltage drive signal. In addition, they require adjustable DC power supplies, voltmeters, ammeters, and other instruments, resulting in high costs. Manual wiring is necessary on-site, hindering large-scale testing, and oscilloscope testing is slow and inefficient. Furthermore, traditional testing methods generally focus only on the accuracy and stability of the test results, neglecting protection technologies and lacking clear protective measures for the chip under test, equipment, and personnel. Summary of the Invention
[0004] The purpose of this invention is to provide a testing method and apparatus for high-voltage gate driver chips, so as to solve the problems of high cost, low efficiency and lack of protection for equipment and personnel in traditional testing methods.
[0005] To address the aforementioned technical problems, this invention provides a testing method for a high-voltage gate driver chip, comprising:
[0006] Step S1: The host computer runs the test program and sends the excitation signal to the test PCB board. In the test PCB board, the power module provides low voltage power to the chip under test. After receiving the excitation signal, the chip under test outputs a low voltage drive signal to the test module on the test PCB board.
[0007] Step S2: After receiving the excitation signal from the host computer, the test module tests the low-voltage function and parameters of the chip under test, and sends the result of whether the test passes back to the host computer; when the chip under test has a low-voltage function or parameter failure, it will return the result of test failure to the host computer, and then skip steps S3 and S4 and directly execute step S5.
[0008] Step S3: After step S2 is passed, the excitation signal is sent to the test PCB board through the host computer. The chip under test is not connected to the test circuit. The protective cover in the test PCB board is locked. The power module provides high voltage power. The test module tests the high voltage power. When there is an abnormality in the power module or the high voltage circuit, the test failure result is returned to the host computer. Then, step S4 is skipped and step S5 is executed directly.
[0009] Step S4: After step S3 is passed, the host computer sends an excitation signal to the test PCB board, the chip under test is connected to the test circuit, the power module provides high voltage power, the test module tests the various electrical parameters of the chip under test and outputs the high voltage drive signal, and sends the result of whether the test is passed back to the host computer.
[0010] Step S5: Read and analyze the test results through the host computer, calculate whether the test results meet the chip specification requirements, and display and save the results of whether the chip under test has passed the test;
[0011] Step S6: Send the excitation signal to the test PCB board through the host computer, set the output voltage of the power module to 0V, set the pins of the chip under test related to high voltage power supply or high voltage signal to 0V, set the two ends of all high voltage related capacitors on the test PCB board to 0V, test each voltage through the test module, and send the test results back to the host computer.
[0012] The host computer judges the test results. When all the set 0V voltages have reached 0V, it displays a prompt that the test is complete, unlocks the protective cover, and allows the tester to remove the chip under test.
[0013] In one embodiment, the test module includes a DC parameter test module and an AC parameter test module. The DC parameter test module converts the voltage and current signals to be tested into digital signals through an analog-to-digital converter, which are then read by the FPGA chip. The AC parameter test module converts the time parameters to be tested into high-level signals through a comparator, and then the FPGA chip calculates the test results by pulse counting.
[0014] In one embodiment, the test module performs the following tests on the high-voltage power supply: checks whether the voltage reaches the set voltage, checks whether the leakage current is less than the set threshold, and transmits the test results to the host computer.
[0015] In one embodiment, the high-voltage drive signal output of the chip under test includes: high level, low level, signal transmission time, signal rise time, signal fall time, and signal matching degree of the high-voltage drive signal.
[0016] In one embodiment, the power module provides a low-voltage power supply of no more than 30V to the chip under test, and a high-voltage power supply of no less than 400V and no more than 1000V to the chip under test.
[0017] In one implementation, the test program is written in VC++, compiled into an executable file, and runs in a Windows software environment.
[0018] The present invention also provides a testing device for a high-voltage gate driver chip, including a test PCB board and a host computer; the test PCB board is composed of a test PCB board mother board, a test PCB board daughter board and a protective cover plate;
[0019] The test PCB motherboard includes: FPGA chip, power module, and test module; the test PCB daughterboard includes test socket and chip under test; and the protective cover includes insulating cover and locking switch.
[0020] The host computer runs the test program, sends various excitation signals to the test PCB board, receives various return signals from the test PCB board, analyzes and judges them, and displays the test results.
[0021] The FPGA chip controls the power module to output the power supply voltage set by the test program, transmits the excitation signal to the chip under test, reads the test data from the test module, and transmits the results to the host computer.
[0022] The power module outputs the power supply voltage and DC voltage set by the test program to the chip under test, and measures the output current.
[0023] The test module tests the voltage value set by the test program and tests the signal output of the chip under test.
[0024] In one embodiment, the test program running on the host computer includes a power control and query module, a test excitation signal sending module, and a test data reading, analysis, and storage module.
[0025] The power control and query module is used to control the power module to turn on and off, set different voltages and currents and control the switching of channels, measure the current of all channels and display it.
[0026] The test excitation signal sending module sends excitation signals according to the test program settings, controlling the test PCB board to test all parameters and all output signals of the chip under test;
[0027] The test data reading, analysis and storage module is used to read test data from the FPGA chip, compare and judge the test data with the specifications, and save and display the test results.
[0028] In one implementation, the host computer interacts with the FPGA chip via a PCI interface.
[0029] The present invention provides a testing method and apparatus for a high-voltage gate driver chip, which has the following beneficial effects:
[0030] (1) Full-parameter automated testing is achieved without the need for instruments such as high-voltage oscilloscopes and high-voltage probes, which reduces testing costs and improves testing efficiency;
[0031] (2) Reliable protective measures were taken for the chip under test, the test equipment and the test personnel during high voltage parameter testing, reducing the risk of property loss and personal injury;
[0032] (3) Innovations are made in the structure of the test circuit, integrating all parameters of the chip under test, such as high voltage, low voltage, DC, and AC, into a single device for testing. This results in high testing efficiency, low testing cost, and suitability for large-scale testing. Attached Figure Description
[0033] Figure 1 This is a schematic diagram of the test method for the high-voltage gate driver chip provided by the present invention.
[0034] Figure 2 This is a schematic diagram of the test device for the high-voltage gate driver chip provided by the present invention.
[0035] Figure 3 This is a schematic diagram illustrating the high-voltage drive signal testing principle provided by the present invention. Detailed Implementation
[0036] The following detailed description, in conjunction with the accompanying drawings and specific embodiments, provides a further detailed explanation of the testing method and apparatus for a high-voltage gate driver chip proposed in this invention. The advantages and features of this invention will become clearer from the following description. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of this invention.
[0037] It should be noted that the terms "comprising" and "having" and any variations thereof in the specification and claims of this invention are intended to cover a non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such process, method, product, or device.
[0038] This invention provides a testing method for a high-voltage gate driver chip, the process of which is as follows: Figure 1 As shown, it includes the following steps:
[0039] Step S1: Design the test PCB board, which consists of a mother board and a daughter board. The PCB board includes a power module, the chip under test (DUT), a test module, and a protective cover. The power module, test module, and protective cover are located on the mother board, and the DUT is located on the daughter board. Figure 2 As shown, the host computer sends an excitation signal to the test PCB board, and the power module provides a low voltage power supply of less than 30V to the chip under test. After receiving the excitation signal, the chip under test outputs a low voltage drive signal to the test module on the test PCB board.
[0040] Step S2: The test module includes a signal preprocessing module and a signal testing module. During low-voltage drive signal testing, the signal testing module is used directly to test the low-voltage function and parameters of the chip under test, and the result of whether the test passes or fails is sent back to the host computer. When the chip under test has a low-voltage function or parameter failure, step S2 will return the result of the test failure to the host computer, and subsequent steps S3 and S4 will be skipped. This avoids the risk of damage to the test equipment and test personnel caused by high-voltage power supply and high-voltage signal passing through the failed chip under test.
[0041] Step S3: After the chip under test passes the test in Step S2, the host computer sends an excitation signal to the test PCB board. The chip under test is not connected to the test circuit, the protective cover is locked, and the power module provides a high-voltage power supply greater than 400V. The test module tests this high-voltage power supply, checking whether the voltage reaches the set voltage and whether the leakage current is less than the set threshold, and transmits the result of whether the test passes to the host computer. If there is an abnormality in the power module or high-voltage circuit on the test PCB board, Step S3 will return a test failure result to the host computer, and subsequent steps will be skipped and not performed. This prevents any non-compliant high-voltage power supply from being applied to the chip under test, thus avoiding the risk of damage caused by high-voltage power.
[0042] Step S4: After the chip under test passes the test in step S3, the host computer sends an excitation signal to the test PCB board. The chip under test is connected to the test circuit, the power module provides high voltage power, and the test module tests the chip under test, testing various electrical parameters of the chip under test; it tests the high voltage drive signal output of the chip under test, including the high level, low level, signal transmission time, signal rise time, signal fall time, signal matching degree and other parameters of the high voltage drive signal, and sends the result of whether the test passes back to the host computer.
[0043] like Figure 3The diagram shows the test circuit for the high-voltage drive signal. The high-voltage drive signal is converted into a 0.01 times voltage signal after passing through resistors R1 and R2 and the follower buff, and then enters comparator startcomp and comparator stopcomp. The starttrigref pin of comparator startcomp and the stoptrigreg pin of comparator stopcomp are set by the test program to compare voltages. The signal under test (i.e., the 0.01 times voltage signal) becomes a high-level signal after passing through comparator startcomp and stopcomp and enters comparator counter1. The clock pin clk of comparator counter1 is a clock signal input from the FPGA chip. The high-level signal converted by the signal under test is counted by counter1, and the FPGA chip reads the counting result.
[0044] Step S5: Read and analyze the test results through the host computer, calculate whether the test results meet the chip specification requirements, and display and save the results of whether the chip under test has passed the test.
[0045] Step S6: The host computer sends an excitation signal to the test PCB board, sets the power module output voltage to 0V, sets the pins of the chip under test (DUT) related to high-voltage power or high-voltage signals to 0V, sets the terminals of all high-voltage related capacitors on the PCB board to 0V, and tests each of the above voltages using the test module. The test results are then sent back to the host computer. The host computer evaluates the test results. When all the set 0V voltages have reached 0V, a message indicating that the test is complete is displayed, the protective cover unlocks, and the tester can remove the DUT. Step S6 effectively avoids the risk of personal injury to the tester from contact with the DUT or the test PCB board while the high-voltage power or high-voltage signal is still on the test PCB board.
[0046] Based on the above-described testing method for high-voltage gate driver chips, this invention also provides a testing apparatus for high-voltage gate driver chips, such as... Figure 2 As shown, the testing device includes a test PCB board and a host computer; the test PCB board includes a test PCB motherboard, a test PCB daughterboard and a protective cover plate; the test PCB motherboard includes an FPGA chip, a power module and a test module; the test PCB daughterboard includes a test socket and a chip under test; and the protective cover plate includes an insulating cover plate and a locking switch.
[0047] The host computer interacts with the FPGA chip via the PCI interface. The host computer runs the test program, sends various excitation signals to the test PCB board, receives various return signals from the test PCB board, analyzes and judges them, and displays the test results. The FPGA chip controls the power module to output the power supply voltage set by the test program, transmits the excitation signals to the chip under test (DUT), reads the test data from the test module, and transmits the results to the host computer. The power module outputs the power supply voltage and DC voltage set by the test program to the DUT and measures the output current. The test module tests the voltage value set by the test program and tests the signal output of the DUT.
[0048] The test program running on the host computer includes a power control and query module, a test excitation signal sending module, and a test data reading, analysis, and storage module. The power control and query module controls the power module's on / off state, sets different voltages and currents, controls channel switching, measures and displays the current of all channels. The test excitation signal sending module sends excitation signals according to the test program settings, controlling the test PCB board to test all parameters and output signals of the chip under test. The test data reading, analysis, and storage module reads test data from the FPGA chip, compares the test data with specifications, and saves and displays the test results.
[0049] The power supply module includes low-voltage power output and high-voltage power output. The low-voltage power supply is mainly responsible for supplying low voltage to the chip under test, generally not exceeding 30V. The high-voltage power supply is mainly responsible for supplying high voltage to the chip under test, generally greater than 400V and not exceeding 1000V.
[0050] The testing module includes a DC parameter testing module and an AC parameter testing module. The DC testing module converts the voltage and current signals to be tested into digital signals using an analog-to-digital converter, which are then read by the FPGA chip. The AC testing module converts the time parameters to be tested into high-level signals using a comparator, and then the FPGA chip calculates the test results using pulse counting.
[0051] The core of the test PCB board is an FPGA chip, which receives various excitation signals sent by the host computer, controls the power module to generate the required voltage according to the excitation signals, and uses relay switches on the control board to form the required test circuit to send the required status commands to the chip under test.
[0052] The core of PCB testing is the testing module, which includes DC parameter testing module and AC parameter testing module. These modules include chips such as analog-to-digital converters, digital-to-analog converters, pulse generators, comparators, and counters, as well as components such as power supply lines, signal lines, relay switches, resistors and capacitors required for these chips to operate. Through the combination of these chips and components, parameters such as voltage, current, and signal transmission time can be tested.
[0053] The high-voltage drive signal generated by the high-voltage gate driver chip under test is tested by the AC parameter test module in the test module, such as... Figure 3 As shown, by combining a comparator, resistor, pulse generator, and pulse counter, the FPGA chip can read the AC parameters of the chip under test, such as signal transmission time.
[0054] The core of the host computer is the test program. By running the test program, the host computer controls the test PCB board to execute the test process, determines whether the test data meets the specifications of the chip under test, and displays the test results. During the execution of the test program, the host computer performs multiple judgments and execution actions, which are crucial for safety protection during the testing process. The test program is written in VC++, compiled into an executable file, and runs in a Windows software environment.
[0055] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.
Claims
1. A testing method for a high-voltage gate driver chip, characterized in that, The application relates to a test method for a chip, and belongs to the technical field of chip testing. Step S1: a host computer runs a test program and sends an excitation signal to a test PCB; In the test PCB, a power module provides low-voltage power supply for the tested chip; after receiving the excitation signal, the tested chip outputs a low-voltage driving signal to a test module on the test PCB; Step S2: after receiving the excitation signal from the host computer, the test module tests the low-voltage function and parameters of the tested chip and returns the test result to the host computer; When the low-voltage function or parameters of the tested chip are invalid, the test result of failure is returned to the host computer, and subsequent steps S3 and S4 are skipped to directly execute step S5; Step S3: after step S2 is passed, the host computer sends an excitation signal to the test PCB, the tested chip is not connected to the test circuit, a protective cover plate in the test PCB is locked, the power module provides high-voltage power supply, and the test module tests the high-voltage power supply; when the power module or the high-voltage circuit is abnormal, the test result of failure is returned to the host computer, and subsequent step S4 is skipped to directly execute step S5; Step S4: after step S3 is passed, the host computer sends an excitation signal to the test PCB, the tested chip is connected to the test circuit, the power module provides high-voltage power supply, and the test module tests the high-voltage driving signal output of the tested chip; the test result is returned to the host computer; Step S5: the host computer reads and analyzes the test result, calculates whether the test result meets the chip specification index requirement, and displays and saves the test result of the tested chip; Step S6: the host computer sends an excitation signal to the test PCB, sets the output voltage of the power module to 0V, sets the pins related to the high-voltage power supply or high-voltage signal of the tested chip to 0V, sets all high-voltage related capacitors on the test PCB to 0V, tests the voltages by the test module, and returns the test result to the host computer; When all the set 0V voltages reach 0V, the host computer judges that the test is completed, a prompt that the test is completed is displayed, the protective cover plate is unlocked, and the tested chip is allowed to be taken away by a tester.
2. The method of testing a high voltage gate drive chip of claim 1, wherein, The test module comprises a direct-current parameter test module and an alternating-current parameter test module; the direct-current parameter test module converts the voltage and current signals to be tested into digital signals through an analog-to-digital converter, and the FPGA chip reads the digital signals; the alternating-current parameter test module converts the time parameters to be tested into high-level signals through a comparator, and then the FPGA chip calculates the test result by means of pulse counting.
3. The method of claim 1, wherein the high-voltage gate drive chip is a chip for driving a gate of a high-voltage transistor. The test module tests the high-voltage power supply, including checking whether the voltage reaches the set voltage and whether the leakage current is less than the set threshold, and returning the test result to the host computer.
4. The method of claim 1, wherein the high-voltage gate drive chip is a chip for driving a gate of a high-voltage transistor. The high-voltage driving signal output of the tested chip comprises high-level, low-level, signal transmission time, signal rising time, signal falling time and signal matching degree.
5. The method of claim 1, wherein the high-voltage gate drive chip is a chip for driving a gate of a high-voltage transistor. The low-voltage power supply provided by the power module for the tested chip is not more than 30V, and the high-voltage power supply provided by the power module for the tested chip is not less than 400V and not more than 1000V.
6. The method of testing a high voltage gate drive chip of claim 1, wherein, The test program is written in VC++ language, compiled into an executable file, and runs in a Windows software environment.
7. A test apparatus for testing a high-voltage gate drive chip for implementing the test method of claim 1, characterized by The test PCB board, the host computer, and the protective cover plate are included. The test PCB board is composed of a test PCB board mother board, a test PCB board daughter board, and a protective cover plate. The test PCB board mother board includes an FPGA chip, a power module, and a test module. The test PCB board daughter board includes a test socket and a chip under test. The protective cover plate includes an insulating cover plate and a locking switch. The host computer runs a test program, issues various excitation signals to the test PCB board, receives various return signals from the test PCB board, analyzes and judges, and displays the test results. The FPGA chip controls the power module to output the power voltage set by the test program, transmits the excitation signal to the chip under test, reads the test data of the test module, and transmits the results to the host computer.
8. The test apparatus for a high voltage gate drive chip according to claim 7, wherein The power module outputs the power voltage and DC voltage set by the test program to the chip under test, and measures the output current. The test module tests the voltage value set by the test program and tests the signal output of the chip under test. The test program run by the host computer includes a power control and query module, a test excitation signal issuing module, and a test data reading and analysis saving module. The power control and query module is used to control the opening and closing of the power module, set different voltages and currents, control the switch of the channel, measure the current of all channels, and display the results.
9. The test apparatus for a high voltage gate drive chip according to claim 7, wherein The test excitation signal issuing module issues excitation signals according to the test program settings, controls the test PCB board to test all parameters and all output signals of the chip under test. The test data reading and analysis saving module is used to read the test data from the FPGA chip, compare the test data with the specifications, judge, save, and display the test results. The host computer interacts with the FPGA chip through a PCI interface.
Citation Information
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