Method for regulating continuous and pulsed output variables and associated circuit arrangement

Abstract

The invention relates to a method for operating a clock-triggered and regulated electronic power converter, which is included in an operating device for light-emitting diodes. The power converter should generate a regulated output power in the form of a power supply. If the regulated output power should have the form of a periodic pulse pattern, the pulse pattern can be used to adjust the set value of its regulation loop. The set value of the pulse pattern can be input into the regulation device independently of the set value of the continuous output power. The invention relates to a related regulation circuit, including at least one regulation amplifier with at least two regulation input terminals, a negative feedback network extending from its output terminal to one of its regulation input terminals; a first input terminal, a signal for the set value of the average value of the output power to be regulated; and a second input terminal, a signal for the set value of the waveform or pulse pattern of the output power to be regulated is transmitted to one of the regulation input terminals via a DC-blocking high-pass filter.

Description

Technical Field

[0001] The invention relates to a method for an electronic power converter and an associated regulating circuit, so that a continuous or pulsed electrical variable, or both, can be provided at the output of the converter. The electronic power converter can be a driver for a light-emitting diode. Pulsed variables are particularly advantageous at low brightness of the light-emitting diode, wherein the current of the light-emitting diode should be discharged in pulsed form. By the same method, periodic mode switching can also be realized in such a power converter or operating device. Background Art

[0002] It is known from practice that power LEDs used in general lighting technology often have a color drift that depends on their current and, in particular in the case of poor heat dissipation, have a highly fluctuating efficiency that is also dependent on their current. The latter can make a control loop guided by light measurement or brightness measurement erratic or unstable. In order to avoid both, but still be able to control the brightness of the LED, the current flowing through the LED is usually kept at 100% level, but in order to reduce the brightness, a pulse width modulation is performed accordingly.

[0003] This approach results in very short current pulses for low brightness and therefore in the risk of flickering and / or stroboscopic effects. Furthermore, an electronic power converter suitable for this must achieve very short pulses at its output, be able to switch very high signal edges very quickly and still always supply its rated current. Thus, for example, it is proposed in EP-1-689-212-A1 that, starting from a certain brightness, in order to further reduce the brightness, the duty cycle of the pulse width modulation is no longer reduced further, but kept constant, and the current level within the pulse is reduced instead.

[0004] Over time, the color shift described became smaller and smaller, and pulse width modulated lighting created great problems in film and television shooting. Therefore, during this period, it became standard to reduce the brightness of the LEDs by continuously reducing their current, and pulse width modulation was often not even performed anymore. The residual ripple of the LED current increasingly became a quality feature in the corresponding lighting systems. However, at very low brightness, in addition to the accuracy problems in the case of the regulation of the electronic power converters set for accuracy problems, other effects due to other unrelated defects in the crystals of the LEDs are exposed: Each individual LED has a slightly different minimum current at which light is generated. If a larger number of them are dimmed at the same time, some are the first to completely dim, and perhaps only one LED remains bright until the end. The optical performance of a lighting device equipped with many LEDs and operated in this way is significantly affected.

[0005] This effect can be eliminated by deliberately making the light-emitting diode current more volatile again at very low brightness, for example below 5% of the rated brightness. Thus, all light-emitting diodes participating in the same lighting device emit almost the same brightness, but in a micro-pulsed manner, and further dimming is achieved by reducing the duty cycle as described above, which is smoothed by the eye to a continuously decreasing brightness. Due to the significantly lower edge height compared to the previous one, the frequency of the micro-pulses can be significantly higher, for example more than 1 kHz or preferably more than 10 kHz, in order to reliably avoid any stroboscopic effects, or even at the clock frequency of the electronic power converter that supplies the light-emitting diodes in question. The latter is proposed in the three applications DE-10-2017-204-907-A1, WO-2018-114528-A1 and WO-2018-114533-A1. At the lower end of the brightness scale, the indicated regulation of the output variables in continuous and pulsed form and the associated circuits also play a role. They greatly simplify the overhead, in particular in the scope of the hardware of at least one clock-triggered power stage of an electronic power converter and in the software of its control IC. If the power converter under consideration is to be analog-controlled by discretely constructed small-signal circuits, the latter is also much simpler than if the proposed regulation, including the associated circuits, is not applied.

[0006] In order to pulse width modulate the output of an electronic power converter, there are two methods so far. One method is that an additional electronic circuit breaker is installed in the converter in series with the possible output current, and the circuit breaker is controlled according to the pulse width modulation (also referred to as PWM) set for this purpose. During the high level of the PWM, the additional switch is fully turned on, that is, it conducts with the minimum possible loss, and is completely turned off during the low level of the same PWM. In the case of inverse logic, this correspondence is just the opposite. The frequency of the PWM is usually between 1kHz and 10kHz. This includes the duty cycle respectively. The two together are also called pulse mode, so only one possible waveform of the pulse mode is described, that is, the pulse mode of a rectangular waveform.

[0007] Another method is that the control of at least one clock-triggered power transistor in the electronic power converter is interrupted periodically so that the converter does not transfer power during the PWM low level and transfers power during the PWM high level. Here, the above-mentioned additional circuit breaker is omitted. The prerequisite is that the edge slope at the output is not important and / or the electronic power converter itself is relatively fast.

[0008] The disadvantage of these two methods is that the control loop actually set for regulating the output parameter of the electronic power converter under consideration is interrupted periodically, and the control loop is usually optimized for the repeatability, resolution and constancy of the parameter to be regulated by the electronic power converter. This first causes the control loop to re-oscillate every time, that is, at least one thousand times per second, and secondly causes it to measure errors. By periodically forcing separation from the outside, the measured parameter is less than the parameter generated by the same output signal of the same regulator without PWM. Therefore, the regulator deceives PWM by offsetting the power reduction actually expected by the output PWM. Therefore, its set value must be corrected according to the duty cycle of PWM. However, even in this case, the regulation is still very imprecise, because the above-mentioned transient process is periodic, and therefore, if the natural frequency of the control loop is similar to or matches the frequency of PWM, it will not only cause the same periodic fluctuation of the output parameter, but also cause offset errors and even complete instability due to many in-phase overshoots.

[0009] Another method for preventing the regulator from cheating with a PWM imposed from the outside on the regulator's side is to "freeze" all control state variables at the beginning of each off period and release them again at the beginning of each on period, which can advantageously only be realized digitally. This is shown by way of example in EP-2-340-690-B1, where even two such regulators are operated alternately with each other. The load there (a high-pressure discharge lamp) is to be operated with a rectangular current, wherein the instantaneous power in both directions must be equal. However, depending on the direction of the current, such lamps generate slightly different burning voltages, which in turn leads to slightly different lamp currents in each direction. Instead of a central power regulator oscillating each time to a smaller burning voltage and thus to a larger lamp current or vice versa, two power regulators are provided, one for positive burning voltage and positive lamp current and the other for negative burning voltage and negative lamp current. Depending on the phase position of the lamp, the two regulators are operated alternately, wherein the "freeze release" process is used on both sides of both regulators. The same setpoint power is only set centrally for both phases or both regulators and this setpoint changes only slowly, thus ensuring global stability of the entire system. In this way, the clocked electronic power converter (full bridge with four active power transistors) is able to change its output current abruptly, despite the fact that the associated setpoint is uniform. This effectively prevents small high-voltage lamps (20 W, 35 W) from spontaneously extinguishing when changing the direction of their current.

[0010] On the other hand, it is advantageous for the operation of the light-emitting diodes to keep the output signal at a residual value, the so-called simmer level, rather than completely at zero during the PWM low level. In principle, neither of the two methods mentioned above, an additional circuit breaker connected in series to the output or an interruption of the drive of at least one power transistor, can achieve this. In particular, in the case of voltage as a regulated output variable of the electronic power converter under consideration (as an operating device for light-emitting diodes (LEDs)), the simmer level can exceed 80% of the rated variable. For the current to which the converter output is to be regulated, the simmer level is typically 5% to 10% of the output variable present during the PWM high level, or depends on the current duty cycle. Ultimately, it should even be possible to adjust the regulated output variable "current" or "voltage" by means of an arbitrary periodic curve shape or waveform. Summary of the invention

[0011] The technical problem to be solved by the present invention is to provide a method and a related circuit for regulating an electronic power converter, which, while avoiding the above two problems and maintaining the possibility of a low level of control, allows at least one output variable of the power converter under consideration to be output in a pulsed form or in another manner in a periodically adjusted manner. The pulse pattern required for this purpose, such as the frequency and duty cycle of pulse width modulation or PWM, should be predefined from the outside or generated internally in a higher-level controller that regulates the power converter under consideration.

[0012] The above technical problem is solved by the method according to the present invention. The above technical problem is also solved by a circuit device having the features according to the present invention. The features of the present invention describe other advantageous designs. All the embodiments shown are exemplary and do not limit the protection scope of the present disclosure, and the protection scope of the present disclosure also includes all other solution variations that those skilled in the art can think of through the present disclosure.

[0013] According to the method of the present invention, at least one pulse form or other periodically adjusted output parameter can also be generated by using a regulated and clock-triggered electronic power converter, which thus obtains a waveform, and the regulation loop of the electronic power converter is optimized for the continuous output parameters of the same converter. To this end, the clock-triggered power converter includes an input end for inputting electrical input power and an output end for outputting one or more regulated electrical output parameters. Depending on the characteristics of the electrical load connected to the output end, this is either an output voltage or an output current. However, since only the power output can change inside the clock-triggered power converter, the regulated output parameter can also be an output power, which includes the above-mentioned two output parameters. During the adjustment process, the physical power flow at the output end of the power converter under consideration is not interrupted periodically, nor is the drive of the same power converter itself, especially the clock triggering, periodically interrupted, but the setting value of its regulation loop is adjusted by basically using the same pulse shape or waveform, and the desired output power after periodic adjustment should have its shape. The pulse mode or the waveform can be input into the regulating device as a second setting value independently of the first setting value of the predetermined continuous output power, and the regulating device has at least two input ends separated from each other for this purpose. A first setpoint value for the continuous output power is always input to the first input. For the regulation, at least two setpoint values ​​are added to form a total setpoint value, which is input into the control loop. The total setpoint value is regulated with a waveform so that the average value of the total setpoint value corresponds to the first setpoint value for the continuous output power. The continuous output power predetermined by the first setpoint value corresponds precisely to the time average value of the output variable regulated with the pulse mode. The entire control loop (whose total setpoint value is regulated, i.e. measurement, negative feedback or compensation, regulation, drive and actual power conversion) is permanently and dynamically involved here.

[0014] Therefore, the control loop maintains level regulation, which does not need to re-oscillate before or after each pulse. In addition, if the negative feedback (also known as compensation or reflux) of the control loop contains a dominant integral part, the time average value of the regulated output power remains constant and consistent with the first set value, regardless of which pulse form or waveform the output power should adopt, regardless of whether a waveform or continuous spectrum of the same output power is required, that is, it is independent of whether the second (wave-shaped) set value is input. Filters can also be integrated into each control network. For the required averaging of the measurement signal of at least one pulse-shaped output variable, for example, a low-pass filter is required, whose capacitor can also be at the similar low-ohm output of the control amplifier instead of being grounded. In this way, the measurement signal is filtered in the same way, but the entire control loop is easier to a dynamic level (and therefore can be more stable), because there are no two independent capacitors (filter capacitor and negative feedback capacitor), but only a negative feedback capacitor, which takes over these two tasks in the same way. In this way, the color drift of the light-emitting diodes provided for the general lighting technology, especially the primary radiation, can be used without affecting the brightness. Without the second set value, color drift exists, and with the second set value, color drift is reduced.

[0015] Thus, according to the above understanding, a pulse pattern is a special applied waveform in which the pulses all have the same height (e.g. the same voltage), whereas for a waveform they can have different heights. Therefore, a pulse pattern is a special case of a waveform. A waveform is generally any form of an inhomogeneous electrical quantity. But in general, a waveform is not considered to be a simple sine wave, but a higher-order complex waveform of different heights with successive minima and maxima occurring at different time intervals. However, the classic example of a pulse pattern is a pulse width modulated signal with a specific duty cycle.

[0016] According to the method, the control loop comprises at least two inputs, and for adjusting the desired pulse shape or waveform of the output power to be adjusted, the second setpoint can be input to the control loop at the second input of the control loop in the form of a voltage, a current, an integral about the voltage or an integral about the current. It is also advantageous that a first setpoint is input at the first input of the control loop in the form of a voltage or a current and independently of the second setpoint, which first setpoint predetermines that the value of the output power to be adjusted is continuous or that the average value of the output power to be adjusted is adjusted.

[0017] According to the method, the power converter under consideration outputs a continuous output power when the second set value for the waveform is not input at all in its regulating device. The value of the continuous output power is then precisely regulated to the input first set value for the time average value. Therefore, the first set value for the average value must be input in the regulating device.

[0018] In a particularly advantageous embodiment of the method, the second setpoint has a temporal minimum which deviates from the average value of its waveform by an amount which is preferably 80% to 98%, particularly preferably 90% to 96%, less than the first setpoint. Thus, a minimum greater than zero is produced in the sum of the setpoints and also in the output power which is regulated in a wave-like manner, the so-called simmer level, which is 20% to 2% of the average output power, particularly advantageously 10% to 4% of the average output power. Thus, for light-emitting diodes provided for general lighting technology, the stroboscopic effect can be significantly reduced. In addition, periodic mode changes (operation-non-operation-operation, etc.) of the clock-triggered power converter are thereby avoided, and the active regulator of the control loop can be simplified, in particular unipolarly supplied, because the control variables and all setpoints at its output are always positive and approach, but never reach, the zero line, although they are close.

[0019] A very common and therefore particularly sought-after embodiment of the method is that the waveform is essentially rectangular and is therefore a pulse pattern, that is, the second setpoint is a setpoint of the pulse pattern, and the edge height of the regulated output power depends on the edge height of the second setpoint. Such pulsed setpoints are the easiest to generate, for example digitally, and due to the "state space averaging" that can be applied in clock-triggered electronic power converters, the influence of pulsed setpoints in clock-triggered electronic power converters can be calculated particularly accurately and is therefore particularly easy to plan.

[0020] In another embodiment of the method, the edge height of the regulated output power can depend on the average value of the regulated output power and the duty cycle of the pulse mode. In particular, the method also includes that the value of the output power to be output in a wave-like or pulsed form increases proportionally to the complement of the desired duty cycle of the pulse mode starting from the average value, while the set value for the pulse mode has a higher level, and decreases proportionally to the same duty cycle starting from the same average value, while the set value for the pulse mode has a lower level. The correlation between the level of the pulse mode set value and the increase or decrease in the value of the output power in the form of pulses can also be precisely interchanged relative to the above. In this way, the method can also achieve a simmering level of the output power between its pulses, which is different from classical PWM, in which there is usually a zero level between pulses.

[0021] The method alternatively includes: the second set value and the edge height of the output power formed thereby are respectively constant. Therefore, the method includes at least a first area and a second area, in which the output power is expected to be a continuous output parameter; in the second area, the output power is expected to be an output parameter periodically adjusted with a predetermined waveform. In most cases, the time average value of the output power in the second area is smaller than that in the first area, and the average value in the first area corresponds to a continuous value of the output power at the same time. The value of the output power on the side pointing to the first area at the seam position between the two areas is reduced by the desired simmer level and divided by the desired duty cycle on the side pointing to the second area at the same seam position, defining the edge height. In the second area, for a constant edge height, the average value of the output power is reduced due to the reduction in the duty cycle.

[0022] In order to control both the amplitude and the frequency of the stroboscopic effect in the area illuminated by the light-emitting diodes operated according to the proposed method, the frequency of the waveform or pulse shape is, for example, in the range between 500 Hz and 10 kHz, particularly preferably between 1 kHz and 5 kHz.

[0023] Particularly advantageously, according to the proposed method, the output current of the electronic power converter is essentially regulated with the regulated output power. This can form a core component of an operating device for light-emitting diodes provided for general lighting technology, which is to be operated according to the method. The operating device is therefore set for the application of the method. Since the output voltage of the light-emitting diode as a load is predetermined, constant and applied, the output current is also automatically regulated by regulating the output power, and vice versa. Because in practice usually only the output current is measured and its measured value is fed back, which is used as the actual value. The output power is formed according to the output current by multiplying by the constant factor "output voltage".

[0024] The circuit for the positive logic of a regulated object (Regelstrecke), i.e., for the positive regulation sense, belonging to the method has at least one operational amplifier or regulation amplifier for regulation, from whose output a compensation network or negative feedback network extends to its negative regulation input including a negative feedback resistor. The measurement signal of the output variable to be regulated is connected to the same negative regulation input via a second series impedance, which together with the negative feedback resistor leads to a proportional gain of the regulation amplifier, which is sufficient to meet the highest predetermined edge height of the desired pulse pattern. At the positive input of the same operational amplifier, i.e., the positive regulation input, a signal of a set value of the average value of at least one output variable to be regulated is introduced via a first series impedance, which, for the purpose of impedance matching to help counteract offset and drift errors of the operational amplifier or regulation amplifier, can have approximately the same value as an impedance connected in series with another regulation input, i.e., in this case, approximately the same value as the second series impedance of the negative regulation input. The first set value input of the regulation loop is thus defined. Depending on the regulation sense, the value range or the orientation of the input variable, the association of the above-mentioned set signal and measurement signal with the positive and negative regulation inputs can be interchanged. Additionally, compensation can end at the positive regulation input of the op amp, or both can occur simultaneously.

[0025] The circuit belonging to the method also includes a second setpoint input for pulse mode or generally for waveforms. This is forwarded purely capacitively to the positive or negative control input of the control amplifier, so that at least one series capacitor is connected after the second setpoint input. Therefore, neither the time average value of the setpoint signal nor the measured value signal can be falsified. For this purpose, the second setpoint input includes at least one series capacitor and thus has the form and function of a DC-blocking high-pass filter.

[0026] It is particularly advantageous for the control loop at the above-mentioned series capacitor that the circuit device is separable and recoupleable. The second set value can be generated on a dedicated circuit module, which can be optionally connected to the second input terminal and can be separated from the second input terminal. This modular structure is possible by forcibly inputting the first set value and only optionally inputting the second set value. A standard circuit device without a dedicated circuit module can only adjust the continuous output power or output current, and only by coupling a dedicated circuit module can the output power that is periodically adjusted in pulse form or otherwise be adjusted. Different ASICs or FPGAs can be plugged into the same socket, one without a logic part for pulse pattern generation and one with a logic part for pulse pattern generation. Alternatively, the microcontroller or control IC can have two different program versions, one without the possibility of periodic adjustment and one with the possibility of periodic adjustment.

[0027] Particularly advantageously, the compensation branch comprises at least one integrating capacitor connected in series with a negative feedback resistor. This arrangement produces the dominant integral part of the control gain mentioned above. Thus, the time average value of the output variable to be controlled remains independent of its time shape, i.e., for example, independent of the waveform or independent of its general presence.

[0028] The entire regulation device (i.e. the operational amplifier or regulation amplifier that performs the regulation), its negative feedback network and its two input terminals (including series impedance and DC-blocking high-pass filter), or parts of it can also be integrated into an ASIC or FPGA, or can be implemented digitally, i.e. integrated into the program of a microcontroller, or into the program of a control IC or regulation IC of the electronic power converter under consideration.

[0029] At least one such control circuit provided for regulating a clocked electronic power converter is advantageously contained together with the power converter in an operating device for light-emitting diodes, wherein the operating device can be supplied with the required electrical power and operated according to the above-described method.

[0030] Particularly advantageously, a lighting device or a lighting apparatus provided for using light-emitting diodes is equipped with at least one such operating device for light-emitting diodes.

[0031] Preferred embodiments refer to the entire disclosure, wherein device aspects and application aspects are not always distinguished in detail in the description; in any case, the disclosure can be read implicitly from all categories. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Further advantages, features and details of the invention can be gathered from the following description of exemplary embodiments and from the drawings, in which identical or functionally identical elements are provided with the same reference numerals. In the drawings:

[0033] Figure 1 shows the general structure of the regulation loop,

[0034] Figure 2 shows a possible waveform of the voltage of the adjustment signal,

[0035] Figure 3 shows the high-pass filtered adjustment signal and the corresponding voltage as the set value of the average value,

[0036] Figure 4 shows the possible voltage shapes for the set values,

[0037] Figure 5 A first embodiment of the adjustment method is shown.

[0038] Figure 6 A second embodiment of the adjustment method is shown,

[0039] Figure 7 A third embodiment of the adjustment method is shown,

[0040] Figure 8 The relationship between the duty cycle, the average value, the upper set value level and the lower set value level is shown.

[0041] Fig. 9 A first possible related circuit is shown, and

[0042] Fig.10 A second possible related circuit is shown. DETAILED DESCRIPTION

[0043] Figure 1 The general structure of a control loop as implemented in the embodiment of the study of the predetermined control method is shown. Here, block 6 represents the actual controller, which forms a voltage 11 as a control variable for the controlled object to be controlled by the control loop under consideration according to the voltage signal 10 for the control deviation. The step response of the represented controller is shown in block 6, which has a proportional part and an integral part. Therefore, the controller 6 is a PI controller, from which it follows that its negative feedback or compensation is also included in block 6. The PI negative feedback is composed of at least a series circuit of an ohmic resistor for the proportional part and a capacitor for the integral part of the control gain. The active part of the controller 6 is composed of an operational amplifier with almost infinite gain and speed, so the gain of the entire controller 6 can be said to be determined only by the negative feedback. Due to the integral part in the gain, the controller 6 can continuously realize different voltage levels of the control deviation 10 and the control variable 11, especially in the absence of the control deviation 10, the non-zero control variable 11 is still output, wherein the difference in the voltage level is stored in the capacitor of the negative feedback. Each PI controller can regulate and eliminate so-called “remaining or static control deviations” which occur whenever the controlled object 7 to be regulated requires a control variable 11 greater than zero in order to generate a desired output variable which is substantially proportional to the control variable.

[0044] Such a controlled object 7 is represented by block 7, and the controlled object 7 comprises a clock-triggered electronic power converter including its electrical load; a clock generator, which generates a pulse pattern according to the control variable 11 input thereto; and a driver circuit for the gate or base of at least one power transistor of the clock-triggered converter (not all of which are shown here and below), which amplifies the pulse pattern so that the corresponding power transistor can reliably operate in a clock-triggered manner, and a step response with a low-pass or even PT1 filter characteristic is shown in block 7. Because each such controlled object has a certain inertia until a change in the control variable 11 leads to a corresponding change in the output power 8 of the clock-triggered electronic power converter, for example. Most such controlled objects are globally linear, that is, the amplitude of the change in the output power 8 is proportional to the amplitude of the change in the control variable 11 within a wide range. Therefore, it is acceptable not to discuss the details of this controlled object here and below. Each PT1 controlled object 7 can be satisfactorily stabilized by the PI regulator 6.

[0045] Purely numerical reference numerals, such as 10 or 11 above, can also describe a voltage, its associated voltage-time curve or its associated electrical connection terminal, path, wire or node below. In addition, the same reference numeral also describes the function of the voltage or wire, so that a combination of only this function and the associated reference numerals can appear, such as "adjustment variable 11". Since it is clear from the context which aspect is referred to, it is meaningless to distinguish the reference numerals according to these aspects. The voltage and the voltage-time curve are respectively related to the common circuit grounding. Therefore, "adjustment variable 11" is the voltage on the wire or node 11 relative to the circuit grounding, with a function of the adjustment variable, which function can change over time and can be represented as a time curve on the time axis (as the x-axis), and is correspondingly also marked with the number 11.

[0046] The signal that characterizes each control loop is the measured voltage 8. In the embodiment under investigation, the measured voltage corresponds to the output current of the power converter through which the current flows through the electrical load. Since the electrical load in the embodiment under investigation is a series circuit consisting of a plurality of light-emitting diodes for general lighting technology, or at least a light-emitting diode as follows, its voltage is constant and fixed. Therefore, the output current represents the output power at the same time, and the relative change of the output current leads to the same change of the output power. Since global linearity also applies here, (because generally speaking they are related to all types of passive electrical loads), the output power is usually referred to as the output variable under consideration, even if the output current is always measured in the voltage 8.

[0047] At the subtraction point 5b, the measured voltage 8 is subtracted from the setpoint voltage 9. The result is a control deviation 10 which, if not equal to zero, causes the regulator 6 to be activated and its control variable 11 to be changed.

[0048] The proposed solution is peculiar in that the setpoint 9 can consist of two components, which are added at the summing point 5a. For the operation of the control loop, a continuous setpoint voltage 1 must be input, which is practically constant over a short time frame, i.e., for example, in the order of milliseconds, and therefore changes only slowly. A setpoint voltage 2 for a periodic waveform, such as a pulse mode, can be added to the continuous setpoint 1 at point 5a. Another peculiarity is that the setpoint 2 is always purely capacitive, i.e., it is fed through a high-pass filter 3, which contains a series capacitor, to which no other element, except another capacitor, can be connected in parallel. In this way, although the shape of the summed setpoint 9 changes drastically, just like the wavy setpoint 2, the average value of the summed setpoint 9 does not deviate from the value of the continuous setpoint 1 as long as this summed setpoint is input. Independently of this, the average value of the setpoint 9 always corresponds to the continuous setpoint 1. Therefore, the setpoint 2 is optional and at the same time dominant, because the shape of the summed setpoint 9 changes as soon as the setpoint 2 is input. On the other hand, the average value of the wavy setpoint value 2 is advantageously similar to that of the continuous setpoint value 1 , but other values ​​are also possible.

[0049] The entire system can generate a measurement voltage 8 that is substantially consistent with the wavy summed setpoint value 9, and thus also a correspondingly consistent wavy output power, wherein the measurement voltage 8 is representative. Only part of the inertia of the controlled object cannot be regulated out and remains as a short-term and periodically alternating directional control deviation (not shown).

[0050] Figure 2 A possible wavy voltage curve is described for setpoint 2. The voltage oscillates between values ​​U_H and U_L, with a period duration T and a pulse duration T_ON. During the pulse duration T_ON, setpoint 2 is at the voltage or higher level U_H, and between voltage U_H at voltage U_L, which is also referred to as the lower level or simmer level of setpoint 2.

[0051] exist Figure 3 In the example, the effect of the high-pass filter 3 can be seen from the voltage curve 4. The set value 2 is deprived of its DC part or average value, and the voltage part of the set value 2 with the upper value of the level of U_H or U_L is converted into the starting section of the e-function, which tends to zero. Only the timing remains unchanged, which is a typical high-pass filter. The high values ​​in curve 4 appear during T_ON, and the low values ​​between them occur during the rest of the duration of the period T.

[0052] In addition, here the continuous setpoint 1 is also plotted. This ensures that the setpoint 9 never becomes negative, for reasons that will be explained later, the continuous setpoint 1 must be higher than the voltage U_min by the amount that occurs directly after each falling edge of the wavy setpoint 2.

[0053] Figure 4 The permanently positive setpoint value 9 is shown, which corresponds to the sum of the continuous setpoint value 1 and the voltage curve 4, which is produced by high-pass filtering of the wavy setpoint value 2. The setpoint value 9 is fed into a regulating device, which forces the controlled object to generate an output power as close to the setpoint value 9 as possible.

[0054] Figure 5 A first embodiment of a method for a control device proposed based on the embodiment under investigation is shown. Here, to the right of the first joint position 12, the regulator is only subjected to a continuous setpoint 1, which leads to a proportional increase or decrease in the output power P_A as soon as the setpoint 1 increases or decreases. The wavy setpoint 2 is a constant zero or another constant voltage in this first region, or the setpoint input 2 remains open. As shown in the enlarged illustration in the upper right corner, a continuous sum setpoint 9 is thus formed.

[0055] To the left of the first joint point 12, voltage levels U_H and U_L appear, which have been Figure 2 is known in the art and is always contained only in the wavy set value 2, which is now switched on in this left-hand area. In this case, the higher voltage level U_H particularly advantageously corresponds to the value of the continuous set value 1 exactly at the joint position 12. The lower voltage level U_L is the simmering level of the set value 2. However, in order to be able to change the output power P_A, the shape of the set value 2 must be changed between these two extreme levels U_H and U_L. As shown here according to the angular bisect of the dashed line, the simplest change in shape is a change in the duty cycle D which is proportional to the desired change in the output power P_A. Here, D corresponds to the ratio of T_ON to the period duration T, as Figure 2 It is shown that during this T_ON period, a higher level U_H is present, and after this period duration T, the next switch from the lower level to the higher level occurs, so that it spans between the two rising edges of the wavy setpoint 2. The shorter the T_ON period is compared to the period duration T, the smaller the average output power P_A formed thereby, which can be explained by the two enlarged diagrams in the middle and on the left below. Here, the setpoint curve 9 formed by the various positions of the method is shown.

[0056] In the second region, the successive setpoints 1 must be parallel to the value of D, so that according to Figure 1The description of the reduced average output power P_A can be formed. The duty cycle of the first region corresponds to the duty cycle at the seam position 12 where the pulse mode actually disappears. Therefore, it can be seen in the horizontal part of the dotted line that D is at a constant 100%.

[0057] As mentioned above, the entire second region is optional and only applies in the described manner when the output power P_A is to be generated in a waveform or pulse shape, i.e., when only the corresponding wavy setpoint value 2 is input. Without this, on the left side of the joint position 12, the value of D would also remain unchanged at 100%, U_H and U_L would not appear, and the output power P_A would extend continuously (all that is described in the subjunctive mood is not shown) and change proportionally with the setpoint value 1. This is the normal situation for all ohmic or other linear electrical loads, and is also the most common situation for light-emitting diodes as loads, because this will save the cost of generating the wavy setpoint value 2. At the same time, a modular construction possibility is presented, in which the basic module includes the necessary inputs for the control loop, the high-pass filter 3 and the continuous setpoint value 1, and in which the optional additional module (whose output is connected to the already prepared high-pass filter) is responsible for generating the wavy setpoint value 2.

[0058] If the light-emitting diodes provided for general lighting technology are to be dimmed very dark, for example, continuously dimmed to absolute darkness, or conversely dimmed steplessly from absolute darkness, then even the waveform or pulse shape of the output current (depicted in the measurement voltage 8) is expected, or the output power P_A in the left area just outlined is expected. This is because, if the same current is turned down to a very low level and is absolutely smoothed here, a lighting device with many light-emitting diodes connected in series and therefore running with the same current will get a coarse-grained impression. The reason lies in defects in the light-emitting diode crystals, which impose a separate minimum current on each individual light-emitting diode, which is still positive, and when it falls below this minimum current, the light-emitting diodes involved first become completely dark. Some light-emitting diodes are the first to do so, while another light-emitting diode may be the only one to emit light to the end. The optical performance of a lighting device equipped with many light-emitting diodes and running in this way is significantly affected. By the waveform of the LED current at these low brightnesses, all LEDs participating in the same lighting device emit almost the same brightness, but in a micro-pulsed manner, and, as is known, are further dimmed by reducing the duty cycle, which is smoothed by the eye into a continuously decreasing brightness. In addition, there is a positive flicker effect, because at very low brightnesses the human eye is accustomed to light sources flickering slightly, like, for example, a natural starry sky.

[0059] The method mentioned allows the light of the light-emitting diode to be directly adjusted by the duty cycle D at very low brightness of the light-emitting diode. The absolutely positive minimum current of the light-emitting diode (at which the light-emitting diode is absolutely dark) is input into the simmer level, which is represented by the lower voltage level U_L in the wavy set value 2. For reasons of speed, accuracy and avoiding mode changes, it is obviously advantageous not to completely switch off each time between the individual pulses of duration T_ON, but to allow a small current to flow through the light-emitting diode, which is less than the above-mentioned minimum current and is represented by the simmer level U_L in the wavy set value 2 and therefore represents a positive value of the sum set value 9 at the same time. As its essence, the continuous set value 1 for the average output power can be increased to this simmer level, the closer the desired brightness should be to absolute darkness.

[0060] Figure 6 A possible modification and expansion is shown as a second embodiment of the proposed method, for which the last two paragraphs of the description still apply (waveform-additional module, direct light control by waveform). However, as a difference, there is also a second joint position 13. On its left, there is a second region, which is described in the same way as above, but with the first difference that the higher voltage level U_H is especially reduced compared to the second region of the previous figure, and therefore the second difference that the duty cycle D starts from a higher value and decreases correspondingly more steeply with decreasing P_A, as the higher value "suggests" a continuous set value 1 for the average output power P_A at the joint position 13.

[0061] Here, between the first joint position 12 and the second joint position 13 which delimit the first region (which is constant, as known above), a third region is formed, which is characterized by a constant duty cycle D=1 / 2. The power reduction here is caused by the fact that the levels of the wavy setpoints U_H and U_L (both starting from the value of the continuous setpoint 1 at the joint position 12) decrease linearly, wherein the distance of the higher level U_H from the setpoint 1 is respectively equal to the distance of the lower level U_L from the same setpoint 1, but in a different direction. This leads to the duty cycle of the above-mentioned characteristics, which must remain constant in this exemplary third region. This third region is particularly meaningful for reducing the color change of light-emitting diodes, which are to be dimmed over a wide range.

[0062] Figure 7 Some features of the embodiments of the two previous figures are combined into the third embodiment of the proposed method. Figure 5 Only two regions are given and only one seam position 12. Also unchanged is that the first region is inherited from the first two figures. Figure 6A duty cycle D=1 / 2 is given, which should also apply to the side of the second region pointing to the left of the joint position 12. The purpose of this duty cycle is to immediately obtain the maximum ripple of the waveform, in particular the pulse shape, when entering the second region from the first region. In order for the lower level to drop immediately to the simmering level U_L on the same side of the joint position 12, in order to compensate for the sudden reduction to 1 / 2 duty cycle D, the higher level U_H must be at least twice the level of the continuous set value 1 at the joint position 12. In other respects, the second region here is similar to Figure 5 The area corresponds to that in , except that the higher level here is twice that there, and although the duty cycle D here decreases linearly to zero as there, the duty cycle here is only half as large as there.

[0063] Figure 8 The relationship between the duty cycle D, the upper setpoint level U_H and the lower setpoint level U_L is shown. Unlike the three previous figures, the desired average values ​​are identical here, and therefore the average output power P_A is also identical, which is why it is excluded here as an x-axis variable. The continuous setpoint 1, however, becomes a horizontal straight line. Here, the duty cycle D appears on the x-axis, and the point with a duty cycle of 100% includes all the first joint positions 12 mentioned above. It should be shown that even with different duty cycles D, the same average output power can be generated, even if its shape (as desired) deviates greatly from one another. Some necessary levels U_H and U_L are also shown.

[0064] Here, the pulse frequency, i.e. Figures 2 to 4 T in , as well as the edge height, i.e. the difference between U_H and U_L, should remain constant. The latter is illustrated by a constant distance between the line for U_H and the line for U_L. The former can be seen from the three enlarged diagrams on the left, in which the rising edges of the sum setting value 9 are at equal distances from each other. According to these boundary conditions, the duty cycle D decreases linearly further, resulting in a linearly increasing level for U_H and U_L, respectively. Other boundary conditions, such as "same degree of modulation at all duty cycles" or "area of ​​half pulses equal to the average value", give different level curves for U_H and U_L, which are not shown.

[0065] Fig. 9A possible circuit for a regulator is shown, with which the proposed method can be carried out. An operational amplifier 20 as the only active part of the regulator is surrounded by its negative feedback, which includes a series circuit of an integrating capacitor 14 and a negative feedback resistor 17, as shown above. The operational amplifier 20 is supplied by an internal auxiliary voltage VCC and is related to the circuit ground, which is also related to the circuit ground. At its output, to which the integrating capacitor 14 is also connected, a control variable 11 is output in the form of a voltage, thereby controlling the regulated object (here a clock-triggered electronic power converter with at least one light-emitting diode as load), which is to be controlled and stabilized by the regulator shown. The measured voltage 8 (here representing the output current and, due to the light-emitting diode load, the output power) is coupled to the negative regulation input of the operational amplifier 20 via a feedback resistor 16, to which a negative feedback resistor 17 is also coupled. The feedback resistor 16 corresponds to the second series impedance generally described above. The sum setpoint is coupled to the positive regulation input of the same operational amplifier 20 via an input resistor 15 (which corresponds to the first series impedance generally described above). A small inductor 21 is directly connected in series between the input resistor 15 and the positive adjustment input of the amplifier 20. The small inductor 21 can be a magnetic bead reactor made of ferrite and is used to block very high-frequency interference signals, for example, from telephone mobile communications. The same small inductor 22 is also connected between the negative adjustment input of the amplifier 20 and the point where the negative feedback resistor 17 and the feedback resistor 16 are connected to each other. Optionally, in order to more effectively block high-frequency interference, the two identical inductors 21 and 22 can also be coupled with the aid of a common magnetic bead 23, so that a common-mode choke is generated in the viewing direction of the two adjustment inputs of the amplifier 20. Figuratively speaking, the two input wires for the amplifier 20 then leave the magnetic bead 23 on their same end face side. The dotted box with the reference numeral 5b+10+6 illustrates that the box contains Figure 1 In particular, the subtraction point 5 b and the adjustment deviation 10 cannot be shown separately, because both occur in the operational amplifier 20 .

[0066] The continuous set value 1 can be fed as a voltage to a series resistor 30, the other end of which is connected to a summing point 5a, the voltage of which corresponds to the total set value, and is therefore also connected to the input resistor 15. A high-pass capacitor 3 is also connected to the summing point 5a as the simplest representation of the high-pass filter 3, into which a wavy set value 2 can be directly or via a second resistor (not shown) if a corresponding wavy output power is desired. If a continuous output power is desired, the high-pass capacitor 3 remains disconnected. Since there is no significant current inflow in principle into the input of the operational amplifier, neither the series resistor 30 nor the input resistor 15 contributes to the adjustment gain. On the other hand, the series resistor 30 completes the high-pass filtering of the wavy set value 2, because the current caused by it can flow back to the voltage source of the continuous set value 1 via the high-pass capacitor 3 via the series resistor 30.

[0067] The proportional control gain, i.e. the rapid voltage changes at the output of the amplifier 20 relative to the rapid voltage changes at its positive control input, is defined by the ratio of the sum of the feedback resistor 16 and the negative feedback resistor 17 to the feedback resistor 16. This is because such a current can flow from the low-ohmic output of the amplifier 20 in the negative feedback and feedback paths into the likewise low-ohmic measuring device connected to the point 8, which is proportional to the rapid voltage changes in the control variable 11.

[0068] The integral control gain in the case of a static control deviation, i.e. the slope of the control variable 11 in the case of a constant difference between the measured voltage 8 and the voltage at the positive control input at the same time, corresponds to the size of the control deviation divided by the product of the feedback resistor 16 and the integrating capacitor 14, which product simultaneously defines the time constant of the PI controller under consideration.

[0069] According to the two control gains, the significance of the feedback resistor 16 becomes clear. The lower the impedance of the feedback resistor is selected, the stronger and faster the reaction of the corresponding PI regulator is. If the feedback resistor does not exist and is replaced by a direct connection, the regulator will degenerate into a comparator, despite the presence of its negative feedback. If both gains are to be reduced at the same time, that is, the PI regulator reacts weakly and slowly to the set value change, only a higher ohm feedback resistor needs to be selected. Therefore, the feedback resistor 16 is included by the dashed box 5b+10+6, which is intended to illustrate the complete PI regulator. On the other hand, the relationship between the proportional and integral control gains is determined by the size ratio between the integral capacitor 14 and the negative feedback resistor 17. As a particularly advantageous design of the embodiment under study, the negative feedback resistor 17 is 100 kilo-ohms, the integral capacitor 14 is 22 nanofarads, the feedback resistor 16 is 100 ohms, the input resistor 15 is 10 kilo-ohms, the series resistor 30 is 22 nanofarads, and the high-pass capacitor 3 is 22 nanofarads.

[0070] If the amplifier 20 were bipolarly powered, i.e. its negative supply was not at circuit ground but at a lower potential, the regulator would have been complete. However, bipolar powering requires a dual auxiliary voltage circuit and is not popular in mass production. Therefore, the operational amplifier is usually powered by the same unipolar auxiliary voltage VCC as the entire surrounding passive circuit, which has been largely explained above. At very small set values ​​(which is common for deep dimming of light-emitting diodes), all signals of the operational amplifier at its input and output are at the edge of its supply voltage. Here, the amplifier becomes inaccurate and nonlinear, it starts to distort and noisier. This situation must be avoided in order to regulate more precisely to the lower edge of the desired regulation range. To this end, all signals can be artificially raised away from the lower edge of the supply voltage of the operational amplifier. The set value can be raised by a constant base or offset, but the fed-back measurement voltage 8 must also be artificially raised. For this purpose, starting from the internal auxiliary voltage VCC, there is a second branch in the direction of the circuit ground, which consists essentially of a pull-up resistor 19, a coupling resistor 18, a known feedback resistor 16 and a very low-ohmic current measuring device between point 8 and the circuit ground. A filter capacitor 29 is connected between the pull-up resistor 19 and the coupling resistor 18, the other end of which is also connected to the circuit ground. The increase in voltage at the negative input of the amplifier 20 caused by all this has no effect on the control accuracy, because this increase remains stored in the integrating capacitor 14 as an additional voltage. Only the continuous setpoint value 1 must be increased by an appropriate base. Particularly advantageous design dimensions of the second branch include: 47 kiloohms for the pull-up resistor 19, 10 nanofarads for the filter capacitor 29 and 15 kiloohms for the coupling resistor 18. The latter and the filter capacitor 29 also act as low-pass filters for negative feedback and feedback, so they must be taken into account when determining the control gain and time constant.

[0071] Finally, if the wave-shaped setpoint 2′ exists in an inverted form, or if it should adjust at least one wave-shaped desired output parameter in an inverted form, then according to the previous figure we obtain Fig.10. It is then particularly advantageous that the setpoint 2′ can be simply routed to the negative control input of the amplifier 20. The summing point 5a is thereby omitted, and the series resistor 30 is also omitted. Only the input resistor 15 remains as an external wiring for the continuous setpoint 1. The high-pass capacitor 3′, which is also required here, is now particularly advantageously connected precisely to the node 5a′, to which the previously mentioned filter capacitor 29 is already connected, which is omitted here. Similar to the low-ohmic measurement voltage 8 via the very important feedback resistor 16, the wavy setpoint 2′ must also be connected to the negative control input of the amplifier 20 via a series impedance. This task is now taken over by the coupling resistor 18, whose value can therefore vary relative to the above value, and for the wavy setpoint 2′, it produces a control gain that may differ from the above value. Here, instead of the omitted series resistor 30, the pull-up resistor 19 completes the high-pass filtering of the wavy setpoint 2′.

[0072] Reference numerals list

[0073] 1Continuous setpoint, related voltage, related input terminal or related wire

[0074] 2 Wave-shaped set values, related voltages, related input terminals or related conductors, respectively, non-inverting or non-inverting

[0075] 2′ wave-shaped set value, related voltage, related input terminal or related wire, respectively reversed or inverted

[0076] 3 High-pass filter or high-pass capacitor, non-inverting

[0077] 3′ high pass capacitor, inverting

[0078] 4 High-pass filtered voltage generated by the wave-shaped set value

[0079] 5Summing point, non-inverting

[0080] 5a′ Summing point, inverted

[0081] 5b Subtraction point

[0082] 6PI regulator

[0083] 7 Linear and linear delay objects

[0084] 8Measure voltage or related input or output power or output current

[0085] 9 set value or total set value

[0086] 10 Adjustment deviation

[0087] 11 Output of operational amplifier or adjustment parameter

[0088] 12 First seam position

[0089] 13 Second seam position

[0090] 14 Integrating capacitor

[0091] 15 Input resistance or first series impedance

[0092] 16 Feedback resistor or second series impedance

[0093] 17 Negative feedback resistor

[0094] 18 Coupling resistor

[0095] 19 Pull-up resistor

[0096] 20 Operational Amplifiers

[0097] 21 A small inductor connected in series with the positive input terminal of amplifier 20

[0098] 22 A small inductor connected in series with the negative input terminal of amplifier 20

[0099] 23 Possible coupling between inductors 21 and 22

[0100] 29 filter capacitor

[0101] 30 series resistor

Claims

1. A method for regulating a clock-triggered power converter, wherein the power converter has: Input terminal, used to input input power, Output terminal, used to output the regulated output power, a control loop which is optimized for regulating to a predetermined continuous output power; and at least one first input and a second input for inputting setpoints and a regulator, in, at least one first set value specifies a value for the continuous output power, wherein at least one second setting value can be input, which gives a waveform, and The sum of all setpoints at the input forms a total setpoint, which is input into the regulator, The method is characterized in that: inputting the first set value into the first input terminal, inputting a second set value having a waveform into the second input terminal, The second setpoint is adjusted by means of a DC-blocking high-pass filter so that the average value of the sum setpoint corresponds to the value of the first setpoint, adding the first setting value and the second setting value to obtain the total setting value, inputting the summed set value into the regulating loop so as to output an output power having a waveform qualitatively comparable to the second set value at the output terminal of the power converter, Therein, the average value of the output power corresponds to the value of the continuous output power given by the first setting value.

2. The method according to claim 1, characterized in that Regardless of whether the output power is continuous or modulated using a waveform, the average value of the output power remains constant.

3. The method according to claim 1, characterized in that Inputting a second set value for the waveform at the second input terminal is optional, wherein the first set value is input in the form of a continuous voltage, and wherein the second set value can be input in the form of a corresponding wave-shaped voltage.

4. The method according to claim 1, characterized in that: The power converter generates continuous output power when a second set value for a waveform is not input to the second input terminal.

5. The method according to claim 1, characterized in that The second set value has a temporal minimum value that deviates from the average value of its waveform by an amount smaller than the first set value.

6. The method according to claim 1, characterized in that The waveform is substantially rectangular, the second set value is a set value for the waveform, and the edge height of the adjusted output power depends on the edge height of the second set value.

7. The method according to claim 6, characterized in that The edge height of the regulated output power depends on the average value of the regulated output power and on the duty cycle of the pulse mode.

8. The method according to claim 6, characterized in that The edge height of the output power to be regulated is constant.

9. The method according to claim 5, characterized in that The frequency of the waveform or pulse pattern is in the range of 500 Hz to 10 kHz.

10. The method according to claim 1, characterized in that The regulated output power is used to regulate an output current of the electronic power converter.

11. A circuit arrangement for regulating a clock-triggered power converter, the power converter having an input terminal for inputting input power and an output terminal for outputting regulated output power, characterized in that The circuit arrangement comprises: a control loop which is optimized for regulating to a given continuous output power; and at least one first input and a second input for inputting setpoints and a regulator, at least one operational amplifier as part of a control loop, the operational amplifier having a first non-inverting input and a second inverting input, a compensation network as part of the control loop extending from the output of the operational amplifier to one of the inputs of the operational amplifier, wherein the compensation network has a third input for a measurement signal of the output power to be regulated, wherein the third input forwards the measurement signal via a second series impedance to the first control input or the second control input, wherein the first input is configured to input a signal for a first set value for the average value of the output power to be adjusted, and the first input forwards the signal to one of the inputs of the operational amplifier via a first series impedance, The second input terminal is configured to input a signal of a second set value for the waveform of the output power to be regulated, wherein the circuit device is configured to forward the signal of the second set value to one of the input terminals of the operational amplifier via a DC-blocking high-pass filter.

12. The circuit arrangement according to claim 11, characterized in that The circuit arrangement is configured to block the average value of the second setpoint by means of the high-pass filter and to add only the AC portion of the second setpoint to the first setpoint, so that the average value of the output power given by the first setpoint is not changed by the second setpoint.

13. The circuit arrangement according to claim 11, characterized in that The high pass filter is at least one series capacitor.

14. The circuit arrangement according to claim 11, characterized in that The second setpoint is generated in a circuit module that can be coupled to the second input.

15. The circuit arrangement according to claim 11, characterized in that The negative feedback network includes at least one integrating capacitor and a negative feedback resistor connected in series therewith, wherein the negative feedback resistor and the second series impedance together generate a proportional gain of the regulating amplifier, wherein the proportional gain is designed for the highest predetermined edge height of the desired waveform.

16. The circuit arrangement according to claim 11, characterized in that The circuit arrangement as a whole or in part is realized integrated in an ASIC or FPGA, or the circuit arrangement as a whole or in part is digitally integrated into the program of a microcontroller or a control or regulating IC of a clocked power converter.

17. An operating device for a light emitting diode, characterized in that The operating equipment comprises: at least one clock-triggered power converter, and At least one circuit arrangement according to claim 11 for regulating the clocked power converter.

18. A lighting system comprising: Light Emitting Diodes; as well as The operating device according to claim 17.

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