An ultrasonic transducer high-voltage driving circuit and method for suppressing ultrasonic wave tailing

Abstract

The application discloses an ultrasonic transducer high-voltage driving circuit and method for inhibiting ultrasonic wave tailing, which can be modeled as S=S1+S2 for the ultrasonic wave emitted by the ultrasonic transducer, wherein S is the ultrasonic wave generated by a single transmitting excitation signal of the transducer, S1 is a main energy form in the ultrasonic wave, and S2 is tailing caused by free damping vibration of residual energy in the ultrasonic transducer due to electrical damping and mechanical damping vibration. At a proper time, the ultrasonic transducer is excited by a lower voltage to generate an ultrasonic wave S2' with the same amplitude as S2 and a phase difference of half a period. According to the superposition principle, superposition of S2' and S2 introduced according to the superposition principle can significantly weaken S2 so that the ultrasonic wave only remains the original S1. The application drives the ultrasonic transducer by two high-voltage narrow pulses with a phase difference and unequal amplitudes, and achieves the purpose of weakening ultrasonic wave tailing according to the superposition principle, thereby improving the time resolution of the probe signal transmitted by the transducer.

Description

Technical Field

[0001] This invention relates to the field of ultrasonic transducer technology, and in particular to a high-voltage drive circuit and method for ultrasonic transducers that suppresses ultrasonic wave tailing. Background Technology

[0002] Traditional ultrasonic transducers operate by using a pulse transformer to generate high-voltage pulses that excite the piezoelectric ceramics inside the transducer, converting electrical energy into acoustic energy to generate ultrasonic waves. However, due to the inherent characteristics of piezoelectric ceramic ultrasonic transducers, not all the energy received can be released in a short time. Under the influence of electrical and mechanical damping vibrations, the transducer undergoes free damped vibrations, resulting in the phenomenon of ultrasonic wave tailing. This phenomenon can affect the acquisition and analysis of ultrasonic signals to some extent.

[0003] Piezoelectric ultrasonic transducers are used in various ultrasonic testing scenarios, and different ultrasonic testing equipment often requires different ultrasonic transducer driving schemes. However, ultrasonic transducers cannot release all the received energy in a short time. Under the influence of electrical and mechanical damping vibrations, the transducer generates free damped vibrations, resulting in the phenomenon of ultrasonic wave tailing. To improve the quality of the ultrasonic signal, it is necessary to weaken the ultrasonic wave tail.

[0004] Due to the working principle of pulse transformers, using traditional pulse transformers to drive ultrasonic transducers generates significant electromagnetic interference, affecting surrounding equipment. The driving method using pulse transformers to generate high-voltage pulses is limited by the type of pulse transformer, making it difficult to control and adjust parameters such as the transmission time, amplitude, and other parameters of the high-voltage pulse waveform. Traditional single-transmitter driving methods exhibit long-duration tail oscillations in the emitted ultrasonic waves, affecting the temporal resolution of the detected waveform. Summary of the Invention

[0005] The purpose of this invention is to provide a high-voltage drive circuit and method for ultrasonic transducers that suppresses ultrasonic wave tailing.

[0006] The technical solution adopted in this invention is:

[0007] A high-voltage drive circuit for an ultrasonic transducer to suppress ultrasonic wave tailing includes two parallel high-voltage multiplier circuits. Each parallel high-voltage multiplier circuit has two pulse signal input terminals, one voltage input terminal, and a load connection terminal. The two load connection terminals of the two high-voltage multiplier circuits are connected one-to-one to the two ends of the load. Each high-voltage multiplier circuit includes MOSFETs Q1 and Q2. The gate of MOSFET Q1 is connected to a pulse signal input terminal, the drain of MOSFET Q1 is connected to a DC power supply and one end of resistor R1, and the source of MOSFET Q1 is connected to one end of resistor R2. The other end of resistor R2 is connected to diode D. The positive terminal of circuit 1 is connected to the gate of MOSFET Q2, which is connected to another pulse signal input terminal. The drain of MOSFET Q2 is connected to the other end of resistor R1 and one end of capacitor C1. The other end of capacitor C1 is connected to the negative terminal of diode D1 and the positive terminal of diode D2. The source of MOSFET Q2 and the negative terminal of diode D2 are grounded. The two ends of resistor R2 are used as load connection terminals. The two high-voltage multiplier circuits are each connected to independent DC power supplies. One high-voltage multiplier circuit generates a high-voltage pulse first excitation signal after the first pulse signal is received. The other high-voltage multiplier circuit is delayed by T after the first pulse signal is received. S A second pulse signal is then input after a certain time to generate a second high-voltage pulse excitation signal to eliminate the tailing. The pulse width of the second pulse signal is the same as that of the first pulse signal.

[0008] Furthermore, parasitic diodes are connected in series between the drain and source of each MOSFET Q1 and MOSFET Q2.

[0009] Furthermore, the pulse widths of the first and second pulse signals are half the period of the original ultrasonic signal of the ultrasonic transducer.

[0010] Furthermore, the two pulse signal input terminals of one of the high-voltage multiplier circuits are respectively connected to pulse signals with a pulse width of T / 2 to generate pulses with a width of T / 2 and an amplitude of V. A1 The first excitation signal is a high-voltage pulse, where T is the signal oscillation period of the ultrasonic transducer; the two pulse signal inputs of another high-voltage multiplier circuit are respectively connected to pulse signals with a pulse width of T / 2 to generate pulses with a width of T / 2 and an amplitude of V. A2 The high-voltage pulse is the second excitation signal, and T is the signal oscillation period of the ultrasonic transducer; V A1 V is twice the amplitude of the DC power supply in one of the high-voltage multiplier circuits. A2 It is twice the amplitude of the DC power supply of another high-voltage voltage multiplier circuit.

[0011] Furthermore, the delay time T s The calculation formula is as follows:

[0012] T s =T D +T / 2=(n+1 / 2)T

[0013] Where T is the signal oscillation period of the ultrasonic transducer; T D There exists a time interval T between the peak values ​​of the envelopes of the ultrasound signal S1 (without tail) and the tailed signal S2 under single-pulse excitation. D The inherent parameter T after the transducer is manufactured. D =nT; n is T D A multiple of T.

[0014] Furthermore, the voltage amplitude of the second pulse signal is determined based on the amplitude of the tail signal S2 under single-pulse excitation and the relationship k between the excitation voltage Vs of the ultrasonic transducer and the amplitude voltage Vu of the generated received ultrasonic wave, and according to the formula V s =kV u The conclusion is as follows.

[0015] A high-voltage driving method for an ultrasonic transducer to suppress ultrasonic wave tailing, employing the aforementioned high-voltage driving circuit for an ultrasonic transducer to suppress ultrasonic wave tailing, includes the following steps:

[0016] Step 1: Acquire the original ultrasonic signal S from the ultrasonic transducer, and decompose the ultrasonic signal S into a tailless ultrasonic signal S1 and a tailed signal S2 under single-pulse excitation, i.e.

[0017] S = S1 + S2 (1)

[0018] Step 2, obtain the transducer's inherent parameter time interval T D T D There is a time interval between the peak values ​​of the envelope of the tailless ultrasonic signal S1 and the tailed signal S2 under single-pulse excitation, and T D = n*T, where T is the signal oscillation period of the ultrasonic transducer; n is the value of T. D A multiple of T;

[0019] Step 3: Calculate and obtain the second pulse excitation signal S2' to eliminate the tail, i.e., S2' = -S2; the waveform of S2' is the same as S2 in amplitude, but differs from S2 in phase by 1 / 2 of the signal oscillation period T of the ultrasonic transducer.

[0020] Step 4: Calculate the time delay T of the second pulse excitation signal S2' relative to the waveform of the first pulse signal. s The calculation formula is as follows:

[0021] T s =T D +T / 2=(n+1 / 2)T (5)

[0022] Step 5: The two pulse signal input terminals of one of the high-voltage multiplier circuits are respectively connected to the first pulse signal to generate the first excitation signal of the high-voltage pulse.

[0023] Step 6, after the first pulse signal is applied to one of the high-voltage multiplier circuits, there is a delay T. S After a certain time, the two pulse signal input terminals of another high-voltage multiplier circuit are connected to the second pulse signal to generate a second high-voltage pulse excitation signal. The pulse width of the second pulse signal is the same as that of the first pulse signal, and the voltage amplitude of the second pulse signal should be based on the amplitude of the S2 signal and the relationship k between the excitation voltage Vs of the ultrasonic transducer and the amplitude voltage Vu of the generated received ultrasonic wave, and according to the formula V s =kV u It can be concluded that;

[0024] Step 7: The first high-voltage pulse excitation signal and the second high-voltage pulse excitation signal are superimposed and output to drive the load.

[0025] Furthermore, the pulse widths of the first and second pulse signals are half the period of the original ultrasonic signal of the ultrasonic transducer.

[0026] Furthermore, in step 5, the two pulse signal input terminals of one of the high-voltage multiplier circuits are respectively connected to a first pulse signal with a pulse width of T / 2 to generate a pulse with a width of T / 2 and an amplitude of V. A1 The first excitation signal of the high voltage pulse.

[0027] Furthermore, step 6 involves a delay T after the first pulse is applied to one of the high-voltage multiplier circuits. S After a certain time, the two pulse signal input terminals of another high-voltage multiplier circuit are respectively connected to a second pulse signal with a pulse width of T / 2 to generate a pulse with a width of T / 2 and an amplitude of V. A2 The second excitation signal of the high voltage pulse.

[0028] This invention employs the above technical solution to propose a secondary excitation after the initial excitation to suppress continuous vibration of the ultrasonic transducer, thereby achieving the effect of suppressing ultrasonic wave tailing. To achieve this method, a high-voltage voltage multiplier transmitting circuit capable of generating two pulse excitations of different amplitudes consecutively within a short period of time is proposed. This circuit can generate two short-duration, high-voltage controllable excitation signals while meeting the high-voltage drive requirements of the ultrasonic transducer. After the driver implements this cancellation method, the temporal resolution of the emitted ultrasonic wave is significantly improved. Attached Figure Description

[0029] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments;

[0030] Figure 1Schematic diagram of an air-coupled ultrasonic testing device;

[0031] Figure 2 This is a schematic diagram of the decomposition of ultrasound excited by a single pulse.

[0032] Figure 3 This is a comparative diagram of the waveforms S2' and S2;

[0033] Figure 4 This is a schematic diagram of a high-voltage voltage multiplier circuit.

[0034] Figure 5 This is a schematic diagram of the input signal and output voltage;

[0035] Figure 6 This is a schematic diagram of a high-voltage drive circuit for an ultrasonic transducer that suppresses ultrasonic wave tailing according to the present invention.

[0036] Figure 7 This is a timing diagram of the input signal and output pulse. Implementation

[0037] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings.

[0038] like Figures 1 to 7 As shown in the figure, this invention discloses a high-voltage driving circuit and method for suppressing ultrasonic wave tailing in an ultrasonic transducer. It includes two parallel high-voltage multiplier circuits, each having two pulse signal input terminals, one voltage input terminal, and a load connection terminal. The two load connection terminals of the two high-voltage multiplier circuits are connected one-to-one to the two ends of the load. Each high-voltage multiplier circuit includes a MOSFET Q1 and a MOSFET Q2. The gate of MOSFET Q1 is connected to a pulse signal input terminal, the drain of MOSFET Q1 is connected to a DC power supply and one end of resistor R1, and the source of MOSFET Q1 is connected to one end of resistor R2. One terminal is connected to the positive terminal of diode D1, and the gate of MOSFET Q2 is connected to the other pulse signal input terminal. The drain of MOSFET Q2 is connected to the other end of resistor R1 and one end of capacitor C1. The other end of capacitor C1 is connected to the negative terminal of diode D1 and the positive terminal of diode D2. The source of MOSFET Q2 and the negative terminal of diode D2 are grounded. The two ends of resistor R2 are used as load connection terminals. The two high-voltage multiplier circuits are each connected to an independent DC power supply. One high-voltage multiplier circuit generates a high-voltage pulse first excitation signal after receiving the first pulse signal, and the other high-voltage multiplier circuit delays the first pulse signal by T after receiving the first pulse signal from the first high-voltage multiplier circuit. SA second pulse signal is then input after a certain time to generate a second high-voltage pulse excitation signal to eliminate the tailing. The pulse width of the second pulse signal is the same as that of the first pulse signal.

[0039] Furthermore, parasitic diodes are connected in series between the drain and source of each MOSFET Q1 and MOSFET Q2.

[0040] Furthermore, the pulse widths of the first and second pulse signals are half the period of the original ultrasonic signal of the ultrasonic transducer.

[0041] Furthermore, the two pulse signal input terminals of one of the high-voltage multiplier circuits are respectively connected to pulse signals with a pulse width of T / 2 to generate pulses with a width of T / 2 and an amplitude of V. A1 The first excitation signal is a high-voltage pulse, where T is the signal oscillation period of the ultrasonic transducer; the two pulse signal inputs of another high-voltage multiplier circuit are respectively connected to pulse signals with a pulse width of T / 2 to generate pulses with a width of T / 2 and an amplitude of V. A2 The high-voltage pulse is the second excitation signal, and T is the signal oscillation period of the ultrasonic transducer; V A1 V is twice the amplitude of the DC power supply in one of the high-voltage multiplier circuits. A2 It is twice the amplitude of the DC power supply of another high-voltage voltage multiplier circuit.

[0042] Furthermore, the delay time T s The calculation formula is as follows:

[0043] T s =T D +T / 2=(n+1 / 2)T

[0044] Where T is the signal oscillation period of the ultrasonic transducer; T D There exists a time interval T between the peak values ​​of the envelopes of the ultrasound signal S1 (without tail) and the tailed signal S2 under single-pulse excitation. D The inherent parameter T after the transducer is manufactured. D =nT; n is T D A multiple of T.

[0045] Furthermore, the voltage amplitude of the second pulse signal is determined based on the amplitude of the tail signal S2 under single-pulse excitation and the relationship k between the excitation voltage Vs of the ultrasonic transducer and the amplitude voltage Vu of the generated received ultrasonic wave, and according to the formula V s =kV u The conclusion is as follows.

[0046] A high-voltage driving method for an ultrasonic transducer to suppress ultrasonic wave tailing, employing the aforementioned high-voltage driving circuit for an ultrasonic transducer to suppress ultrasonic wave tailing, includes the following steps:

[0047] Step 1: Acquire the original ultrasonic signal S from the ultrasonic transducer, and decompose the ultrasonic signal S into a tailless ultrasonic signal S1 and a tailed signal S2 under single-pulse excitation, i.e.

[0048] S = S1 + S2 (1)

[0049] Step 2, obtain the transducer's inherent parameter time interval T D T D There is a time interval between the peak values ​​of the envelope of the tailless ultrasonic signal S1 and the tailed signal S2 under single-pulse excitation, and T D = n*T, where T is the signal oscillation period of the ultrasonic transducer; n is the value of T. D A multiple of T;

[0050] Step 3: Calculate and obtain the second pulse excitation signal S2' to eliminate the tail, i.e., S2' = -S2; the waveform of S2' is the same as S2 in amplitude, but differs from S2 in phase by 1 / 2 of the signal oscillation period T of the ultrasonic transducer.

[0051] Step 4: Calculate the time delay T of the second pulse excitation signal S2' relative to the waveform of the first pulse signal. s The calculation formula is as follows:

[0052] T s =T D +T / 2=(n+1 / 2)T (5)

[0053] Step 5: The two pulse signal input terminals of one of the high-voltage multiplier circuits are respectively connected to the first pulse signal to generate the first excitation signal of the high-voltage pulse.

[0054] Step 6, after the first pulse signal is applied to one of the high-voltage multiplier circuits, there is a delay T. S After a certain time, the two pulse signal input terminals of another high-voltage multiplier circuit are connected to the second pulse signal to generate a second high-voltage pulse excitation signal. The pulse width of the second pulse signal is the same as that of the first pulse signal, and the voltage amplitude of the second pulse signal should be based on the amplitude of the S2 signal and the relationship k between the excitation voltage Vs of the ultrasonic transducer and the amplitude voltage Vu of the generated received ultrasonic wave, and according to the formula V s =kV u It can be concluded that;

[0055] Step 7: The first high-voltage pulse excitation signal and the second high-voltage pulse excitation signal are superimposed and output to drive the load.

[0056] Furthermore, the pulse widths of the first and second pulse signals are half the period of the original ultrasonic signal of the ultrasonic transducer.

[0057] Furthermore, in step 5, the two pulse signal input terminals of one of the high-voltage multiplier circuits are respectively connected to a first pulse signal with a pulse width of T / 2 to generate a pulse with a width of T / 2 and an amplitude of V. A1 The first excitation signal of the high voltage pulse.

[0058] Furthermore, step 6 involves a delay T after the first pulse is applied to one of the high-voltage multiplier circuits. S After a certain time, the two pulse signal input terminals of another high-voltage multiplier circuit are respectively connected to a second pulse signal with a pulse width of T / 2 to generate a pulse with a width of T / 2 and an amplitude of V. A2 The second excitation signal of the high voltage pulse.

[0059] The working principle of this invention will be explained in detail below:

[0060] For conventional air-coupled ultrasonic testing devices such as Figure 1 As shown, the testing system uses a high-voltage pulse to excite the transmitting transducer, causing it to generate ultrasonic waves that are emitted towards the test piece. After passing through the test piece, the ultrasonic waves carry information about the internal structure of the part to the receiving transducer, which then converts the received ultrasonic waves into a received signal for analysis. The quality of the received signal is one of the key factors in accurately analyzing the test piece; therefore, improving the quality of the received signal is of great significance to the ultrasonic testing system.

[0061] This invention analyzes the received signal and proposes an ultrasonic transducer driving method to suppress ultrasonic wave tailing based on the signal's morphology. The core idea is to use two high-voltage narrow pulses with phase difference and unequal amplitudes to drive the ultrasonic transducer, achieving the goal of weakening the ultrasonic wave tail based on the superposition principle. The ultrasonic wave emitted by the transducer can be modeled as: S = S1 + S2, where S is the ultrasonic wave generated by the transducer with a single transmitted excitation signal, S1 is the main energy form represented by the ultrasonic wave, and S2 is the tail caused by the residual energy in the ultrasonic transducer due to free damping vibration caused by electrical and mechanical damping. If, at an appropriate time, the ultrasonic transducer is excited again with a lower voltage to generate an ultrasonic wave S2' with the same amplitude as S2 but a phase difference of 1 / 2 cycle, the superposition of S2' with S2 according to the superposition principle significantly weakens S2, leaving only the original S1 as the ultrasonic wave. This method effectively eliminates transmitted wave tail oscillations and improves the temporal resolution of the transducer's transmitted detection signal.

[0062] The operating frequency of an ultrasonic transducer during production, which is the frequency of the ultrasonic waves emitted by the transducer, is fixed at f, and the oscillation period is T, where T = 1 / f. When a single high-voltage pulse drives the ultrasonic transducer, the ultrasonic waves emitted by the transducer can be modeled. Using V...A1 An ultrasonic signal S is obtained by applying a pulse excitation of amplitude and width T / 2 to the transducer. The ultrasonic signal S is decomposed into two parts, S1 and S2. S1 is the desired narrow-time-width ultrasonic wave without tailing, and S2 is the tailed signal under single-pulse excitation. Figure 1 The figure shows a schematic diagram of the signal S and its decomposed waveforms.

[0063] There is a T between the envelope peak values ​​of S1 and S2. D The time interval, T D These are inherent parameters of the transducer after manufacturing. T is the signal oscillation period, which is the reciprocal of the ultrasonic oscillation frequency. D It is n times T, that is, T D =nT.

[0064] The decomposition of S can be expressed by the following formula:

[0065] S = S1 + S2 (1)

[0066] The ultrasonic tail S2 will increase the detection blind zone and reduce the time resolution of the detection system.

[0067] The present invention proposes to weaken S2 by means of the following method.

[0068] To obtain ultrasound without trailing, rearrange (1) to get:

[0069] S1=S-S2=S+(-S2) (2)

[0070] According to formula (2), if the system can be excited by the first pulse after the transducer is applied, then after T... D After a delay, the second pulse signal excites the transducer again, and the ultrasonic signal S2' generated by the second pulse excitation is equal to -S2, that is...

[0071] S2'=-S2 (3)

[0072] Substituting (3) into (2), we get:

[0073] S1=S-S2=S+(S2') (4)

[0074] That is, it can be achieved by having T twice. D The delayed pulse excitation signal generates a narrow-width ultrasonic wave to overcome the tailing phenomenon. To achieve (3), the waveform of S2' is the same as S2 in amplitude, but differs from S2 in phase by 1 / 2 cycle, and is delayed by Td time compared to S1. The waveform diagrams of S2' and S2 are shown below. Figure 2 As shown.

[0075] Calculation of Second Pulse Excitation Parameters: The key to whether this invention can successfully reduce the trailing effect lies in whether the second pulse excitation can obtain the S2' signal or its approximate signal. Analysis of the characteristics of S2' shows that S2' has the same frequency and amplitude as S2. The time difference between S2' and S2 is T / 2, and the maximum value of the positive wave of S2 corresponds to the maximum value of the negative wave of S2'. The pulse excitation signal can be deduced by using the characteristics of S2'. The delay time T of the excitation signal relative to the first pulse signal wave... s It should be:

[0076] T s =T D +T / 2=(n+1 / 2)T (5)

[0077] Delay T after the first pulse signal is emitted s By issuing a second pulse signal, it can be ensured that the difference between S2' and S2 is T / 2.

[0078] Within the normal operating voltage range of the transducer, the pulse excitation voltage Vs has a linear relationship with the amplitude voltage Vu of the received ultrasonic wave.

[0079] V s =kV u (6)

[0080] k is a proportionality coefficient, which can be obtained from a manual or through experiments.

[0081] According to (6), when the amplitude of the S2 signal is A2, the excitation voltage V is required for the second pulse signal to obtain the S2' signal with amplitude A2. A2 for:

[0082] V A2 =kA2 (7)

[0083] The signal S2' should be the same as the S signal, and the second pulse signal can be set to have the same pulse width as the first pulse signal. The excitation pulse voltage amplitude of the S2' signal is V. A2 The width of the second excitation pulse should be the same as that of the S-signal. Based on the above modeling and analysis, it is known that after excitation by the first pulse signal, a second pulse signal is applied to the transducer after a delay to suppress tailing. The key to achieving this method lies in the ultrasonic transducer driver proposed in this invention, which can generate two high-voltage pulse excitation signals with controllable voltage amplitude, pulse width, and transmission time. Specific requirements are as follows:

[0084] (1) To achieve controllable voltage amplitude, pulse width, and trigger time of the high-voltage pulse excitation signal, this invention proposes a circuit topology for generating a high-voltage multiplier ultrasonic excitation signal based on the RC charging and discharging principle and the coordinated operation of switching transistors. This topology is particularly suitable for voltage multiplication applications above 150V DC. Using this topology, a superimposed excitation of a square wave positive voltage excitation and a sharp pulse negative voltage excitation can be generated through switching transistor control, thereby obtaining an ultrasonic transducer excitation signal with twice the input voltage. This reduces the DC power supply voltage requirement of the ultrasonic transmitter driver. For example, to generate a 600V DC transducer excitation signal, the system only needs to input a 300V DC power supply voltage using this topology. The high-voltage multiplier circuit is shown in Figure 4.

[0085] In the circuit, when the control pulses of MOSFETs Q1 and Q2 are pulled low, the switching transistors are turned off, and capacitor C1 is charged until its voltage equals the input DC power supply voltage. When a pulse needs to be transmitted, the control pulses of MOSFETs Q1 and Q2 are simultaneously pulled high, and both switching transistors turn on simultaneously upon receiving the control signal. When MOSFET Q2 turns on, the positive voltage of capacitor C1 is pulled down to 0V. Since capacitors cannot undergo voltage jumps, a voltage surge is applied to the load. At the same time, since MOSFET Q1 also turns on simultaneously, its positive voltage is directly applied to the load, superimposing with the high-voltage pulse. This results in a high-voltage pulse with a peak value twice the input voltage, which is then connected to the ultrasonic transducer through the matching resistor R2.

[0086] Based on the above analysis, the timing diagram of the circuit's input signal and output voltage is as follows: Figure 5 As shown. When either E1 or E2 is input as a trigger pulse, the circuit will generate a voltage of V. A2 A high-voltage pulse of equal width of / 2; and when pulses are input simultaneously to E1 and E2, the circuit will generate a voltage of V. A2 A high-voltage pulse of equal width can be generated. This circuit allows for controllable high-voltage pulse excitation signal voltage amplitude and pulse width.

[0087] (2) In order to generate two high-voltage pulse excitation signals with controllable pulse widths and ensure that the second excitation signal lags the first excitation signal controllably, this invention, based on the above-mentioned high-voltage multiplier circuit, designs a high-voltage drive circuit for an ultrasonic transducer to suppress ultrasonic tailing according to the ultrasonic wake suppression method. For example... Figure 6 The circuit shown connects two high-voltage multiplier circuits, L1 and L2, in parallel to the ultrasonic transducer. Since each multiplier circuit does not affect the external circuit when its switching transistor is off, the two multiplier circuits can operate independently, outputting independent high-voltage pulses to drive the ultrasonic transducer. The output voltage amplitude is determined by the independent DC power supply V for each circuit. A1 V A2The output pulse width and the time interval between two pulses are determined by the four input signals E1, E2, E3, and E4. The timing diagram of the input signals and output pulses is shown below. Figure 7 As shown. Signals E1 and E2 are first input to circuit L1 with a pulse width of T / 2, generating a pulse width of T / 2 and an amplitude of V. A1 The high-voltage pulse first excites the ultrasonic transducer, and after a delay of T... S After a certain time, signals E3 and E4 are input into circuit L2 with a pulse width of T / 2, generating pulses with a width of T / 2 and an amplitude of V. A2 The high-voltage pulse is then used to re-excite the ultrasonic transducer. Based on the above analysis, the ultrasonic transducer can be re-excited by these two high-voltage pulses with different phases and amplitudes to reduce the ultrasonic wave tail.

[0088] This invention adopts the above technical solution and proposes a circuit topology for generating high-voltage ultrasonic excitation signals using the RC charging and discharging principle and the coordinated operation of switching transistors. It is particularly suitable for voltage multiplication applications above 150V DC. Using this topology, a superimposed excitation of a square wave positive voltage excitation and a sharp pulse negative voltage excitation can be generated through switching transistor control, thereby obtaining an ultrasonic transducer excitation signal with twice the input voltage. This reduces the DC power supply voltage requirements of the ultrasonic transmitter driver. The core idea of ​​this invention is to use two high-voltage narrow pulses with phase difference and unequal amplitude to drive the ultrasonic transducer, achieving the purpose of weakening the ultrasonic wave trailing based on the superposition principle. The ultrasonic wave emitted by the ultrasonic transducer can be modeled as: S = S1 + S2, where S is the ultrasonic wave generated by the transducer in a single transmission excitation signal, S1 is the main energy form represented by the ultrasonic wave, and S2 is the trailing caused by the residual energy in the ultrasonic transducer due to free damping vibration under the action of electrical and mechanical damping vibration. If, at an appropriate time, a lower voltage is applied to excite the ultrasonic transducer again, causing it to generate an ultrasonic wave S2' with the same amplitude as S2 but a phase difference of 1 / 2 cycle, the superposition of S2' and S2, introduced according to the superposition principle, will significantly weaken S2, leaving only the original S1 in the ultrasonic wave. This method effectively eliminates the wake oscillation of the transmitted wave, improving the temporal resolution of the transducer's transmitted detection signal. Based on the ultrasonic wake suppression method, this invention designs a high-voltage drive circuit for an ultrasonic transducer to suppress ultrasonic wake trailing. This circuit connects two high-voltage multiplier circuits in parallel. Since each multiplier circuit does not affect the external circuit when the switching transistor is off, the two multiplier circuits in the diagram can operate independently. The pulse voltage amplitude output by the multiplier circuit is determined by the independent DC power supply of each circuit, while the output pulse width and the time interval between two pulses are determined by the control signal of the MOSFET. The circuit uses the input control signal to control the two sets of multiplier circuits respectively. Because the input voltages of the two sets of circuits are different, this circuit can generate two high-voltage spike pulses with phase difference and unequal amplitudes according to the control logic to excite and drive the ultrasonic transducer. This circuit can effectively reduce the trailing of ultrasonic waves, and the proposed method has good potential in high-precision ultrasonic measurement applications.

[0089] This invention generates high-voltage narrow pulses to drive an ultrasonic transducer without the need for a pulse transformer. This avoids the use of a pulse transformer, thus preventing electromagnetic interference and making the output waveform easier to control. Based on the driving principle of piezoelectric ceramic ultrasonic transducers, this invention combines the superposition principle with two high-voltage narrow pulses of unequal amplitude and phase difference to drive the ultrasonic transducer, thereby reducing the ultrasonic wave trailing phenomenon.

[0090] Obviously, the described embodiments are only a part of the embodiments of this application, not all of them. Without conflict, the embodiments and features in the embodiments of this application can be combined with each other. The components of the embodiments of this application described and illustrated herein can generally be arranged and designed in various different configurations. Therefore, the detailed description of the embodiments of this application is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

Claims

1. A high-voltage driving method for an ultrasonic transducer to suppress ultrasonic wave tailing, comprising a high-voltage driving circuit for the ultrasonic transducer including two parallel high-voltage multiplier circuits. Each of the two parallel high-voltage multiplier circuits has two pulse signal input terminals, one voltage input terminal, and a load connection terminal. The two load connection terminals of the two high-voltage multiplier circuits are connected one-to-one to the two ends of the load. Each high-voltage multiplier circuit includes a MOSFET Q1 and a MOSFET Q2. The gate of MOSFET Q1 is connected to a pulse signal input terminal, the drain of MOSFET Q1 is connected to a DC power supply and one end of resistor R1, and the source of MOSFET Q1 is connected to one end of resistor R2. One end of the resistor R1 is connected to the anode of diode D1. The gate of MOSFET Q2 is connected to the other pulse signal input terminal. The drain of MOSFET Q2 is connected to the other end of resistor R1 and one end of capacitor C1. The other end of capacitor C1 is connected to the cathode of diode D1 and the anode of diode D2. The source of MOSFET Q2 and the cathode of diode D2 are grounded. The two ends of resistor R2 are connected as load terminals. The two high-voltage multiplier circuits are each connected to an independent DC power supply. One high-voltage multiplier circuit generates a high-voltage pulse first excitation signal after receiving the first pulse signal. The other high-voltage multiplier circuit is delayed by T after receiving the first pulse signal from the first high-voltage multiplier circuit. S A second pulse signal is input after a certain time to generate a second high-voltage pulse excitation signal to eliminate the tailing. The pulse width of the second pulse signal is the same as the pulse width of the first pulse signal. Its characteristic is that: The method includes the following steps: Step 1: Acquire the original ultrasonic signal S from the ultrasonic transducer, and decompose the ultrasonic signal S into a tailless ultrasonic signal S1 and a tailed signal S2 under single-pulse excitation, i.e. S = S1 + S2 (1) Step 2, obtain the transducer's inherent parameter time interval T D T D There is a time interval between the peak values ​​of the envelope of the tailless ultrasonic signal S1 and the tailed signal S2 under single-pulse excitation, and T D = n*T, where T is the signal oscillation period of the ultrasonic transducer; n is the value of T. D A multiple of T; Step 3: Calculate and obtain the second pulse excitation signal S2' to eliminate the tail, i.e., S2' = -S2; the waveform of S2' is the same as S2 in amplitude, but differs from S2 in phase by 1 / 2 of the signal oscillation period T of the ultrasonic transducer. Step 4: Calculate the time delay T of the second pulse excitation signal S2' relative to the waveform of the first pulse signal. s The calculation formula is as follows: T s =T D +T / 2=(n+1 / 2)T (5) Step 5: Connect the two pulse signal input terminals of one of the high-voltage multiplier circuits to the first pulse signal to generate the first excitation signal of the high-voltage pulse. Step 6, after the first pulse signal is applied to one of the high-voltage multiplier circuits, there is a delay T. S After a certain time, the two pulse signal input terminals of another high-voltage multiplier circuit are connected to the second pulse signal to generate a second high-voltage pulse excitation signal. The pulse width of the second pulse signal is the same as that of the first pulse signal, and the voltage amplitude of the second pulse signal should be based on the amplitude of the S2 signal and the relationship k between the excitation voltage Vs of the ultrasonic transducer and the amplitude voltage Vu of the generated received ultrasonic wave, and according to the formula V s =kV u It can be concluded that; Step 7: The first high-voltage pulse excitation signal and the second high-voltage pulse excitation signal are superimposed and output to drive the load.

2. The high-voltage driving method for suppressing ultrasonic wave tailing according to claim 1, characterized in that: Parasitic diodes are connected in series between the drain and source of each MOSFET Q1 and MOSFET Q2.

3. The high-voltage driving method for suppressing ultrasonic wave tailing according to claim 1, characterized in that: The pulse widths of the first and second pulse signals are half the period of the original ultrasonic signal from the ultrasonic transducer.

4. A high-voltage driving method for suppressing ultrasonic wave tailing according to claim 1 or 3, characterized in that: One of the high-voltage multiplier circuits connects two pulse signal input terminals to pulse signals with a pulse width of T / 2, generating pulses with a width of T / 2 and an amplitude of V. A1 The first excitation signal is a high-voltage pulse, where T is the signal oscillation period of the ultrasonic transducer; the two pulse signal inputs of another high-voltage multiplier circuit are respectively connected to pulse signals with a pulse width of T / 2 to generate pulses with a width of T / 2 and an amplitude of V. A2 The high-voltage pulse is the second excitation signal, and T is the signal oscillation period of the ultrasonic transducer; V A1 V is twice the amplitude of the DC power supply in one of the high-voltage multiplier circuits. A2 It is twice the amplitude of the DC power supply of another high-voltage voltage multiplier circuit.

5. The high-voltage driving method for suppressing ultrasonic wave tailing according to claim 1, characterized in that: Delay time T s The calculation formula is as follows: T s =T D +T / 2=(n+1 / 2)T Where T is the signal oscillation period of the ultrasonic transducer; T D There exists a time interval T between the peak values ​​of the envelopes of the ultrasound signal S1 (without tail) and the tailed signal S2 under single-pulse excitation. D The inherent parameter T after the transducer is manufactured. D =nT; n is T D A multiple of T.

6. The high-voltage driving method for suppressing ultrasonic wave tailing according to claim 5, characterized in that: The voltage amplitude of the second pulse signal is determined based on the amplitude of the tail signal S2 under single-pulse excitation and the relationship between the excitation voltage Vs of the ultrasonic transducer and the amplitude voltage Vu of the generated received ultrasonic wave, and according to the formula V s =kV u The conclusion is as follows.

7. The high-voltage driving method for suppressing ultrasonic wave tailing according to claim 1, characterized in that: The pulse widths of the first and second pulse signals are half the period of the original ultrasonic signal from the ultrasonic transducer.

8. The high-voltage driving method for suppressing ultrasonic wave tailing according to claim 1, characterized in that: In step 5, the two pulse signal input terminals of one of the high-voltage multiplier circuits are respectively connected to the first pulse signal with a pulse width of T / 2 to generate a pulse with a width of T / 2 and an amplitude of V. A1 The first excitation signal of the high voltage pulse.

9. The high-voltage driving method for suppressing ultrasonic wave tailing according to claim 1, characterized in that: Step 6 involves a delay T after the first pulse is applied to one of the high-voltage multiplier circuits. S After a certain time, the two pulse signal input terminals of another high-voltage multiplier circuit are respectively connected to a second pulse signal with a pulse width of T / 2 to generate a pulse with a width of T / 2 and an amplitude of V. A2 The second excitation signal of the high voltage pulse.

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