Circuit board and method of manufacturing the same
By setting openings on the core board and etching to form an irregular open-top structure, the problem of laser cutting of multi-layer rigid-flex boards is solved, the precision and flexibility of the circuit board are improved, and the manufacturing process is simplified.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- QING DING PRECISION ELECTRONICS HUAIAN CO LTD
- Filing Date
- 2022-03-25
- Publication Date
- 2026-07-14
AI Technical Summary
In the current manufacturing process of multilayer rigid-flex PCBs, the laser cutting depth is difficult to control, the multiple cutting processes are lengthy, resulting in a high product defect rate, and it is difficult to accurately form irregularly shaped open-top structures.
A first opening is set on the core board, and a corresponding second opening is set on the second substrate layer. Then, an outer copper foil layer is set on the adhesive layer. After lamination, an irregular opening structure is formed by etching to avoid laser fixed-depth cutting. Thermoplastic polyimide is used as the substrate layer to protect the core board.
It improves the accuracy of circuit board opening, simplifies the manufacturing process, reduces the defect rate, and enhances the flexibility and dielectric properties of the circuit board through the thermoplastic polyimide substrate layer.
Smart Images
Figure CN116847549B_ABST
Abstract
Description
Technical Field
[0001] This application relates to a circuit board and a method for manufacturing the same. Background Technology
[0002] Multilayer rigid-flex PCBs are widely used as signal transmission lines in consumer electronics products due to their advantages such as thinness, ease of assembly, and high electrical signal reliability. This multilayer rigid-flex PCB mainly includes a flexible core board and rigid boards disposed on both sides of the flexible core board. The rigid boards have openings, through which part of the flexible core board is exposed.
[0003] Generally, the manufacturing process of multilayer rigid-flex boards with irregularly shaped opening structures mainly includes: 1) applying a peelable adhesive to a flexible core board; 2) pressing the core board and the rigid board together; 3) performing multiple openings using laser depth-controlled cutting until the peelable adhesive is removed, forming the irregularly shaped opening structure. This manufacturing process requires multiple laser cuts, making it difficult to control the depth of each cut, and the multiple cutting processes are lengthy, which can easily lead to defects in the final product. Summary of the Invention
[0004] To address the problems in the background art, this application provides a method for manufacturing a circuit board.
[0005] In addition, it is necessary to provide a circuit board.
[0006] A method for manufacturing a circuit board includes the steps of: providing a core board, the core board including a first substrate layer and an inner circuit structure disposed on the first substrate layer, the core board having a first opening that penetrates the first substrate layer and the inner circuit structure.
[0007] A second substrate layer is provided on the inner circuit structure, and a portion of the second substrate layer is filled into the first opening to form a U-shaped groove. The U-shaped groove is connected to the first substrate layer. The first substrate layer and the second substrate layer are thermoplastic polyimide.
[0008] An adhesive layer is provided on the second substrate layer, and the adhesive layer has a second opening, with a portion of the second opening corresponding to the U-shaped groove.
[0009] A copper foil layer is disposed on the adhesive layer, a portion of the copper foil layer is filled into the second opening, and a portion of the copper foil layer within the second opening is filled into the U-shaped groove.
[0010] An electroplated layer is formed on the copper foil layer, and the copper foil layer and the electroplated layer are etched to form an outer circuit layer to obtain the circuit board, wherein the outer circuit board has a gap, and the portion of the second substrate layer corresponding to the first opening and the second opening is exposed in the gap.
[0011] Further, the method includes the step of simultaneously pressing the core board, the second substrate layer, the adhesive layer, and the copper foil layer together.
[0012] Furthermore, before the step "depositing an electroplating layer on the copper foil layer", the method further includes: creating a third opening through the adhesive layer, such that a portion of the copper foil layer fills the third opening. After the step "depositing an electroplating layer on the copper foil layer", the method further includes: removing a portion of the copper foil layer and the electroplating layer corresponding to the third opening, such that a portion of the second substrate layer is exposed at the bottom of the third opening.
[0013] Furthermore, before the step of "depositing an electroplated layer on the copper foil layer", the method further includes: providing a fourth opening through the copper foil layer, the adhesive layer, and the second substrate layer, with a portion of the inner circuit structure exposed at the bottom of the fourth opening. The step of "depositing an electroplated layer on the copper foil layer" further includes: filling a portion of the electroplated layer into the fourth opening to form a first conductor, the first conductor connecting the copper foil layer and the inner circuit structure.
[0014] Furthermore, the two inner circuit structures are respectively disposed on opposite sides of the first substrate layer. The manufacturing method further includes the step of: providing a first through hole in the circuit board, the first through hole penetrating the first substrate layer and the two inner circuit structures, and the first through hole communicating with a first opening.
[0015] Furthermore, the method also includes the step of: providing a second through hole in the circuit board, the second through hole penetrating the outer circuit layer, the adhesive layer, the second substrate layer, the first substrate layer and the two inner circuit structures.
[0016] Furthermore, it also includes the step of: providing a solder resist layer on the outer circuit layer.
[0017] Furthermore, the method for manufacturing the core board includes the steps of: providing a first substrate, the first substrate including a first dielectric layer, a first copper foil layer and a first inner circuit layer, the first copper foil layer and the first inner circuit layer being respectively disposed on opposite sides of the first dielectric layer.
[0018] The first substrate layer is disposed on the first inner circuit layer, and the substrate layer has through holes.
[0019] A second substrate is disposed on the first substrate layer. The second substrate includes a second dielectric layer, a second copper foil layer and a second inner circuit layer. The second copper foil layer and the second inner circuit layer are respectively disposed on opposite sides of the first dielectric layer. The second inner circuit layer is disposed between the second dielectric layer and the first substrate layer to obtain an intermediate.
[0020] The first copper foil layer is etched to form a third inner circuit layer. The first inner circuit layer, the first dielectric layer, and the third inner circuit layer constitute one inner circuit structure. The second copper foil layer is etched to form a fourth inner circuit layer. The second inner circuit layer, the second dielectric layer, and the fourth inner circuit layer constitute another inner circuit structure.
[0021] The first inner circuit structure and the second inner circuit structure corresponding to the through hole are removed to form the first opening, thereby obtaining the core board.
[0022] Furthermore, before etching the first copper foil layer and the second copper foil layer, the method further includes: providing a third through hole on the intermediate body, the third through hole penetrating the first substrate and the second substrate, and providing a second conductor within the third through hole, the second conductor being electrically connected to the first copper foil layer, the first inner circuit layer, the second inner circuit layer and the second copper foil layer.
[0023] A circuit board includes a core board, an adhesive layer, a second substrate layer, and an outer circuit layer. The core board includes a first substrate layer and an inner circuit structure disposed on the first substrate layer. The core board has a first opening that penetrates the first substrate layer and the inner circuit structure. A second substrate layer is disposed on the inner circuit structure, and a portion of the second substrate layer is filled into the first opening to form a U-shaped groove. The U-shaped groove connects to the first substrate layer. The adhesive layer is disposed on the second substrate layer and has a second opening that penetrates through it. A portion of the second opening corresponds to the U-shaped groove. The outer circuit layer is disposed on the adhesive layer and has gaps. A portion of the second substrate layer corresponding to the first opening and the second opening is exposed in the gaps. The first substrate layer and the second substrate layer are thermoplastic polyimide.
[0024] Compared to existing technologies, the circuit board provided in this application first sets a first opening on the core board, sets a second substrate layer on the core board, and sets an adhesive layer with a second opening on the second substrate layer. This second opening corresponds to the first opening. Then, an outer copper foil layer is set on the adhesive layer. After pressing the core board, the second substrate layer, the adhesive layer, and the outer copper foil layer together, part of the copper foil layer and part of the second substrate layer fill the first opening and the second opening. Finally, the outer copper foil layer in the first opening and the second opening is removed by etching to form an irregularly shaped open-top structure. There is no need to set a release film in the open-top area or to perform a laser depth cutting process, which helps to improve the opening accuracy of the circuit board. Moreover, the second substrate layer acts as a cover layer to protect the core board. Attached Figure Description
[0025] Figure 1 This is a cross-sectional schematic diagram of the first intermediate before compression, provided in an embodiment of this application.
[0026] Figure 2 for Figure 1 The diagram shows a cross-sectional view of the first intermediate after compression.
[0027] Figure 3 This is a cross-sectional schematic diagram of a core board provided in an embodiment of this application.
[0028] Figure 4 This is a cross-sectional schematic diagram of the second intermediate before pressing, provided in an embodiment of this application.
[0029] Figure 5 for Figure 4 The diagram shows a cross-sectional view of the second intermediate after compression.
[0030] Figure 6 for Figure 5 The diagram shows a cross-section of the second intermediate after the electroplating layer has been applied.
[0031] Figure 7 For etching Figure 5 The diagram shows a cross-section of the electroplated layer and the copper foil layer.
[0032] Figure 8 This is a cross-sectional schematic diagram of a circuit board provided in an embodiment of this application.
[0033] Explanation of main component symbols
[0034] Circuit board 100
[0035] First through hole 111
[0036] Second through hole 112
[0037] Core board 10
[0038] First substrate layer 11
[0039] Inner circuit structure 12
[0040] First inner circuit structure 13
[0041] Second inner circuit structure 14
[0042] First opening 15
[0043] First upper opening 151
[0044] The first lower opening is 152.
[0045] First substrate 20
[0046] First dielectric layer 21
[0047] First copper foil layer 22
[0048] Third inner circuit layer 221
[0049] First inner circuit layer 23
[0050] Second substrate 30
[0051] Second dielectric layer 31
[0052] Second copper foil layer 32
[0053] Fourth inner circuit layer 321
[0054] Second inner circuit layer 33
[0055] First intermediate 34
[0056] Second substrate layer 40
[0057] Second upper substrate layer 41
[0058] Second lower substrate layer 42
[0059] Adhesive layer 43
[0060] Top adhesive layer 432
[0061] Underlying adhesive layer 433
[0062] Second opening 431
[0063] Second upper opening 434
[0064] The second lower opening is 435.
[0065] Third opening 436
[0066] The third upper opening is 437.
[0067] The third bottom opening is 438.
[0068] Third through hole 46
[0069] Second conductor 45
[0070] 50 outer copper foil layer
[0071] First outer copper foil layer 51
[0072] Second outer copper foil layer 52
[0073] First blind hole 521
[0074] Second blind hole 522
[0075] Second intermediate 53
[0076] Electroplating layer 60
[0077] First electroplating layer 61
[0078] First upper conductor 611
[0079] Second electroplating layer 62
[0080] Second lower conductor 621
[0081] Outer circuit layer 70
[0082] First outer circuit layer 71
[0083] First cable tray 711
[0084] Second outer circuit layer 72
[0085] Second groove 721
[0086] First window opening 73
[0087] First through hole 80
[0088] Second through hole 81
[0089] 90% solder resist layer
[0090] First weld shielding layer 91
[0091] Second window 911
[0092] Second weld shielding layer 92
[0093] Third window 921
[0094] Thickness direction D
[0095] The following detailed description, in conjunction with the accompanying drawings, will further illustrate this application. Detailed Implementation
[0096] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.
[0097] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. When a component is said to be "set on" another component, it can be directly set on the other component or there may be an intervening component.
[0098] In the description of this application, it should be understood that the terms "above," "below," "thickness," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features.
[0099] Please see Figures 1 to 8 This application provides a method for manufacturing a circuit board 100, which can be used to manufacture a rigid-flex board, specifically including the following steps:
[0100] S1: Please see Figure 3 A core board 10 is provided, the core board 10 including a first substrate layer 11 and an inner circuit structure 12 disposed on the first substrate layer 11. The inner circuit structure 12 includes a first inner circuit structure 13 and a second inner circuit structure 14. The first inner circuit structure 13 and the second inner circuit structure 14 are respectively disposed on opposite sides of the first substrate layer 11. The core board 10 is provided with a first opening 15, the first opening 15 including a first upper opening 151 and a first lower opening 152. The first upper opening 151 penetrates the first inner circuit structure 13 and the first substrate layer 11, and the first lower opening 152 penetrates the second inner circuit structure 14 and the first substrate layer 11. The first substrate layer 11 is made of thermoplastic polyimide.
[0101] In this embodiment, please refer to Figures 1 to 3 The manufacturing method of the core board 10 includes the following steps:
[0102] S11: Please see Figure 1 A first substrate 20 is provided, the first substrate 20 including a first dielectric layer 21, a first copper foil layer 22, and a first inner circuit layer 23. The first copper foil layer 22 and the first inner circuit layer 23 are respectively disposed on opposite sides of the first dielectric layer 21.
[0103] S12: Please refer to Figure 1 A first substrate layer 11 is provided on the first inner circuit layer 23. The first substrate layer 11 has a first through hole 111 and a second through hole 112, which are spaced apart.
[0104] S13: Please see Figure 1 A second substrate 30 is disposed on the first substrate layer 11. The second substrate 30 includes a second dielectric layer 31, a second copper foil layer 32, and a second inner circuit layer 33. The second copper foil layer 32 and the second inner circuit layer 33 are respectively disposed on opposite sides of the second dielectric layer 31, and the second inner circuit layer 33 is disposed facing the first substrate layer 11.
[0105] S14: Please see Figure 1 and Figure 2 The first substrate 20, the first substrate layer 11 and the second substrate 30 are pressed together to obtain a first intermediate 34.
[0106] S15: Please see Figure 1 and Figure 2 A plurality of third through holes 46 are provided on the first intermediate body 34. The third through holes 46 penetrate the first substrate 20, the first substrate layer 11 and the second substrate 30. A second conductor 45 is provided in the third through holes 46. The second conductor 45 is electrically connected to the first copper foil layer 22, the first inner circuit layer 23, the second inner circuit layer 33 and the second copper foil layer 32.
[0107] S16: Please see Figure 3 The first copper foil layer 22 is etched to form a third inner circuit layer 221. The first inner circuit layer 23, the first dielectric layer 21, and the third inner circuit layer 221 together constitute the first inner circuit structure 13. The second copper foil layer 32 is etched to form a fourth inner circuit layer 321. The second inner circuit layer 33, the second dielectric layer 31, and the fourth inner circuit layer 321 together constitute the second inner circuit structure 14.
[0108] S17: Please see Figure 3 Remove a portion of the first inner circuit structure 13 corresponding to the first through hole 111 to obtain the first upper opening 151, and remove a portion of the second inner circuit structure 14 corresponding to the second through hole 112 to obtain the first lower opening 152, thereby obtaining the core board 10.
[0109] S2: Please see Figure 4 and Figure 5 A second substrate layer 40 is disposed on the inner circuit structure 12. The second substrate layer 40 includes a second upper substrate layer 41 and a second lower substrate layer 42. The specific steps include:
[0110] S21: A second upper substrate layer 41 is provided on the third inner circuit layer 221, and a portion of the second upper substrate layer 41 is filled into the first upper opening 151 to form an upper U-shaped groove 411, the upper U-shaped groove 411 being connected to the first substrate layer 11.
[0111] S22: A second lower substrate layer 42 is provided on the fourth inner circuit layer 321, and part of the second lower substrate layer 42 is filled into the first lower opening 152 to form a lower U-shaped groove 421.
[0112] In this embodiment, in step S2, the second upper substrate layer 41, the second lower substrate layer 42, and the first substrate layer 11 are made of the same material.
[0113] S3: Please see Figure 4 and Figure 5 An adhesive layer 43 is disposed on the second substrate layer 40. The adhesive layer 43 has a second opening 431 and a third opening 436. Part of the second opening 431 corresponds to the first opening 15 (i.e., the first opening 15 communicates with the second opening 431). The third opening 436 is spaced apart from the second opening 431. The adhesive layer 43 includes an upper adhesive layer 432 and a lower adhesive layer 433. The second opening 431 includes a second upper opening 434 and a second lower opening 435. The third opening 436 includes a third upper opening 437 and a third lower opening 438. The specific steps include:
[0114] S31: An upper adhesive layer 432 is provided on the second upper substrate layer 41. The upper adhesive layer 432 is provided with a second upper opening 434 and a third upper opening 437. Part of the second upper opening 434 is provided corresponding to the first upper opening 151 (that is, the second upper opening 434 is connected to the upper U-shaped groove 411). The third upper opening 437 is provided at intervals from the second upper opening 434.
[0115] S32: The lower adhesive layer 433 is provided on the second lower substrate layer 42. The lower adhesive layer 433 is provided with a second lower opening 435 and a third lower opening 438. Part of the second lower opening 435 is provided corresponding to the first lower opening 152 (that is, the second lower opening 435 is connected to the lower U-shaped groove 421). The third lower opening 438 is provided at intervals from the second lower opening 435.
[0116] S4: Please see Figure 4 and Figure 5An outer copper foil layer 50 is disposed on the adhesive layer 43. The outer copper foil layer 50 includes a first outer copper foil layer 51 and a second outer copper foil layer 52. The specific steps include:
[0117] S41: A first outer copper foil layer 51 is provided on the upper adhesive layer 432, a portion of the first outer copper foil layer 51 is filled into the second upper opening 434, a portion of the first outer copper foil layer 51 in the second upper opening 434 is filled into the upper U-shaped groove 411, and a portion of the first outer copper foil layer 51 is filled into the third upper opening 437.
[0118] S42: A second outer copper foil layer 52 is disposed on the lower adhesive layer 433, a portion of the second outer copper foil layer 52 is filled into the second lower opening 435, a portion of the second outer copper foil layer 52 in the second lower opening 435 is filled into the lower U-shaped groove 421, and a portion of the second outer copper foil layer 52 is filled into the third lower opening 438, thereby obtaining a second intermediate body 53.
[0119] In this embodiment, in steps S2 to S4, the core board 10, the second upper substrate layer 41, the upper adhesive layer 432, the first outer copper foil layer 51, the second lower substrate layer 42, the lower adhesive layer 433, and the second outer copper foil layer 52 are simultaneously pressed into a whole using a release film (not shown). Finally, the release film is removed to obtain the second intermediate body 53. It can be understood that in other embodiments of this application, the second upper substrate layer 41, the upper adhesive layer 432, and the first outer copper foil layer 51 can be pressed onto the core board 10 first, and then the second lower substrate layer 42, the lower adhesive layer 433, and the second outer copper foil layer 52 can be pressed onto the core board 10 to form a whole.
[0120] In this embodiment, please refer to Figure 6 Step S4 further includes the following steps:
[0121] S43: A first blind via 521 and a second blind via 522 are provided in the second intermediate body 53. The first blind via 521 penetrates the first outer copper foil layer 51, the upper adhesive layer 432, and the second upper substrate layer 41, with a portion of the third inner circuit layer 221 exposed at the bottom of the first blind via 521. The second blind via 522 penetrates the second outer copper foil layer 52, the lower adhesive layer 433, and the second lower substrate layer 42, with a portion of the fourth inner circuit layer 321 exposed at the bottom of the second blind via 522.
[0122] S5: Please see Figure 6An electroplating layer 60 is formed on the second intermediate body 53. The electroplating layer 60 includes a first electroplating layer 61 and a second electroplating layer 62. The specific steps include:
[0123] S51: The first electroplated layer 61 is provided on the first outer copper foil layer 51. Part of the first electroplated layer 61 is filled into the first blind hole 521 to form the first upper conductor 611. Part of the first electroplated layer 61 is also filled into the second upper opening 434 and the upper U-shaped groove 411.
[0124] S52: The second electroplated layer 62 is provided on the second outer copper foil layer 52. Part of the second electroplated layer 62 is filled into the second blind hole 522 to form the second lower conductor 621. Part of the second electroplated layer 62 is also filled into the second lower opening 435 and the lower U-shaped groove 421.
[0125] S6: Please see Figure 6 and Figure 7 The outer copper foil layer 50 and the electroplated layer 60 are etched to form an outer circuit layer 70, the outer circuit layer 70 including a first outer circuit layer 71 and a second outer circuit layer 72, to obtain the circuit board 100, specifically including:
[0126] S61: Etch the first outer copper foil layer 51 and the first electroplated layer 61 to form a first outer circuit layer 71. The first outer circuit layer 71 has a first groove 711. The portion of the second upper substrate layer 41 corresponding to the first upper opening 151 and the second upper opening 434 is exposed at the bottom of the first groove 711 (that is, an "L"-shaped opening is formed above the first substrate layer 11).
[0127] S62: Etch the second outer copper foil layer 52 and the second electroplated layer 62 to form the second outer circuit layer 72. The second outer circuit layer 72 has a second groove 721. The portion of the second lower substrate layer 42 corresponding to the first lower opening 152 and the second lower opening 435 is exposed at the bottom of the second groove 721 (that is, an "L"-shaped opening is formed below the first substrate layer 11).
[0128] In this embodiment, in steps S61 to S62, the first wire groove 711 and the second wire groove 721 are roughly correspondingly arranged, the second upper opening 434 and the second lower opening 435 are roughly correspondingly arranged, and the first upper opening 151 and the first lower opening 152 are roughly offset.
[0129] In this embodiment, please refer to Figures 7 to 8 The manufacturing method of the circuit board 100 further includes the following steps:
[0130] S7: Please see Figure 7 Remove a portion of the second electroplated layer 62 and a portion of the second outer copper foil layer 52 corresponding to the third lower opening 438 to form a first window 73, with a portion of the second lower substrate layer 42 exposed at the bottom of the first window 73.
[0131] S8: Please see Figure 8 A first through hole 80 is provided on the circuit board 100. The first through hole 80 penetrates the second upper substrate layer 41, the second lower substrate layer 42, the first inner circuit structure 13, the second inner circuit structure 14, and the first substrate layer 11 approximately along the thickness direction D of the core board 10. That is, one end of the first through hole 80 connects the second upper opening 434 and the first upper opening 151, and the other end connects the second lower opening 435 and the first lower opening 152.
[0132] S9: Please see Figure 8 A second through hole 81 is provided on the circuit board 100, and the second through hole 81 penetrates the outer circuit layer 70, the adhesive layer 43, the second substrate layer 40 and the core board 10.
[0133] S10: Please see Figure 8 A solder resist layer 90 is provided on the circuit board 100. The solder resist layer 90 includes a first solder resist layer 91 and a second solder resist layer 92. The first solder resist layer 91 is disposed on the first outer circuit layer 71 and has a plurality of second openings 911. One end of the first wire groove 711, the first opening 73, and the second through hole 81 is exposed at the bottom of the second opening 911. The second solder resist layer 92 is disposed on the second outer circuit layer 72 and has a plurality of third openings 921. The other end of the second wire groove 721 and the second through hole 81 is exposed at the bottom of the third opening 921.
[0134] Compared with the prior art, the manufacturing method of the circuit board 100 provided in this application has the following advantages:
[0135] (i) By first setting a first opening 15 on the core board 10, setting a second substrate layer 40 on the core board 10, and setting an adhesive layer 43 with a second opening 431 on the second substrate layer 40, the second opening 431 is set corresponding to the first opening 15. Then, an outer copper foil layer 50 is set on the adhesive layer 43. After pressing the core board 10, the second substrate layer 40, the adhesive layer 43 and the outer copper foil layer 50, a portion of the outer copper foil layer 50 and a portion of the second substrate layer 40 are filled into the first opening 15 and the second opening 431. Finally, the outer copper foil layer 50 in the first opening 15 and the second opening 431 is removed by etching to form an irregular opening structure. There is no need to set a release film in the opening area and no need to perform a laser depth cutting process, which helps to improve the opening accuracy of the circuit board 100. Moreover, the second substrate layer 40 serves as a cover layer to protect the core board 10.
[0136] (ii) By setting the second substrate layer 40 as thermoplastic polyimide, the thermoplastic material has excellent bending performance and better dielectric properties, thus it can replace the cover layer composed of adhesive and polyimide, which is beneficial to improving the flexibility of the circuit board 100.
[0137] Please see Figure 7 and Figure 8 This application also provides a circuit board 100, which includes a core board 10, an adhesive layer 43, a second substrate layer 40, and an outer circuit layer 70. The core board 10 includes a first substrate layer 11 and an inner circuit structure 12 disposed on the first substrate layer 11. The core board 10 is provided with a first opening 15, which penetrates the first substrate layer 11 and the inner circuit structure 12. The second substrate layer 40 is disposed on the inner circuit structure 12. A portion of the second substrate layer 40 is filled into the first opening 15 to form a U-shaped groove (e.g., an upper U-shaped groove 411 and a lower U-shaped groove 421). The U-shaped groove connects to the first substrate layer 11. The adhesive layer 43 is disposed on the second substrate layer 40. The adhesive layer 43 has a second opening 431 (e.g., a second upper opening 434 and a second lower opening 435) that extends through the second opening 431. A portion of the second opening 431 corresponds to the U-shaped groove. The outer circuit layer 70 is disposed on the adhesive layer 43. The outer circuit layer 70 has grooves (e.g., a first groove 711 and a second groove 721). A portion of the second substrate layer 40 corresponding to the first opening 15 and the second opening 431 is exposed in the groove. The first substrate layer 11 and the second substrate layer 40 are thermoplastic polyimide.
[0138] The above description is merely an optimized implementation of this application, and its application should not be limited to this specific implementation. Other modifications and alterations made by those skilled in the art based on the technical concept of this application should fall within the protection scope of this application.
Claims
1. A method for manufacturing a circuit board, characterized in that, Including the following steps: A core board is provided, the core board including a first substrate layer and an inner circuit structure disposed on both sides of the first substrate layer, the core board having a first opening that penetrates the first substrate layer and the inner circuit structure; A second substrate layer is provided on the inner circuit structure, and a portion of the second substrate layer is filled into the first opening to form a U-shaped groove. The U-shaped groove is connected to the first substrate layer. The first substrate layer and the second substrate layer are thermoplastic polyimide. An adhesive layer is provided on the second substrate layer, and the adhesive layer has a second opening, a portion of which corresponds to the U-shaped groove. An outer copper foil layer is provided on the adhesive layer, a portion of the outer copper foil layer is filled into the second opening, and a portion of the outer copper foil layer within the second opening is filled into the U-shaped groove; An electroplating layer is formed on the outer copper foil layer; as well as The outer copper foil layer and the electroplated layer are etched to form an outer circuit layer to obtain the circuit board, wherein the outer circuit layer has a groove, and the portion of the second substrate layer corresponding to the first opening and the second opening is exposed in the groove.
2. The manufacturing method as described in claim 1, characterized in that, The process includes the following steps: simultaneously pressing the core board, the second substrate layer, the adhesive layer, and the outer copper foil layer together.
3. The manufacturing method as described in claim 1, characterized in that, Before the step "deposit an electroplating layer on the outer copper foil layer", the method further includes: creating a third opening through the adhesive layer, such that a portion of the outer copper foil layer fills the third opening; The step of "depositing an electroplating layer on the outer copper foil layer" further includes: removing a portion of the outer copper foil layer and electroplating layer corresponding to the third opening, so that a portion of the second substrate layer is exposed at the bottom of the third opening.
4. The manufacturing method as described in claim 1, characterized in that, The step of "applying an electroplating layer on the outer copper foil layer" includes the following steps before: A blind via is provided through the outer copper foil layer, the adhesive layer, and the second substrate layer, and a portion of the inner circuit structure is exposed at the bottom of the blind via; The step "to provide an electroplated layer on the outer copper foil layer" further includes: filling a portion of the electroplated layer into the blind hole to form a first conductor, the first conductor connecting the outer copper foil layer and the inner circuit structure.
5. The manufacturing method as described in claim 1, characterized in that, The two inner circuit structures are respectively disposed on opposite sides of the first substrate layer, and the manufacturing method further includes the step of: A first through hole is provided on the circuit board. The first through hole penetrates the first substrate layer and the two inner circuit structures, and the first through hole is connected to the first opening.
6. The manufacturing method as described in claim 4, characterized in that, It also includes the following steps: A second through hole is provided in the circuit board, and the second through hole penetrates the outer circuit layer, the adhesive layer, the second substrate layer, the first substrate layer and the inner circuit structure.
7. The manufacturing method as described in claim 1, characterized in that, It also includes the step of: setting a solder resist layer on the outer circuit layer.
8. The manufacturing method as described in claim 1, characterized in that, The method for manufacturing the core board includes the following steps: A first substrate is provided, the first substrate including a first dielectric layer, a first inner copper foil layer and a first inner circuit layer, the first inner copper foil layer and the first inner circuit layer being respectively disposed on opposite sides of the first dielectric layer; The first substrate layer is disposed on the first inner circuit layer, and the first substrate layer has a through hole; A second substrate is disposed on the other side of the first substrate layer. The second substrate includes a second dielectric layer, a second inner copper foil layer, and a second inner circuit layer. The second inner copper foil layer and the second inner circuit layer are respectively disposed on opposite sides of the first dielectric layer. The second inner circuit layer is disposed between the second dielectric layer and the first substrate layer to obtain an intermediate body. The first inner copper foil layer is etched to form a third inner circuit layer. The first inner circuit layer, the first dielectric layer, and the third inner circuit layer constitute a first inner circuit structure. The second inner copper foil layer is etched to form a fourth inner circuit layer. The second inner circuit layer, the second dielectric layer, and the fourth inner circuit layer constitute a second inner circuit structure. The first inner circuit structure and the second inner circuit structure corresponding to the through hole are removed to form the first opening, thereby obtaining the core board.
9. The manufacturing method as described in claim 8, characterized in that, Before etching the first inner copper foil layer and the second inner copper foil layer, the process further includes: A third through hole is provided on the intermediate body, the third through hole penetrating the first substrate and the second substrate; and A second conductor is provided in the third through hole, and the second conductor is electrically connected to the first inner copper foil layer, the first inner circuit layer, the second inner circuit layer and the second inner copper foil layer.
10. A circuit board, characterized in that, The device includes a core board, an adhesive layer, a second substrate layer, and an outer circuit layer. The core board includes a first substrate layer and an inner circuit structure disposed on both sides of the first substrate layer. The core board has a first opening that penetrates the first substrate layer and the inner circuit structure. A second substrate layer is disposed on the inner circuit structure, and a portion of the second substrate layer is filled into the first opening to form a U-shaped groove. The U-shaped groove connects to the first substrate layer. The adhesive layer is disposed on the second substrate layer and has a second opening that penetrates through it. A portion of the second opening corresponds to the U-shaped groove. The outer circuit layer is disposed on the adhesive layer and has gaps. A portion of the second substrate layer corresponding to the first and second openings is exposed in the gaps. The first and second substrate layers are thermoplastic polyimide.
Citation Information
Patent Citations
CN112533368A
CN113473716A