A few-mode interlayer coupler based on a two-dimensional grating structure

Abstract

A few-mode interlayer coupler based on a two-dimensional grating structure and a preparation method thereof, belonging to the technical field of planar optical waveguide devices and their preparation. The invention is composed of a silicon wafer substrate, a silicon dioxide lower cladding prepared on the silicon wafer substrate, a polymer interlayer coupling layer prepared on the silicon dioxide lower cladding, and a polymer upper cladding prepared on the polymer interlayer coupling layer and the silicon dioxide lower cladding, and the polymer interlayer coupling layer is coated in the polymer upper cladding; the upper silicon nitride straight waveguide core is composed of an upper silicon nitride straight waveguide and an upper two-dimensional grating waveguide, and the lower silicon nitride straight waveguide core layer is composed of a lower two-dimensional grating waveguide and a lower silicon nitride straight waveguide. The invention gives full play to the advantages of low transmission loss, wide transparent window and high thermal stability of the silicon nitride waveguide, as well as the advantages of a variety of polymer materials and simple preparation processes, and these two materials also have the characteristics of mature processes and mutual compatibility, are suitable for large-scale preparation and production, and have important application prospects.

Description

Technical Field

[0001] The present invention belongs to the technical field of planar optical waveguide devices and their manufacturing technologies, and particularly relates to a few-mode interlayer coupler based on a two-dimensional grating structure, which uses a silicon wafer as a substrate, silica as a lower cladding layer, silicon nitride as a waveguide core layer, an organic polymer as an interlayer coupling layer, and an organic polymer as an upper waveguide cladding layer. Background Art

[0002] In recent years, with the rapid development of new technologies such as artificial intelligence, 5G, and big data, people have put forward higher requirements for the transmission capacity and transmission rate of communication systems. Compared with traditional electrical interconnections, optical interconnection communication systems have advantages such as low cost, fast transmission rate, large transmission capacity, and many application scenarios. To improve the performance of optical communication systems, technologies such as wavelength division multiplexing (WDM), time division multiplexing (TDM), and polarization division multiplexing (PDM) have been successively proposed and gradually developed and matured. However, due to the influence of the nonlinear effect of optical fibers and the Shannon limit, traditional single-mode optical fibers still have limitations. To overcome the bottleneck of single-mode fiber communication, researchers have proposed mode division multiplexing (MDM) technology, that is, using multiple mutually orthogonal spatial modes to simultaneously transmit information, doubling the transmission capacity of the communication system. To further meet the requirements of large-capacity optical communication systems, on-chip MDM systems have also developed rapidly to flexibly process the optical signals of MDM systems.

[0003] To achieve higher transmission capacity and more complex system functions, it is usually necessary to integrate more photonic devices on the chip. However, increasing the number of devices on a single-layer optical chip will lead to problems such as increased chip size, increased crosstalk, and increased power consumption. Currently, the number of device integrations on a single-layer optical chip has approached the limit. To overcome the limitations of single-layer optical chips, three-dimensional optical chips have emerged. The three-dimensional optical chip uses a multi-layer structure to not only increase the transmission capacity but also achieve more complex communication functions through interlayer signal interaction. To achieve interlayer signal interaction, researchers have proposed interlayer coupling technology. Currently, the main technical solutions include: directional coupling structures in the vertical direction, using tapered adiabatic evanescent field coupling, etc. These existing solutions still have problems such as high manufacturing process requirements, small process tolerances, large device structure sizes, narrow working bandwidths, etc., and most structures only support the interlayer coupling of fundamental mode signals, and it is challenging to achieve large-bandwidth interlayer coupling of multiple modes.

[0004] Currently, the waveguide materials used in the development of three-dimensional on-chip MDM systems mainly include lithium niobate, silicon nitride, SOI, and organic polymer materials. Among them, silicon nitride has seen rapid development and wide attention in planar waveguide devices and on-chip MDM systems in recent years due to its low transmission loss, small device size, wide transparent window, and compatibility with CMOS processes. Although silicon nitride has certain advantages in achieving device miniaturization and integration, its small size and large refractive index difference pose challenges to the efficient interlayer coupling of on-chip MDM systems for three-dimensional photonic integrated chips.

[0005] The present invention uses a hybrid structure of two-dimensional gratings and polymer waveguides to design a few-mode interlayer coupler. By leveraging the advantages of low manufacturing cost, easy integration, and high fiber coupling efficiency of polymer waveguides, high-efficiency interlayer coupling of different modes is achieved, doubling the transmission capacity of three-dimensional photonic integrated chips. Moreover, the mode field passing through the interlayer coupler remains unchanged, making it of great application value in high-capacity three-dimensional photonic integrated chips. Summary of the Invention

[0006] In order to overcome the deficiencies of the prior art, the purpose of the present invention is to provide a small-size, large-bandwidth few-mode interlayer coupler based on a two-dimensional grating structure. This device structure connects two layers of silicon nitride waveguides, and the two layers of silicon nitride waveguides are buried at the top and bottom of the polymer interlayer coupling layer, achieving low-loss coupling of multiple modes and solving problems such as few supported modes, polarization sensitivity, and narrow bandwidth in existing devices.

[0007] The present invention uses a two-dimensional grating as the basic structure of the device. Due to its mature fabrication process and stable device performance, it has important application value in photonic integrated chips and optical communication networks. Based on the diffraction principle of light, the light in the upper silicon nitride waveguide is diffracted into the polymer interlayer coupling layer. After the light is stably transmitted in the polymer interlayer coupling layer, it is coupled by the two-dimensional grating of the lower layer of silicon nitride and then transmitted to the output straight waveguide of the lower layer of silicon nitride. The two-dimensional grating structure effectively solves problems such as mode sensitivity, narrow bandwidth, polarization sensitivity, and large device size in traditional interlayer coupling structures.

[0008] The present invention uses a silicon wafer as the device substrate, silicon dioxide as the device lower cladding material, silicon nitride as the core layer, an organic polymer as the interlayer coupling layer, and an organic polymer as the upper cladding. The present invention fully exploits the advantages of low transmission loss, wide transparent window, and high thermal stability of silicon nitride waveguides, as well as the advantages of a wide variety of polymer materials and simple fabrication processes. Moreover, these two materials also have the characteristics of mature processes and mutual compatibility, making them suitable for large-scale production and having important application prospects.

[0009] The technical solutions adopted by the present invention to solve the technical problems are as follows:

[0010] AsFigure 1 and Figure 2 As shown in and

[0011] , a few-mode interlayer coupler based on a two-dimensional grating structure according to the present invention is composed of a silicon wafer substrate 31 from bottom to top, a silicon dioxide lower cladding 32 prepared on the silicon wafer substrate 31, a polymer interlayer coupling layer 34 prepared on the silicon dioxide lower cladding 32, and a polymer upper cladding 36 prepared on the polymer interlayer coupling layer 34 and the silicon dioxide lower cladding 32. The polymer interlayer coupling layer 34 is coated in the polymer upper cladding 36. Along the light propagation direction, an upper silicon nitride straight waveguide core layer 35 and a lower silicon nitride straight waveguide core layer 33 are prepared in the polymer interlayer coupling layer 34. The plane position of the lower surface of the upper silicon nitride straight waveguide core layer 35 is higher than the plane position of the upper surface of the lower silicon nitride straight waveguide core layer 33. The upper surface of the upper silicon nitride straight waveguide core layer 35 is in the same plane as the upper surface of the polymer interlayer coupling layer 34, and the lower surface of the lower silicon nitride straight waveguide core layer 33 is in the same plane as the lower surface of the polymer interlayer coupling layer 34. The upper silicon nitride straight waveguide core layer 35 is composed of an upper silicon nitride straight waveguide 1 and an upper two-dimensional grating waveguide 2, and the lower silicon nitride straight waveguide core layer 33 is composed of a lower two-dimensional grating waveguide 4 and a lower silicon nitride straight waveguide 5.

[0011] Figure 1 (a), Figure 1 (b), Figure 1 (c), Figure 1 (d), Figure 1 (e) are respectively the cross-sectional views at positions A-A', B-B', C-C', D-D', and E-E' in Figure 2 , corresponding to the positions of the upper silicon nitride straight waveguide 1, the upper two-dimensional grating waveguide 2, the polymer interlayer coupling layer 34, the lower two-dimensional grating waveguide 4, and the lower silicon nitride straight waveguide 5. The width W 3 of the polymer interlayer coupling layer 34 is 3.5 - 10 μm; the widths W 4 of the upper silicon nitride straight waveguide core layer 35 and the lower silicon nitride straight waveguide core layer 33 are the same, which is 3.2 - 9 μm, and W 3 > W 4 .

[0012] As Figure 2 shown, the structural dimensions of the upper silicon nitride straight waveguide 1 and the lower silicon nitride straight waveguide 5 are the same, and the length L 1 is 0.8 - 1.5 cm; the structural dimensions of the upper two-dimensional grating waveguide 2 and the lower two-dimensional grating waveguide 4 are the same, and the length L 2 ​​is 8 - 30 μm; the upper - layer two - dimensional grating waveguide 2 is a series of groove structures with equal length and width etched in a plane parallel to the upper - surface of the silicon wafer substrate 31. The lower - layer two - dimensional grating waveguide 4 is a series of groove structures with equal length and width etched in a plane parallel to the upper - surface of the silicon wafer substrate 31. The grooves are uniformly arranged in the parallel and perpendicular directions to the light - propagation direction. And in the parallel direction, the groove spacing is the same as the groove length, and in the perpendicular direction, the groove spacing is the same as the groove width; the projection spacing L of the output end of the upper - layer two - dimensional grating waveguide 2 and the input end of the lower - layer two - dimensional grating waveguide 4 on the surface of the silica lower - cladding 32 3 is 20 - 50 μm; the length L of the polymer inter - layer coupling layer 34 4 is 1.6 - 3 cm, and L 4 = 2L 1 + 2L 2 + L 3 .

[0013] As Figure 3 shown, it is a schematic structural diagram of the upper - layer two - dimensional grating waveguide 2, the lower - layer two - dimensional grating waveguide 4, and the polymer inter - layer coupling layer. The structures of the upper - layer two - dimensional grating waveguide 2 and the lower - layer two - dimensional grating waveguide 4 are the same. In the two - dimensional grating structure, the spacing between adjacent grooves parallel to the light - propagation direction is the same as the groove length W 1 which is 0.5 - 1 μm; the spacing between adjacent grooves perpendicular to the light - propagation direction is the same as the groove width W 2 which is 0.08 - 0.15 μm; the adjacent grooves along the light - propagation direction and perpendicular to the light - propagation direction are staggered with each other and do not overlap. In the upper - layer two - dimensional grating waveguide 2 and the lower - layer two - dimensional grating waveguide 4, the number of groove rows N x parallel to the light - propagation direction is 16 - 30, and the number of groove columns N y perpendicular to the light - propagation direction is 40 - 60, and L 2 = N x *W 1 .

[0014] Light is input from the upper - layer silicon nitride straight waveguide 1, diffracts into the polymer inter - layer coupling layer 34 when passing through the upper - layer two - dimensional grating waveguide 2. When the diffracted light is stable in the polymer inter - layer coupling layer 34, it further transmits and then couples into the lower - layer two - dimensional grating waveguide 4. After coupling, the light transmits into the lower - layer silicon nitride straight waveguide 5 and then outputs.

[0015] The thickness of the silicon wafer substrate 31 is 0.6 - 1 mm, the thickness of the silicon dioxide lower cladding 32 is 2 - 5 μm, the thicknesses of the lower silicon nitride straight waveguide core layer 33 and the upper silicon nitride straight waveguide core layer 35 are equal, which is 0.2 - 0.6 μm, the thickness of the polymer interlayer coupling layer 34 is 2 - 3 μm, and the thickness of the polymer upper cladding 36 located above the silicon dioxide lower cladding 32 is 4 - 6 μm.

[0016] The structure of a few-mode interlayer coupler described in the present invention, its preparation process flow is shown in Figure 4 , and is specifically described as follows:

[0017] A: Cleaning treatment of the surface of the silicon dioxide substrate

[0018] Use a cotton ball with acetone to wipe and clean the surface of the silicon dioxide substrate (composed of the silicon wafer substrate 31 and the silicon dioxide lower cladding 32 grown on the surface of the silicon wafer substrate 31), then use a cotton ball dipped in ethanol to wipe and clean the surface of the silicon dioxide substrate, and finally rinse the substrate with deionized water to make the substrate surface clean. After that, dry the substrate with nitrogen and put it into a clean petri dish and seal it;

[0019] B: Preparation of the lower silicon nitride thin film

[0020] Use the PECVD method to deposit a silicon nitride thin film with a stoichiometric ratio of Si 3 N 4 on the surface of the silicon dioxide substrate when the temperature reaches 100 - 200 °C. The thickness of the deposited silicon nitride thin film is 0.2 - 0.6 μm;

[0021] C: Preparation of the lower silicon nitride two-dimensional grating and the lower silicon nitride straight waveguide

[0022] Use the spin coating process to spin coat the positive photoresist BP218 on the lower silicon nitride thin film. The parameters of the spin coater are first set to 300 - 600 rpm, the acceleration time is 2 - 5 seconds, and the constant speed time is 10 - 15 seconds; then the rotation speed is set to 1000 - 2000 rpm, the acceleration time is 5 - 10 seconds, and the constant speed time is 10 - 30 seconds; then the time to decelerate to 0 is set to 10 - 30 seconds; after the spin coating is completed, place the substrate on the heating table for pre-baking, that is, use the stepwise heating method to heat at 60 - 80 °C for 1 - 2 minutes, and then heat at 110 - 130 °C for 2 - 3 minutes. After the heating is completed, place it at room temperature and let it cool naturally for 1 - 2 hours; perform alignment lithography on the photoresist film. In the present invention, a contact lithography machine is used for exposure, the working wavelength is ultraviolet light of 350 - 400 nm, the exposure time is set to 10 - 25 seconds, and the mask is the structure of the lower silicon nitride straight waveguide core layer 33 to be prepared (such as Figure 1 and Figure 3As shown in the figure, the photoresist in the area outside the structure of the lower silicon nitride straight waveguide core layer 33 is fully exposed; after the lithography is completed, the substrate is removed and post-baked, that is, it is heated at 60-80 °C for 1-2 minutes by a stepwise temperature increase method, and then heated at 120-140 °C for 2-3 minutes. After the heating is completed, it is placed at room temperature and allowed to cool naturally for 1-2 hours; after the cooling is completed, development is carried out. The substrate is placed in the BP218 photoresist developer for wet etching for 20-30 seconds to remove the exposed photoresist. After the development is completed, the substrate should be taken out immediately and rinsed with deionized water multiple times (when rinsing, it should be rinsed along the waveguide direction to prevent damage to the waveguide), and the residual developer and other impurities on the substrate are washed away, and then the residual deionized water on the substrate is blown dry with nitrogen; finally, the cleaned substrate is placed on a drying table for drying operation. This step is called hard baking, which enhances the adhesion of the photoresist and at the same time improves the stability of the remaining photoresist in the subsequent processing steps (has stronger corrosion resistance), and will also make the photoresist close to the molten state with clear edge contours. The hard baking time is set to 2-4 minutes, and the hard baking temperature is set to 100-140 °C. After the heating is completed, it is allowed to cool naturally at room temperature for 1-2 hours;

[0023] After the hard baking is completed, RIE etching (reactive ion etching, which has the advantages of strong anisotropy and selectivity) is started to process the substrate, so that the silicon nitride thin film outside the structure of the lower silicon nitride straight waveguide core layer 33 is etched away, exposing the underlying silicon dioxide cladding. Trifluoromethane (CHF 3 ) is used as the etching gas, the selected gas flow rate is 80-130 sccm, the etching power is 110-160 W, the chamber pressure is 2.4 Pa, and the etching time is 12-15 minutes; after the etching is completed, the substrate is degummed. The substrate is immersed in an organic solvent for 2-3 minutes, and the substrate is gently shaken at the same time. Then the substrate is cleaned with deionized water and the residual deionized water on the substrate is blown dry with nitrogen; then the residual photoresist on the lower silicon nitride waveguide is bombarded by oxygen plasma under the acceleration of the electric field to further remove the photoresist. The gas flow rate is 60-75 sccm, the etching power is 75-90 W, the chamber pressure is 8-12 Pa, and the etching time is 9-13 minutes; after the oxygen plasma etching, the substrate is cleaned again with deionized water, and the residual deionized water on the substrate is blown clean with nitrogen. In this way, the structure of the lower silicon nitride straight waveguide core layer 33 is prepared on the silicon dioxide cladding;

[0024] D: Preparation of the lower part of the polymer interlayer coupling layer

[0025] The polymer interlayer coupling layer material (a series of ultraviolet negative photoresist materials such as EpoCore, EpoClad, SU-8 2002, SU-8 2005, NOA, etc. that can be etched by wet etching, and its refractive index is higher than that of the polymer upper cladding) is spin-coated on the upper surfaces of the lower silicon nitride straight waveguide core layer 33 and the silica lower cladding 32, and the grooves in the lower two-dimensional grating waveguide 4 are uniformly filled; the rotation speed of the spin coater is first set to 1000 - 1500 rpm, the acceleration time is set to 2 - 5 seconds, and the constant speed time is set to 10 - 20 seconds; then the rotation speed is set to 2000 - 3500 rpm, the acceleration time is set to 5 - 10 seconds, and the constant speed time is set to 20 - 30 seconds; then the time to decelerate to 0 is set to 20 - 30 seconds; the thickness of the polymer interlayer coupling layer thin film formed is 0.8 - 2.6 μm; the substrate after spin coating is heated, that is, by the method of stepwise heating, heated at 60 - 80 °C for 10 - 15 minutes, and then heated at 100 - 120 °C for 20 - 30 minutes. After heating, the substrate is placed at room temperature for natural cooling treatment, and the cooling time is 1 - 2 hours; the polymer interlayer coupling layer thin film is lithographed, and contact lithography is used for processing. The working wavelength of the lithography machine is ultraviolet light with a wavelength of 350 - 400 nm, the exposure time is set to 5 - 10 seconds, and the mask is the structure of the polymer interlayer coupling layer 34 to be prepared, so that the material in the area of the polymer interlayer coupling layer 34 to be prepared is exposed; after the substrate is completed with lithography, it is taken down, and the substrate is post-baked and heated, that is, heated at 60 - 100 °C for 10 - 15 minutes, and then heated at 100 - 130 °C for 20 - 30 minutes. After heating, the substrate is placed at room temperature for natural cooling treatment, and the cooling time is 1 - 2 hours; after the temperature drops, the substrate is developed, and the substrate is placed in the corresponding developer for wet etching. The development time is 15 - 30 seconds, and the non-retained area (the area outside the structure of the polymer interlayer coupling layer 34) that is not exposed is removed. Then the substrate is put into an isopropyl alcohol solution to wash away the residual optical waveguide core layer material and the developer on the surface of the substrate; finally, it is rinsed multiple times with deionized water along the waveguide direction (when rinsing, it should be rinsed along the waveguide direction to prevent the waveguide from being damaged), the impurities such as isopropyl alcohol on the surface of the substrate are removed, and then it is dried with nitrogen; finally, the hardening operation is carried out, that is, heated at 120 - 140 °C for 20 - 40 minutes, and the substrate is placed at room temperature for natural cooling treatment, and the cooling time is 1 - 2 hours. In this way, the lower part of the polymer interlayer coupling layer 34 is fabricated on the lower silicon nitride straight waveguide core layer 33 (this preparation step is to prepare the polymer interlayer coupling layer below the lower surface of the upper silicon nitride straight waveguide core layer 35, so the thickness of the polymer interlayer coupling layer prepared in this step should be h 层间耦合层 -h 上氮化硅芯层 , and the thickness of the polymer interlayer coupling layer between the upper silicon nitride straight waveguide core layer 35 and the lower silicon nitride straight waveguide core layer 33 should be h层间耦合层 -h 下氮化硅芯层 -h 上氮化硅芯层 )。

[0026] E: Preparation of the upper silicon nitride thin film

[0027] Using the PECVD method, when the temperature reaches 100 - 200 °C, deposit a silicon nitride thin film with a stoichiometry of Si 3 N 4 on the upper surfaces of the lower polymer layer intercoupling layer 34 and the silicon dioxide lower cladding layer 32. The thickness of the deposited silicon nitride thin film is 0.2 - 0.6 μm;

[0028] F: Preparation of the upper silicon nitride two - dimensional grating and the upper silicon nitride straight waveguide

[0029] Spin - coat the positive photoresist BP218 on the upper silicon nitride thin film. The parameters of the spin coater are first set to 300 - 600 rpm, with an acceleration time of 2 - 5 seconds and a constant speed time of 10 - 15 seconds; then set the rotation speed to 1000 - 2000 rpm, with an acceleration time of 5 - 10 seconds and a constant speed time of 10 - 30 seconds; then set the time to decelerate to 0 to be 10 - 30 seconds; after spin - coating, place the substrate on a heating stage for pre - baking, that is, use a step - wise temperature increase method to heat at 60 - 80 °C for 1 - 2 minutes, then heat at 110 - 130 °C for 2 - 3 minutes, and after heating, place it at room temperature to cool naturally for 1 - 2 hours; perform alignment lithography on the photoresist film. In the present invention, a contact aligner is used for exposure, with ultraviolet light having a working wavelength of 350 - 400 nm, and the exposure time is set to 10 - 25 seconds. The mask is the structure of the upper silicon nitride straight waveguide core layer 35 (such as Figure 1 and Figure 3As shown in the figure, the photoresist in the area outside the upper silicon nitride straight waveguide core layer 35 structure is fully exposed; after lithography, the substrate is removed for post-baking, that is, it is heated at 60 - 80 °C for 1 - 2 minutes by the method of stepped heating, and then heated at 120 - 140 °C for 2 - 3 minutes. After heating, it is placed at room temperature and allowed to cool naturally for 1 - 2 hours; after cooling, development is carried out. The substrate is placed in the BP218 photoresist developer for wet etching for 20 - 30 seconds to remove the exposed photoresist. After development, the substrate needs to be taken out immediately and rinsed with deionized water multiple times (rinsing should be along the waveguide direction to prevent damage to the waveguide), and the residual developer and other impurities on the substrate are washed away, and then the residual deionized water on the substrate is blown dry with nitrogen; finally, the cleaned substrate is placed on a drying table for drying operation. This step is called hard baking, which enhances the adhesion of the photoresist, improves the stability of the remaining photoresist in subsequent processing steps (with stronger corrosion resistance), and also makes the photoresist close to the molten state with clear edge contours. The hard baking time is set to 2 - 4 minutes, and the hard baking temperature is set to 100 - 140 °C. After heating is completed, it is allowed to cool naturally at room temperature for 1 - 2 hours;

[0030] After hard baking is completed, RIE etching (reactive ion etching, which has the advantages of strong anisotropy and selectivity) is carried out to process the substrate, so that the silicon nitride thin film outside the upper silicon nitride straight waveguide core layer 35 is etched away, exposing the silica lower cladding 32 and the lower part of the polymer interlayer coupling layer 34. Trifluoromethane (CHF 3 ) is selected as the etching gas, the selected gas flow rate is 80 - 130 sccm, the etching power is 110 - 160 W, the chamber pressure is 2.4 Pa, the etching time is 12 - 15 minutes. After etching is completed, the substrate is subjected to a degumming operation. The substrate is immersed in an organic solvent for 2 - 3 minutes, and the substrate is gently shaken at the same time. Then the substrate is cleaned with deionized water and the residual deionized water on the substrate is blown dry with nitrogen; then the residual photoresist on the upper silicon nitride waveguide is bombarded by oxygen plasma under the acceleration of the electric field to further remove the photoresist. The gas flow rate is 60 - 75 sccm, the etching power is 75 - 90 W, the chamber pressure is 8 - 12 Pa, and the etching time is 9 - 13 minutes; after oxygen plasma etching, the substrate needs to be cleaned again with deionized water, and the residual deionized water on the substrate is blown clean with nitrogen. In this way, the upper silicon nitride straight waveguide core layer 35 is prepared on the lower part of the polymer interlayer coupling layer 34;

[0031] G: Preparation of the remaining polymer interlayer coupling layer

[0032] The polymer interlayer coupling layer material (a series of ultraviolet negative photoresist materials that can be wet-etched, such as EpoCore, EpoClad, SU-8 2002, SU-8 2005, NOA, etc.) is spin-coated on the surfaces of the upper silicon nitride straight waveguide core layer 35 and the silica lower cladding layer 32, and uniformly fills the grooves in the upper two-dimensional grating waveguide 2; the rotation speed of the spin coater is first set to 4000 - 4500 rpm, the acceleration time is set to 2 - 5 seconds, and the constant speed time is set to 10 - 20 seconds; then the rotation speed is set to 5000 - 6500 rpm, the acceleration time is set to 5 - 10 seconds, and the constant speed time is set to 20 - 30 seconds; then the time to decelerate to 0 is set to 20 - 30 seconds; the thickness of the formed polymer thin film is 0.2 - 0.5 μm; the substrate after spin coating is heated, that is, by the method of stepwise temperature increase, heated at 60 - 80 °C for 10 - 15 minutes, and then heated at 100 - 120 °C for 20 - 30 minutes. After heating, the substrate is placed at room temperature for natural cooling, and the cooling time is 1 - 2 hours; the polymer thin film is lithographed, processed by contact lithography, the working wavelength of the lithography machine is ultraviolet light of 350 - 400 nm, the exposure time is set to 5 - 10 seconds, the mask is the polymer interlayer coupling layer structure to be prepared, so that the material in the required polymer interlayer coupling layer region is exposed; after the substrate is completed with lithography, it is taken down, and the substrate is post-baked and heated, heated at 60 - 100 °C for 10 - 15 minutes, and then heated at 100 - 130 °C for 20 - 30 minutes. After heating, the substrate is placed at room temperature for natural cooling, and the cooling time is 1 - 2 hours; after cooling, the substrate is developed, the substrate is placed in the corresponding developer for wet etching, the development time is 15 - 30 seconds, the non-retained area (the part outside the polymer interlayer coupling layer 34) that is not exposed is removed, and then the substrate is put into an isopropyl alcohol solution to wash away the residual optical waveguide core layer material and developer on the substrate surface; finally, it is rinsed multiple times with deionized water along the waveguide direction (when rinsing, it should be rinsed along the waveguide direction to prevent the waveguide from being damaged), the impurities such as isopropyl alcohol on the substrate surface are removed, and then dried with nitrogen; finally, the hardening operation is carried out, heated at 120 - 140 °C for 20 - 40 minutes, the substrate is placed at room temperature for natural cooling, and the cooling time is 1 - 2 hours, thus obtaining the polymer interlayer coupling layer 34 with an overall thickness of 2 - 3 μm;

[0033] H: Preparation of Polymer Upper Cladding

[0034] The polymer upper cladding material (a series of organic polymer materials with good transparency including polymethyl methacrylate (PMMA), polyethylene (PE), polyester (PET), polycarbonate (PC), polyimide (PI), polystyrene (PS), etc.) is spin-coated on the substrate on which the polymer interlayer coupling layer 34 has been prepared by a spin-coating process. The spin-coating speed is 2000 - 4000 rpm, and then it is heated at 120 - 150 °C for 20 - 40 minutes. The thickness of the polymer upper cladding above the silicon dioxide lower cladding 32 is 4 - 6 μm.

[0035] Compared with the existing device structures and fabrication technologies, the beneficial effects of the present invention are as follows: In the few-mode interlayer coupler of the present invention, the advantages of the silicon nitride material having a large transparent window, high thermal stability, and the mature and compatible processes of the polymer material and the silicon nitride material are fully utilized. Compared with the existing interlayer couplers, in the present invention, a two-dimensional grating structure is adopted. Light is input from the upper silicon nitride core straight waveguide 1, and when passing through the upper silicon nitride upper two-dimensional grating waveguide 2, it diffracts into the polymer interlayer coupling layer 3. When the diffracted light is stable during transmission in the polymer interlayer coupling layer 3, it couples into the lower silicon nitride lower two-dimensional grating waveguide 4. After coupling, the light is transmitted to the lower silicon nitride straight waveguide 5, and it can perform high-efficiency interlayer coupling for multiple modes in the wavelength band of 1500 - 1620 nm. Moreover, the process of the present invention has the characteristics of simplicity, maturity, and stability, only requiring conventional processes such as spin-coating, photolithography, and etching, which reduces the fabrication difficulty. And this invention makes up for the problems of low coupling efficiency for multiple modes, large crosstalk, and large device size of the interlayer coupler in the mode division multiplexing system, expands the application of the three-dimensional optical chip MDM system, and also provides a new idea for the design of few-mode interlayer couplers. Brief Description of the Drawings

[0036] Figure 1 (a): Figure 2 Schematic cross-sectional view of the waveguide at the A - A' position in

[0037] Figure 1 (b): Figure 2 Schematic cross-sectional view of the waveguide at the B - B' position in

[0038] Figure 1 (c): Figure 2 Schematic cross-sectional view of the waveguide at the C - C' position in

[0039] Figure 1 (d): Figure 2 Schematic cross-sectional view of the waveguide at the D - D' position in

[0040] Figure 1 (e): Figure 2 Schematic cross-sectional view of the waveguide at the E - E' position in

[0041] Figure 2 : Schematic structural diagram of a few-mode interlayer coupler according to the present invention;

[0042] Figure 3 : Schematic structural diagram of a two-dimensional grating waveguide of a few-mode interlayer coupler according to the present invention;

[0043] Figure 4 : Process flow chart for preparing a few-mode interlayer coupler according to the present invention;

[0044] Figure 5 (a): Simulation diagram of the input waveguide optical field distribution in the upper silicon nitride straight waveguide 1 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TE 0 mode light;

[0045] Figure 5 (b): Simulation diagram of the optical field transmission in the upper silicon nitride straight waveguide 1 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TE 0 mode light;

[0046] Figure 5 (c): Simulation diagram of the optical field transmission in the lower silicon nitride straight waveguide 5 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TE 0 mode light;

[0047] Figure 5 (d): Simulation diagram of the optical field transmission in the device when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TE 0 mode light;

[0048] Figure 5 (e): Simulation diagram of the output waveguide optical field distribution in the lower silicon nitride straight waveguide 5 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TE 0 mode light;

[0049] Figure 6 (a): Simulation diagram of the input waveguide optical field distribution in the upper silicon nitride straight waveguide 1 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TE 1 mode light;

[0050] Figure 6 (b): Simulation diagram of the optical field transmission in the upper silicon nitride straight waveguide 1 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TE 1 mode light;

[0051] Figure 6 (c): Simulation diagram of the optical field transmission in the lower silicon nitride straight waveguide 5 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TE 1 mode light;

[0052] Figure 6 (d): Simulation diagram of optical field transmission in the device when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TE 1 mode light;

[0053] Figure 6 (e): Simulation diagram of the output waveguide optical field distribution in the lower silicon nitride straight waveguide 5 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TE 1 mode light;

[0054] Figure 7 (a): Simulation diagram of the input waveguide optical field distribution in the upper silicon nitride straight waveguide 1 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TE 2 mode light;

[0055] Figure 7 (b): Simulation diagram of optical field transmission in the upper silicon nitride straight waveguide 1 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TE 2 mode light;

[0056] Figure 7 (c): Simulation diagram of optical field transmission in the lower silicon nitride straight waveguide 5 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TE 2 mode light;

[0057] Figure 7 (d): Simulation diagram of optical field transmission in the device when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TE 2 mode light;

[0058] Figure 7 (e): Simulation diagram of the output waveguide optical field distribution in the lower silicon nitride straight waveguide 5 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TE 2 mode light;

[0059] Figure 8 (a): Simulation diagram of the input waveguide optical field distribution in the upper silicon nitride straight waveguide 1 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TM 0 mode light;

[0060] Figure 8 (b): Simulation diagram of optical field transmission in the upper silicon nitride straight waveguide 1 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TM 0 mode light;

[0061] Figure 8 (c): Simulation diagram of optical field transmission in the lower silicon nitride straight waveguide 5 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TM 0 mode light;

[0062] Figure 8 (d): Simulation diagram of optical field transmission in the device when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TM 0 mode light;

[0063] Figure 8 (e): Simulation diagram of the output waveguide optical field distribution in the lower silicon nitride straight waveguide 5 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TM 0 mode light;

[0064] Figure 9 (a): Simulation diagram of the input waveguide optical field distribution in the upper silicon nitride straight waveguide 1 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TM 1 mode light;

[0065] Figure 9 (b): Simulation diagram of optical field transmission in the upper silicon nitride straight waveguide 1 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TM 1 mode light;

[0066] Figure 9 (c): Simulation diagram of optical field transmission in the lower silicon nitride straight waveguide 5 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TM 1 mode light;

[0067] Figure 9 (d): Simulation diagram of optical field transmission in the device when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TM 1 mode light;

[0068] Figure 9 (e): Simulation diagram of the output waveguide optical field distribution in the lower silicon nitride straight waveguide 5 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TM 1 mode light;

[0069] Figure 10 (a): Simulation diagram of the input waveguide optical field distribution in the upper silicon nitride straight waveguide 1 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TM 2 mode light;

[0070] Figure 10 (b): Simulation diagram of optical field transmission in the upper silicon nitride straight waveguide 1 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TM 2 mode light;

[0071] Figure 10 (c): Simulation diagram of optical field transmission in the lower silicon nitride straight waveguide 5 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TM 2 mode light;

[0072] Figure 10 (d): Simulation diagram of optical field transmission in the device when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TM 2 mode light;

[0073] Figure 10 (e): Simulation diagram of the output waveguide optical field distribution in the lower silicon nitride straight waveguide 5 when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TM 2 mode light;

[0074] Figure 11 : Curve diagram of the transmission efficiency of the device varying with wavelength in the 1500 - 1620 nm band when the few-mode interlayer coupler based on the two-dimensional grating structure transmits TE 0 、TE 1 、TE 2 、TM 0 、TM 1 、TM 2 six modes of light;

[0075] As Figure 1 shown, Figure 1 (a), Figure 1 (b), Figure 1 (c), Figure 1 (d), Figure 1 (e) are respectively the cross-sectional schematic diagrams at the A - A', B - B', C - C', D - D', E - E' positions in Figure 2 ;

[0076] As Figure 2 shown, the names of each component are: upper silicon nitride straight waveguide 1, upper two-dimensional grating waveguide 2, polymer interlayer coupling layer 34, lower two-dimensional grating waveguide 4, lower silicon nitride straight waveguide 5;

[0077] As Figure 3 shown, the names of each component are: upper two-dimensional grating waveguide 2, lower two-dimensional grating waveguide 4;

[0078] As Figure 4 shown, it is the structural preparation flow chart of a few-mode interlayer coupler according to the present invention. In the figure, 31 is a silicon substrate, 32 is a silicon dioxide lower cladding, 33 is a lower silicon nitride straight waveguide core layer prepared by LPCVD growth, photolithography, and RIE etching processes, 34 is a polymer interlayer coupling layer prepared by spin coating, photolithography, and wet etching processes, 35 is an upper silicon nitride straight waveguide core layer prepared by LPCVD growth, photolithography, and RIE etching processes, and 36 is a polymer upper cladding prepared by spin coating process;

[0079] As Figure 5As shown, during the simulation, we selected the materials and structural dimensions used in Example 1. From the simulation results, it can be seen that for the designed few-mode interlayer coupler when transmitting TE 0 mode light, the light is well confined in the upper two-dimensional grating, the lower two-dimensional grating, and the polymer interlayer coupling layer, and the device can achieve high-efficiency interlayer coupling for TE 0 mode light;

[0080] As Figure 6 shown, during the simulation, we selected the materials and structural dimensions used in Example 1. From the simulation results, it can be seen that for the designed few-mode interlayer coupler when transmitting TE 1 mode light, the light is well confined in the upper two-dimensional grating, the lower two-dimensional grating, and the polymer interlayer coupling layer, and the device can achieve high-efficiency interlayer coupling for TE 1 mode light;

[0081] As Figure 7 shown, during the simulation, we selected the materials and structural dimensions used in Example 1. From the simulation results, it can be seen that for the designed few-mode interlayer coupler when transmitting TE 2 mode light, the light is well confined in the upper two-dimensional grating, the lower two-dimensional grating, and the polymer interlayer coupling layer, and the device can achieve high-efficiency interlayer coupling for TE 2 mode light;

[0082] As Figure 8 shown, during the simulation, we selected the materials and structural dimensions used in Example 1. From the simulation results, it can be seen that for the designed few-mode interlayer coupler when transmitting TM 0 mode light, the light is well confined in the upper two-dimensional grating, the lower two-dimensional grating, and the polymer interlayer coupling layer, and the device can achieve high-efficiency interlayer coupling for TM 0 mode light;

[0083] As Figure 9 shown, during the simulation, we selected the materials and structural dimensions used in Example 1. From the simulation results, it can be seen that for the designed few-mode interlayer coupler when transmitting TM 1 mode light, the light is well confined in the upper two-dimensional grating, the lower two-dimensional grating, and the polymer interlayer coupling layer, and the device can achieve high-efficiency interlayer coupling for TM 1 mode light;

[0084] As Figure 10 shown, during the simulation, we selected the materials and structural dimensions used in Example 1. From the simulation results, it can be seen that for the designed few-mode interlayer coupler when transmitting TM 2In the case of the mode light, the light is well confined in the upper two-dimensional grating, the lower two-dimensional grating, and the polymer layer intercoupling layer, and the device can achieve high-efficiency interlayer coupling for the TM 2 mode light;

[0085] As Figure 11 shown, in the simulation process, we selected the materials and structural dimensions used in Example 1. Under the condition of selecting this structural parameter and material, it can be seen that the structure of the few-mode interlayer coupler described in the present invention has a transmission efficiency greater than 80% in the wavelength range of 1500-1620 nm. It can be seen that the structure of the few-mode interlayer coupler described in the present invention realizes the interlayer coupling function with small size, high efficiency, low loss, and large bandwidth. Specific Embodiments

[0086] Example 1

[0087] The present invention will be further described below with reference to the drawings and examples.

[0088] The structure of the example is as Figure 2 shown. The lengths L of the upper silicon nitride straight waveguide 1 and the lower silicon nitride straight waveguide 5 1 are equal, both being 1 cm; the lengths L of the upper two-dimensional grating waveguide 2 and the lower two-dimensional grating waveguide 4 2 are equal, both being 16.8 μm; the horizontal distance L between the output end face of the upper two-dimensional grating waveguide 2 and the input end face of the lower two-dimensional grating waveguide 4 3 is 21 μm; the length L of the polymer layer intercoupling layer 34 4 is 2 cm.

[0089] As Figure 3 shown, the upper surface of the core layer 35 of the upper silicon nitride straight waveguide is in the same plane as the upper surface of the polymer layer intercoupling layer 34, and the lower surface of the core layer 33 of the lower silicon nitride straight waveguide is in the same plane as the lower surface of the polymer layer intercoupling layer 34; the structural dimensions of the upper two-dimensional grating waveguide 2 and the lower two-dimensional grating waveguide 4 are exactly the same. In the two-dimensional grating structure, the interval distance between adjacent grooves parallel to the light propagation direction is the same as the groove length W 1 and is 0.7 μm; the interval distance between adjacent grooves perpendicular to the light propagation direction is the same as the groove width W 2 and is 0.1 μm; the adjacent grooves along the light propagation direction and perpendicular to the light propagation direction are staggered and do not overlap with each other. In the upper two-dimensional grating waveguide 2 and the lower two-dimensional grating waveguide 4, the number of rows N of grooves parallel to the light propagation direction x is 24, and the number of columns N of grooves perpendicular to the light propagation direction y is 54.

[0090] As Figure 1 shown, Figure 1 (a),Figure 1 (b), Figure 1 (c), Figure 1 (d), Figure 1 (e) are respectively Figure 2 the cross-sectional schematic diagrams at positions A-A’, B-B’, C-C’, D-D’, and E-E’ in 3 The width W of the polymer interlayer coupling layer is 6 μm; the structural dimensions of the upper silicon nitride straight waveguide 1 and the lower silicon nitride straight waveguide 5 are exactly the same, and the width W 4 is 5.7 μm.

[0091] The thickness of the silicon wafer substrate 31 is 1 mm, the thickness of the silicon dioxide lower cladding 32 is 6 μm, the thicknesses of the lower silicon nitride straight waveguide core layer 33 and the upper silicon nitride straight waveguide core layer 35 are the same at 0.3 μm, the thickness of the polymer interlayer coupling waveguide 34 is 2.5 μm, and the thickness of the polymer upper cladding 36 is 5 μm.

[0092] When light is input from the upper silicon nitride straight waveguide 1 and passes through the upper silicon nitride upper two-dimensional grating waveguide 2, the light diffracts into the polymer interlayer coupling layer 3. When the diffracted light is stable during transmission in the polymer interlayer coupling layer 3, it couples into the lower silicon nitride lower two-dimensional grating waveguide 4, and after coupling, the light is transmitted into the lower silicon nitride straight waveguide 5.

[0093] As Figure 5 shown, Figure 5 (a), Figure 5 (b), Figure 5 (c), Figure 5 (d), Figure 5 (e) are respectively the simulated diagrams of the input waveguide optical field distribution in the upper silicon nitride straight waveguide, the simulated diagram of the optical field transmission in the upper silicon nitride, the simulated diagram of the optical field transmission in the lower silicon nitride, the simulated diagram of the optical field transmission in the device, and the simulated diagram of the output waveguide optical field distribution in the lower silicon nitride straight waveguide when the device transmits TE 0 mode light. It can be seen from the simulation results that TE 0 mode light can perform high-efficiency interlayer coupling, and the coupling efficiency is 87.3% (@1550 nm).

[0094] As Figure 6 shown, Figure 6 (a), Figure 6 (b), Figure 6 (c), Figure 6 (d), Figure 6 (e) are respectively the simulated diagrams of the input waveguide optical field distribution in the upper silicon nitride straight waveguide, the simulated diagram of the optical field transmission in the upper silicon nitride, the simulated diagram of the optical field transmission in the lower silicon nitride, the simulated diagram of the optical field transmission in the device, and the simulated diagram of the output waveguide optical field distribution in the lower silicon nitride straight waveguide when the device transmits TE 1When in the mode of optical light, simulation diagrams of the input waveguide optical field distribution in the upper silicon nitride straight waveguide, simulation diagrams of the optical field transmission in the upper silicon nitride, simulation diagrams of the optical field transmission in the lower silicon nitride, simulation diagrams of the optical field transmission in the device, and simulation diagrams of the output waveguide optical field distribution in the lower silicon nitride straight waveguide. It can be seen from the simulation results that TE 1 mode optical light can perform high-efficiency interlayer coupling, and the coupling efficiency is 85.5% (@1550nm).

[0095] As Figure 7 shown, Figure 7 (a), Figure 7 (b), Figure 7 (c), Figure 7 (d), Figure 7 (e) are respectively the simulation diagrams of the input waveguide optical field distribution in the upper silicon nitride straight waveguide, the simulation diagrams of the optical field transmission in the upper silicon nitride straight waveguide, the simulation diagrams of the optical field transmission in the lower silicon nitride straight waveguide, the simulation diagrams of the optical field transmission in the device, and the simulation diagrams of the output waveguide optical field distribution in the lower silicon nitride straight waveguide when the device is transmitting TE 2 mode optical light. It can be seen from the simulation results that TE 2 mode optical light can perform high-efficiency interlayer coupling, and the coupling efficiency is 80.3% (@1550nm).

[0096] As Figure 8 shown, Figure 8 (a), Figure 8 (b), Figure 8 (c), Figure 8 (d), Figure 8 (e) are respectively the simulation diagrams of the input waveguide optical field distribution in the upper silicon nitride straight waveguide, the simulation diagrams of the optical field transmission in the upper silicon nitride straight waveguide, the simulation diagrams of the optical field transmission in the lower silicon nitride straight waveguide, the simulation diagrams of the optical field transmission in the device, and the simulation diagrams of the output waveguide optical field distribution in the lower silicon nitride straight waveguide when the device is transmitting TM 0 mode optical light. It can be seen from the simulation results that TM 0 mode optical light can perform high-efficiency interlayer coupling, and the coupling efficiency is 93.3% (@1550nm).

[0097] As Figure 9 shown, Figure 9 (a), Figure 9 (b), Figure 9 (c), Figure 9 (d), Figure 9 (e) are respectively the simulation diagrams of the input waveguide optical field distribution in the upper silicon nitride straight waveguide, the simulation diagrams of the optical field transmission in the upper silicon nitride straight waveguide, the simulation diagrams of the optical field transmission in the lower silicon nitride straight waveguide, the simulation diagrams of the optical field transmission in the device, and the simulation diagrams of the output waveguide optical field distribution in the lower silicon nitride straight waveguide when the device is transmitting TM 1When in the mode of optical light, simulation diagrams of the input waveguide optical field distribution in the upper silicon nitride straight waveguide, simulation diagrams of the optical field transmission in the upper silicon nitride straight waveguide, simulation diagrams of the optical field transmission in the lower silicon nitride straight waveguide, simulation diagrams of the optical field transmission in the device, and simulation diagrams of the output waveguide optical field distribution in the lower silicon nitride straight waveguide. It can be seen from the simulation results that TM 1 mode optical light can perform high-efficiency interlayer coupling, and the coupling efficiency is 94.1% (@1550nm).

[0098] As Figure 10 shown Figure 10 (a), Figure 10 (b), Figure 10 (c), Figure 10 (d), Figure 10 (e) are respectively the simulation diagrams of the input waveguide optical field distribution in the upper silicon nitride straight waveguide, the simulation diagrams of the optical field transmission in the upper silicon nitride straight waveguide, the simulation diagrams of the optical field transmission in the lower silicon nitride straight waveguide, the simulation diagrams of the optical field transmission in the device, and the simulation diagrams of the output waveguide optical field distribution in the lower silicon nitride straight waveguide when the device is transmitting TM 2 mode optical light. It can be seen from the simulation results that TM 2 mode optical light can perform high-efficiency interlayer coupling, and the coupling efficiency is 92.4% (@1550nm).

[0099] As Figure 11 shown, when the input optical light is TE 0 , TE 1 , TE 2 , TM 0 , TM 1 , TM 2 six modes of optical light, the transmission efficiency is greater than 80% in the wavelength range of 1500nm - 1620nm. It can be seen that the structure of a super-compact few-mode interlayer coupler described in the present invention realizes the functions of mode-insensitive, high-efficiency, low-loss, and large-bandwidth interlayer coupling.

[0100] Example 2

[0101] Use a cotton ball with acetone to wipe and clean the surface of the silica substrate (composed of a silicon wafer substrate 31 and a silica lower cladding layer 32 grown on the surface of the silicon wafer substrate 31), then use a cotton ball dipped in ethanol to wipe and clean the silica substrate, and finally rinse the substrate with deionized water to make the surface of the substrate clean. Then dry the substrate with nitrogen and put it into a clean petri dish and seal it;

[0102] Preparation of the lower two-dimensional grating waveguide and the lower silicon nitride straight waveguide: Use the PECVD method to deposit the lower silicon nitride thin film. When the temperature reaches 120°C, deposit a silicon nitride with a stoichiometric ratio of Si 3 N 4The underlying silicon nitride thin film, and the deposited thickness of the underlying silicon nitride thin film is 0.3 μm; the positive photoresist BP218 is spin-coated on the silicon nitride thin film using the spin-coating process. The parameters of the spin coater are first set to 400 rpm, with an acceleration time of 5 seconds and a constant speed time of 15 seconds; then the rotation speed is set to 1200 rpm, the acceleration time is 10 seconds, and the constant speed time is 20 seconds; then the time to decelerate to 0 is set to 10 seconds; after spin coating, the substrate is placed on a heating stage for pre-baking. The stepwise heating method is used to heat at 80 °C for 2 minutes, then at 120 °C for 3 minutes. After heating, it is placed at room temperature and allowed to cool naturally for 2 hours; the photoresist film is subjected to alignment lithography. In the present invention, a contact lithography machine is used for exposure, and ultraviolet light with a working wavelength of 350 - 400 nm is used, and the exposure time is set to 11 seconds. The mask is the structure of the underlying silicon nitride straight waveguide core layer 33 to be prepared (as Figure 3 shown), so that the area outside the structure of the underlying silicon nitride straight waveguide core layer 33 is fully exposed; after lithography, the substrate is removed and post-baked. The stepwise heating method is used to heat at 70 °C for 2 minutes, then at 120 °C for 3 minutes. After heating, it is placed at room temperature and allowed to cool naturally for 2 hours; after cooling, development is carried out. The substrate is placed in the BP218 photoresist developer for wet etching for 20 seconds to remove the photoresist in the exposed part. After development, the substrate should be immediately taken out and rinsed multiple times with deionized water (rinsing should be carried out along the waveguide direction to prevent damage to the waveguide), and the residual developer and other impurities on the substrate are washed away. Finally, the residual deionized water on the substrate is blown dry with nitrogen; finally, the cleaned substrate is placed on a drying stage for drying operation. This step is called hard baking, which enhances the adhesion of the photoresist and at the same time improves the stability of the remaining photoresist in subsequent processing steps (has stronger corrosion resistance), and will also make the photoresist close to the molten state with a clear edge profile. The hard baking time is set to 3 minutes, and the hard baking temperature is set to 130 °C. After heating, it is allowed to cool naturally at room temperature for 2 hours;

[0103] After hard baking is completed, RIE etching (reactive ion etching, which has the advantages of strong anisotropy and selectivity) is started to process the substrate, so that the silicon nitride thin film outside the structure of the underlying silicon nitride straight waveguide core layer 33 is etched away, exposing the underlying silica cladding. Trifluoromethane (CHF 3)As the etching gas, the selected gas flow rate is 90 sccm, the etching power is 140 W, the chamber pressure is 2.4 Pa, and the etching time is 13 minutes. After etching, the substrate is subjected to a degluing operation. The substrate is immersed in an organic solvent for 2 minutes while gently shaking the substrate. Then, the substrate is cleaned with deionized water and the residual deionized water on the substrate is blown dry with nitrogen; Then, the residual photoresist on the underlying silicon nitride waveguide is bombarded by oxygen plasma under the acceleration of the electric field to further remove the photoresist. The gas flow rate is 70 sccm, the etching power is 80 W, the chamber pressure is 11 Pa, and the etching time is 11 minutes; After oxygen plasma etching, the substrate needs to be cleaned again with deionized water and the residual deionized water on the substrate is blown clean. In this way, the lower silicon nitride straight waveguide core layer 33 structure is fabricated on the silica lower cladding;

[0104] Preparation of partial polymer interlayer coupling layer: The polymer core layer material SU-8 2002 was spin-coated on the upper surfaces of the lower silicon nitride straight waveguide core layer 33 and the silicon dioxide lower cladding layer 32, and the grooves in the lower two-dimensional grating waveguide 4 were uniformly filled; the rotation speed of the spin coater was first set to 1300 rpm, the acceleration time was set to 5 seconds, and the constant speed time was set to 15 seconds; then the rotation speed was set to 2800 rpm, the acceleration time was set to 8 seconds, and the constant speed time was set to 25 seconds; then the time to decelerate to 0 was set to 25 seconds; the thickness of the polymer interlayer coupling layer thin film formed was 2.2 μm; the substrate after spin coating was heated, and a stepwise heating method was adopted. It was heated at 70 °C for 10 minutes, and then heated at 110 °C for 25 minutes. After the heating was completed, the substrate was placed at room temperature for natural cooling treatment, and the cooling time was 2 hours; the polymer interlayer coupling layer thin film was lithographed, and contact lithography was used for processing. The working wavelength of the lithography machine was ultraviolet light with a wavelength of 350-400 nm, the exposure time was set to 6 seconds, and the mask was the structure of the polymer interlayer coupling layer 34 to be prepared, so that the material in the area of the polymer interlayer coupling layer 34 to be prepared was exposed; after the substrate was completed with lithography, it was taken down, and the substrate was post-baked and heated, heated at 80 °C for 15 minutes, and then heated at 120 °C for 25 minutes. After the heating was completed, the substrate was placed at room temperature for natural cooling treatment, and the cooling time was 2 hours; after the temperature drop was completed, the substrate was developed, and the substrate was placed in the corresponding developer for wet etching. The development time was 16 seconds, and the non-retained area (the area outside the polymer interlayer coupling layer 34 structure) that was not exposed was removed. Then the substrate was put into an isopropyl alcohol solution to wash away the residual optical waveguide core layer material and developer on the surface of the substrate; finally, it was rinsed multiple times with deionized water along the waveguide direction (when rinsing, it should be rinsed along the waveguide direction to prevent the waveguide from being damaged), and impurities such as isopropyl alcohol on the surface of the substrate were removed, and then it was dried with nitrogen; finally, a hardening operation was carried out, heated at 130 °C for 30 minutes, and the substrate was placed at room temperature for natural cooling treatment, and the cooling time was 2 hours. In this way, the lower part of the polymer interlayer coupling layer 34 with a thickness of 2.2 μm was prepared on the silicon nitride planar waveguide core layer;

[0105] Preparation of the upper two-dimensional grating waveguide and the upper silicon nitride straight waveguide: The upper silicon nitride thin film was deposited by the PECVD method. When the temperature reached 120 °C, the stoichiometric ratio of Si 3 N 4The upper silicon nitride thin film, and the deposited silicon nitride thin film has a thickness of 0.3 μm; The positive photoresist BP218 is spin-coated on the upper silicon nitride thin film using the spin-coating process. The parameters of the spin coater are first set to 400 rpm, with an acceleration time of 5 seconds and a constant speed time of 15 seconds; Then the rotation speed is set to 1200 rpm, the acceleration time is 10 seconds, and the constant speed time is 20 seconds; Then the time to decelerate to 0 is set to 10 seconds; After the spin coating is completed, the substrate is placed on a heating table for pre-baking, that is, using a stepwise temperature increase method to heat at 80 °C for 2 minutes, and then at 120 °C for 2 minutes. After the heating is completed, it is placed at room temperature and allowed to cool naturally for 2 hours; The photoresist film is subjected to alignment lithography. In the present invention, a contact lithography machine is used for exposure, and ultraviolet light with a working wavelength of 350 - 400 nm is used, and the exposure time is set to 11 seconds. The mask is the upper silicon nitride straight waveguide core layer 35 structure (as Figure 3 shown), so that the photoresist in the area outside the upper silicon nitride straight waveguide core layer 35 structure is fully exposed; After the lithography is completed, the substrate is removed for post-baking, using a stepwise temperature increase method to heat at 70 °C for 2 minutes, and then at 120 °C for 3 minutes. After the heating is completed, it is placed at room temperature and allowed to cool naturally for 2 hours; After the cooling is completed, development is carried out. The substrate is placed in a BP218 photoresist developer for wet etching for 20 seconds to remove the photoresist in the exposed part. After the development is completed, the substrate needs to be taken out immediately and rinsed with deionized water multiple times (when rinsing, it should be rinsed along the waveguide direction to prevent damage to the waveguide), and the residual developer and other impurities on the substrate are washed away, and then the residual deionized water on the substrate is blown dry with nitrogen; Finally, the cleaned substrate is placed on a drying table for drying operation. This step is called hard baking, which enhances the adhesion of the photoresist and at the same time improves the stability of the remaining part of the photoresist in the subsequent processing steps (has stronger corrosion resistance), and will also make the photoresist close to the molten state with a clear edge profile. The hard baking time is set to 3 minutes, and the hard baking temperature is set to 130 °C. After the heating is completed, it is allowed to cool naturally at room temperature for 2 hours;

[0106] After the hard baking is completed, RIE etching processing of the substrate is started, so that the silicon nitride thin film outside the upper silicon nitride straight waveguide core layer 35 structure is etched away, exposing the silica lower cladding 32 and the lower part of the polymer interlayer coupling layer 34. Trifluoromethane (CHF 3)As the etching gas, the selected gas flow rate is 90 sccm, the etching power is 140 W, the chamber pressure is 2.4 Pa, the etching time is 13 minutes. After the etching is completed, the substrate is subjected to a degluing operation. The substrate is immersed in an organic solvent for 2 minutes, and the substrate is gently shaken at the same time. Then, the substrate is cleaned with deionized water and the residual organic solvent on the substrate is dried with nitrogen; Then, the residual photoresist on the upper core layer waveguide of silicon nitride is bombarded by oxygen plasma under the acceleration of the electric field to further remove the photoresist. The gas flow rate is 70 sccm, the etching power is 80 W, the chamber pressure is 11 Pa, and the etching time is 11 minutes; After the oxygen plasma etching, the substrate needs to be cleaned again with deionized water, and the residual deionized water on the substrate is blown clean with nitrogen. In this way, the upper silicon nitride straight waveguide core layer 35 is prepared on the lower polymer layer intercoupling layer 34;

[0107] Preparation of the remaining polymer layer intercoupling layer: The polymer core layer material SU-8 2002 is spin-coated on the surfaces of the upper silicon nitride straight waveguide core layer 35 and the silicon dioxide lower cladding layer 32 by a spin-coating process. The rotation speed of the spin coater is first set to 4300 rpm, the acceleration time is set to 5 seconds, and the constant speed time is set to 15 seconds; Then the rotation speed is set to 5800 rpm, the acceleration time is set to 8 seconds, and the constant speed time is set to 25 seconds; Then the time to decelerate to 0 is set to 25 seconds; The thickness of the formed polymer thin film is 0.3 μm; The spin-coated substrate is heated, that is, by a stepwise heating method, heated at 70 °C for 10 minutes, and then heated at 110 °C for 25 minutes. After the heating is completed, the substrate is placed at room temperature for natural cooling treatment, and the cooling time is 2 hours; Contact lithography is used for the plate lithography of the polymer thin film. The working wavelength of the lithography machine is ultraviolet light with a wavelength of 350 - 400 nm, the exposure time is set to 6 seconds, and the mask is the structure of the polymer layer intercoupling layer to be prepared, so that the materials in the required polymer layer intercoupling layer area are exposed; After the substrate is completed with lithography, it is taken down, and the substrate is post-baked and heated, heated at 80 °C for 15 minutes, and then heated at 120 °C for 25 minutes. After the heating is completed, the substrate is placed at room temperature for natural cooling treatment, and the cooling time is 2 hours; After the temperature is lowered, the substrate is developed. The substrate is placed in the corresponding developer for wet etching. The development time is 16 seconds, and the non-retained areas (parts outside the polymer layer intercoupling layer 34) that are not exposed are removed. Then the substrate is put into an isopropyl alcohol solution to wash away the residual optical waveguide core layer material and developer on the surface of the substrate; Finally, it is rinsed multiple times with deionized water along the waveguide direction (when rinsing, it should be rinsed along the waveguide direction to prevent the waveguide from being damaged) to remove impurities such as isopropyl alcohol on the surface of the substrate, and then dried with nitrogen; Finally, a hardening film operation is carried out, heated at 130 °C for 30 minutes, and the substrate is placed at room temperature for natural cooling treatment, and the cooling time is 2 hours. In this way, the polymer layer intercoupling layer 34 with an overall thickness of 2.5 μm is completed;

[0108] Preparation of the polymer upper cladding 36: The polymer upper cladding material PMMA was spin-coated on the substrate on which the polymer interlayer coupling layer 34 had been prepared by a spin-coating process at a spin-coating speed of 3000 rpm, and then heated at 130 °C for 30 minutes so that the polymer interlayer coupling layer 34 was completely coated in the polymer upper cladding 36. The thickness of the polymer upper cladding located above the silica lower cladding 32 was 4 μm, thereby obtaining the few-mode interlayer coupler based on the two-dimensional grating structure of the present invention.

[0109] It should be noted that the specific embodiments are only representative examples of the present invention. Obviously, the technical solutions of the present invention are not limited to the above embodiments and there can be many variations. For example, the two-dimensional diffraction grating adopts an uneven distribution, the etching process is semi-etching, the aperture size gradually changes, etc., and the core layer material adopts high refractive index waveguide materials such as lithium niobate and silicon, the interlayer coupling layer material adopts low refractive index materials such as EpoCore and SU-8 2002, and the cladding material adopts a series of waveguide materials with good transparency including polycarbonate, polyimide (PI), polyethylene (PE), etc. Those skilled in the art, which are clearly disclosed in the present invention or obtained without any objection according to the written description of the document, fall within the scope of protection of this patent.

Claims

1. A few-mode interlayer coupler based on a two-dimensional grating structure, characterized in that: from bottom to top, it is composed of a silicon wafer substrate (31), a silicon dioxide lower cladding (32) prepared on the silicon wafer substrate (31), a polymer interlayer coupling layer (34) prepared on the silicon dioxide lower cladding (32), and a polymer upper cladding (36) prepared on the polymer interlayer coupling layer (34) and the silicon dioxide lower cladding (32), and the polymer interlayer coupling layer (34) is coated in the polymer upper cladding (36); along the light transmission direction, an upper silicon nitride straight waveguide core layer (35) and a lower silicon nitride straight waveguide core layer (33) are prepared in the polymer interlayer coupling layer (34); the plane position of the lower surface of the upper silicon nitride straight waveguide core layer (35) is higher than the plane position of the upper surface of the lower silicon nitride straight waveguide core layer (33), the upper surface of the upper silicon nitride straight waveguide core layer (35) is in the same plane as the upper surface of the polymer interlayer coupling layer (34), and the lower surface of the lower silicon nitride straight waveguide core layer (33) is in the same plane as the lower surface of the polymer interlayer coupling layer (34); the upper silicon nitride straight waveguide core layer (35) is composed of an upper silicon nitride straight waveguide (1) and an upper two-dimensional grating waveguide (2), and the lower silicon nitride straight waveguide core layer (33) is composed of a lower two-dimensional grating waveguide (4) and a lower silicon nitride straight waveguide (5); the upper two-dimensional grating waveguide (2) is a series of groove structures with equal length and width etched in a plane parallel to the upper surface of the silicon wafer substrate (31), and the lower two-dimensional grating waveguide (4) is a series of groove structures with equal length and width etched in a plane parallel to the upper surface of the silicon wafer substrate (31) at the input end of the lower silicon nitride straight waveguide (5), and the grooves are evenly arranged in the parallel direction and the perpendicular direction to the light transmission direction, and the groove spacing distance in the parallel direction is the same as the groove length, and the groove spacing distance in the perpendicular direction is the same as the groove width; the structures of the upper two-dimensional grating waveguide (2) and the lower two-dimensional grating waveguide (4) are the same, and adjacent grooves are staggered with each other and do not overlap with each other along the light propagation direction and the direction perpendicular to the light propagation direction.

2. A few-mode interlayer coupler based on a two-dimensional grating structure according to claim 1, characterized in that: Width W of the polymer interlayer coupling layer (34) 3 is 3.5 to 10 μm, and the widths W of the upper silicon nitride straight waveguide core layer (35) and the lower silicon nitride straight waveguide core layer (33) 4 are the same, being 3.2 to 9 μm, and W 3 > W 4 .

3. A few-mode interlayer coupler based on a two-dimensional grating structure according to claim 1, characterized in that: The upper silicon nitride core layer straight waveguide (1) and the lower silicon nitride straight waveguide (5) have the same structural dimensions, with a length L 1 ranging from 0.8 to 1.5 cm; the upper two-dimensional grating waveguide (2) and the lower two-dimensional grating waveguide (4) have the same structural dimensions, with a length L 2 ranging from 8 to 30 μm; the projection spacing L of the output end face of the upper two-dimensional grating waveguide (2) and the input end face of the lower two-dimensional grating waveguide (4) on the upper surface of the silica lower cladding (32) 3 is 20 to 50 μm; the length L of the polymer interlayer coupling layer (34) 4 = 2L 1 + 2L 2 + L 3 .

4. A few-mode interlayer coupler based on a two-dimensional grating structure according to claim 3, characterized in that: The spacing distance between adjacent grooves parallel to the light transmission direction in the two-dimensional grating structure is the same as the groove length W 1 and is 0.5 - 1 μm; the spacing distance between adjacent grooves perpendicular to the light transmission direction is the same as the groove width W 2 and is 0.08 - 0.15 μm; in the upper two-dimensional grating waveguide (2) and the lower two-dimensional grating waveguide (4), the number of rows N of grooves parallel to the light propagation direction x is 16 - 30, and the number of columns N of grooves perpendicular to the light propagation direction y is 40 - 60, L 2 = N x * W 1 .

5. A few-mode interlayer coupler based on a two-dimensional grating structure according to claim 1, characterized in that: the thickness of the silicon wafer substrate (31) is 0.6 - 1 mm, the thickness of the silicon dioxide lower cladding (32) is 2 - 5 μm, the thicknesses of the lower silicon nitride straight waveguide core layer (33) and the upper silicon nitride straight waveguide core layer (35) are equal, which is 0.2 - 0.6 μm, the thickness of the polymer interlayer coupling layer (34) is 2 - 3 μm, and the thickness of the polymer upper cladding (36) located above the silicon dioxide lower cladding (32) is 4 - 6 μm.

6. A few-mode interlayer coupler based on a two-dimensional grating structure as claimed in claim 1, characterized in that: the material of the polymer interlayer coupling layer is EpoCore, EpoClad, SU-8 2002, SU-8 2005 or NOA; the material of the polymer upper cladding layer is polymethyl methacrylate, polyethylene, polyester, polycarbonate, polyimide or polystyrene.

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