Graphical pitch marking method for quantum chip layout, storage medium and electronic device

Abstract

The application discloses a kind of quantum chip layout graphic spacing mark method, storage medium and electronic equipment.The method comprises the following steps: obtaining at least part of two edge lines in the preset distance range in all graphics of quantum chip layout;With the first edge line as the bottom, a first Euclidean region is constructed on the preset side relative to the graphic to which the first edge line belongs according to the preset distance, and a second Euclidean region is constructed on the preset side relative to the graphic to which the second edge line belongs according to the preset distance, and the preset side of the two edge lines is opposite to each other;Determine the coincident intersection point of the first edge line in the second Euclidean region, and determine the coincident intersection point of the second edge line in the first Euclidean region;Generate an enclosing region enclosing the coincident intersection points of the two edge lines, and perform error marking.The application can automatically complete the spacing error marking, improve the marking efficiency.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of chip layout design, in particular to a quantum chip layout graphic spacing marking method, a storage medium and an electronic device. BACKGROUND

[0002] A quantum chip is a chip stacked by many superconducting layers and dielectric layers according to certain design rules. For example, a Josephson junction, which is a key device of a quantum chip, is composed of two superconducting layers with a dielectric layer sandwiched between them. Therefore, many graphics representing devices need to be drawn in a quantum chip layout. After the quantum chip layout is designed, DRC (Design rules checking) needs to be performed, and spacing checking is a key work of DRC.

[0003] In the existing quantum chip design rule checking process, the designer needs to mark the graphics whose spacing does not meet the design rules. However, the graphics in the quantum chip layout are usually numerous and dense, and manual marking is time-consuming and laborious, with low efficiency, which cannot meet the design needs. SUMMARY

[0004] The purpose of the present application is to provide a quantum chip layout graphic spacing marking method, a storage medium and an electronic device to solve the problem that manual marking errors cannot meet the design needs in the prior art, and to automatically complete spacing error marking and improve marking efficiency.

[0005] To solve the above technical problems, the present application provides a quantum chip layout graphic spacing marking method, comprising:

[0006] Obtaining two edge lines of at least part of all graphics in a quantum chip layout within a preset distance range;

[0007] Constructing a first Euclidean region on a preset side of the graphic to which the first edge line belongs according to the preset distance with the first edge line as the bottom, and constructing a second Euclidean region on a preset side of the graphic to which the second edge line belongs according to the preset distance with the second edge line as the bottom, the preset sides of the two edge lines being opposite to each other;

[0008] Determining the coincident intersection point of the first edge line located in the second Euclidean region, and determining the coincident intersection point of the second edge line located in the first Euclidean region;

[0009] Generating an enclosing region enclosing the coincident intersection points of the two edge lines, and performing error marking.

[0010] Preferably, the preset side of the first edge line is a side of the first edge line away from the figure to which the first edge line belongs, and the preset side of the second edge line is a side of the second edge line away from the figure to which the second edge line belongs.

[0011] Preferably, the preset side of the first edge line is a side of the first edge line towards the figure to which the first edge line belongs, and the preset side of the second edge line is a side of the second edge line towards the figure to which the second edge line belongs.

[0012] Preferably, the preset side of the first edge line is a side of the first edge line away from the figure to which the first edge line belongs, and the preset side of the second edge line is a side of the second edge line towards the figure to which the second edge line belongs.

[0013] Preferably, the step of constructing the first Euclidean region at the preset side of the first edge line away from the figure to which the first edge line belongs and at the preset distance comprises the following steps:

[0014] constructing a first mirror line at the preset side of the first edge line away from the figure to which the first edge line belongs and at the preset distance, and constructing a first circular arc line connecting the extension line of the first edge line and the first mirror line and having a radius of the preset distance, to obtain the first Euclidean region;

[0015] Preferably, the step of constructing the second Euclidean region at the preset side of the second edge line towards the figure to which the second edge line belongs and at the preset distance comprises the following steps:

[0016] constructing a second mirror line at the preset side of the second edge line towards the figure to which the second edge line belongs and at the preset distance, and constructing a second circular arc line connecting the extension line of the second edge line and the second mirror line and having a radius of the preset distance, to obtain the second Euclidean region.

[0017] Preferably, the coincident intersection point of the first edge line is two endpoints of a line segment of the first edge line located in the second Euclidean region, and the coincident intersection point of the second edge line is two endpoints of a line segment of the second edge line located in the first Euclidean region.

[0018] Preferably, the enclosing region is a convex hull of the coincident intersection points of the two edge lines.

[0019] Preferably, the angle formed by the two edge lines is outside a preset angle interval, or the two edge lines do not intersect, or the two edge lines belong to different figures.

[0020] To solve the above technical problem, the application further provides a storage medium, wherein the storage medium stores a computer program, and the computer program is configured to execute the figure distance marking method of the quantum chip layout when running.

[0021] To solve the above technical problems, the application further provides an electronic device comprising a memory and a processor, the memory storing a computer program, and the processor being configured to run the computer program to perform the graphic spacing marking method of the quantum chip layout according to any one of the preceding embodiments.

[0022] Different from the prior art, the graphic spacing marking method of the quantum chip layout provided by the application can automatically complete the spacing error marking and improve the marking efficiency by obtaining two edge lines that do not satisfy the spacing rule in all graphics of the quantum chip layout, constructing Euclidean regions on a preset side of the respective graphics with the two edge lines as the bottom, respectively determining the coincident intersection points of the two edge lines in the two Euclidean regions, finally generating an enclosed region enclosing the coincident intersection points of the two edge lines, and performing error marking.

[0023] The storage medium and the electronic device provided by the application belong to the same inventive concept as the graphic spacing marking method of the quantum chip layout, and therefore have the same beneficial effects, which will not be described here again. BRIEF DESCRIPTION OF DRAWINGS

[0024] Figure 1 The figure is a flowchart of the graphic spacing marking method of the quantum chip layout according to the embodiments of the application.

[0025] Figure 2 The figure is a schematic diagram of two graphics of the quantum chip layout according to the embodiments of the application.

[0026] Figure 3 The figure is a schematic diagram of the Euclidean regions constructed with the two edge lines as the bottom.

[0027] Figure 4 The figure is a schematic diagram of the enclosed region generated in the Euclidean regions of the two edge lines.

[0028] Figure 5 The figure is a schematic diagram of the error marking of the enclosed region in the Euclidean region. DETAILED DESCRIPTION

[0029] The specific embodiments of the application will be described in more detail below with reference to the accompanying drawings. The advantages and features of the application will be more apparent according to the following description and claims. It should be noted that the drawings are very simplified and use non-precise proportions, only to facilitate and clearly assist the purpose of describing the embodiments of the application.

[0030] In the description of the present application, it needs to be understood that the terms "center", "upper", "lower", "left", "right" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the devices or elements referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the present application.

[0031] In addition, the terms "first", "second" are only for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is at least two, such as two, three, etc., unless otherwise explicitly specified.

[0032] Please refer to Figure 1 The embodiment of the present application provides a kind of graphic spacing marking method of quantum chip layout. The graphic spacing marking method includes the following steps:

[0033] S1: at least part of two edge lines in the preset distance range in all graphics of quantum chip layout is acquired.

[0034] Wherein, the graphics of quantum chip layout are polygons in two-dimensional plane, and each polygon includes at least three edge lines. At least part of two edge lines in the preset distance range, then it indicates that the spacing between the graphics to which the two edge lines belong does not meet the DRC requirement. The preset distance range can be a circular with a preset distance as a radius, if there is part of two edge lines in the preset distance range, then it indicates that the two edge lines are at least partially in the preset distance range. For example, the shortest distance from one end point of an edge line to another edge line is less than the preset distance, then it indicates that the edge line is at least partially in the preset distance range of another edge line. The positional relationship of two edge lines can be any relationship, such as parallel or not parallel. As shown in Figure 2 The end point of edge line A1 of graphic A and the spacing of edge line B1 of graphic B are at least partially in the preset distance L range (circular shown by dotted line in the figure).

[0035] S2: a first Euclidean region is constructed according to the preset distance on the opposite side of the first edge line to the graphic to which it belongs, and a second Euclidean region is constructed according to the preset distance on the opposite side of the second edge line to the graphic to which it belongs, and the opposite sides of the two edge lines are opposite to each other.

[0036] The first edge line relative to the preset side of its corresponding graphic includes two scenarios: one is that the first edge line faces the side of its corresponding graphic, i.e., the inside of the graphic; the other is that the first edge line is away from the side of its corresponding graphic, i.e., the outside of the graphic. Two edges being "relative to each other" means that there is an overlap between the preset side of the first edge line relative to its corresponding graphic and the preset side of the second edge line relative to its corresponding graphic.

[0037] In this embodiment, the predetermined side of the first edge line is the side of the first edge line away from its corresponding graphic, and the predetermined side of the second edge line is the side of the second edge line away from its corresponding graphic; alternatively, the predetermined side of the first edge line is the side of the first edge line facing its corresponding graphic, and the predetermined side of the second edge line is the side of the second edge line facing its corresponding graphic; or the predetermined side of the first edge line is the side of the first edge line away from its corresponding graphic, and the predetermined side of the second edge line is the side of the second edge line facing its corresponding graphic. Figure 2 As shown, the default side of the edge A1 of figure A is the side away from figure A, and the default side of the edge B1 of figure B is the side away from figure B. The two are opposite to each other.

[0038] A Euclidean region is defined as the area between a given geometric figure and another geometric figure, where the Euclidean distance from any point on the given figure to the outermost geometric figure is a constant value. The given geometric figure can be a polygon or a line.

[0039] like Figure 3 As shown, the first Euclidean region constructed with the first edge line A1 as the base is A11. The first Euclidean region includes a straight line parallel to the first edge line A1 and an arc line connected to the first edge line A1. The radius of the arc line is a preset distance L. That is to say, the distance from any point on the arc line to the endpoint of the first edge line A1 is a preset distance L, and the perpendicular distance from any point on the straight line to the first edge line A1 is also a preset distance L.

[0040] Similarly, the second Euclidean region constructed with the second edge B1 as the base is B11. The first Euclidean region includes a straight line parallel to the second edge B1 and an arc connecting the second edge B1. The radius of the arc is a preset distance L. That is, the distance from any point on the arc to the endpoint of the second edge B1 is a preset distance L, and the perpendicular distance from any point on the straight line to the second edge B1 is also a preset distance L.

[0041] S3: Determine the point of intersection of the first edge line within the second Euclidean region, and determine the point of intersection of the second edge line within the first Euclidean region.

[0042] Among them, such asFigure 3 As shown, the point where the first edge A1 coincides with the second Euclidean region B11 is the path point included by line segment A0 within the second Euclidean region B11. Similarly, the point where the second edge B1 coincides with the first Euclidean region A11 is the path point included by line segment B0 within the first Euclidean region A11.

[0043] S4: Generate the region surrounding the intersection of the two edges and mark any errors.

[0044] Among them, such as Figure 4 As shown, the region enclosing the intersection of the two edges is AB, meaning that the region AB is bounded by line segments A0 and B0. In this embodiment, the intersection of the first edge is the endpoints of the line segment of the first edge located within the second Euclidean region, and the intersection of the second edge is the endpoints of the line segment of the second edge located within the first Euclidean region. The enclosing region is the convex hull of the intersection of the two edges, which is the smallest polygon enclosing the intersection of the two edges. The convex hull can be calculated and generated using a convex hull algorithm.

[0045] Enclosed areas can be marked as errors using shading and / or highlighting. For example... Figure 5 As shown, the enclosing region AB is displayed with a grid filling.

[0046] In some embodiments of this application, the step of constructing a first Euclidean region on a preset side relative to its corresponding graphic with the first edge as the base and at a preset distance is specifically as follows: constructing a first mirror line with a preset distance between the first edge and its corresponding graphic, and constructing a first arc line with a radius of a preset distance connecting the extension line of the first edge and the first mirror line respectively.

[0047] Similarly, the specific steps for constructing the second Euclidean region on a predetermined side relative to its corresponding shape at a predetermined distance, using the second edge as the base, are as follows:

[0048] Construct a second mirror line with a preset distance between the second edge line and its corresponding shape on a preset side, and construct a second arc line with a preset radius connecting the extension line of the second edge line and the second mirror line respectively, to obtain the second Euclidean region.

[0049] like Figure 3As shown, the first mirror line is a straight line parallel to the first side line A1, the first circular arc line has two circular arc lines, and the two first circular arc lines are circular arc lines with the two end points of the first side line A1 as the centers, and the extension line of the first side line A1 is a line segment connecting the two ends of the first side line A1 and the two first circular arc lines. Similarly, the second mirror line is a straight line parallel to the second side line B1, the second circular arc line has two first circular arc lines, and the two first circular arc lines are circular arc lines with the two end points of the second side line B1 as the centers, and the extension line of the second side line B1 is a line segment connecting the two ends of the second side line B1 and the two second circular arc lines.

[0050] As a preferred embodiment, in the embodiment, the angle formed by the two side lines is outside the preset angle interval. In some DRC requirements, if the included angle formed by the two side lines at least partially within the preset distance range is within the preset angle interval, DRC is not required. For example, the preset angle interval is 35-45 degrees, and for the two side lines at least partially within the preset distance range but forming an angle of 40 degrees, no error marking is performed.

[0051] As a preferred embodiment, in the embodiment, the two side lines do not intersect. If the two side lines intersect, there is an intersection point. By judging whether the two side lines intersect, whether the two side lines intersect can be determined. For the two side lines at least partially within the preset distance range but intersecting, no error marking is performed.

[0052] As a preferred embodiment, in the embodiment, the two side lines belong to different figures. Since the side lines on the same figure are prone to cause DRC misjudgment, for the two side lines at least partially within the preset distance range but belonging to the same figure, no error marking is performed, which can minimize misjudgment.

[0053] In the foregoing manner, the figure spacing marking method of the quantum chip layout provided by the application can obtain two side lines that do not satisfy the spacing rule in all figures of the quantum chip layout, construct Euclidean regions on a preset side of each respective belonging figure with the two side lines as the bottom, respectively determine the coincident intersection points of the two side lines in the two Euclidean regions, and finally generate a surrounding region surrounding the coincident intersection points of the two side lines and perform error marking, so as to automatically complete the spacing error marking and improve the marking efficiency.

[0054] The application further provides a storage medium, and the storage medium stores a computer program, and the computer program is set to execute the figure spacing marking method of the quantum chip layout of the foregoing embodiment when running.

[0055] Specifically, in the embodiment, the storage medium can include, but is not limited to, a U disk, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk, and various storage media that can store computer programs.

[0056] The application further provides an electronic device comprising a memory and a processor, the memory storing a computer program, and the processor is configured to execute the computer program to perform the method for marking the graphic pitch of the quantum chip layout according to the above embodiment.

[0057] Specifically, the memory and the processor can be connected through a data bus. In addition, the electronic device can further comprise a transmission device and an input / output device, wherein the transmission device is connected with the processor, and the input / output device is connected with the processor.

[0058] In the description of the present specification, the description of the terms "one embodiment", "some embodiments", "an example" or "a specific example" means that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In the present specification, the illustrative description of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in the present specification.

[0059] The above is only the preferred embodiment of the present application, and does not limit the present application in any way. Any person skilled in the art can make any form of equivalent replacement or modification of the technical solutions and technical contents disclosed in the present application without departing from the scope of the technical solutions of the present application, which still belongs to the protection scope of the present application.

Claims

1. A method for marking the spacing of patterns in a quantum chip layout, characterized in that, include: Obtain at least two edges of the quantum chip layout that are partially within a preset distance range from all the graphics. A first Euclidean region is constructed with the first edge as the base on a predetermined side relative to its corresponding graphic at a predetermined distance, and a second Euclidean region is constructed with the second edge as the base on a predetermined side relative to its corresponding graphic at a predetermined distance, wherein the predetermined sides of the two edges have overlapping areas. Determine the point where the first edge line coincides within the second Euclidean region, and determine the point where the second edge line coincides within the first Euclidean region; Generate a bounding region that surrounds the coincident intersection of the two edges, and mark any errors. The first Euclidean region includes a straight line parallel to the first edge and an arc connecting the first edge. The distance from any point on the arc to the endpoint of the first edge is a preset distance, and the perpendicular distance from any point on the straight line to the first edge is a preset distance. The second Euclidean region includes a straight line parallel to the second edge and an arc connecting the second edge. The distance from any point on the arc to the endpoint of the second edge is a preset distance, and the perpendicular distance from any point on the straight line to the second edge is also a preset distance. The point of intersection of the first edge line within the second Euclidean region is the path point included by the line segment of the first edge line within the second Euclidean region, and the point of intersection of the second edge line within the first Euclidean region is the path point included by the line segment of the second edge line within the first Euclidean region. The enclosed region is the smallest polygon that encloses the intersection of the two side lines.

2. The method according to claim 1, characterized in that, The preset side of the first edge line is the side of the first edge line that is far away from the graphic to which it belongs, and the preset side of the second edge line is the side of the second edge line that is far away from the graphic to which it belongs.

3. The method according to claim 1, characterized in that, The preset side of the first edge line is the side of the first edge line facing the graphic to which it belongs, and the preset side of the second edge line is the side of the second edge line facing the graphic to which it belongs.

4. The method according to claim 1, characterized in that, The predetermined side of the first edge line is the side of the first edge line that is away from its corresponding graphic, and the predetermined side of the second edge line is the side of the second edge line that faces its corresponding graphic.

5. The method according to any one of claims 1 to 4, characterized in that, The specific steps of constructing the first Euclidean region on a predetermined side relative to its corresponding shape at a predetermined distance, using the first edge as the base, are as follows: A first Euclidean region is obtained by constructing a first mirror line with a distance from the preset distance on a preset side of the first edge line relative to its corresponding graphic, and constructing a first arc line with a radius equal to the preset distance connecting the extension line of the first edge line and the first mirror line respectively. The specific steps of constructing the second Euclidean region on a predetermined side relative to its corresponding shape at the predetermined distance, using the second edge as the base, are as follows: A second Euclidean region is obtained by constructing a second mirror line at a predetermined distance from the second edge line relative to a predetermined side of the graphic to which it belongs, and constructing a second arc line with a radius equal to the predetermined distance connecting the extension line of the second edge line and the second mirror line.

6. The method according to claim 1, characterized in that, The points where the first edge lines coincide are the two endpoints of the line segment of the first edge line located within the second Euclidean region, and the points where the second edge lines coincide are the two endpoints of the line segment of the second edge line located within the first Euclidean region.

7. The method according to claim 1, characterized in that, The angle formed by the two side lines is outside the preset angle range, or the two side lines do not intersect, or the two side lines belong to different shapes.

8. A storage medium, characterized in that, The storage medium stores a computer program, which is configured to execute the graphic spacing marking method for the quantum chip layout according to any one of claims 1 to 7 when it runs.

9. An electronic device, characterized in that, It includes a memory and a processor, the memory storing a computer program, and the processor being configured to run the computer program to perform the graphic spacing marking method for a quantum chip layout according to any one of claims 1 to 7.

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