SATA communication data file management system based on small FPGA

Abstract

The application discloses a kind of based on small FPGA's SATA communication data file management system, specifically including data processing module, SATA_IP_CORE module and file management state machine, data processing module is used for the reading, writing and destruction of data, data includes address and content;SATA_IP_CORE module is communicated with solid state disk;File management state machine resolves external signal, controls the switching and operation of file system, maintains the initialization of file system.The application is for the SATA communication data of small FPGA, and the file management system design is realized using programmable logic language Verilog HDL;It meets that host computer carries out data communication to FPGA through serial port, including that data is written to SATA through FPGA, command is sent to FPGA interpretation through serial port, the state of SATA is read back to host computer through serial port, and FPGA realizes the management of SATA data file.

Description

Technical Field

[0001] This invention belongs to the field of programmable logic application technology, and in particular to a SATA communication data file management system based on a small FPGA. Background Technology

[0002] SATA is an industry-standard serial hardware driver interface that transmits data serially, supports hot-swapping, and is primarily used for data transfer between SATA hosts and high-capacity storage devices. SATA employs a differential signaling system, which effectively filters out noise. Therefore, SATA does not require high-voltage transmission for noise suppression and can operate with low voltage. The bus uses an embedded clock frequency signal, providing stronger error correction capabilities than before. It can check transmission commands (not just data) and automatically correct errors, improving data transmission reliability. SATA1 has a transfer rate of only 150MB / s, SATA2 expands to 300MB / s, and SATA3 increases the port's transfer rate to 6Gbit / s. It can meet the needs of high-capacity, high-speed storage. With its simple interface, support for hot-swapping, and support for data cables up to 2 meters in length, it is not limited by space constraints and therefore has a wide range of applications.

[0003] Most FPGAs currently have high-speed interfaces (GTP, GTX, GTH) that support the SATA protocol. Xilinx's 7 series FPGAs integrate four types of serial high-speed transceivers, namely GTP, GTX, GTH, and GTZ, depending on the device type. They can use SATA_IP_CORE to support the underlying SATA protocol. The SATA interface protocol is based on the TCP / IP model and is implemented by dividing the SATA interface into four layers: physical layer, link layer, transport layer, and application layer.

[0004] However, only large, high-end FPGAs, such as the Xilinx Zynq 7045 (and the domestically produced FMQL45T900), possess a core processor system (PS) capable of running open-source Linux and domestically customized operating systems. File management is achieved through application-level access via the corresponding SATA_IP_CORE from the operating system. For a large number of small and medium-sized FPGAs, only programmable logic resources (PLs) are available; they lack a core processor system (PS) and can only implement SATA IP cores. Without operating system file management, they cannot manage data files. Therefore, to meet the SATA data management requirements of small and medium-sized FPGAs, there is an urgent need to implement file management using a hardware programmable logic language. Summary of the Invention

[0005] The purpose of this invention is to provide a SATA communication data file management system based on a small FPGA, which uses the programmable logic language Verilog HDL to implement file management for SATA communication data on a small FPGA.

[0006] The technical solution to achieve the purpose of this invention is as follows:

[0007] 1. A SATA communication data file management system based on a small FPGA, characterized in that the system includes a data processing module, a SATA_IP_CORE module, and a file management state machine, wherein:

[0008] The data processing module is used for reading, writing, and destroying data, which includes addresses and content.

[0009] The SATA_IP_CORE module is used to communicate with the solid-state drive;

[0010] The file management state machine is used to parse external signals, control file system switching and operations, and maintain file system initialization;

[0011] The file management state machine is responsible for managing file system 1 and file system 2, and includes the following states:

[0012] HR_WAIT_REDY: Waiting for initialization. After the SATA_IP_CORE module establishes communication with the solid-state drive, it transitions to the WAIT_FILE1_INIT state.

[0013] WAIT_FILE1_INIT: Initialize file system 1. After initialization is complete, transition to WAIT_FILE2_INIT state;

[0014] WAIT_FILE2_INIT: Initialize file system 2. After initialization, transition to HR_IDLE state.

[0015] HR_IDLE: Idle state, waiting for user operation; upon receiving an instruction, it transitions to the OPERT_IMPLUS state.

[0016] OPERT_IMPLUS: Operates on the IMPULUS file system, including read and write operations. After completion, it transitions to the HR_IDLE state.

[0017] OPERT_INFORM: Operates on the INFORM file system, including read and write operations. After completion, it transitions to the HR_IDLE state.

[0018] The host computer interacts with the SATA drive via commands, with the FPGA acting as an intermediary bridge.

[0019] External commands include SATA action commands and serial port operation commands;

[0020] SATA action commands include the following:

[0021] 5555aaaa: Write operation begins;

[0022] Aaaabbbbb: Write operation complete; sent during the write operation, stopping after writing the current 32MB of data;

[0023] CCCCAAAA: Destroy data. Sending this command will start the data destruction process after a reset, and will terminate if the power is cut off midway.

[0024] 55557777 00000100 00000001: Read operation, read data instruction. The last two are the start address and the size to read, respectively. The size to read is an integer multiple of 0.5KB, which is an integer multiple of 512B. This means that one sector of data will be read starting from address 0x100.

[0025] 9595AAAA {8'd15, 8'd03, 8'd04, 8'd12} Input time base: indicates that the current time base is 12:00 on March 4, 2015;

[0026] The serial port operation commands are as follows:

[0027] FFFF6601: Switch to file 1 operation module, the default is 1;

[0028] FFFF6601: Switch to the file 2 operation module;

[0029] FFFF5555: Software reset, equivalent to soft_rst;

[0030] FFFF7766: Enables serial port data display;

[0031] FFFF7777: Disable serial port data display;

[0032] FFFF9999: Read the remaining space on the SSD.

[0033] Compared with the prior art, the significant advantages of this invention are: (1) For the SATA communication data of small FPGA, the file management system design is implemented using the programmable logic language Verilog HDL; (2) It satisfies the requirement that the host computer communicates with the FPGA through the serial port, including data being written to SATA through the FPGA, commands being sent to the FPGA for interpretation through the serial port, and the status of SATA being read back to the host computer through the serial port, so that the FPGA can manage the SATA data files. Attached Figure Description

[0034] Figure 1 This is a schematic diagram of FPGA implementing file management on SATA.

[0035] Figure 2 This is a schematic diagram of a file management system.

[0036] Figure 3 This is a schematic diagram of the five states of a file management state machine. Detailed Implementation

[0037] It is readily understood that, based on the technical solution of this invention, those skilled in the art can conceive of various embodiments of this invention without altering its essential spirit. Therefore, the following specific embodiments and accompanying drawings are merely illustrative examples of the technical solution of this invention and should not be considered as the entirety of this invention or as limitations or restrictions on its technical solution.

[0038] SATA2 has a transfer rate of up to 300MB / s, which is supported by most small and medium-sized FPGAs and meets the requirements of most communication rates. Moreover, the IP core does not occupy many FPGA resources. Therefore, this invention implements file management on the basis of SATA2.

[0039] This invention discloses a SATA communication data file management system based on a small FPGA. The system includes a data processing module, a SATA_IP_CORE module, and a file management state machine, wherein:

[0040] The data processing module is used for reading, writing, and destroying data, which includes addresses and content.

[0041] The SATA_IP_CORE module is used to communicate with the solid-state drive;

[0042] The file management state machine is used to parse external signals, control file system switching and operations, and maintain file system initialization.

[0043] As a concrete example, the file management state machine is responsible for managing file system 1 and file system 2, including the following states:

[0044] HR_WAIT_REDY: Waiting for initialization. After the SATA_IP_CORE module establishes communication with the solid-state drive, it transitions to the WAIT_FILE1_INIT state.

[0045] WAIT_FILE1_INIT: Initialize file system 1. After initialization is complete, transition to WAIT_FILE2_INIT state;

[0046] WAIT_FILE2_INIT: Initialize file system 2. After initialization, transition to HR_IDLE state.

[0047] HR_IDLE: Idle state, waiting for user operation; upon receiving an instruction, it transitions to the OPERT_IMPLUS state.

[0048] OPERT_IMPLUS: Operates on the IMPULUS file system, including read and write operations. After completion, it transitions to the HR_IDLE state.

[0049] OPERT_INFORM: Operates on the INFORM file system, including read and write operations. After completion, it transitions to the HR_IDLE state.

[0050] As a specific example, the first area of ​​the SATA drive is designated as the record master file, and the contents of the record master file are described in Table 1:

[0051] Table 1

[0052] Serial Number byte count Content Description Remark 1 4 Record header identifier 2 4 Record summary list end marker 3 4 Number of sub-files The file needs to be updated after it is written, and it also needs to be updated after the power-on query is completed. 4 4 Starting address of subfile list The file needs to be updated after it is written, and it also needs to be updated after the power-on query is completed. 5 4 Latest data starting address The file needs to be updated after it is written. 6 4 Latest data termination address The document needs to be updated after it is written, and it also needs to be updated after the power-on query is completed. 7~128 488 Reserved

[0053] The master file list will be updated after power-on testing is completed, and it will also be updated when a new file is written.

[0054] As a specific example, the main file area is followed by the sub-file area. The number of sub-files depends on the capacity of the SATA disk. The contents of the sub-files are described in Table 2.

[0055] Table 2

[0056] Serial Number byte count Content Description Remark 1 4 Record sublist header identifier 2 4 Record sublist tail identifier 3 4 File list number The file needs to be updated after it is written. 4 4 File type The file needs to be updated after it is written. 5 4 Time Record The file needs to be updated after it is written. 6 4 The starting address of the file content can be accessed manually or automatically. The file needs to be updated after it is written. 7 4 End address of file content The file needs to be updated after it is written. 8~128 484 Reserved

[0057] The record sublist represents a file (32MB) and a list (0.5KB). The file sequence number, time record, and start and end addresses must all be updated. The contents in RAM and the first four SATA parameters are directly updated, namely the record sublist header identifier, record sublist tail identifier, file list sequence number, and file type.

[0058] If the file size exceeds 32MB, once the 32MB space is used up, write operations will continue on the new 32MB space.

[0059] As a specific example, the contents of the data area are described in Table 3:

[0060] Table 3

[0061] Serial Number byte count Content Description Remark 1 4 Data header identifier 0xDDDD_DDDD 2~8191 32760 Data content 8192 4 Data tail identifier 0xAAAA_AAAA

[0062] Each data frame is 8KB, and a file record is 32MB.

[0063] As a concrete example, the host computer interacts with the SATA disk via commands, with the FPGA acting as an intermediary bridge;

[0064] External commands include SATA action commands and serial port operation commands;

[0065] SATA action commands include the following:

[0066] 5555aaaa: Write operation begins;

[0067] Aaaabbbbb: Write operation complete; sent during the write operation, stopping after writing the current 32MB of data;

[0068] CCCCAAAA: Destroy data. Sending this command will start the data destruction process after a reset, and will terminate if the power is cut off midway.

[0069] 55557777 00000100 00000001: Read operation, read data instruction. The last two are the start address and the size to read, respectively. The size to read is an integer multiple of 0.5KB, which is an integer multiple of 512B. This means that one sector of data will be read starting from address 0x100.

[0070] 9595AAAA {8'd15, 8'd03, 8'd04, 8'd12} Input time base: indicates that the current time base is 12:00 on March 4, 2015;

[0071] The serial port operation commands are as follows:

[0072] FFFF6601: Switch to file 1 operation module, the default is 1;

[0073] FFFF6601: Switch to the file 2 operation module;

[0074] FFFF5555: Software reset, equivalent to soft_rst;

[0075] FFFF7766: Enables serial port data display;

[0076] FFFF7777: Disable serial port data display;

[0077] FFFF9999: Read the remaining space on the SSD.

[0078] As a specific example, for serial port commands, the FPGA needs to respond with logic and reply with SATA status variables;

[0079] The sata_file interface is described in Table 4:

[0080] Table 4

[0081] port name Number of bytes (bits) I / O illustrate 32 Data header identifier LIST_RECD_LBA 32 I Parameters, master table storage address SUBR_STRT_LBA 32 I Parameters, stored in separate tables starting at the specified address. DATA_STRT_LBA 32 I Parameters, starting address of data storage DATA_END_LBA 32 I Parameters, data storage termination address sys_rst 1 I System Reset soft_rst 1 I Software reset usr_clk 1 I clock ext_clk 1 I External clock sata_core_rdy 1 I Sata core is ready. sata_rd_data 32 I SATA readout data sata_rd_val 1 I SATA readout data is valid. linkup_val 1 I The SATA core established a connection with the hard drive. file_cplt_val 1 I Sata kernel file processing completed. inst_inf_val 1 I External instructions are valid inst_inf_data 32 I External instruction content ext1_in_val 1 I File system 1 Input data is valid ext1_in_data 32 I File system 1 Input data ext2_in_val 1 I File system 1 Input data is valid ext2_in_data 32 I File system 1 Input data stor_type_en 1 I Input data type is valid stor_file_type 8 I Input data types chip1_flg 1 O Chipscope output sys1_rcv_busy 1 O The file processing system is busy (1 indicates a timeout). Data cannot be entered when this value is 1. sys2_rcv_busy 1 O The file processing system is busy (mode 2 is busy; data cannot be entered when mode 1 is active). opert_lba_ovf 1 O Indicator signal: Read / write operation exceeds hard disk space sata_wr_data 32 O Write data, connect to SATA core sata_wr_data_val 1 O Data write successful, connection to SATA core ssd_rd_data 32 O Data read is valid, connection to SATA core. ssd_rd_data_val 1 O Data read is valid, connection to SATA core. ins1_opert_done 1 O Once the document processing system 1 has completed its processing, external processes can proceed with the next step. ins2_opert_done 1 O Once the document processing system 2 has completed its processing, external processes can proceed to the next step. ssd_surplus_size 32 O Remaining hard drive space inst_inf_val 1 I When the command input is valid, it controls the module's operation. When the serial port is replaced by another module, it is changed to an input. inst_inf_data 32 I The command input data controls the module's operation. When the serial port is replaced by another module, it becomes the input port. external_mod_rdy 1 I This indicates that the external module can receive data and connects to the SATA core as its input; when the serial port is replaced by another module, it becomes the input.

[0082] As a specific example, the serial port operation process on the host computer is as follows:

[0083] ① After the program is powered on and running, it will automatically detect the files in the two file systems; after the detection is complete, the external module can operate this module to read and write.

[0084] ② Specify the file module, perform a write operation, send 0x FFFF6601, press Enter, then send 0x5555aaaa, automatically and continuously write simulated data until the write operation is terminated by the command Aaaabbbb.

[0085] ③ The read operation is similar. Specify the file module, perform the read operation by sending 0x FFFF6601, press Enter, and then send 0x55557777 0x 00000100 0x 00000001 to read one piece of data from sector 0x100. The data size must be an integer multiple of 0.5KB, which is an integer multiple of 512B. If you need to display it on the serial port, you need to turn on the serial port data display switch before the read operation and then send 0xFFFF7766; otherwise, turn off the display switch and then send 0xFFFF7777.

[0086] Various exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the invention. The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the invention or its application or use.

[0087] Example

[0088] This invention is a SATA communication data file management system based on a small FPGA. Its main function is to enable data communication between a host computer and the FPGA via a serial port. This includes writing data from the FPGA to the SATA port, sending commands to the FPGA for interpretation via the serial port, and reading the SATA status back to the host computer via the serial port. The FPGA then implements file management for the SATA port. Figure 1 .

[0089] The file management system mainly consists of data processing, SATA_IP_CORE, and a file management state machine.

[0090] Data processing: reading, writing, and destroying data, including addresses and content.

[0091] SATA_IP_CORE: Communicates with the solid-state drive.

[0092] File management state machine: parses external signals, controls file system switching and operations, and maintains file system initialization, such as... Figure 2 .

[0093] The file management state machine is primarily responsible for managing file system 1 and file system 2. It mainly contains the following five states:

[0094] HR_WAIT_REDY: Waiting for initialization. After establishing communication with the solid-state drive via SATA_IP_CORE, it transitions to the WAIT_FILE1_INIT state.

[0095] WAIT_FILE1_INIT: Initialize file system 1. After initialization is complete, transition to WAIT_FILE2_INIT state;

[0096] WAIT_FILE2_INIT: Initialize file system 2. After initialization, transition to HR_IDLE state.

[0097] HR_IDLE: Idle state, waiting for user input. Upon receiving a command, it transitions to the OPERT_IMPLUS state;

[0098] OPERT_IMPLUS: Operates on the IMPULUS file system, including read and write operations. After completion, it transitions to the HR_IDLE state.

[0099] OPERT_INFORM: Operates on the INFORM file system, including read and write operations. Upon completion, it transitions to the HR_IDLE state. Figure 3 ;

[0100] The first area of ​​the SATA drive is designated as the main record file. The contents of the main record file are described in Table 1.1:

[0101] Table 1.1

[0102] Serial Number byte count Content Description Remark 1 32b Record header identifier 2 Record summary list end marker 3 Number of sub-files The file needs to be updated after it is written, and it also needs to be updated after the power-on query is completed. 4 Starting address of subfile list The file needs to be updated after it is written, and it also needs to be updated after the power-on query is completed. 5 Latest data starting address The file needs to be updated after it is written. 6 Latest data termination address The document needs to be updated after it is written, and it also needs to be updated after the power-on query is completed. ... 7~128 Reserved

[0103] Note: The master file list will be updated after power-on testing is completed, and it will also be updated when a new file is written.

[0104] Following the main record file area is the record sub-file area, the number of which depends on the capacity of the SATA disk. The contents of the record sub-files are described in Table 1.2.

[0105] Table 1.2

[0106] Serial Number byte count Content Description Remark 1 32b Record sublist header identifier 2 Record sublist tail identifier 3 File list number The file needs to be updated after it is written. 4 File type The file needs to be updated after it is written. 5 Time Record The file needs to be updated after it is written. 6 The starting address of the file content (data) can be set manually or automatically. The file needs to be updated after it is written. 7 File content (data) termination address The file needs to be updated after it is written. 8~128 Reserved

[0107] Note: The record sublist represents a 32MB file and a 0.5KB list. The file serial number, time record, and address must all be updated. Simply update the contents in RAM and the first four SATA parameters.

[0108] 1. Is the file in question guaranteed to be 32MB? Continue writing operations on the new 32MB space.

[0109] The contents of the data area are described in Table 1.3:

[0110] Table 1.3

[0111] Serial Number byte count Content Description Remark 1 32b Data header identifier 0xDDDD_DDDD 2~8191 Data content 8192 Data tail identifier 0xAAAA_AAAA

[0112] Note: Each data frame is 8KB, and a file record is 32MB. The host computer and the SATA drive interact via commands, with the FPGA acting as an intermediary bridge.

[0113] Instruction explanation:

[0114] External commands mainly include SATA action commands and serial port operation commands. SATA action commands include the following:

[0115] 5555aaaa: Write operation initiated.

[0116] Aaaabbbbb: Write operation complete. This message is sent during the write operation and stops after writing the current 32MB of data.

[0117] CCCCAAAA: Destroy data. Sending this command will initiate the data destruction process upon reset and will terminate if power is interrupted.

[0118] 55557777 00000100 00000001: Read operation, read data instruction. The last two are the start address and the size (*0.5KB) to read, indicating that one sector of data is read starting from address 0x100.

[0119] 9595AAAA {8'd15, 8'd03, 8'd04, 8'd12} Input time base: indicates that the current time base is 12:00 on March 4, 2015.

[0120] The serial port operation commands are as follows:

[0121] FFFF6601: Switch to the file 1 operation module, which is 1 by default;

[0122] FFFF6601: Switch to the file 2 operation module;

[0123] FFFF5555: Software reset, equivalent to soft_rst;

[0124] FFFF7766: Enables serial port data display;

[0125] FFFF7777: Disables serial port data display;

[0126] FFFF9999: Read the remaining space on the SSD.

[0127] For serial port commands, the FPGA needs to respond logically and reply with SATA status variables. The sata_file interface description is shown in Table 1.4.

[0128] Table 1.4

[0129] port name Number of bytes (bits) I / O illustrate 32 Data header identifier LIST_RECD_LBA 32 I Parameters, master table storage address SUBR_STRT_LBA 32 I Parameters, stored in separate tables starting at the specified address. DATA_STRT_LBA 32 I Parameters, starting address of data storage DATA_END_LBA 32 I Parameters, data storage termination address sys_rst 1 I System Reset soft_rst 1 I Software reset usr_clk 1 I clock ext_clk 1 I External clock sata_core_rdy 1 I Sata core is ready. sata_rd_data 32 I SATA readout data sata_rd_val 1 I SATA readout data is valid. linkup_val 1 I The SATA core established a connection with the hard drive. file_cplt_val 1 I Sata kernel file processing completed. inst_inf_val 1 I External instructions are valid inst_inf_data 32 I External instruction content ext1_in_val 1 I File system 1 Input data is valid ext1_in_data 32 I File system 1 Input data ext2_in_val 1 I File system 2 input data is valid ext2_in_data 32 I File system 2 input data stor_type_en 1 I Input data type is valid stor_file_type 8 I Input data types chip1_flg 1 O Chipscope output sys1_rcv_busy 1 O The file processing system is busy (1 indicates a timeout). Data cannot be entered when this value is 1. sys2_rcv_busy 1 O The file processing system is busy (mode 2 is busy; data cannot be entered when mode 1 is active). opert_lba_ovf 1 O Indicator signal: Read / write operation exceeds hard disk space sata_wr_data 32 O Write data, connect to SATA core sata_wr_data_val 1 O Data write successful, connection to SATA core ssd_rd_data 32 O Read data, connect to SATA core ssd_rd_data_val 1 O Data read is valid, connection to SATA core. ins1_opert_done 1 O Once the document processing system 1 has completed its processing, external processes can proceed with the next step. ins2_opert_done 1 O Once the document processing system 2 has completed its processing, external processes can proceed with the next step. ssd_surplus_size 32 O Remaining hard drive space The signals below are signals that may become inputs (e.g., when a module is changed). inst_inf_val 1 I The command input is valid and controls the module's operation. When the serial port is replaced by another module, pay attention to the changes. inst_inf_data 32 I The command input data controls the module's operation. When the serial port is replaced by another module, be aware of the changes. external_mod_rdy 1 I This indicates that the external module can receive data, and it connects to the SATA core as its input. When the serial port is replaced by another module, be aware of the necessary changes.

[0130] Serial port operation procedure on the host computer

[0131] 1. After the program is powered on and running, it will automatically detect files in both file systems. After the detection is complete (at the millisecond level), the external module can operate this module to read and write.

[0132] 2. Specify the file module, perform a write operation, send 0x FFFF6601, press Enter, then send 0x5555aaaa, and automatically and continuously write simulated data until the write operation is terminated by the command Aaaabbbbb.

[0133] 3. The read operation is similar. Specify the file module, perform the read operation, send 0x FFFF6601 and press Enter, then send...

[0134] The command `0x 55557777 0x 00000100 0x 00000001` reads 1 (*0.5K) data item from sector 0x100. If you need to display the data on the serial port, you must turn on the serial port data display switch before the read operation by sending `0xFFFF7766`. Conversely, you can turn off the display switch by sending `0xFFFF7777`.

[0135] This enables the host computer to read data stored in the SATA and to organize the SATA data.

[0136] Techniques, methods, and apparatus known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and apparatus should be considered part of the specification. In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

Claims

1. A SATA communication data file management system based on a small FPGA, characterized in that, The system includes a data processing module, a SATA_IP_CORE module, and a file management state machine, among which: The data processing module is used for reading, writing, and destroying data, which includes addresses and content. The SATA_IP_CORE module is used to communicate with the solid-state drive; The file management state machine is used to parse external signals, control file system switching and operations, and maintain file system initialization; The file management state machine is responsible for managing file system 1 and file system 2, and includes the following states: HR_WAIT_REDY: Waiting for initialization. After the SATA_IP_CORE module establishes communication with the solid-state drive, it transitions to the WAIT_FILE1_INIT state. WAIT_FILE1_INIT: Initialize file system 1. After initialization is complete, transition to WAIT_FILE2_INIT state; WAIT_FILE2_INIT: Initialize file system 2. After initialization, transition to HR_IDLE state. HR_IDLE: Idle state, waiting for user operation; upon receiving an instruction, it transitions to the OPERT_IMPLUS state. OPERT_IMPLUS: Operates on the IMPULUS file system, including read and write operations. After completion, it transitions to the HR_IDLE state. OPERT_INFORM: Operates on the INFORM file system, including read and write operations. After completion, it transitions to the HR_IDLE state. The host computer interacts with the SATA drive via commands, with the FPGA acting as an intermediary bridge. External commands include SATA action commands and serial port operation commands; SATA action commands include the following: 5555aaaa: Write operation begins; Aaaabbbbb: Write operation complete; sent during the write operation, stopping after writing the current 32MB of data; CCCCAAAA: Destroy data. Sending this command will start the data destruction process after a reset, and will terminate if the power is cut off midway. 55557777 00000100 00000001: Read operation, read data instruction. The last two are the start address and the size to read, respectively. The size to read is an integer multiple of 0.5KB, which is an integer multiple of 512B. This means that one sector of data will be read starting from address 0x100. 9595AAAA {8'd15, 8'd03, 8'd04, 8'd12} Input time base: indicates that the current time base is 12:00 on March 4, 2015; The serial port operation commands are as follows: FFFF6601: Switch to file 1 operation module, the default is 1; FFFF6601: Switch to the file 2 operation module; FFFF5555: Software reset, equivalent to soft_rst; FFFF7766: Enables serial port data display; FFFF7777: Disable serial port data display; FFFF9999: Read the remaining space on the SSD.

2. The SATA communication data file management system based on a small FPGA according to claim 1, characterized in that, The first area of ​​the SATA drive is designated as the record master file. The contents of the record master file are described in Table 1. Table 1 The master file list will be updated after power-on testing is completed, and it will also be updated when a new file is written.

3. The SATA communication data file management system based on a small FPGA according to claim 2, characterized in that, The contents of the data area are described in Table 3: Table 3 Each data frame is 8KB, and a file record is 32MB.

4. The SATA communication data file management system based on a small FPGA according to claim 3, characterized in that, For serial port commands, the FPGA needs to respond with logic and reply with SATA status variables; The sata_file interface is described in Table 4: Table 4 。 5. The SATA communication data file management system based on a small FPGA according to claim 4, characterized in that, The serial port operation procedure on the host computer is as follows: ① After the program is powered on and running, it will automatically detect the files in the two file systems; after the detection is complete, the external module can operate this module to read and write. ② Specify the file module, perform a write operation, send 0x FFFF6601, press Enter, then send 0x5555aaaa, automatically and continuously write simulated data until the write operation is terminated by the command Aaaabbbb. ③ The read operation is similar. Specify the file module, perform the read operation by sending 0x FFFF6601, press Enter, and then send 0x55557777 0x 00000100 0x 00000001 to read one piece of data from sector 0x100. The data size must be an integer multiple of 0.5KB, which is an integer multiple of 512B. If you need to display it on the serial port, you need to turn on the serial port data display switch before the read operation and then send 0xFFFF7766; otherwise, turn off the display switch and then send 0xFFFF7777.

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