Liquid ejection device and wiring substrate

Abstract

The present invention provides a liquid ejection device and a wiring substrate with a preferred configuration of wiring for transmitting a new drive signal when the new drive signal is applied. In the liquid ejection device, the inter-wiring area between a first wiring that transmits a first drive signal for driving a first piezoelectric element to eject liquid from a nozzle head and a second wiring that transmits a second drive signal for driving a second piezoelectric element to eject liquid from the nozzle head includes: a wide inter-wiring area in which the inter-wiring distance between the first wiring and the second wiring is greater than the sum of the line width of the fourth wiring and the minimum diameter of the through-hole wiring, and a narrow inter-wiring area that is smaller than the sum of the line width of the fourth wiring and the minimum diameter of the through-hole wiring and greater than the line width of the through-hole wiring, wherein the third wiring is not located in the inter-wiring area of ​​the first wiring layer and is located in the narrow inter-wiring area between an imaginary line connecting the first terminal and the second terminal and the wide inter-wiring area.

Description

Technical Field

[0001] The present invention relates to a liquid ejecting device and a wiring substrate. Background Art

[0002] Among liquid ejection devices that eject liquid to form documents and images on media, one known type utilizes a piezoelectric element. A piezoelectric element is provided in a printhead, corresponding to each of the multiple ejection units. The piezoelectric element is driven by a drive signal, causing the corresponding ejection unit to eject liquid in an amount corresponding to the drive signal of the piezoelectric element, thereby forming dots on the media.

[0003] Patent document 1 discloses a liquid ejecting device that drives a piezoelectric element based on a drive signal supplied to one end of the piezoelectric element and a reference voltage signal supplied to the other end of the piezoelectric element, thereby ejecting liquid from a ejection portion, and includes a drive circuit substrate that is arranged so that a wiring for transmitting a drive signal and a wiring for transmitting a reference voltage signal overlap along a normal direction.

[0004] In the drive circuit substrate described in Patent Document 1, in which the wiring for transmitting the drive signal and the wiring for transmitting the reference voltage signal overlap along a normal direction, the inductance component generated by the transmission of the drive signal and the inductance component generated by the transmission of the reference voltage signal VBS cancel each other out. This reduces the likelihood of waveform distortion in the drive signal waveform caused by the inductance component, resulting in improved waveform accuracy of the drive signal.

[0005] On the other hand, in recent years, demand for faster image formation speeds on media has increased in liquid ejection devices. Consequently, there is a need to increase the speed of the dot formation cycle required to form dots of a desired size on the media by ejecting liquid. In response to this demand, technological development has been conducted to achieve a faster dot formation cycle by shortening the waveform period of the drive signal used to form dots on the media and applying a new drive signal.

[0006] However, Patent Document 1 does not describe the arrangement of wiring for transmitting a new drive signal when the new drive signal is applied, and thus there is room for improvement.

[0007] Patent Document 1: Japanese Patent Publication No. 2018-099865 Summary of the Invention

[0008] One embodiment of the liquid ejection device according to the present invention comprises: an ejection head, which includes a first piezoelectric element having a first electrode and a second electrode and a second piezoelectric element having a third electrode and a fourth electrode, and ejects liquid by driving the first piezoelectric element and the second piezoelectric element; a wiring substrate, which has a plurality of wiring layers and through-hole wiring, wherein the plurality of wiring layers are provided for transmitting driving signals for driving the first piezoelectric element and the second piezoelectric element and are arranged along a first direction, the through-hole wiring electrically connects the layers of the plurality of wiring layers, and a first wiring layer among the plurality of wiring layers includes: a first wiring, which is provided for the The first driving signal among the driving signals is transmitted, and the first driving signal is a signal supplied to the first electrode and drives the first piezoelectric element in a manner of ejecting liquid from the ejection head; the second wiring is for transmitting the second driving signal among the driving signals, and the second driving signal is a signal supplied to the third electrode and drives the second piezoelectric element in a manner of ejecting liquid from the ejection head; the third wiring, at least a part of which is located in the wiring inter-wiring area between the first wiring and the second wiring, and the second wiring layer among the plurality of wiring layers includes: the fourth wiring, which is for transmitting the third driving signal among the driving signals signal transmission, the third driving signal is a signal supplied to the first electrode and drives the first piezoelectric element in a manner that does not eject liquid from the ejection head; a fifth wiring is for transmitting a reference voltage signal, the reference voltage signal is a signal supplied to the second electrode and the fourth electrode and has a constant voltage value, the wiring substrate includes: a first terminal, which outputs the first driving signal; a second terminal, which outputs the second driving signal, among the multiple wiring layers, the first wiring layer and the second wiring layer are arranged adjacent to each other, and in the direction along the first direction, the fourth wiring is at least partially adjacent to the wiring area The domains are overlapped in a manner, and the wiring area includes a wide wiring area and a narrow wiring area, wherein the wide wiring area is an area where the wiring distance between the first wiring and the second wiring is greater than the sum of the line width of the fourth wiring and the minimum diameter of the through-hole wiring, and the narrow wiring area is an area where the wiring distance is less than the sum of the line width of the fourth wiring and the minimum diameter of the through-hole wiring and greater than the line width of the through-hole wiring, and the third wiring is not located in the narrow wiring area between the imaginary line connecting the first terminal and the second terminal and the wide wiring area in the wiring area of ​​the first wiring layer.

[0009] One mode of the wiring substrate involved in the present invention is a wiring substrate for transmitting a driving signal to a discharge head to drive a first piezoelectric element and a second piezoelectric element, wherein the discharge head includes the first piezoelectric element having a first electrode and a second electrode and the second piezoelectric element having a third electrode and a fourth electrode, and liquid is discharged by driving the first piezoelectric element and the second piezoelectric element, and the wiring substrate comprises: a plurality of wiring layers, wherein the plurality of wiring layers are arranged along a first direction; through-hole wiring, which electrically connects the layers of the plurality of wiring layers; a first terminal, which outputs the first driving signal; and a second terminal, which outputs the first driving signal. The first wiring layer among the plurality of wiring layers includes: a first wiring for transmitting a first driving signal among the driving signals, the first driving signal being a signal supplied to the first electrode and driving the first piezoelectric element in a manner of ejecting liquid from the ejection head; a second wiring for transmitting a second driving signal among the driving signals, the second driving signal being a signal supplied to the third electrode and driving the second piezoelectric element in a manner of ejecting liquid from the ejection head, at least a portion of the third wiring being located in an inter-wiring area between the first wiring and the second wiring, and the plurality of wiring layers. The second wiring layer among the wiring layers includes: a fourth wiring for transmitting a third driving signal among the driving signals, the third driving signal being a signal supplied to the first electrode and driving the first piezoelectric element in a manner that does not eject liquid from the ejection head; and a fifth wiring for transmitting a reference voltage signal, the reference voltage signal being a signal supplied to the second electrode and the fourth electrode and having a constant voltage value. Among the plurality of wiring layers, the first wiring layer and the second wiring layer are arranged adjacent to each other, and in the direction along the first direction, the fourth wiring is arranged so that at least a portion of it overlaps with the inter-wiring area. The wiring inter-area is arranged in a manner, the wiring inter-area includes a wide wiring inter-area and a narrow wiring inter-area, wherein the wide wiring inter-area is an area where the wiring inter-area distance between the first wiring and the second wiring is greater than the sum of the line width of the fourth wiring and the minimum diameter of the through-hole wiring, the narrow wiring inter-area is an area where the wiring inter-area distance is less than the sum of the line width of the fourth wiring and the minimum diameter of the through-hole wiring and is greater than the line width of the through-hole wiring, and the third wiring is not located in the narrow wiring inter-area between the imaginary line connecting the first terminal and the second terminal and the wide wiring inter-area in the wiring inter-area of ​​the first wiring layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 A diagram showing the schematic structure of a liquid ejecting device.

[0011] Figure 2 A diagram showing a schematic structure of a discharge unit.

[0012] Figure 3 FIG. 1 is a diagram showing an example of the signal waveforms of the drive signals COMA, COMB, and COMC.

[0013] Figure 4 A diagram showing the functional structure of a drive signal selection circuit.

[0014] Figure 5 A diagram showing an example of decoded content in a decoder.

[0015] Figure 6 This is a diagram showing an example of the configuration of a selection circuit corresponding to the amount of one ejection unit.

[0016] Figure 7 This is a diagram for explaining the operation of the drive signal selection circuit.

[0017] Figure 8 A diagram showing the structure of a driving circuit.

[0018] Figure 9 A diagram showing the structure of a liquid ejection module.

[0019] Figure 10 A diagram showing an example of the structure of a discharge module.

[0020] Figure 11 This is a diagram showing an example of a cross section of a discharge module.

[0021] Figure 12 A diagram showing an example of the structure of a head driving module.

[0022] Figure 13 A diagram showing an example of the electrical connection relationship of the drive circuit substrate.

[0023] Figure 14 A diagram showing an example of a cross-sectional structure of a wiring substrate included in a driver circuit substrate.

[0024] Figure 15 A diagram showing an example of the structure of the surface 831 of the wiring board.

[0025] Figure 16 A diagram showing an example of the structure of a layer 841 of a wiring board.

[0026] Figure 17 A diagram showing an example of the structure of the layer 842 of the wiring board.

[0027] Figure 18 A diagram showing an example of the structure of the layer 843 of the wiring board.

[0028] Figure 19A diagram showing an example of the structure of the layer 844 of the wiring board.

[0029] Figure 20 A diagram showing an example of the structure of a layer 845 of a wiring board.

[0030] Figure 21 It is a cross-sectional view of the wiring substrate when the wiring substrate is cut along the line Cc.

[0031] Figure 22 It is a cross-sectional view of the wiring substrate when the wiring substrate is cut along the line Dd.

[0032] Figure 23 This is a cross-sectional view of the wiring substrate when the wiring substrate is cut along line Ee. DETAILED DESCRIPTION

[0033] The following drawings illustrate preferred embodiments of the present invention. The drawings are provided for ease of explanation. Furthermore, the embodiments described below are not intended to unduly limit the scope of the present invention as set forth in the claims. Furthermore, not all of the structures described below are necessarily essential components of the present invention.

[0034] 1. Structure of liquid ejection device

[0035] Figure 1 1 is a diagram showing the schematic structure of the liquid ejecting device 1. Figure 1 As shown, the liquid ejection device 1 is a so-called line inkjet printer that ejects ink at desired timing onto a medium P transported by a transport unit 4, thereby forming a desired image on the medium P. In the following description, the direction in which the medium P is transported is sometimes referred to as the transport direction, and the width direction of the transported medium P is sometimes referred to as the main scanning direction.

[0036] like Figure 1 As shown, the liquid ejecting device 1 includes a control unit 2 , a liquid container 3 , a transport unit 4 , and a plurality of ejecting units 5 .

[0037] The control unit 2 includes a processing circuit such as a CPU (Central Processing Unit) or an FPGA (Field Programmable Gate Array), and a storage circuit such as a semiconductor memory. The control unit 2 outputs signals for controlling various elements of the liquid ejection device 1 based on image data input from an external device such as a host computer (not shown) provided outside the liquid ejection device 1.

[0038] The liquid container 3 stores ink as an example of liquid supplied to the ejection unit 5. Specifically, the liquid container 3 stores inks of various colors, such as black, cyan, magenta, yellow, red, and gray, to be ejected onto the medium P.

[0039] The conveying unit 4 includes a conveying motor 41 and conveying rollers 42. The conveying unit 4 receives a conveying control signal Ctrl-T from the control unit 2. The conveying motor 41 operates based on the input conveying control signal Ctrl-T, and the conveying rollers 42 rotate in response to the operation of the conveying motor 41. This allows the medium P to be conveyed in the conveying direction.

[0040] Each of the multiple ejection units 5 includes a head driving module 10 and a liquid ejection module 20. The ejection units 5 are input with image information signals IP output by the control unit 2 and are supplied with ink stored in the liquid container 3. The head driving module 10 controls the operation of the liquid ejection module 20 based on the image information signals IP input from the control unit 2. The liquid ejection module 20 ejects the ink supplied from the liquid container 3 onto the medium P under the control of the head driving module 10.

[0041] In the liquid ejection device 1 of this embodiment, the liquid ejection modules 20 included in each of the multiple ejection units 5 are arranged in a row along the main scanning direction, extending across the width of the medium P. This allows the liquid ejection modules 20 to eject ink across the entire width of the transported medium P. Specifically, the liquid ejection device 1 of this embodiment is a so-called line-type inkjet printer, which forms a desired image on the medium P by ejecting ink from the multiple liquid ejection modules 20 arranged in a row extending across the width of the medium P as the medium P is transported. Furthermore, the liquid ejection device 1 is not limited to a line-type inkjet printer; it may also be a so-called serial-type inkjet printer, in which the liquid ejection modules 20 reciprocate along the main scanning direction, i.e., the width of the medium P, and eject ink onto the transported medium P in synchronization with this reciprocating movement, thereby forming a desired image on the medium P.

[0042] Next, a general structure of the discharge unit 5 will be described. Here, the plurality of discharge units 5 included in the liquid discharge apparatus 1 all have the same structure, and in the following description, only one discharge unit 5 will be described. Figure 2 : is a diagram showing the schematic structure of the ejection unit 5. Figure 2 As shown, the ejection unit 5 includes a head driving module 10 and a liquid ejection module 20. In addition, in the ejection unit 5, the head driving module 10 and the liquid ejection module 20 are electrically connected by a connecting member 30.

[0043] The connecting member 30 is a flexible component used to electrically connect the head driving module 10 and the liquid ejection module 20. For example, a flexible printed circuit (FPC) or a flexible flat cable (FFC) can be used. Alternatively, a board-to-board (BtoB) connector can be used as the connecting member 30, instead of an FPC or FFC. Alternatively, a BtoB connector and an FPC or FFC can be used together.

[0044] The head driving module 10 includes a control circuit 100 , driving signal output circuits 50 - 1 to 50 - m , a reference voltage output circuit 53 , and a conversion circuit 120 .

[0045] The control circuit 100 includes a CPU, an FPGA, etc. The image information signal IP outputted by the control unit 2 is inputted to the control circuit 100. The control circuit 100 outputs a signal for controlling each element of the discharge unit 5 based on the input image information signal IP.

[0046] The control circuit 100 generates a basic data signal dDATA for controlling the operation of the liquid ejection module 20 based on the image information signal IP, and outputs it to the conversion circuit 120. The conversion circuit 120 converts the basic data signal dDATA into a differential signal such as LVDS (Low Voltage Differential Signaling) and outputs it as the data signal DATA to the liquid ejection module 20. In addition, the conversion circuit 120 can also convert the basic data signal dDATA into a differential signal of a high-speed transmission method other than LVDS, such as LVPECL (Low Voltage Positive Emitter Coupled Logic) or CML (Current Mode Logic), and output it as the data signal DATA to the liquid ejection module 20. In addition, the conversion circuit 120 can also convert part or all of the input basic data signal dDATA into a predetermined single-ended signal and output it as the data signal DATA to the liquid ejection module 20.

[0047] In addition, the control circuit 100 outputs basic drive signals dA1, dB1, and dC1 to the drive signal output circuit 50-1. The drive signal output circuit 50-1 includes drive circuits 52a, 52b, and 52c. The basic drive signal dA1 is input to the drive circuit 52a. The drive circuit 52a performs D-class amplification on the input basic drive signal dA1 after performing digital-to-analog conversion, thereby generating a drive signal COMA1, and outputs the drive signal to the liquid ejection module 20. The basic drive signal dB1 is input to the drive circuit 52b. The drive circuit 52b performs D-class amplification on the input basic drive signal dB1 after performing digital-to-analog conversion, thereby generating a drive signal COMB1, and outputs the drive signal to the liquid ejection module 20. The basic drive signal dC1 is input to the drive circuit 52c. The drive circuit 52c performs D-class amplification on the input basic drive signal dC1 after performing digital-to-analog conversion, thereby generating a drive signal COMC1, and outputs the drive signal to the liquid ejection module 20.

[0048] Here, the drive circuits 52a, 52b, and 52c only need to be able to generate the drive signals COMA1, COMB1, and COMC1 by amplifying the waveforms specified by the input basic drive signals dA1, dB1, and dC1, respectively. Therefore, the drive circuits 52a, 52b, and 52c may each include a class A amplifier circuit, a class B amplifier circuit, or a class AB amplifier circuit, instead of, or in addition to, the class D amplifier circuit. Furthermore, although the following description illustrates the basic drive signals dA1, dB1, and dC1 as digital signals, the basic drive signals dA1, dB1, and dC1 may also be analog signals, as long as they can specify the waveforms of the corresponding drive signals COMA1, COMB1, and COMC1.

[0049] Drive signal output circuits 50-2 to 50-m have the same structure as drive signal output circuit 50-1, differing only in the input and output signals. Specifically, drive signal output circuit 50-j (where j is any one of 1 to m) includes circuits corresponding to drive circuits 52a, 52b, and 52c, respectively. Furthermore, drive signal output circuit 50-j generates drive signals COMAj, COMBj, and COMCj based on the base drive signals dAj, dBj, and dCj input from control circuit 100, and outputs these drive signals to liquid ejection module 20.

[0050] Here, the drive signal output circuit 50-1 and the drive signal output circuits 50-2 to 50-m have the same structure. When there is no need to distinguish them, they may be simply referred to as the drive signal output circuit 50. In this case, the drive signal output circuit 50 includes drive circuits 52a, 52b, and 52c, and the drive circuit 52a outputs the drive signal COMA, the drive circuit 52b outputs the drive signal COMB, and the drive circuit 52c outputs the drive signal COMC.

[0051] In addition, the drive circuits 52a, 52b, and 52c included in the drive signal output circuit 50 all have the same structure. When there is no need to distinguish them, they are sometimes simply referred to as the drive circuit 52. In this case, the drive circuit 52 is described as a structure in which the drive circuit 52 generates the drive signal COM based on the basic drive signal do and outputs the generated drive signal COM to the liquid ejection module 20.

[0052] In addition, when explaining the drive circuits 52a, 52b, and 52c included in the drive signal output circuit 50-1 and the drive circuits 52a, 52b, and 52c included in the drive signal output circuit 50-j, the drive circuits 52a, 52b, and 52c included in the drive signal output circuit 50-1 may be referred to as drive circuits 52a1, 52b1, and 52c1, respectively, and the drive circuits 52a, 52b, and 52c included in the drive signal output circuit 50-j may be referred to as drive circuits 52aj, 52bj, and 52cj, respectively. A specific example of the structure of the drive circuit 52 will be described later.

[0053] The reference voltage output circuit 53 generates a reference voltage signal VBS representing a reference potential for driving a piezoelectric element 60 (described later) included in the liquid ejection module 20, and outputs the signal to the liquid ejection module 20. The reference voltage signal VBS is, for example, a constant potential signal such as 5.5 V or 6 V. The constant potential signal includes a signal that is considered constant while taking into account various deviations or errors, such as potential fluctuations due to the operation of peripheral circuits, potential fluctuations due to variations in circuit components, and potential fluctuations due to temperature characteristics of circuit components.

[0054] The liquid ejection module 20 includes a recovery circuit 220 and ejection modules 23 - 1 to 23 - m .

[0055] The data signal DATA is input to the restoration circuit 220. The restoration circuit 220 restores the input differential signal data signal DATA to a single-ended signal, separates the restored single-ended signal into signals corresponding to each of the ejection modules 23-1 to 23-m, and outputs the signals to each of the corresponding ejection modules 23-1 to 23-m.

[0056] Specifically, the recovery circuit 220 recovers and separates the data signal DATA to generate a clock signal SCK1, a print data signal SI1, and a latch signal LAT1, which are then output to the ejection module 23-1. Furthermore, the recovery circuit 220 recovers and separates the data signal DATA to generate a clock signal SCKj, a print data signal SIj, and a latch signal LATj, which are then output to the ejection module 23-j. Furthermore, any of the clock signals SCK1 to SCKm, print data signals SI1 to SIm, and latch signals LAT1 to LATm output by the recovery circuit 220 corresponding to each of the ejection modules 23-1 to 23-m may be shared and input to the ejection modules 23-1 to 23-m.

[0057] Here, because the recovery circuit 220 recovers and separates the data signal DATA to generate clock signals SCK1-SCKm, print data signals SI1-SIm, and latch signals LAT1-LATm, the data signal DATA output by the conversion circuit 120 is a differential signal including signals corresponding to the clock signals SCK1-SCKm, print data signals SI1-SIm, and latch signals LAT1-LATm. Therefore, the basic data signal dDATA output by the control circuit 100 includes single-ended signals corresponding to the clock signals SCK1-SCKm, print data signals SI1-SIm, and latch signals LAT1-LATm.

[0058] The ejection module 23-1 includes a drive signal selection circuit 200 and a plurality of ejection parts 600. Each of the ejection parts 600 includes a piezoelectric element 60. That is, the ejection module 23-1 includes the same number of piezoelectric elements 60 as the ejection parts 600.

[0059] The ejection module 23-1 receives inputs of the drive signals COMA1, COMB1, COMC1, a reference voltage signal VBS, a clock signal SCK1, a print data signal SI1, and a latch signal LAT1. These drive signals COMA1, COMB1, COMC1, the clock signal SCK1, the print data signal SI1, and the latch signal LAT1 are input to the drive signal selection circuit 200 included in the ejection module 23-1. The drive signal selection circuit 200 selects or deselects the signal waveforms of the drive signals COMA1, COMB1, and COMC1 based on the input clock signal SCK1, the print data signal SI1, and the latch signal LAT1, thereby generating a drive signal VOUT. The drive signal selection circuit 200 then supplies the generated drive signal VOUT to one end of the piezoelectric element 60 included in the corresponding ejection unit 600. Furthermore, the reference voltage signal VBS is supplied to the other end of the piezoelectric element 60. The piezoelectric element 60 is driven by the potential difference between the driving signal VOUT supplied to one end and the reference voltage signal VBS supplied to the other end. As a result, an amount of ink corresponding to the driving amount of the piezoelectric element 60 is discharged from the corresponding discharge unit 600.

[0060] Similarly, the ejection module 23-j includes a drive signal selection circuit 200 and a plurality of ejection units 600. Each of the ejection units 600 includes a piezoelectric element 60. That is, the ejection module 23-j includes the same number of piezoelectric elements 60 as the ejection units 600.

[0061] The ejection module 23-j receives inputs of drive signals COMAj, COMBj, COMCj, a reference voltage signal VBSj, a clock signal SCKj, a print data signal SIj, and a latch signal LATj. These drive signals COMAj, COMBj, COMCj, the clock signal SCKj, the print data signal SIj, and the latch signal LATj are input to a drive signal selection circuit 200 included in the ejection module 23-j. The drive signal selection circuit 200 selects or deselects the signal waveforms of the drive signals COMAj, COMBj, and COMCj based on the input clock signal SCKj, the print data signal SIj, and the latch signal LATj, thereby generating a drive signal VOUT. The drive signal selection circuit 200 then supplies the generated drive signal VOUT to one end of the piezoelectric element 60 included in the corresponding ejection unit 600. Furthermore, the reference voltage signal VBS is supplied to the other end of the piezoelectric element 60. The piezoelectric element 60 is driven by the potential difference between the driving signal VOUT supplied to one end and the reference voltage signal VBS supplied to the other end. As a result, an amount of ink corresponding to the driving amount of the piezoelectric element 60 is discharged from the corresponding discharge unit 600.

[0062] As described above, in the liquid ejection device 1, the control unit 2 controls the transport of the medium P by the transport unit 4 based on image data supplied from a host computer (not shown), and also controls the operation of the head drive module 10 included in each of the multiple ejection units 5. This controls the ejection of ink from the liquid ejection module 20. As a result, the liquid ejection device 1 can deposit a desired amount of ink onto a desired location on the medium P, thereby forming a desired image on the medium P.

[0063] Here, the ejection modules 23-1 to 23-m included in the liquid ejection module 20 have the same structure except that the signals input thereto are different. Therefore, in the following description, when there is no need to distinguish between the ejection modules 23-1 to 23-m, they may be simply referred to as the ejection module 23. In this case, the drive signals COMA1 to COMAm input to the ejection module 23 may be referred to as the drive signals COMA, the drive signals COMB1 to COMBm may be referred to as the drive signals COMB, the drive signals COMC1 to COMCm may be referred to as the drive signals COMC, the clock signals SCK1 to SCKm may be referred to as the clock signals SCK, the print data signals SI1 to SIm may be referred to as the print data signals SI, and the latch signals LAT1 to LATm may be referred to as the latch signals LAT. That is, the ejection module 23 controls the drive of the piezoelectric element 60 by selecting or deselecting the signal waveforms of the drive signals COMA, COMB, and COMC at a timing specified by the clock signal SCK, the printing data signal SI, and the latch signal LAT, thereby ejecting an amount of ink corresponding to the drive amount of the piezoelectric element 60 from the corresponding ejection section 600.

[0064] 2. Functional structure of the drive signal selection circuit

[0065] Next, the structure and operation of the drive signal selection circuit 200 included in the discharge module 23 will be described. When describing the structure and operation of the drive signal selection circuit 200 included in the discharge module 23, an example of the signal waveform included in the drive signals COMA, COMB, and COMC input to the drive signal selection circuit 200 will be described first.

[0066] Figure 3 FIG. 1 is a diagram showing an example of the signal waveforms of the drive signals COMA, COMB, and COMC. Figure 3 As shown, the driving signal COMA includes a trapezoidal waveform Adp arranged in a period T from the rise of the latch signal LAT to the rise of the next latch signal LAT. The trapezoidal waveform Adp is a signal waveform that is supplied to one end of the piezoelectric element 60 to drive the piezoelectric element 60 so that a predetermined amount of ink is discharged from the corresponding discharge portion 600.

[0067] The driving signal COMB includes a trapezoidal waveform Bdp arranged within a period T. The trapezoidal waveform Bdp is a signal waveform having a smaller voltage amplitude than the trapezoidal waveform Adp. When the trapezoidal waveform Bdp is supplied to one end of the piezoelectric element 60, a smaller amount of ink than a predetermined amount is ejected from the ejection portion 600 corresponding to the piezoelectric element 60. In other words, the trapezoidal waveform Bdp is a signal waveform that, when supplied to one end of the piezoelectric element 60, drives the piezoelectric element 60 so that a smaller amount of ink than a predetermined amount is ejected from the corresponding ejection portion 600.

[0068] Here, the amount of ink ejected from the corresponding ejection portion 600 when the drive signal COMA is supplied to the piezoelectric element 60 is greater than the amount of ink ejected from the corresponding ejection portion 600 when the drive signal COMB is supplied to the piezoelectric element 60. Therefore, the driving amount of the piezoelectric element 60 when the drive signal COMA is supplied to the piezoelectric element 60 is greater than the driving amount of the piezoelectric element 60 when the drive signal COMB is supplied to the piezoelectric element 60. In other words, the amount of ink ejected from the ejection portion 600 corresponding to the piezoelectric element 60 when the drive signal COMA is supplied to the piezoelectric element 60 is different from the amount of ink ejected from the ejection portion 600 corresponding to the piezoelectric element 60 when the drive signal COMB is supplied to the piezoelectric element 60. The amount of ink ejected from the ejection portion 600 corresponding to the piezoelectric element 60 when the drive signal COMA is supplied to the piezoelectric element 60 is greater than the amount of ink ejected from the ejection portion 600 corresponding to the piezoelectric element 60 when the drive signal COMB is supplied to the piezoelectric element 60. Therefore, the amount of current generated by the transmission of the drive signal COMA is greater than the amount of current generated by the transmission of the drive signal COMB.

[0069] Furthermore, the drive signal COMC includes a trapezoidal waveform Cdp arranged within a period T. The trapezoidal waveform Cdp is a signal waveform with a smaller voltage amplitude than the trapezoidal waveforms Adp and Bdp. When the trapezoidal waveform Cdp is supplied to one end of the piezoelectric element 60, it causes the ink near the nozzle opening to vibrate to such an extent that the ink is prevented from being ejected from the ejection portion 600 corresponding to the piezoelectric element 60. In other words, the trapezoidal waveform Cdp is a signal waveform that, when supplied to one end of the piezoelectric element 60, drives the piezoelectric element 60 to such an extent that the ink is prevented from being ejected from the corresponding ejection portion 600. This trapezoidal waveform Cdp causes the ink near the nozzle opening of the ejection portion 600 including the piezoelectric element 60 to vibrate. As a result, the likelihood of an increase in ink viscosity near the corresponding nozzle opening is reduced.

[0070] As described above, the drive signals COMA and COMB drive the corresponding piezoelectric element 60 so that ink is ejected from the ejection portion 600, while the drive signal COMC drives the corresponding piezoelectric element 60 so that ink is not ejected from the ejection portion 600. Specifically, the amount of drive applied to the piezoelectric element 60 when the drive signals COMA and COMB are supplied to the piezoelectric element 60 is greater than the amount of drive applied to the piezoelectric element 60 when the drive signal COMC is supplied to the piezoelectric element 60. Therefore, the voltage amplitudes of the drive signals COMA and COMB are greater than the voltage amplitude of the drive signal COMC, and the amount of current generated by the transmission of the drive signals COMA and COMB is greater than the amount of current generated by the transmission of the drive signal COMC.

[0071] Furthermore, at the start and end timings of the trapezoidal waveforms Adp, Bdp, and Cdp, the voltage values ​​of the trapezoidal waveforms Adp, Bdp, and Cdp all share the voltage Vc. That is, the trapezoidal waveforms Adp, Bdp, and Cdp are signal waveforms that start and end at the voltage Vc, respectively.

[0072] In the following description, the amount of ink ejected from the ejection portion 600 corresponding to the piezoelectric element 60 when the trapezoidal waveform Adp is supplied to one end of the piezoelectric element 60 may be referred to as the "large amount," and the amount of ink ejected from the ejection portion 600 corresponding to the piezoelectric element 60 when the trapezoidal waveform Bdp is supplied to one end of the piezoelectric element 60 may be referred to as the "small amount," which is different from the "large amount." Furthermore, when the trapezoidal waveform Cdp is supplied to one end of the piezoelectric element 60, the ink near the nozzle opening is vibrated to such an extent that the ink is not ejected from the ejection portion 600 corresponding to the piezoelectric element 60, which is referred to as "microvibration BSD."

[0073] That is, in the liquid ejection device 1 of this embodiment, the drive circuit 52a outputs a drive signal COMA, the drive circuit 52b outputs a drive signal COMB, and the drive circuit 52c outputs a drive signal COMC, wherein the drive signal COMA is a signal for driving the piezoelectric element 60 in such a manner that the ejection portion 600 of the ejection module 23 ejects a predetermined and large amount of ink, the drive signal COMB is a signal for driving the piezoelectric element 60 in such a manner that the ejection portion 600 of the ejection module 23 ejects an amount of ink less than the predetermined amount and a small amount, and the drive signal COMC is a signal for driving the piezoelectric element 60 in such a manner that the ejection portion 600 of the ejection module 23 does not eject ink.

[0074] In addition, the signal waveforms of the driving signals COMA, COMB, and COMC are not limited to Figure 3The illustrated shapes may also be used for various signal waveform shapes depending on the type of ink ejected from the ejection unit 600, the number of piezoelectric elements 60 driven by the drive signals COMA, COMB, and COMC, the wiring lengths for transmitting the drive signals COMA, COMB, and COMC, and the like. Therefore, the drive signals COMA1 to COMAm may each have a signal waveform with a different shape, and the amount of ink ejected from the corresponding ejection unit 600 in response to the drive signal COMA1 may differ from the amount of ink ejected from the corresponding ejection unit 600 in response to the drive signal COMAj. Similarly, the drive signals COMB1 to COMBm may each have a signal waveform with a different shape, and the amount of ink ejected from the corresponding ejection unit 600 in response to the drive signal COMB1 may differ from the amount of ink ejected from the corresponding ejection unit 600 in response to the drive signal COMBj. Likewise, the drive signals COMC1 to COMCm may have signal waveforms of different shapes, and the displacement of the piezoelectric element 60 caused by the drive signal COMC1 may be different from the displacement of the piezoelectric element 60 caused by the drive signal COMCj.

[0075] Next, the configuration and operation of the drive signal selection circuit 200 that outputs the drive signal VOUT by selecting or not selecting the signal waveforms of the drive signals COMA, COMB, and COMC will be described. Figure 4 FIG. 2 is a diagram showing the functional structure of the drive signal selection circuit 200. Figure 4 As shown, the driving signal selection circuit 200 includes a selection control circuit 210 and a plurality of selection circuits 230 .

[0076] The selection control circuit 210 receives inputs of a print data signal SI, a latch signal LAT, and a clock signal SCK. Furthermore, the selection control circuit 210 includes n sets of shift registers (S / R) 212, latch circuits 214, and decoders 216, corresponding to each of the n ejection units 600. In other words, the drive signal selection circuit 200 includes n shift registers 212, n latch circuits 214, and n decoders 216, the same number as the n ejection units 600.

[0077] The print data signal SI is synchronized with the clock signal SCK and includes two bits of print data [SIH, SIL] for specifying the dot size formed by ink ejected from each of the n ejection units 600 using any of the following methods: "large dot LD," "small dot SD," "non-ejection ND," and "micro-vibration BSD." The print data signal SI is held in the shift register 212 corresponding to each ejection unit 600 for each two-bit print data bit [SIH, SIL].

[0078] Specifically, n shift registers 212 corresponding to the ejection unit 600 are connected in cascade connection. The 2-bit print data [SIH, SIL] included in the print data signal SI is sequentially transmitted to the subsequent stage of the cascade-connected shift register 212 according to the clock signal SCK. Then, when the supply of the clock signal SCK stops, the 2-bit print data [SIH, SIL] corresponding to the ejection unit 600 corresponding to the shift register 212 is retained in the n shift registers 212. Figure 4 In order to distinguish the n shift registers 212 connected in cascade, they are shown as 1st stage, 2nd stage, . . . , nth stage in order from the upstream side where the print data signal SI is input toward the downstream side.

[0079] Each of the n latch circuits 214 latches the 2-bit print data [SIH, SIL] held in the corresponding shift register 212 at the rising edge of the latch signal LAT.

[0080] The 2-bit print data [SIH, SIL] latched by the latch circuit 214 is input to the corresponding decoder 216. Each of the n decoders 216 decodes the input 2-bit print data [SIH, SIL] and outputs selection signals S1, S2, and S3 of logic levels corresponding to the decoded data in each cycle T. Figure 5 : is a diagram showing an example of the decoding content in the decoder 216. The decoder 216 outputs a combination of the input 2-bit printing data [SIH, SIL] and Figure 5 The selection signals S1, S2, and S3 have logic levels specified by the decoding content shown. For example, when the 2-bit print data [SIH, SIL] input to the decoder 216 is [1, 0], the decoder 216 sets the logic levels of the selection signals S1, S2, and S3 to L, H, and L levels, respectively, within a period T.

[0081] Back to Figure 4The selection circuit 230 is provided for each of the n ejection units 600. That is, the drive signal selection circuit 200 includes n selection circuits 230. The selection circuits 230 are input with the selection signals S1, S2, and S3 output by the decoder 216 corresponding to the same ejection unit 600, and the drive signals COMA, COMB, and COMC. The selection circuits 230 select or deselect the drive signals COMA, COMB, and COMC based on the selection signals S1, S2, and S3, respectively, to generate a drive signal VOUT and output it to the corresponding ejection unit 600.

[0082] Figure 6 FIG. 2 is a diagram showing an example of the configuration of the selection circuit 230 corresponding to the amount of one ejection unit 600. Figure 6 As shown, the selection circuit 230 includes inverters 232a, 232b, and 232c, and transmission gates 234a, 234b, and 234c.

[0083] The selection signal S1 is input to the positive control terminal (not marked with a circle) of transmission gate 234a and is logically inverted by inverter 232a, thereby also being input to the negative control terminal (marked with a circle) of transmission gate 234a. The drive signal COMA is input to the input terminal of transmission gate 234a. When the input selection signal S1 is at an H level, transmission gate 234a establishes a conductive state between the input terminal and the output terminal, and when the input selection signal S1 is at an L level, the input terminal and the output terminal are not conductive. That is, when the selection signal S1 is at an H level, transmission gate 234a outputs the drive signal COMA to the output terminal, and when the selection signal S1 is at an L level, does not output the drive signal COMA to the output terminal.

[0084] The selection signal S2 is input to the positive control terminal (not marked with a circle) of the transmission gate 234b and is logically inverted by the inverter 232b, thereby also being input to the negative control terminal (marked with a circle) of the transmission gate 234b. The drive signal COMB is input to the input terminal of the transmission gate 234b. When the input selection signal S2 is at an H level, the transmission gate 234b sets the input terminal and the output terminal to a conductive state, and when the input selection signal S2 is at an L level, the input terminal and the output terminal are set to a non-conductive state. In other words, when the selection signal S2 is at an H level, the transmission gate 234b outputs the drive signal COMB to the output terminal, and when the selection signal S2 is at an L level, does not output the drive signal COMB to the output terminal.

[0085] The selection signal S3 is input to the positive control terminal (not marked with a circle) of the transmission gate 234c and is logically inverted by the inverter 232c, thereby also being input to the negative control terminal (marked with a circle) of the transmission gate 234c. Furthermore, the drive signal COMC is input to the input terminal of the transmission gate 234c. When the input selection signal S3 is at an H level, the transmission gate 234c sets the connection between the input terminal and the output terminal to a conductive state, and when the input selection signal S3 is at an L level, the connection between the input terminal and the output terminal is set to a non-conductive state. In other words, when the selection signal S3 is at an H level, the transmission gate 234c outputs the drive signal COMC to the output terminal, and when the selection signal S3 is at an L level, does not output the drive signal COMC to the output terminal.

[0086] In the selection circuit 230, the output terminals of the transmission gates 234a, 234b, and 234c are connected in common. Specifically, the drive signals COMA, COMB, and COMC, which are selected or deselected by the selection signals S1, S2, and S3, are output from the output terminals of the commonly connected transmission gates 234a, 234b, and 234c. The drive signal selection circuit 200 then supplies the signals from the output terminals of the transmission gates 234a, 234b, and 234c as the drive signal VOUT to the piezoelectric element 60 included in the corresponding ejection unit 600.

[0087] The operation of the driving signal selection circuit 200 configured as described above will be described. Figure 7 This figure illustrates the operation of the drive signal selection circuit 200. The print data signal SI serially includes two bits of print data [SIH, SIL] and is input to the drive signal selection circuit 200 in synchronization with the clock signal SCK. The two bits of print data [SIH, SIL] included in the print data signal SI are then sequentially transmitted to the subsequent shift register 212 in synchronization with the clock signal SCK. Thereafter, since the input of the clock signal SCK ceases, the two bits of print data [SIH, SIL] corresponding to each ejection unit 600 are retained in the shift register 212 corresponding to the same ejection unit 600.

[0088] Thereafter, as the latch signal LAT rises, the latch circuit 214 latches the 2-bit print data [SIH, SIL] held in the shift register 212 at once. Figure 7 , 2-bit print data [SIH, SIL] corresponding to the shift registers 212 of the 1st, 2nd, . . . , nth stages, latched by the latch circuit 214, are shown as LT1, LT2, . . . , LTn.

[0089] The 2-bit print data [SIH, SIL] latched by the latch circuit 214 is input to the decoder 216. The decoder 216 outputs selection signals S1, S2, and S3 of logic levels corresponding to the dot size specified by the input 2-bit print data [SIH, SIL].

[0090] Specifically, when the input 2-bit print data [SIH, SIL] is [1, 1], the decoder 216 outputs the logic levels of the selection signals S1, S2, and S3 to the selection circuit 230 as H, L, and L levels respectively within the period T. As a result, the selection circuit 230 selects the trapezoidal waveform Adp within the period T. Figure 7 The driving signal VOUT corresponding to the “large dot LD” shown is output from the driving signal selection circuit 200 .

[0091] Furthermore, when the input 2-bit print data [SIH, SIL] is [1, 0], the decoder 216 outputs the logic levels of the selection signals S1, S2, and S3 to the selection circuit 230 as L, H, and L levels, respectively, within the period T. As a result, the selection circuit 230 selects the trapezoidal waveform Bdp within the period T. Figure 7 The driving signal VOUT corresponding to the “small dot SD” shown is output from the driving signal selection circuit 200 .

[0092] Furthermore, when the input 2-bit print data [SIH, SIL] is [0, 1], the decoder 216 outputs the logic levels of the selection signals S1, S2, and S3 to the selection circuit 230 as L, L, and L levels within the period T. As a result, the selection circuit 230 does not select any of the trapezoidal waveforms Adp, Bdp, and Cdp within the period T. Figure 7 The driving signal VOUT corresponding to the “non-discharge ND” shown is output from the driving signal selection circuit 200 .

[0093] Here, when the selection circuit 230 does not select any of the trapezoidal waveforms Adp, Bdp, and Cdp, the voltage Vc immediately preceding the voltage supplied to the piezoelectric element 60 is retained at one end of the corresponding piezoelectric element 60 by the capacitance component of the piezoelectric element 60. That is, the output of the drive signal VOUT having a constant voltage of Vc from the drive signal selection circuit 200 includes the case where, when none of the trapezoidal waveforms Adp, Bdp, and Cdp is selected as the drive signal VOUT, the immediately preceding voltage Vc retained by the capacitance component of the piezoelectric element 60 is supplied to the piezoelectric element 60 as the drive signal VOUT.

[0094] Furthermore, when the input 2-bit print data [SIH, SIL] is [0, 0], the decoder 216 outputs the logic levels of the selection signals S1, S2, and S3 to the selection circuit 230 as L, L, and H levels, respectively, within the period T. As a result, the selection circuit 230 selects the trapezoidal waveform Cdp within the period T. Figure 7 The driving signal VOUT corresponding to the “micro-vibration BSD” shown is output from the driving signal selection circuit 200 .

[0095] As described above, the drive signal selection circuit 200 selects or deselects the signal waveforms of the drive signals COMA, COMB, and COMC based on the print data signal SI, the latch signal LAT, and the clock signal SCK, thereby generating a drive signal VOUT corresponding to each of the plurality of ejection units 600 and outputting the drive signal VOUT to the corresponding ejection unit 600. Consequently, the amount of ink ejected from each of the plurality of ejection units 600 is individually controlled.

[0096] Furthermore, in the liquid ejection device 1 of this embodiment, when a large dot is formed on the medium P, the drive signal selection circuit 200 supplies the drive signal COMA output by the drive circuit 52a as the drive signal VOUT to the ejection unit 600. When a small dot is formed on the medium P, the drive signal selection circuit 200 supplies the drive signal COMB output by the drive circuit 52b as the drive signal VOUT to the ejection unit 600. In other words, the drive signal selection circuit 200 simply selects either the drive signal COMA or COMB based on the dot size to be formed on the medium P. Therefore, compared to a configuration in which a single drive signal includes multiple signal waveforms and these signal waveforms are selected by time-sharing to determine the dot size to be formed on the medium P, the waveform periods of the drive signals COMA and COMB can be shortened. As a result, the liquid ejection device 1 can achieve a higher speed at which it can form a desired image on the medium P.

[0097] Furthermore, the liquid ejection device 1 of this embodiment includes, in addition to the drive signals COMA and COMB, a drive signal COMC for driving the piezoelectric element 60 so that ink is not ejected onto the medium P. This reduces the likelihood of ejection abnormalities occurring in the ejection unit 600 due to increased ink viscosity, without reducing the speed at which the desired image is formed on the medium P. Specifically, the liquid ejection device 1 of this embodiment includes, in addition to the drive signals COMA and COMB, a drive signal COMC. This increases the speed at which the desired image is formed on the medium P without reducing the quality of the image formed on the medium P, and reduces the likelihood of a reduction in ink ejection accuracy.

[0098] Here, the drive signal VOUT supplied to the piezoelectric element 60 is generated by selecting the signal waveform included in each of the drive signals COMA, COMB, and COMC. Specifically, when the drive signal selection circuit 200 selects the drive signal COMA, the corresponding piezoelectric element 60 is supplied with the drive signal COMA as the drive signal VOUT. When the drive signal selection circuit 200 selects the drive signal COMB, the corresponding piezoelectric element 60 is supplied with the drive signal COMB as the drive signal VOUT. And when the drive signal selection circuit 200 selects the drive signal COMC, the corresponding piezoelectric element 60 is supplied with the drive signal COMC as the drive signal VOUT. That is, the drive circuit 52a outputs the drive signal COMA supplied to the piezoelectric element 60, the drive circuit 52b outputs the drive signal COMB supplied to the piezoelectric element 60, and the drive circuit 52c outputs the drive signal COMC supplied to the piezoelectric element 60.

[0099] 3. Structure of the drive signal output circuit

[0100] Next, the configuration and operation of the drive circuit 52 that outputs the drive signal COM will be described. Figure 8 : is a diagram showing the structure of the driving circuit 52. The driving circuit 52 includes an integrated circuit 500, an amplifier circuit 550, a demodulation circuit 560, feedback circuits 570 and 572, and other electronic components.

[0101] The integrated circuit 500 includes a plurality of terminals, including a terminal In, a terminal Bst, a terminal Hdr, a terminal Sw, a terminal Gvd, a terminal Ldr, and a terminal Gnd. The integrated circuit 500 is electrically connected to an external substrate (not shown) via these terminals. Furthermore, the integrated circuit 500 includes a DAC (Digital to Analog Converter) 511, a modulation circuit 510, a gate driver circuit 520, and a power supply circuit 590.

[0102] The power supply circuit 590 generates a voltage signal DAC_HV and a voltage signal DAC_LV, and supplies the voltage signals to the DAC511. In addition, a digital basic drive signal do that specifies the signal waveform of the drive signal COM is input to the DAC511. Then, the DAC511 converts the input basic drive signal do into an analog signal having a voltage value between the voltage signal DAC_HV and the voltage signal DAC_LV, namely, a basic drive signal ao, and outputs it to the modulation circuit 510. That is, the maximum value of the voltage amplitude of the basic drive signal ao is specified by the voltage signal DAC_HV, and the minimum value is specified by the voltage signal DAC_LV. The signal obtained by amplifying the analog basic drive signal ao output by the DAC511 is equivalent to the drive signal COM. In other words, the basic drive signal ao is equivalent to the target signal before amplification of the drive signal COM.

[0103] The modulation circuit 510 generates a modulation signal Ms by modulating the basic drive signal ao, and outputs the modulation signal Ms to the gate driver circuit 520. The modulation circuit 510 includes adders 512 and 513, a comparator 514, an inverter 515, an integral attenuator 516, and an attenuator 517.

[0104] The integrating attenuator 516 attenuates and integrates the drive signal COM input via the terminal Vfb, and supplies the resultant signal to the negative input terminal of the adder 512. The basic drive signal ao is input to the positive input terminal of the adder 512. The adder 512 then subtracts the voltage input to the negative input terminal from the voltage input to the positive input terminal, and supplies the resulting integrated voltage to the positive input terminal of the adder 513.

[0105] The attenuator 517 supplies a voltage obtained by attenuating the high-frequency component of the drive signal COM input via the terminal Ifb to the negative input terminal of the adder 513. The voltage output from the adder 512 is input to the positive input terminal of the adder 513. The adder 513 then generates a voltage signal Os by subtracting the voltage input to the negative input terminal from the voltage input to the positive input terminal, and outputs the voltage signal to the comparator 514.

[0106] The comparator 514 outputs a modulation signal Ms obtained by pulse-modulating the voltage signal Os input from the adder 513. Specifically, the comparator 514 generates and outputs a modulation signal Ms that becomes H-level when the voltage value of the voltage signal Os input from the adder 513 is rising and becomes equal to or higher than a predetermined threshold value Vth1, and becomes L-level when the voltage value of the voltage signal Os is falling and becomes lower than a predetermined threshold value Vth2. Here, the threshold values ​​Vth1 and Vth2 are set to satisfy the relationship Vth1 ≥ Vth2.

[0107] The modulation signal Ms output by the comparator 514 is input to the gate driver 521 included in the gate driver circuit 520, and is also input to the gate driver 522 included in the gate driver circuit 520 via the inverter 515. That is, signals having exclusive logic levels are input to the gate driver 521 and the gate driver 522. The exclusive logic level relationship includes a situation where the logic levels of the signals input to the gate driver 521 and the gate driver 522 do not reach the H level at the same time. Therefore, the modulation circuit 510 may include a timing control circuit in place of or in addition to the inverter 515, the timing control circuit being used to control the timing of the modulation signal Ms input to the gate driver 521 and the signal obtained by inverting the logic level of the modulation signal Ms input to the gate driver 522.

[0108] The gate driver circuit 520 includes a gate driver 521 and a gate driver 522. The gate driver 521 performs level conversion on the modulation signal Ms output from the comparator 514, and outputs the resulting signal from the terminal Hdr as the amplification control signal Hgd.

[0109] Specifically, the power supply voltage of the gate driver 521 is supplied via terminal Bst on the high side and via terminal Sw on the low side. Terminal Bst is connected to one end of capacitor C5 and the cathode of diode D1, which prevents backflow. Terminal Sw is connected to the other end of capacitor C5. In addition, the anode of diode D1 is connected to terminal Gvd, to which a DC voltage of, for example, 7.5V, i.e., voltage Vm, is supplied from a power supply circuit (not shown). In other words, voltage Vm is supplied to the anode of diode D1. Therefore, the potential difference between terminal Bst and terminal Sw is approximately equal to voltage Vm. As a result, the gate driver 521 generates an amplified control signal Hgd based on the input modulation signal Ms, which is a voltage value increased by voltage Vm relative to terminal Sw, and outputs it from terminal Hdr.

[0110] The gate driver 522 operates at a lower potential than the gate driver 521 .

[0111] The gate driver 522 performs level conversion on a signal obtained by inverting the logic level of the modulation signal Ms output from the comparator 514 by the inverter 515 , and outputs the signal from the terminal Ldr as an amplification control signal Lgd.

[0112] Specifically, the gate driver 522 receives a power supply voltage of voltage Vm on the high side and ground potential GND on the low side via terminal Gnd. The gate driver 522 then outputs an amplified control signal Lgd from terminal Ldr, based on a signal that inverts the logic level of the input modulation signal Ms, by increasing the voltage value of terminal Gnd by the voltage Vm. Ground potential GND is the reference potential of the driver circuit 52, for example, 0V.

[0113] The amplifier circuit 550 includes a transistor M1 and a transistor M2 .

[0114] Transistor M1 is a surface-mount FET (Field Effect Transistor). A 42V DC voltage, or voltage VHV, is supplied to the drain of transistor M1 as the amplification power supply voltage for amplifier circuit 550. Furthermore, the gate of transistor M1 is electrically connected to one end of resistor R1, and the other end of resistor R1 is electrically connected to terminal Hdr of integrated circuit 500. In other words, an amplification control signal Hgd is input to the gate of transistor M1. Furthermore, the source of transistor M1 is electrically connected to terminal Sw of integrated circuit 500.

[0115] Transistor M2 is a surface-mount FET. The drain of transistor M2 is electrically connected to terminal Sw of integrated circuit 500. That is, the drain of transistor M2 and the source of transistor M1 are electrically connected to each other. The gate of transistor M2 is electrically connected to one end of resistor R2, and the other end of resistor R2 is electrically connected to terminal Ldr of integrated circuit 500. In other words, the amplification control signal Lgd is input to the gate of transistor M2. In addition, the ground potential GND is supplied to the source of transistor M2.

[0116] That is, the drive circuit 52 includes surface-mount transistors M1 and M2 as amplifying transistors. Furthermore, in the amplifier circuit 550, when the drain and source of transistor M1 are controlled to be non-conductive and the drain and source of transistor M2 are controlled to be conductive, the potential of the node connected to terminal Sw becomes ground potential GND. Therefore, voltage Vm is supplied to terminal Bst. On the other hand, when the drain and source of transistor M1 are controlled to be conductive and the drain and source of transistor M2 are controlled to be non-conductive, the potential of the node connected to terminal Sw becomes voltage VHV. Therefore, a voltage signal having a potential of voltage VHV + Vm is supplied to terminal Bst. That is, the gate driver 521 that drives the transistor M1 uses the capacitor C5 as a floating power supply, and changes the potential of the terminal Sw to the ground potential GND or the voltage VHV according to the operation of the transistor M1 and the transistor M2, thereby generating an amplified control signal Hgd whose L level is the potential of the voltage VHV and whose H level is the potential of the voltage VHV + the voltage Vm, and outputs it to the gate of the transistor M1.

[0117] On the other hand, the gate driver 522 driving the transistor M2 generates an amplified control signal Lgd having a potential of the ground potential GND at the L level and the voltage Vm at the H level, regardless of the operations of the transistors M1 and M2 , and outputs it to the gate of the transistor M2 .

[0118] The amplifier circuit 550 configured as described above generates an amplified modulation signal AMs at the connection point between the source of the transistor M1 and the drain of the transistor M2 by amplifying the modulation signal Ms based on the voltage VHV. The amplifier circuit 550 then outputs the generated amplified modulation signal AMs to the demodulation circuit 560.

[0119] Here, a capacitor C7 is provided on the transmission path for the voltage VHV input to the amplifier circuit 550. Specifically, one end of the capacitor C7 forms the transmission path for the voltage VHV and is electrically connected to the drain of the transistor M1, while the other end of the capacitor C7 is supplied with the ground potential GND. This reduces the possibility of potential fluctuations in the voltage VHV input to the amplifier circuit 550 and the possibility of noise being superimposed on the voltage VHV, thereby improving the waveform accuracy of the amplified modulated signal AMs output by the amplifier circuit 550.

[0120] The demodulation circuit 560 demodulates the amplified modulation signal AMs output by the amplifier circuit 550 to generate a drive signal COM, which is then output from the driver circuit 52. The demodulation circuit 560 includes an inductor L1 and a capacitor C1. One end of the inductor L1 is connected to one end of the capacitor C1. The amplified modulation signal AMs is input to the other end of the inductor L1. Furthermore, the ground potential GND is supplied to the other end of the capacitor C1. In other words, the inductor L1 and capacitor C1 in the demodulation circuit 560 form a low-pass filter. Furthermore, the demodulation circuit 560 smoothes the amplified modulation signal AMs using this low-pass filter to perform demodulation and outputs the demodulated signal as the drive signal COM. In other words, the driver circuit 52 outputs the drive signal COM from one end of the inductor L1 and one end of the capacitor C1 included in the demodulation circuit 560.

[0121] Feedback circuit 570 includes resistors R3 and R4. One end of resistor R3 is supplied with drive signal COM, and the other end is connected to terminal Vfb and one end of resistor R4. The other end of resistor R4 is supplied with voltage VHV. As a result, drive signal COM, which has passed through feedback circuit 570, is fed back to terminal Vfb while being pulled up by voltage VHV.

[0122] The feedback circuit 572 includes capacitors C2, C3, and C4 and resistors R5 and R6. A driving signal COM is input into one end of the capacitor C2, and the other end is connected to one end of the resistor R5 and one end of the resistor R6. A ground potential GND is supplied to the other end of the resistor R5. Thus, the capacitor C2 and the resistor R5 function as a high-pass filter. In addition, the other end of the resistor R6 is connected to one end of the capacitor C4 and one end of the capacitor C3. A ground potential GND is supplied to the other end of the capacitor C3. Thus, the resistor R6 and the capacitor C3 function as a low-pass filter. In other words, the feedback circuit 572 includes a high-pass filter and a low-pass filter, and functions as a band-pass filter that allows a signal of a predetermined frequency band included in the driving signal COM to pass through.

[0123] The other end of the capacitor C4 is connected to the terminal Ifb of the integrated circuit 500. Thus, a signal obtained by removing a DC component from a high-frequency component of the drive signal COM that has passed through the feedback circuit 572 functioning as a bandpass filter is fed back to the terminal Ifb.

[0124] The drive signal COM is a signal obtained by smoothing the amplified modulated signal AMs based on the base drive signal do through the demodulation circuit 560. Furthermore, the drive signal COM is integrated and subtracted via terminal Vfb before being fed back to the adder 512. This causes the drive circuit 52 to self-oscillate at a frequency determined by the feedback delay and the feedback transfer function. However, the feedback path via terminal Vfb has a significant delay, so feedback via terminal Vfb alone may not always be able to raise the frequency of the self-oscillation to a level sufficient to ensure the accuracy of the drive signal COM. Therefore, by providing a separate path for feeding back the high-frequency components of the drive signal COM via terminal Ifb in addition to the path via terminal Vfb, the delay of the entire circuit can be reduced. This allows the frequency of the voltage signal Os to be raised to a level sufficient to ensure the accuracy of the drive signal COM, compared to a case where the path via terminal Ifb is absent.

[0125] As described above, the drive circuit 52 generates the drive signal COM by performing digital-to-analog conversion on the input basic drive signal do, amplifying the analog signal in D-level, and outputs the generated drive signal COM.

[0126] 4. Structure of liquid ejection module

[0127] Next, use Figures 9 to 11 Next, the structure of the liquid ejection module 20 will be described. Figure 92 is a diagram showing the structure of the liquid ejection module 20. Here, when the structure of the liquid ejection module 20 is described, Figures 9 to 11 The arrows in the X1 direction, Y1 direction, and Z1 direction, which are orthogonal to each other, are shown in FIG. Figures 9 to 11 In the following description, the starting point of the arrow indicating the X1 direction may be referred to as the -X1 side, and the top side may be referred to as the +X1 side. The starting point of the arrow indicating the Y1 direction may be referred to as the -Y1 side, and the top side may be referred to as the +Y1 side. The starting point of the arrow indicating the Z1 direction may be referred to as the -Z1 side, and the top side may be referred to as the +Z1 side. Furthermore, in the following description, the liquid ejection module 20 is described as having six ejection modules 23. When distinguishing between the six ejection modules 23, they may be referred to as ejection modules 23-1 to 23-6.

[0128] like Figure 9 As shown, the liquid ejection module 20 includes a housing 31, an assembly substrate 33, a flow channel structure 34, a head substrate 35, a distribution flow channel 37, a fixing plate 39, and ejection modules 23-1 to 23-6. In the liquid ejection module 20, the flow channel structure 34, the head substrate 35, the distribution flow channel 37, and the fixing plate 39 are stacked in the order of the fixing plate 39, the distribution flow channel 37, the head substrate 35, and the flow channel structure 34, from the -Z1 side toward the +Z1 side along the Z1 direction. Furthermore, the housing 31 is positioned around the flow channel structure 34, the head substrate 35, the distribution flow channel 37, and the fixing plate 39 to support the flow channel structure 34, the head substrate 35, the distribution flow channel 37, and the fixing plate 39. The collective substrate 33 is held by the housing 31 and is upright on the +Z1 side of the housing 31 . The six ejection modules 23 are disposed between the distribution channel 37 and the fixing plate 39 with a portion thereof exposed to the outside of the liquid ejection module 20 .

[0129] When describing the structure of the liquid ejection module 20 , first, the structure of the ejection module 23 included in the liquid ejection module 20 will be described. Figure 10 : is a diagram showing an example of the structure of the ejection module 23. Figure 11 : is a diagram showing an example of a cross section of the ejection module 23. Here, Figure 11 To indicate along Figure 10 The cross-sectional view of the ejection module 23 is shown along the line Aa. Figure 10 The illustrated line Aa is a virtual line segment that passes through the introduction passage 661 included in the discharge module 23 and passes through the nozzle N1 and the nozzle N2.

[0130] like Figure 10 as well as Figure 11As shown, the ejection module 23 has a plurality of nozzles N1 and a plurality of nozzles N2 arranged side by side. The total number of nozzles N1 and nozzles N2 in the ejection module 23 is n, which is the same number as the ejection portion 600 in the ejection module 23. In this embodiment, the ejection module 23 is described as having the same number of nozzles N1 and nozzles N2. That is, the ejection module 23 has n / 2 nozzles N1 and n / 2 nozzles N2. In the following description, when it is not necessary to distinguish between nozzles N1 and nozzles N2, they may be simply referred to as nozzles N.

[0131] The discharge module 23 includes a wiring member 388 , a housing 660 , a protective substrate 641 , a flow path forming substrate 642 , a communication plate 630 , a flexible substrate 620 , and a nozzle plate 623 .

[0132] In the flow channel forming substrate 642, pressure chambers CB1, which are partitioned by multiple partition walls by anisotropic etching from one side, are arranged side by side corresponding to the nozzles N1, and pressure chambers CB2, which are partitioned by multiple partition walls by anisotropic etching from one side, are arranged side by side corresponding to the nozzles N2. In the following description, when it is not necessary to distinguish between pressure chambers CB1 and CB2, they may be simply referred to as pressure chambers CB.

[0133] The nozzle plate 623 is located on the -Z1 side of the flow channel forming substrate 642. The nozzle plate 623 is provided with a nozzle row Ln1 formed by n / 2 nozzles N1, and a nozzle row Ln2 formed by n / 2 nozzles N2. In the following description, the surface of the nozzle plate 623 on the -Z1 side, where the nozzles N are opened, is sometimes referred to as the liquid ejecting surface 623a.

[0134] The connecting plate 630 is located on the -Z1 side of the flow channel substrate 642 and the +Z1 side of the nozzle plate 623. The connecting plate 630 is provided with a nozzle connecting passage RR1 that connects the pressure chamber CB1 with the nozzle N1, and a nozzle connecting passage RR2 that connects the pressure chamber CB2 with the nozzle N2. Furthermore, the connecting plate 630 includes a pressure chamber connecting passage RK1 that connects the end of the pressure chamber CB1 with the manifold MN1, and a pressure chamber connecting passage RK2 that connects the end of the pressure chamber CB2 with the manifold MN2, each independently provided for each of the pressure chambers CB1 and CB2.

[0135] Manifold MN1 includes a supply communication channel RA1 and a connecting communication channel RX1. Supply communication channel RA1 is provided to penetrate the communication plate 630 along the Z1 direction. Connecting communication channel RX1 does not penetrate the communication plate 630 in the Z1 direction but opens on the nozzle plate 623 side of the communication plate 630 and extends midway in the Z1 direction. Similarly, manifold MN2 includes a supply communication channel RA2 and a connecting communication channel RX2. Supply communication channel RA2 is provided to penetrate the communication plate 630 along the Z1 direction. Connecting communication channel RX2 does not penetrate the communication plate 630 in the Z1 direction but opens on the nozzle plate 623 side of the communication plate 630 and extends midway in the Z1 direction. Furthermore, connecting communication channel RX1 included in manifold MN1 communicates with the corresponding pressure chamber CB1 via pressure chamber communication channel RK1, while connecting communication channel RX2 included in manifold MN2 communicates with the corresponding pressure chamber CB2 via pressure chamber communication channel RK2.

[0136] Here, in the following description, when there is no need to distinguish between the nozzle connecting channel RR1 and the nozzle connecting channel RR2, it is sometimes referred to as just the nozzle connecting channel RR, when there is no need to distinguish between the manifold MN1 and the manifold MN2, it is sometimes referred to as just the manifold MN, when there is no need to distinguish between the supply connecting channel RA1 and the supply connecting channel RA2, it is sometimes referred to as just the supply connecting channel RA, and when there is no need to distinguish between the connecting connecting channel RX1 and the connecting connecting channel RX2, it is sometimes referred to as just the connecting connecting channel RX.

[0137] The vibration plate 610 is located on the +Z1 side surface of the flow path forming substrate 642. In addition, on the +Z1 side surface of the vibration plate 610, n piezoelectric elements 60 corresponding to the nozzles N1 and N2 are formed in two rows.

[0138] The piezoelectric element 60 includes a piezoelectric body 601 and a pair of electrodes 602 and 603 disposed so as to sandwich the piezoelectric body 601. Electrode 602 and piezoelectric body 601 are formed on the +Z1 side of the vibration plate 610 for each pressure chamber CB, while electrode 603 serves as a common electrode shared by all pressure chambers CB on the +Z1 side of the vibration plate 610. The piezoelectric element 60 is driven by supplying a drive signal VOUT from the drive signal selection circuit 200 to electrode 602 and a reference voltage signal VBS to electrode 603, which serves as the common electrode, to displace the piezoelectric body 601 in the vertical direction.

[0139] A protective substrate 641 is bonded to the +Z1 side of the flow channel-forming substrate 642. The protective substrate 641 forms a protective space 644 for protecting the piezoelectric element 60. Furthermore, a through-hole 643 is provided in the protective substrate 641, extending along the Z1 direction. Lead electrodes 611, which extend from the electrodes 602 and 603 of the piezoelectric element 60, are extended so that their ends are exposed inside the through-hole 643. Furthermore, the wiring member 388 is electrically connected to the lead electrodes 611 exposed inside the through-hole 643.

[0140] Furthermore, a housing 660 is fixed to the protective substrate 641 and the connecting plate 630, which defines a portion of the manifold MN that communicates with the multiple pressure chambers CB. The housing 660 is bonded to the protective substrate 641 and also to the connecting plate 630. Specifically, the housing 660 has a recess 665 on its surface facing the -Z1 direction. This recess 665 houses the flow channel forming substrate 642 and the protective substrate 641. The recess 665 has an opening area larger than the surface where the protective substrate 641 and the flow channel forming substrate 642 meet. The flow channel forming substrate 642 and other components are housed in this recess 665. Furthermore, when the flow channel forming substrate 642 and other components are housed in the recess 665, the opening on the -Z1 direction of the recess 665 is sealed by the connecting plate 630. Thus, the housing 660, the flow channel forming substrate 642, and the protective substrate 641 define the supply connecting channel RB1 and the supply connecting channel RB2 on the outer periphery of the flow channel forming substrate 642. Here, when there is no need to distinguish between the supply communication passage RB1 and the supply communication passage RB2 , they may be simply referred to as the supply communication passage RB.

[0141] Furthermore, a flexible substrate 620 is provided on the surface of the communication plate 630 where the supply communication channel RA and the connection communication channel RX open. This flexible substrate 620 seals the openings of the supply communication channel RA and the connection communication channel RX. This flexible substrate 620 includes a sealing film 621 and a fixed substrate 622. The sealing film 621 is formed of a flexible film, etc., while the fixed substrate 622 is formed of a hard material such as metal, such as stainless steel.

[0142] The housing 660 is provided with an introduction channel 661 for supplying ink to the manifold MN. The housing 660 is also provided with a connection port 662 which is an opening extending in the Z1 direction and communicating with the through hole 643 of the protective substrate 641 and through which the wiring member 388 is inserted.

[0143] The wiring member 388 is a flexible component used to electrically connect the ejection module 23 and the head substrate 35. For example, an FPC can be used. The integrated circuit 201 is mounted on the wiring member 388 using a COF (Chip On Film) method. At least a portion of the aforementioned drive signal selection circuit 200 is mounted on the integrated circuit 201.

[0144] In the ejection module 23 configured as described above, the wiring member 388 transmits the drive signals COMA, COMB, COMC, the reference voltage signal VBS, the clock signal SCK, the print data signal SI, and the latch signal LAT. The drive signals COMA, COMB, COMC, the clock signal SCK, the print data signal SI, and the latch signal LAT are input to the drive signal selection circuit 200, which includes an integrated circuit 201 disposed on the wiring member 388. The drive signal selection circuit 200 selects or deselects the drive signals COMA, COMB, and COMC based on the input clock signal SCK, the print data signal SI, and the latch signal LAT, thereby generating and outputting the drive signal VOUT. The drive signal VOUT output by the drive signal selection circuit 200 is transmitted through the wiring member 388 and supplied to the electrode 602 via the lead electrode 611. Furthermore, the reference voltage signal VBS is transmitted through the wiring member 388 and supplied to the electrode 603 via the lead electrode 611. As a result, the piezoelectric body 601 deforms according to the potential difference between the drive signal VOUT supplied to the electrode 602 and the reference voltage signal VBS supplied to the electrode 603. In other words, the piezoelectric element 60 is driven. As the piezoelectric element 60 is driven, the vibration plate 610 on which the piezoelectric element 60 is mounted displaces vertically. This causes the internal pressure of the corresponding pressure chamber CB to change, and the ink stored in the pressure chamber CB is ejected from the nozzle N in response to this change in pressure.

[0145] In the ejection module 23 constructed as described above, the structure including the nozzle N, nozzle communication channel RR, pressure chamber CB, piezoelectric element 60, and vibration plate 610 corresponds to the aforementioned ejection unit 600. In other words, the ejection module 23 includes the piezoelectric element 60 and has a plurality of ejection units 600 that eject ink in response to the driving of the piezoelectric element 60.

[0146] Back to Figure 9The fixing plate 39 is located on the -Z1 side of the ejection modules 23. Six ejection modules 23 are fixed to the fixing plate 39. Specifically, the fixing plate 39 has six openings 391 extending through the fixing plate 39 along the Z1 direction and corresponding to the six ejection modules 23. The six ejection modules 23 are fixed to the fixing plate 39 so that the liquid ejection surface 623a is exposed from each of the six openings 391.

[0147] The distribution channel 37 is located on the +Z1 side of the ejection module 23. Four inlet portions 373 are provided on the surface on the +Z1 side of the distribution channel 37. The four inlet portions 373 are channel tubes that protrude from the surface on the +Z1 side of the distribution channel 37 toward the +Z1 side along the Z1 direction, and are connected to the unillustrated channel holes formed on the surface on the -Z1 side of the channel structure 34. In addition, the unillustrated channel tubes connected to the four inlet portions 373 are located on the surface on the -Z1 side of the distribution channel 37. The unillustrated channel tubes located on the -Z1 side of the distribution channel 37 are connected to the inlet channels 661 of each of the six ejection modules 23. In addition, the distribution channel 37 has six openings 371 that pass through along the Z1 direction. The wiring components 388 of each of the six ejection modules 23 are inserted into the six openings 371.

[0148] The head substrate 35 is located on the +Z1 side of the distribution channel 37. On the head substrate 35, a wiring component FC electrically connected to the collective substrate 33 described later is mounted. In addition, four openings 351 and cutouts 352 and 353 are formed in the head substrate 35. The wiring components 388 possessed by the ejection modules 23-2 to 23-5 are inserted through the four openings 351 and are electrically connected to the head substrate 35 by welding or the like. In addition, the cutout 352 is for the wiring component 388 possessed by the ejection module 23-1 to pass through, and the cutout 353 is for the wiring component 388 possessed by the ejection module 23-6 to pass through. The wiring components 388 possessed by each of the ejection modules 23-1 and 23-6 passing through each of the cutouts 352 and 353 are electrically connected to the head substrate 35 by welding or the like.

[0149] Furthermore, four cutouts 355 are formed at the four corners of the head substrate 35. The introduction portions 373 pass through the four cutouts 355. The four introduction portions 373 passing through the cutouts 355 are connected to the flow channel structure 34 located on the +Z1 side of the head substrate 35.

[0150] The flow channel structure 34 includes a flow channel plate Su1 and a flow channel plate Su2. The flow channel plates Su1 and Su2 are stacked along the Z1 direction, with the flow channel plate Su1 located on the +Z1 side and the flow channel plate Su2 located on the -Z1 side, and are bonded to each other using an adhesive or the like. Furthermore, the flow channel structure 34 includes four inlet portions 341 on its +Z1 side surface, protruding toward the +Z1 side along the Z1 direction. The four inlet portions 341 communicate with flow channel holes (not shown) formed on the -Z1 side surface of the flow channel structure 34 via ink flow channels formed within the flow channel structure 34. The flow channel holes (not shown) formed on the -Z1 side surface of the flow channel structure 34 communicate with the four inlet portions 373. Furthermore, a through hole 343 is formed in the flow channel structure 34, extending along the Z1 direction. A wiring component FC electrically connected to the head substrate 35 is inserted through the through hole 343.

[0151] Here, inside the flow channel structure 34, in addition to the ink flow channel that connects the inlet portion 341 with the unillustrated flow channel hole formed on the surface on the -Z1 side, a capture filter or the like for capturing foreign matter contained in the ink flowing in the ink flow channel may also be provided.

[0152] The housing 31 is provided to cover and support the flow channel structure 34, the head substrate 35, the distribution flow channel 37, and the fixing plate 39. The housing 31 has four openings 311, a collective substrate insertion portion 313, and a holding member 315.

[0153] Four introduction portions 341 of the flow channel structure 34 are inserted through each of the four openings 311. Ink is supplied from the liquid container 3 via a tube (not shown) to the four introduction portions 341 inserted through the four openings 311.

[0154] The holding component 315 clamps the collective substrate 33 in a state where a portion of the collective substrate insertion portion 313 is inserted between the housing 31. A connecting portion 330 is provided on the collective substrate 33. In the connecting portion 330, a connecting component 30 for transmitting various signals such as the data signal DATA, drive signals COMA, COMB, COMC, reference voltage signal VBS, and other power supply voltages output by the head drive module 10 is installed. In addition, the wiring component FC possessed by the head substrate 35 is electrically connected to the collective substrate 33. Thus, the collective substrate 33 is electrically connected to the head substrate 35. Here, a semiconductor device equivalent to the aforementioned recovery circuit 220 can also be provided on the collective substrate 33. In addition, although in Figure 9 3 , a case where one connection portion 330 is provided on the collective substrate 33 is shown in the figure, but the collective substrate 33 may have a plurality of connection portions 330 .

[0155] In the liquid ejection module 20 configured as described above, the liquid container 3 and the inlet portion 341 are connected via a tube (not shown), allowing the ink stored in the liquid container 3 to be supplied to the liquid ejection module 20. The ink supplied to the liquid ejection module 20 is guided through the ink flow channels formed within the flow channel structure 34 to the inlet holes (not shown) formed on the -Z1 side of the flow channel structure 34. Thereafter, the ink is supplied to the four inlet portions 373 of the distribution channel 37. The ink supplied to the distribution channel 37 is distributed to each of the six ejection modules 23 within the ink flow channels (not shown) formed within the distribution channel 37. The ink is then supplied to the inlet channels 661 of the corresponding ejection modules 23. The ink supplied to the ejection modules 23 via the inlet channels 661 is then stored in the pressure chambers CB included in the ejection unit 600.

[0156] Furthermore, various signals, including the drive signals COMA1 to COMA6, COMB1 to COMB6, COMC1 to COMC6, the reference voltage signal VBS, and the data signal DATA, output by the head driver module 10, are transmitted through the connection member 30 and input to the liquid ejection module 20 via the connection portion 330. The various signals, including the drive signals COMA1 to COMA6, COMB1 to COMB6, COMC1 to COMC6, the reference voltage signal VBS, and the data signal DATA, input to the liquid ejection module 20, are transmitted through the assembly substrate 33 and the head substrate 35. At this time, the recovery circuit 220 generates clock signals SCK1 to SCK6, print data signals SI1 to SI6, and latch signals LAT1 to LAT6 corresponding to the ejection modules 23-1 to 23-6, respectively, based on the data signal DATA, and separates the signals for each ejection module 23-1 to 23-6. Then, the drive signals COMA1-COMA6, COMB1-COMB6, COMC1-COMC6, reference voltage signal VBS, clock signals SCK1-SCK6, print data signals SI1-SI6, and latch signals LAT1-LAT6 are input to the wiring member 388 of the corresponding ejection module 23. The drive signals COMA, COMB, COMC, reference voltage signal VBS, clock signal SCK, print data signal SI, and latch signal LAT supplied to the wiring member 388 are transmitted through the wiring member 388. At this time, the integrated circuit 201, including the drive signal selection circuit 200 provided in the wiring member 388, generates a drive signal VOUT corresponding to each of the n ejection units 600 and supplies this drive signal to the electrode 602 of the piezoelectric element 60 included in the corresponding ejection unit 600. As a result, the n piezoelectric elements 60 are individually driven according to the drive signal VOUT. As a result, the ink stored in the pressure chamber CB corresponding to the piezoelectric element 60 is ejected from the corresponding nozzle N.

[0157] As described above, in the liquid ejection device 1 of this embodiment, the liquid ejection module 20 has an electrode 602 and an electrode 603, includes a plurality of piezoelectric elements 60, and has a plurality of ejection modules 23, wherein the piezoelectric element 60 is driven by a drive signal VOUT supplied to the electrode 602 and a reference voltage signal VBS supplied to the electrode 603, and the ejection module 23 ejects ink by being driven by the piezoelectric element 60.

[0158] That is, the liquid ejection device 1 of this embodiment includes a liquid ejection module 20, and the liquid ejection module 20 includes a piezoelectric element 60 included in the ejection module 23-1 and having an electrode 602 and an electrode 603, a piezoelectric element 60 included in the ejection module 23-2 and having an electrode 602 and an electrode 603, a piezoelectric element 60 included in the ejection module 23-3 and having an electrode 602 and an electrode 603, a piezoelectric element 60 included in the ejection module 23-4 and having an electrode 602 and an electrode 603, and a piezoelectric element 60 included in the ejection module 23-5. -5 and having an electrode 602 and an electrode 603, a piezoelectric element 60 contained in the ejection module 23-6 and having an electrode 602 and an electrode 603, and ink is ejected by driving the piezoelectric element 60 contained in the ejection module 23-1, the piezoelectric element 60 contained in the ejection module 23-2, the piezoelectric element 60 contained in the ejection module 23-3, the piezoelectric element 60 contained in the ejection module 23-4, the piezoelectric element 60 contained in the ejection module 23-5, and the piezoelectric element 60 contained in the ejection module 23-6.

[0159] 5. Structure of the head drive module

[0160] Next, use Figure 12 Here, the structure of the head driving module 10 is described. Figure 12 , arrows indicating the X2, Y2, and Z2 directions, which are independent of and orthogonal to the aforementioned X1, Y1, and Z1 directions, are shown. In the following description, the starting point side of an arrow indicating the X2 direction is sometimes referred to as the -X2 side, and the top end side is sometimes referred to as the +X2 side; the starting point side of an arrow indicating the Y2 direction is sometimes referred to as the -Y2 side, and the top end side is sometimes referred to as the +Y2 side; and the starting point side of an arrow indicating the Z2 direction is sometimes referred to as the -Z2 side, and the top end side is sometimes referred to as the +Z2 side.

[0161] Figure 12 FIG. 1 is a diagram showing an example of the structure of the head driving module 10. Figure 12 As shown, the head driving module 10 includes a driving circuit substrate 800 , a heat conducting member group 720 , a plurality of screws 780 , and a cooling fan 770 .

[0162] The driving circuit board 800 receives an image information signal IP from the control unit 2 and outputs a plurality of signals, including driving signals COMA, COMB, and COMC, a reference voltage signal VBS, and a data signal DATA, to the liquid ejection module 20. Specifically, the driving circuit board 800 drives the piezoelectric element 60 included in the liquid ejection module 20.

[0163] The driver circuit substrate 800 includes a plurality of driver circuits 52, a reference voltage output circuit 53, an integrated circuit 101, connectors CN1 and CN2, and a wiring substrate 810. The wiring substrate 810 includes a plurality of through-holes 820 extending through the wiring substrate 810 along the Z2 direction. Furthermore, the plurality of driver circuits 52, the reference voltage output circuit 53, the integrated circuit 101, and connectors CN1 and CN2 are provided on the wiring substrate 810.

[0164] The connection portion CN1 is located on the +X2 side of the wiring substrate 810. A cable (not shown) is installed on the connection portion CN1 for electrically connecting the control unit 2 and the drive circuit substrate 800. As a result, the image information signal IP output by the control unit 2 is input to the drive circuit substrate 800. The connection portion CN2 is located on the -X2 side of the wiring substrate 810. A connection component 30 is installed on the connection portion CN2 for electrically connecting the drive circuit substrate 800 and the liquid ejection module 20. As a result, signals including the drive signals COMA, COMB, COMC, the reference voltage signal VBS, and the data signal DATA output by the drive circuit substrate 800 are transmitted to the liquid ejection module 20.

[0165] The integrated circuit 101, the reference voltage output circuit 53, and the plurality of driver circuits 52 are located between the connection portions CN1 and CN2 on the wiring substrate 810. Specifically, the integrated circuit 101 is located on the -X2 side of the connection portion CN1, the reference voltage output circuit 53 is located on the -X2 side of the integrated circuit 101, and the plurality of driver circuits 52 are arranged along the X2 direction on the -X2 side of the reference voltage output circuit 53.

[0166] Specifically, the wiring substrate 810 is provided with a plurality of driving circuits 52, namely, driving circuits 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6, and a reference voltage output circuit 53. Furthermore, the structure including the integrated circuit 101, the reference voltage output circuit 53, and the plurality of driving circuits 52 provided on the wiring substrate 810 generates signals including driving signals COMA, COMB, and COMC, a reference voltage signal VBS, and a data signal DATA based on the image information signal IP input from the connection portion CN1, and outputs the signals to the liquid ejection module 20.

[0167] In other words, the wiring substrate 810 transmits the following signals, namely, the driving signals COMA1, COMB1, COMC1 for driving the piezoelectric element 60 of the ejection module 23-1 of the liquid ejection module 20, the driving signals COMA2, COMB2, COMC2 for driving the piezoelectric element 60 of the ejection module 23-2 of the liquid ejection module 20, and the driving signals COMA3, COMC4, COMC5, COMC6, COMC7, COMC8, COMC9, COMC10, COMC11, COMC12, COMC13, COMC14, COMC15, COMC16, COMC17, COMC18, COMC29, COMC20, COMC30, COMC31, COMC32, COMC33, COMC34, COMC35, COMC36, COMC37, COMC38, COMC39, COMC40, COMC41, COMC42, COMC43, COMC44, COMC45, COMC46, COMC47, COMC48, COMC49, COMC50, COMC51, COMC52, COMC53, COMC54, COMC55, COMC56, COMC57, COMC58, COMC59, COMC60, COMC61, COMC62, COMC63, COMC64, COMC65, COMC66, COMC67, COMC68, COMC69, COMC70, COMC71, COMC71, COMC72, COMC73, COMC74, COMC75, COMC76, COMC77, COMC78, COMC79, COMC80, COMC80, COMC80, COMC80, COMC80, COMC80, COMC80, COMC80, COMC80 B3, COMC3, driving signals COMA4, COMB4, COMC4 for driving the piezoelectric element 60 of the ejection module 23-4 of the liquid ejection module 20, driving signals COMA5, COMB5, COMC5 for driving the piezoelectric element 60 of the ejection module 23-5 of the liquid ejection module 20, and driving signals COMA6, COMB6, COMC6 for driving the piezoelectric element 60 of the ejection module 23-6 of the liquid ejection module 20.

[0168] Here, in addition to the plurality of drive circuits 52, reference voltage output circuit 53, integrated circuit 101, and connectors CN1 and CN2, a plurality of electronic components may also be provided on wiring substrate 810. Driver circuit substrate 800 including wiring substrate 810 will be described in detail later.

[0169] Heat sink 710 is located on the +Z2 side of driver circuit board 800 and is mounted on wiring board 810 using a plurality of screws 780. Heat sink 710 includes a bottom 711, side portions 712 and 713, protrusions 715, 716, and 717, and a plurality of fins 718.

[0170] The bottom portion 711 is positioned opposite the wiring substrate 810 and has a generally rectangular shape extending in a plane defined by the X2 and Y2 directions. The side portion 712 protrudes from the -Y2 end of the bottom portion 711 toward the -Z2 side and extends along the X2 direction. At least a portion of the -Z2 end of the side portion 712 contacts the -Y2 end of the wiring substrate 810. The side portion 713 protrudes from the +Y2 end of the bottom portion 711 toward the -Z2 side and extends along the X2 direction. At least a portion of the -Z2 end of the side portion 713 contacts the +Y2 end of the wiring substrate 810. In other words, the heat sink 710 comprises a storage space open on the -Z2 side, formed by the bottom portion 711 and the side portions 712 and 713. Furthermore, the storage space formed by the heat sink 710 houses the multiple drive circuits 52 included in the drive circuit substrate 800.

[0171] Within the storage space defined by the bottom portion 711 and the side portions 712 and 713, protrusions 715, 716, and 717 are provided to correspond to the inductor L1, transistors M1 and M2, and integrated circuit 500 included in each of the plurality of drive circuits 52 provided on the wiring substrate 810. Specifically, protrusion 715 is provided to correspond to the inductor L1 provided on the wiring substrate 810, protruding from the bottom portion 711 toward the -Z2 side and extending along the X2 direction. Protrusion 716 is provided to correspond to the transistors M1 and M2 provided on the wiring substrate 810, protruding from the bottom portion 711 toward the -Z2 side and extending along the X2 direction. Protrusion 717 is provided to correspond to the integrated circuit 500 provided on the wiring substrate 810, protruding from the bottom portion 711 toward the -Z2 side and extending along the X2 direction.

[0172] The plurality of fins 718 protrude from the bottom 711 toward the -Z2 side, extend along the X2 direction, and are spaced apart from each other in the Y2 direction. The presence of multiple fins 718 in the heat sink 710 increases the surface area of ​​the heat sink 710, thereby improving the heat dissipation performance of the heat sink 710. The number of fins 718 can be set based on the amount of heat released by the heat sink 710, the length of the fins 718 along the Z2 direction, and the optimal spacing determined by the airflow applied to the fins 718.

[0173] The heat sink 710, configured as described above, is mounted on the wiring substrate 810 included in the driver circuit board 800 to dissipate heat generated by the plurality of driver circuits 52 provided on the wiring substrate 810. Furthermore, by being mounted to cover the plurality of driver circuits 52 provided on the wiring substrate 810, the heat sink 710 functions as a protective component that protects the plurality of driver circuits 52 provided on the wiring substrate 810 from impact and the like. Therefore, the heat sink 710 is preferably made of a material that has high thermal conductivity for dissipating heat generated by the driver circuits 52 and sufficient rigidity for protecting the driver circuits 52, and is, for example, made of a metal such as aluminum, iron, or copper.

[0174] The thermally conductive component assembly 720 is located between the driver circuit substrate 800 and the heat sink 710. Since the heat sink 710 is mounted on the wiring substrate 810, the thermally conductive component assembly 720 contacts both the plurality of driver circuits 52 and the heat sink 710 disposed on the wiring substrate 810. This improves the contact efficiency between the plurality of driver circuits 52 and the heat sink 710, and also improves the efficiency of heat conduction from the driver circuit substrate 800 to the heat sink 710. Such a thermally conductive component assembly 720 is preferably made of a material that is not only thermally conductive but also elastic, flame-retardant, and electrically insulating. For example, a gel sheet or rubber sheet containing silicone or acrylic resin and having high thermal conductivity can be used. Thus, the thermally conductive component assembly 720 functions as a conductive component that conducts heat generated in the driver circuit substrate 800 to the heat sink 710. Moreover, by making the heat-conducting component group 720 comprise a gel sheet or a rubber sheet, the heat-conducting component group 720 functions as an insulating component for ensuring electrical insulation performance between the driving circuit substrate 800 and the heat sink 710, and also functions as a buffer component for alleviating stress that may be generated when the heat sink 710 is mounted on the driving circuit substrate 800.

[0175] Specifically, the thermally conductive component group 720 includes thermally conductive components 730, 740, 750, and 760. The thermally conductive component 730 is positioned between the inductor L1 included in each of the plurality of drive circuits 52 and the protrusion 715 included in the heat sink 710. With the heat sink 710 mounted on the drive circuit substrate 800, the thermally conductive component 730 is in contact with both the inductor L1 included in each of the plurality of drive circuits 52 and the protrusion 715. This improves the efficiency with which heat generated in the inductor L1 is transferred to the heat sink 710. The thermally conductive component 740 is positioned between the transistor M1 included in each of the plurality of drive circuits 52 and the protrusion 716 included in the heat sink 710. With the heat sink 710 mounted on the drive circuit substrate 800, the thermally conductive component 740 is in contact with both the transistor M1 included in each of the plurality of drive circuits 52 and the protrusion 716. This improves the efficiency with which heat generated in the transistor M1 is transferred to the heat sink 710. The heat conducting member 750 is located between the transistor M2 included in each of the plurality of drive circuits 52 and the protrusion 716 included in the heat sink 710. Since the heat sink 710 is mounted on the drive circuit substrate 800, the heat conducting member 750 is in contact with both the transistor M2 included in each of the plurality of drive circuits 52 and the protrusion 716. Thus, the heat conducting member 750 can improve the efficiency of heat transfer from the transistor M2 to the heat sink 710. The heat conducting member 760 is located between the integrated circuit 500 included in each of the plurality of drive circuits 52 and the protrusion 717 included in the heat sink 710. Since the heat sink 710 is mounted on the drive circuit substrate 800, the heat conducting member 760 is in contact with both the integrated circuit 500 included in each of the plurality of drive circuits 52 and the protrusion 717. Thus, the heat conducting member 760 can improve the efficiency of heat transfer from the transistor M2 to the heat sink 710.

[0176] Each of the plurality of screws 780 is inserted from the -Z2 side toward the +Z2 side through each of the plurality of through-holes 820 included in the wiring substrate 810 included in the driver circuit substrate 800. Furthermore, each of the plurality of screws 780 is fastened to the heat sink 710. In this manner, the heat sink 710 is attached to the wiring substrate 810 included in the driver circuit substrate 800.

[0177] The cooling fan 770 is located on the -Z2 side of the radiator 710. The cooling fan 770 introduces external air into the interior of the head driving module 10 through the opening portion 714 provided on the upper portion of the +X2 side of the radiator 710. Specifically, the radiator 710 has an opening portion 714 that passes through the outside of the radiator 710 and the storage space formed by the radiator 710. The cooling fan 770 is mounted on the radiator 710 in a manner covering the opening portion 714. Moreover, the cooling fan 770 operates so that external air is introduced into the interior of the storage space formed by the radiator 710 through the opening portion 714. Thus, the circulation efficiency of the air floating inside the storage space formed by the radiator 710 can be improved, and the release efficiency of the heat generated in the driving circuit 52 accommodated in the storage space can be further improved.

[0178] Here, the cooling fan 770 only needs to be installed in a manner that improves the circulation efficiency of the air floating inside the storage space formed by the radiator 710. Therefore, the opening 714 where the cooling fan 770 is installed only needs to be located on any side surface of the storage space formed by the radiator 710. In addition, the operation of the cooling fan 770 to introduce external air into the storage space formed by the radiator 710 is not limited to the case where the cooling fan 770 operates to draw external air into the storage space. It also includes the case where the cooling fan 770 operates to exhaust the air floating inside the storage space.

[0179] The head driver module 10 configured as described above receives input of the image information signal IP output by the control unit 2 via the connector CN2. Based on the input image information signal IP, the integrated circuit 101 of the head driver module 10 generates and outputs the basic drive signals dA1-dA6, dB1-dB6, dC1-dC6, and the data signal DATA. Furthermore, the reference voltage output circuit 53 generates and outputs the reference voltage signal VBS. The basic drive signals dA1-dA6, dB1-dB6, and dC1-dC6 propagate through the wiring substrate 810 and are input to the corresponding drive circuits 52a1-52a6, 52b1-52b6, and 52c1-52c6. The driving circuits 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6 generate and output driving signals COMA1 to COMA6, COMB1 to COMB6, and COMC1 to COMC6 corresponding to the corresponding input basic driving signals dA1 to dA6, dB1 to dB6, and dC1 to dC6, respectively. The data signal DATA output by the integrated circuit 101, the driving signals COMA1 to COMA6, COMB1 to COMB6, and COMC1 to COMC6 output by each of the driving circuits 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6, and the reference voltage signal VBS output by the reference voltage output circuit 53 are transmitted through the wiring substrate 810 and output to the liquid ejection module 20 via the connection portion CN2.

[0180] 6. Structure of the drive circuit substrate

[0181] As described above, in the liquid ejection device 1 of this embodiment, the piezoelectric element 60 included in each of the ejection modules 23-1 to 23-6 of the liquid ejection module 20 is driven based on the potential difference between the drive signals COMA1 to COMA6, COMB1 to COMB6, and COMC1 to COMC6 output by the head drive module 10 and the reference voltage signal VBS. Furthermore, each of the ejection modules 23-1 to 23-6 ejects an amount of ink from the corresponding nozzle N in accordance with the amount of drive of the piezoelectric element 60. Therefore, in order to improve the ejection accuracy of the ink ejected by the liquid ejection module 20, it is necessary to improve the waveform accuracy of the drive signals COMA1 to COMA6, COMB1 to COMB6, and COMC1 to COMC6 that drive the piezoelectric element 60.

[0182] Therefore, from the perspective of improving the waveform accuracy of the driving signals COMA1~COMA6, COMB1~COMB6, COMC1~COMC6 that drive the piezoelectric element 60, an example of the structure of the driving circuit substrate 800 that generates the driving signals COMA1~COMA6, COMB1~COMB6, COMC1~COMC6 and outputs them to the liquid ejection module 20 is described in more detail.

[0183] Figure 13 FIG is a diagram showing an example of the electrical connection relationship of the driving circuit substrate 800. Figure 13 In FIG, the integrated circuit 101, which has a small contribution to the waveform accuracy of the drive signals COMA, COMB, COMC and the reference voltage signal VBS, and the wiring for transmitting the data signal DATA output by the integrated circuit 101 are omitted. Figure 13 , the voltage VHV that is input to each of the drive circuits 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6 and functions as an amplified voltage in each of the drive circuits 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6 is shown. Figure 13 Although the voltage VHV is supplied from a power supply circuit (not shown) provided outside the driving circuit substrate 800 , the voltage VHV may be generated by a power supply circuit (not shown) provided on the driving circuit substrate 800 .

[0184] As described above, driver circuit board 800 includes driver circuits 52a1-52a6, 52b1-52b6, 52c1-52c6, a reference voltage output circuit 53, and connectors CN1 and CN2. Furthermore, driver circuit board 800 includes wiring board 810, which includes wirings WA1-WA6 for transmitting drive signals COMA1-COMA6, wirings WB1-WB6 for transmitting drive signals COMB1-COMB6, wirings WC1-WC6 for transmitting drive signals COMC1-COMC6, wiring WS for transmitting reference voltage signal VBS, and wiring WH for transmitting voltage VHV.

[0185] The voltage VHV is input to the driving circuit substrate 800 via the connection portion CN1 , and the voltage VHV is transmitted through the wiring WH provided on the wiring substrate 810 .

[0186] The voltage VHV transmitted through the wiring WH branches at the contact point Cha1 and is input to each of the drive circuits 52a1, 52b1, and 52c1. Each of the drive circuits 52a1, 52b1, and 52c1 amplifies and demodulates the modulation signal Ms based on the input voltage VHV, thereby generating and outputting drive signals COMA1, COMB1, and COMC1. At this time, the drive signal COMA1 output by the drive circuit 52a1 is transmitted in the wiring WA1 included in the wiring substrate 810, and is input to the ejection module 23-1 of the liquid ejection module 20 via the connection part CN2. The drive signal COMB1 output by the drive circuit 52b1 is transmitted in the wiring WB1 included in the wiring substrate 810, and is input to the ejection module 23-1 of the liquid ejection module 20 via the connection part CN2. The drive signal COMC1 output by the drive circuit 52c1 is transmitted in the wiring WC1 included in the wiring substrate 810, and is input to the ejection module 23-1 of the liquid ejection module 20 via the connection part CN2.

[0187] Similarly, voltage VHV transmitted through wiring WH branches at each of contact points Cha2-Cha6 and is input to each of drive circuits 52a2-52a6, 52b2-52b6, and 52c2-52c6. Each of drive circuits 52a2-52a6, 52b2-52b6, and 52c2-52c6 amplifies and demodulates modulation signal Ms based on input voltage VHV, generating and outputting drive signals COMA2-COMA6, COMB2-COMB6, and COMC1-COMC6. At this time, the driving signals COMA2, COMB2, COMC2 outputted by the driving circuits 52a2, 52b2, 52c2 are transmitted in each of the wirings WA2, WB2, WC2 included in the wiring substrate 810, and are inputted into the ejection module 23-2 of the liquid ejection module 20 via the connection portion CN2. The driving signals COMA3, COMB3, COMC3 outputted by the driving circuits 52a3, 52b3, 52c3 are transmitted in each of the wirings WA2, WB2, WC2 included in the wiring substrate 810, and are inputted into the ejection module 23-2 of the liquid ejection module 20 via the connection portion CN2. The drive signals COMA4, COMB4, COMC4 outputted by the drive circuits 52a4, 52b4, 52c4 are transmitted in each of the wirings WA3, WB3, WC3 included in the wiring substrate 810, and are inputted into the ejection module 23-3 of the liquid ejection module 20 via the connection part CN2. The drive signals COMA4, COMB4, COMC4 outputted by the drive circuits 52a4, 52b4, 52c4 are transmitted in each of the wirings WA4, WB4, WC4 included in the wiring substrate 810, and are inputted into the ejection module 23-4 of the liquid ejection module 20 via the connection part CN2. The drive signals COMA5, COMB5, COMC5 output by the drive circuits 52a5, 52b5, 52c5 are transmitted in each of the wirings WA5, WB5, WC5 included in the wiring substrate 810, and are input to the ejection module 23-5 of the liquid ejection module 20 via the connection part CN2. The drive signals COMA6, COMB6, COMC6 output by the drive circuits 52a6, 52b6, 52c6 are transmitted in each of the wirings WA6, WB6, WC6 included in the wiring substrate 810, and are input to the ejection module 23-6 of the liquid ejection module 20 via the connection part CN2.

[0188] The reference voltage output circuit 53 generates and outputs a reference voltage signal VBS having a predetermined voltage value by stepping down or stepping up the voltage VHV or a voltage signal (not shown). The reference voltage signal VBS output by the reference voltage output circuit 53 is transmitted via the wiring WS provided on the wiring substrate 810. The wiring WS branches at each of the contact points Csa1 to Csa6 and is supplied to the electrodes 603 of the piezoelectric elements 60 included in each of the ejection modules 23-1 to 23-6 via the connection portion CN2.

[0189] Next, Figure 13 A specific example of the driving circuit substrate 800 corresponding to the electrical connection relationship shown will be described. Figure 14 FIG. 8 is a diagram showing an example of a cross-sectional structure of a wiring substrate 810 included in a driving circuit substrate 800. Figure 14 As shown, wiring substrate 810 includes surfaces 831 and 832 , layers 841 to 845 , and a plurality of insulating layers 840 .

[0190] Surface 831 and surface 832 are arranged facing each other along the Z2 direction, with surface 831 on the +Z2 side and surface 832 on the -Z2 side. Furthermore, layers 841 to 845 are located between surface 831 and surface 832 along the Z2 direction. Layers 841 to 845 are arranged in the order of layer 841, layer 842, layer 843, layer 844, and layer 845, from the +Z2 side of surface 831 toward the -Z2 side of surface 832.

[0191] Surfaces 831 and 832 are provided with a plurality of electronic components that constitute various circuits, including a plurality of drive circuits 52, and portions of a plurality of wiring patterns that electrically connect these electronic components and transmit various signals. Furthermore, layers 841 to 845 are provided with a plurality of wiring patterns that electrically connect the electronic components disposed on surfaces 831 and 832 and transmit various signals. In other words, surfaces 831, 832, and layers 841 to 845 correspond to wiring layers provided with wiring patterns that transmit various signals. The wiring patterns disposed on surfaces 831, 832, and layers 841 to 845, which correspond to these wiring layers, are formed by etching copper foil, a material with relatively high electrical conductivity.

[0192] The plurality of insulating layers 840 are positioned along the Z2 direction between the surface 831 and layer 841, between layer 841 and layer 842, between layer 842 and layer 843, between layer 843 and layer 844, between layer 844 and layer 845, and between layer 845 and the surface 832. These plurality of insulating layers 840 are insulators for insulating the surfaces 831 and 832 and between layers 841 to 845, and are formed, for example, of a material having relatively excellent insulating properties, such as epoxy glass formed by impregnating epoxy resin into glass fiber cloth.

[0193] As described above, the wiring substrate 810 in this embodiment is a so-called multilayer substrate comprising a surface 831 and a surface 832 different from surface 831, with multiple wiring layers arranged along the Z2 direction between surfaces 831 and 832. Furthermore, wiring substrate 810, constructed as such a multilayer substrate, includes through-hole wiring that penetrates multiple insulating layers 840 to electrically connect surfaces 831, 832, and layers 841 to 845. While the through-hole wiring provided on wiring substrate 810 is a known structure and a detailed description thereof will be omitted, the through-hole wiring provided on wiring substrate 810 in this embodiment can be, for example, a 0.3 mm diameter or a 0.5 mm outer diameter, depending on the amount of current flowing through the through-hole wiring. In other words, wiring substrate 810 in this embodiment includes multiple wiring layers arranged along the Z direction and through-hole wiring that electrically connects the multiple wiring layers.

[0194] First, a specific example of the structure of surfaces 831 and 832 on which various electronic components are mounted will be described. In the liquid ejection device 1 of this embodiment, the various electronic components are mounted on surface 831, and a detailed description of surface 832 will be omitted. Furthermore, the present invention is not limited to a case where all electronic components constituting the driver circuit substrate 800 are mounted on surface 831 of the wiring substrate 810. Furthermore, some or all of the structures described below as being mounted on surface 831 may also be mounted on surface 832.

[0195] Figure 15 FIG. 8 is a diagram showing an example of the structure of the surface 831 of the wiring substrate 810. Figure 15 , an example of the structure of surface 831 when the wiring substrate 810 is viewed from +Z2 along the Z2 direction is shown. In the following description, viewing the wiring substrate 810 from the +Z2 side along the Z2 direction may be referred to as viewing the wiring substrate 810 from above.

[0196] like Figure 15 As shown, wiring substrate 810 has a generally rectangular shape including sides 811 and 812 that face each other along the X2 direction, and sides 813 and 814 that face each other along the Y2 direction. Specifically, side 811 is located on the +X2 side of wiring substrate 810, side 812 is located on the -X2 side of wiring substrate 810, side 813 intersects both sides 811 and 812 and is located on the +Y2 side of wiring substrate 810, and side 814 intersects both sides 811 and 812 and is located on the -Y2 side of wiring substrate 810.

[0197] Connecting portions CN1 and CN2 , the integrated circuit 101 , a plurality of driving circuits 52 , and a reference voltage output circuit 53 are provided on a surface 831 of the wiring substrate 810 .

[0198] The connection portion CN1 is electrically connected to a plurality of terminals TM1 of the wiring substrate 810 by welding or the like. The plurality of terminals TM1 of the wiring substrate 810 are arranged side by side in the direction along the Y direction along the edge 811 of the wiring substrate 810. That is, the connection portion CN1 is provided along the edge 811. The connection portion CN1 is electrically connected to the control unit 2. Specifically, a cable not shown in the figure is installed on the connection portion CN1 and is electrically connected to the control unit 2. Thus, a signal including the image information signal IP output by the control unit 2 is supplied to the head driving module 10 via the terminal TM1. In addition, the connection portion CN1 may also be a BtoB (Board to Board) connector that can realize an electrical connection between the control unit 2 and the head driving module 10 without a cable.

[0199] The connection portion CN2 is electrically connected to the plurality of terminals TM2 of the wiring substrate 810 by welding or the like. The plurality of terminals TM2 of the wiring substrate 810 are arranged side by side in the direction along the Y direction along the edge 812 of the wiring substrate 810. That is, the connection portion CN2 is arranged along the edge 812. The connection portion CN2 is electrically connected to the liquid ejection module 20. Specifically, one end of the connection component 30 is mounted on the connection portion CN2. In addition, the other end of the connection component 30 is connected to the connection portion 330 of the liquid ejection module 20. Thus, signals including the drive signals COMA1 to COMA6, COMB1 to COMB6, COMC1 to COMC6 output by the head drive module 10, and the data signal DATA are supplied to the liquid ejection module 20 via the plurality of terminals TM2, the connection portion CN2, and the connection component 30. That is, the wiring substrate 810 includes terminals TM2 that output the drive signals COMA1 to COMA6, COMB1 to COMB6, COMC1 to COMC6. Here, as mentioned above, the connection parts CN2 and 330 may also be BtoB connectors.

[0200] Integrated circuit 101 is located on the -X2 side of connector CN1. Integrated circuit 101 includes all or part of the control circuit 100 and all or part of the conversion circuit 120 described above. Furthermore, based on the image information signal IP input via connector CN1, integrated circuit 101 generates and outputs various signals, including data signal DATA, basic drive signals dA1 to dA6, dB1 to dB6, and dC1 to dC6. The data signal DATA output by integrated circuit 101 is transmitted through a wiring pattern (not shown) provided on wiring substrate 810 and is output to liquid ejection module 20 via connector CN2. In addition, each of the basic driving signals dA1 to dA6, dB1 to dB6, and dC1 to dC6 output by the integrated circuit 101 is transmitted through a wiring pattern (not shown) provided on the wiring substrate 810 and is input to the corresponding driving circuit 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6.

[0201] The reference voltage output circuit 53 is located on the -X2 side of the integrated circuit 101. The reference voltage output circuit 53 steps down or steps up the voltage VHV or a voltage signal (not shown) input from the connection CN1 to generate and output a reference voltage signal VBS. The reference voltage signal VBS is then transmitted through the wiring pattern provided on the wiring substrate 810 and supplied to the liquid ejection module 20 via the connection CN2. Such a reference voltage output circuit 53 can be composed of one or more semiconductor devices or a plurality of electronic components.

[0202] Here, although Figure 15 , the integrated circuit 101 and the reference voltage output circuit 53 are arranged on the surface 831 of the wiring substrate 810 together with the plurality of drive circuits 52. However, at least one of the integrated circuit 101 and the reference voltage output circuit 53 may be arranged on the surface 832 of the wiring substrate 810. Furthermore, at least one of the integrated circuit 101 and the reference voltage output circuit 53 may be provided on a circuit substrate (not shown) different from the wiring substrate 810.

[0203] The plurality of drive circuits 52 including drive circuits 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6 are located between the reference voltage output circuit 53 and the connection portion CN2 and are arranged in parallel along the X2 direction. Specifically, the driving circuits 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6 corresponding to the ejection modules 23-1 to 23-6 of the liquid ejection module 20 are arranged on the surface 831 of the wiring substrate 810 along the X2 direction from the +X2 side toward the -X2 side and in the order of the driving circuits 52a1, 52b1, 52c1, 52a2, 52b2, 52c2, 52a3, 52b3, 52c3, 52a4, 52b4, 52c4, 52a5, 52b5, 52c5, 52a6, 52b6, and 52c6.

[0204] In this case, the transistors M1 and M2 included in each of the plurality of drive circuits 52 are arranged along the X2 direction such that transistor M1 is on the +X2 side and transistor M2 is on the -X2 side. The inductor L1 is located on the -Y2 side of the transistors M1 and M2 arranged along the X2 direction, and the integrated circuit 500 is located on the +Y2 side of the transistors M1 and M2 arranged along the X2 direction. That is, the integrated circuit 500, the transistors M1 and M2, and the inductor L1 included in the drive circuit 52 are arranged along the direction from the side 813 to the side 814 on the surface 831 of the wiring substrate 810 in the order of the integrated circuit 500, the parallel transistors M1 and M2, and the inductor L1.

[0205] Furthermore, capacitors C1 and C7 included in each of the plurality of drive circuits 52 are located between transistors M1 and M2 and inductor L1, which are arranged side by side along the direction from side 813 to side 814. In this case, capacitor C7 is located near transistor M1, and capacitor C1 is located near inductor L1.

[0206] Capacitor C7 reduces the potential for noise to be superimposed on the voltage VHV supplied to the drain of transistor M1 and reduces potential voltage fluctuations in voltage VHV. Placing capacitor C7 near transistor M1 shortens the wiring length between capacitor C1 and the drain of transistor M1. As a result, the likelihood of noise being superimposed on voltage VHV is reduced, further reducing the likelihood of fluctuations in the voltage value of voltage VHV input to the drain of transistor M1. This improves the accuracy of voltage VHV supplied to transistor M1 and the accuracy of amplified modulated signal AMs output by amplifier circuit 550, which includes transistor M1.

[0207] Capacitor C1 and inductor L1 together form a low-pass filter. Furthermore, the low-pass filter comprising capacitor C1 and inductor L1 demodulates the amplified modulated signal AMs output by amplifier circuit 550, thereby generating a drive signal COM. By positioning capacitor C1, which constitutes this low-pass filter, near inductor L1, the length of the wiring electrically connecting capacitor C1 and inductor L1 can be shortened, resulting in improved operational stability of the low-pass filter formed by capacitor C1 and inductor L1. Consequently, the waveform accuracy of drive signal COM output by demodulation circuit 560, which includes the low-pass filter comprising capacitor C1 and inductor L1, can be improved.

[0208] Here, on wiring substrate 810, the integrated circuits 500 included in each of the plurality of drive circuits 52 are arranged in an array along the X2 direction, the transistors M1 and M2 arranged side by side are alternately arranged along the X2 direction, and the inductor L1 is arranged in an array along the X2 direction. Specifically, on surface 831 of wiring substrate 810, the plurality of drive circuits 52 are arranged so as to form a row of integrated circuits 500 arranged side by side from edge 812 to edge 811, a row of transistors M1 and M2 arranged side by side from edge 812 to edge 811, and a row of inductors L1 arranged side by side from edge 812 to edge 811.

[0209] Next, the structure of the layers 841 to 845 located between the surface 831 and the surface 832 in the wiring layer of the wiring substrate 810 will be described. Figure 14 As shown, the layers 841 to 845 included in the wiring substrate 810 are arranged in the order of layer 841 , layer 842 , layer 843 , layer 844 , and layer 845 from the +Z2 side of the surface 831 toward the −Z2 side of the surface 832 in the direction along the Z2 direction.

[0210] Layer 841 includes a wiring pattern for transmitting constant-potential signals, such as ground potential GND. Furthermore, layer 842 includes wiring WA1 to WA6 for transmitting drive signals COMA1 to COMA6 and a wiring pattern for transmitting ground potential GND. Layer 843 includes wiring WC1 to WC6 for transmitting drive signals COMC1 to COMC6 and wiring WS for transmitting reference voltage signal VBS. Layer 844 includes wiring WB1 to WB6 for transmitting drive signals COMB1 to COMB6 and a wiring pattern for transmitting ground potential GND. Layer 845 includes a wiring pattern for transmitting constant-potential signals, such as ground potential GND.

[0211] First, a specific example of the structure of layer 841 in the inner layer of wiring board 810 will be described. Figure 16810 is a diagram showing an example of the structure of the layer 841 of the wiring substrate 810. Figure 16 810 is a perspective view showing an example of the structure of the layer 841 when viewed from above. Figure 16 In FIG. 8 , a portion of the structure provided outside the layer 841 of the wiring substrate 810 is indicated by a dotted line.

[0212] like Figure 16 As shown, wiring WG1 is formed on layer 841 over substantially the entire surface of layer 841. Specifically, wiring WG1 is formed on layer 841 so that at least a portion overlaps with at least a portion of each of drive circuits 52a1-52a6, 52b1-52b6, and 52c1-52c6 when viewed from above the wiring substrate 810. A constant voltage signal, such as ground potential GND, which serves as a reference potential for the drive circuit substrate 800, is supplied to wiring WG1.

[0213] In addition, although Figure 16 The example in FIG. 8 illustrates a case where only wiring WG1 is formed over substantially the entire surface of layer 841, but this is not limiting. Specifically, in addition to wiring WG1, layer 841 may also include wiring patterns for transmitting various signals and power supply voltages, such as data signal DATA, clock signals SCK1 to SCK6 generated by recovering data signal DATA, printed data signals SI1 to SI6, and latch signals LAT1 to LAT6. Furthermore, layer 841 may also include through-hole wiring for electrically connecting the layers of wiring substrate 810. Therefore, the fact that wiring WG1 is formed over substantially the entire surface of layer 841 is not limited to the fact that wiring WG1 is formed over the entire area of ​​layer 841. Specifically, as long as wiring WG1 occupies a majority of layer 841, for example, wiring WG1 occupies at least 50% of the entire area of ​​layer 841, it is sufficient.

[0214] Specifically, wiring substrate 810 includes layer 841 as multiple wiring layers. Layer 841 includes wiring WG1 for transmitting constant-potential signals. Furthermore, along the Z direction, wiring WG1 is arranged to overlap wirings WA1 to WA6 for transmitting drive signals COMA1 to COMA6. Consequently, wiring WG1 functions as a shield, protecting wirings WA1 to WA6 from external noise.

[0215] Here, although the liquid ejection device 1 of this embodiment is described as a configuration in which the constant potential signal transmitted by the wiring WG1 is a ground signal, the wiring WG1 may transmit a DC voltage such as a power supply voltage as the constant potential signal.

[0216] Next, a specific example of the structure of layer 842 in the inner layer of wiring board 810 will be described. Figure 17 810 is a diagram showing an example of the structure of the layer 842 of the wiring substrate 810. Figure 17 810 is a perspective view showing an example of the structure of the layer 842 when viewed from above. Figure 17 In FIG. 8 , a portion of the structure provided outside the layer 842 of the wiring substrate 810 is indicated by a dotted line.

[0217] Wiring WA1 to WA6 are formed on layer 842. One end of wiring WA1 is electrically connected to one end of inductor L1 and one end of capacitor C1 included in drive circuit 52a1 via a via (not shown), etc., while the other end of wiring WA1 is electrically connected to connection portion CN2 via a via (not shown) and terminal TM2. Thus, wiring WA1 transmits drive signal COMA1 output by drive circuit 52a1 to connection portion CN2.

[0218] Wiring WA2 is located on the -X2 side of wiring WA1 and on the -Y2 side of wiring WA1. One end of wiring WA2 is electrically connected to one end of inductor L1 and one end of capacitor C1 of drive circuit 52a2 via a through-hole (not shown), etc. The other end of wiring WA2 is electrically connected to connector CN2 via a through-hole (not shown) and terminal TM2. Thus, wiring WA2 transmits drive signal COMA2 output by drive circuit 52a2 to connector CN2.

[0219] Wiring WA3 is located on the -X2 side of wiring WA2 and on the -Y2 side of wiring WA2. One end of wiring WA3 is electrically connected to one end of inductor L1 and one end of capacitor C1 of drive circuit 52a3 via a through-hole (not shown), etc. The other end of wiring WA3 is electrically connected to connector CN2 via a through-hole (not shown) and terminal TM2. Thus, wiring WA3 transmits drive signal COMA3 output by drive circuit 52a3 to connector CN2.

[0220] Wiring WA4 is located on the -X2 side of wiring WA3 and on the -Y2 side of wiring WA3. One end of wiring WA4 is electrically connected to one end of inductor L1 and one end of capacitor C1 of drive circuit 52a4 via a through-hole (not shown), etc. The other end of wiring WA4 is electrically connected to connection portion CN2 via a through-hole (not shown) and terminal TM2. Thus, wiring WA4 transmits drive signal COMA4 output by drive circuit 52a4 to connection portion CN2.

[0221] Wiring WA5 is located on the -X2 side of wiring WA4 and on the -Y2 side of wiring WA4. One end of wiring WA5 is electrically connected to one end of inductor L1 and one end of capacitor C1 of drive circuit 52a5 via a through-hole (not shown), and the other end of wiring WA5 is electrically connected to connector CN2 via a through-hole (not shown) and terminal TM2. Thus, wiring WA5 transmits drive signal COMA5 output by drive circuit 52a5 to connector CN2.

[0222] Wiring WA6 is located on the -X2 side of wiring WA5 and on the -Y2 side of wiring WA5. One end of wiring WA6 is electrically connected to one end of inductor L1 and one end of capacitor C1 of drive circuit 52a6 via a through-hole (not shown), etc. The other end of wiring WA6 is electrically connected to connection portion CN2 via a through-hole (not shown) and terminal TM2. Thus, wiring WA6 transmits drive signal COMA6 output by drive circuit 52a6 to connection portion CN2.

[0223] That is, on layer 842, the wiring WA1 for transmitting the driving signal COMA1, the wiring WA2 for transmitting the driving signal COMA2, the wiring WA3 for transmitting the driving signal COMA3, the wiring WA4 for transmitting the driving signal COMA4, the wiring WA5 for transmitting the driving signal COMA5, and the wiring WA6 for transmitting the driving signal COMA6 are arranged from the +Y2 side toward the -Y2 side in the order of wiring WA1, wiring WA2, wiring WA3, wiring WA4, wiring WA5, and wiring WA6. In the following description, in layer 842, the area between wiring WA1 and wiring WA2 is sometimes referred to as the inter-wire area BW12, the area between wiring WA2 and wiring WA3 is sometimes referred to as the inter-wire area BW23, the area between wiring WA3 and wiring WA4 is sometimes referred to as the inter-wire area BW34, the area between wiring WA4 and wiring WA5 is sometimes referred to as the inter-wire area BW45, and the area between wiring WA5 and wiring WA6 is sometimes referred to as the inter-wire area BW56.

[0224] Furthermore, wiring WG2 is formed on layer 842. Specifically, wiring WG2 is formed on layer 842 over substantially the entire surface of an area that does not overlap with the aforementioned wirings WA1 to WA6. At this point, at least a portion of wiring WG2 is also located within inter-line areas BW12, BW23, BW34, BW45, and BW56. This wiring WG2 is supplied with a constant voltage signal, such as the ground potential GND, which serves as the reference potential for the driver circuit substrate 800. In other words, wiring WG2 transmits a constant potential signal, and transmits a signal that is constant at ground potential GND. Furthermore, wiring WG2 can transmit a signal that is constant at a predetermined voltage value, such as a power supply voltage, instead of a signal that is constant at ground potential GND.

[0225] Here, on layer 842, in addition to the wiring WA1~WA6 and WG2, there may also be wiring patterns for transmitting various signals and power supply voltages such as data signals DATA, or clock signals SCK1~SCK6 generated by recovering the data signals DATA, printed data signals SI1~SI6, and latch signals LAT1~LAT6, and through-hole wiring for interconnecting the layers of the wiring substrate 810.

[0226] As described above, the layer 841 of the plurality of wiring layers of the wiring substrate 810 includes wiring WA1, wiring WA2, wiring WA3, wiring WA4, wiring WA5, wiring WA6 and wiring WG2, wherein the wiring WA1 is a wiring of the driving signal COMA1 that is supplied to the electrode 602 of the piezoelectric element 60 of the ejection module 23-1 and drives the piezoelectric element 60 in a manner of ejecting ink from the liquid ejection module 20, and the wiring WA2 is a wiring of the driving signal COM that is supplied to the electrode 602 of the piezoelectric element 60 of the ejection module 23-1 and drives the piezoelectric element 60 in a manner of ejecting ink from the liquid ejection module 20. The wiring WA3 is a wiring for transmitting the driving signal COMA3 supplied to the electrode 602 of the piezoelectric element 60 of the ejection module 23-2 and driving the piezoelectric element 60 in a manner of ejecting ink from the liquid ejection module 20. The wiring WA4 is a wiring for transmitting the driving signal COMA3 supplied to the electrode 602 of the piezoelectric element 60 of the ejection module 23-3 and driving the piezoelectric element 60 in a manner of ejecting ink from the liquid ejection module 20. The electrode 602 of the piezoelectric element 60 of the module 23-4 is connected to the driving signal COMA4 for driving the piezoelectric element 60 in a manner of ejecting ink from the liquid ejection module 20. The wiring WA5 is connected to the driving signal COMA5 of the piezoelectric element 60 of the ejection module 23-5 and is connected to the driving signal COMA5 of the piezoelectric element 60 of the ejection module 23-5. The wiring WA6 is connected to the driving signal COMA5 of the piezoelectric element 60 of the ejection module 23-6 and is connected to the driving signal COMA5 of the ejection module 23-7. -6 has an electrode 602 of a piezoelectric element 60 and a wiring of a driving signal COMA6 for driving the piezoelectric element 60 in a manner of ejecting ink from a liquid ejection module 20, at least a portion of the wiring WG2 is located in an inter-wire area BW12 between the wiring WA1 and the wiring WA2, an inter-wire area BW23 between the wiring WA2 and the wiring WA3, an inter-wire area BW34 between the wiring WA3 and the wiring WA4, an inter-wire area BW45 between the wiring WA4 and the wiring WA5, and an inter-wire area BW56 between the wiring WA5 and the wiring WA6.

[0227] Next, a specific example of the structure of layer 843 in the inner layer of wiring board 810 will be described. Figure 18 810 is a diagram showing an example of the structure of layer 843 of the wiring substrate 810. Figure 18 843 is a perspective view showing an example of the structure of the layer 843 when the wiring substrate 810 is viewed from above. Figure 18 In FIG. 8 , a portion of the structure provided outside the layer 843 of the wiring substrate 810 is indicated by a dotted line.

[0228] Among the plurality of wiring layers of the wiring substrate 810, the layer 842 and the layer 843 are provided adjacent to each other. In other words, the layer 842 is located between the layer 843 and the layer 841 in the direction along the Z direction.

[0229] Wirings WC1 to WC are formed on layer 843. One end of wiring WC1 is electrically connected to one end of inductor L1 and one end of capacitor C1 included in drive circuit 52c1 via a via (not shown), etc. The other end of wiring WC1 is electrically connected to connection portion CN2 via a via (not shown) and terminal TM2. Thus, wiring WC1 transmits drive signal COMC1 output by drive circuit 52c1 to connection portion CN2.

[0230] Wiring WC2 is located on the -X2 side of wiring WC1 and on the -Y2 side of wiring WC1. One end of wiring WC2 is electrically connected to one end of inductor L1 and one end of capacitor C1 of drive circuit 52c2 via a through-hole (not shown), etc. The other end of wiring WC2 is electrically connected to connector CN2 via a through-hole (not shown) and terminal TM2. Thus, wiring WC2 transmits drive signal COMC2 output by drive circuit 52c2 to connector CN2.

[0231] Wiring WC3 is located on the -X2 side of wiring WC2 and on the -Y2 side of wiring WC2. One end of wiring WC3 is electrically connected to one end of inductor L1 and one end of capacitor C1 of drive circuit 52c3 via a through-hole (not shown), etc. The other end of wiring WC3 is electrically connected to connector CN2 via a through-hole (not shown) and terminal TM2. Thus, wiring WC3 transmits drive signal COMC3 output by drive circuit 52c3 to connector CN2.

[0232] Wiring WC4 is located on the -X2 side of wiring WC3 and on the -Y2 side of wiring WC3. One end of wiring WC4 is electrically connected to one end of inductor L1 and one end of capacitor C1 of drive circuit 52c4 via a through-hole (not shown), etc. The other end of wiring WC4 is electrically connected to connector CN2 via a through-hole (not shown) and terminal TM2. Thus, wiring WC4 transmits drive signal COMC4 output by drive circuit 52c4 to connector CN2.

[0233] Wiring WC5 is located on the -X2 side of wiring WC4 and on the -Y2 side of wiring WC4. One end of wiring WC5 is electrically connected to one end of inductor L1 and one end of capacitor C1 of drive circuit 52c5 via a through-hole (not shown), etc. The other end of wiring WC5 is electrically connected to connector CN2 via a through-hole (not shown) and terminal TM2. Thus, wiring WC5 transmits drive signal COMC5 output by drive circuit 52c5 to connector CN2.

[0234] Wiring WC6 is located on the -X2 side of wiring WC5 and the -Y2 side of wiring WC5. One end of wiring WC6 is electrically connected to one end of inductor L1 and one end of capacitor C1 of drive circuit 52c6 via a through-hole (not shown), etc. The other end of wiring WC6 is electrically connected to connector CN2 via a through-hole (not shown) and terminal TM2. Thus, wiring WC6 transmits drive signal COMC6 output by drive circuit 52c6 to connector CN2.

[0235] Furthermore, wiring WS is formed on layer 843. The reference voltage signal VBS output by the reference voltage output circuit 53 is supplied to the wiring WS via a through-hole (not shown), etc. In other words, the wiring WS transmits the reference voltage signal VBS. Furthermore, the wiring WS branches corresponding to each of the ejection modules 23-1 to 23-6, and the branched ends are electrically connected to the connection portion CN2 via a through-hole (not shown) and the terminal TM2.

[0236] Here, on layer 843, in addition to the wirings WA1~WA6 and WS, a portion of the wiring pattern for transmitting various signals and power supply voltages such as the data signal DATA, the clock signals SCK1~SCK6 generated by recovering the data signal DATA, the printed data signals SI1~SI6, and the latch signals LAT1~LAT6 may also be provided, and through-hole wiring may also be provided for interconnecting the layers of the wiring substrate 810.

[0237] As described above, the layer 841 within the plurality of wiring layers of the wiring substrate 810 includes wiring WC1, wiring WC2, wiring WC3, wiring WC4, wiring WC5, and wiring WC6, wherein the wiring WC1 is a wiring of the driving signal COMC1 that is supplied to the electrode 602 of the piezoelectric element 60 of the ejection module 23-1 and drives the piezoelectric element 60 in a manner that does not eject ink from the liquid ejection module 20, and the wiring WC2 is a wiring of the driving signal COM that is supplied to the piezoelectric element 60 of the ejection module 23-2. The electrode 602 of the piezoelectric element 60 is connected to the piezoelectric element 60 of the ejection module 23-3 and the driving signal COMC2 is connected to the piezoelectric element 60 in a manner that does not eject ink from the liquid ejection module 20. The wiring WC3 is connected to the electrode 602 of the piezoelectric element 60 of the ejection module 23-3 and the driving signal COMC3 is connected to the piezoelectric element 60 in a manner that does not eject ink from the liquid ejection module 20. The wiring WC4 is connected to the electrode 602 of the piezoelectric element 60 of the ejection module 23-4 and the driving signal COMC3 is connected to the piezoelectric element 60 in a manner that does not eject ink from the liquid ejection module 20. The wiring of the driving signal COMC4 for driving the piezoelectric element 60 in a manner that the ejection module 20 ejects ink, the wiring WC5 for transmitting the driving signal COMC5 supplied to the electrode 602 of the piezoelectric element 60 of the ejection module 23-5 and driving the piezoelectric element 60 in a manner that ink is not ejected from the liquid ejection module 20, and the wiring WC6 for transmitting the driving signal COM supplied to the electrode 602 of the piezoelectric element 60 of the ejection module 23-6 and driving the piezoelectric element 60 in a manner that ink is not ejected from the liquid ejection module 20. The piezoelectric element 60 is driven by a wiring of a driving signal COMC6, and the wiring WS is a wiring for transmitting a reference voltage signal VBS having a constant voltage value and supplied to the electrode 603 of the piezoelectric element 60 of the ejection module 23-1, the electrode 603 of the piezoelectric element 60 of the ejection module 23-2, the electrode 603 of the piezoelectric element 60 of the ejection module 23-3, the electrode 603 of the piezoelectric element 60 of the ejection module 23-4, the electrode 603 of the piezoelectric element 60 of the ejection module 23-5, and the electrode 603 of the piezoelectric element 60 of the ejection module 23-6.

[0238] At this time, the line width of the wiring WC1~WC6 of the transmission drive signals COMC1~COMC6 set on the layer 843 is smaller than the line width of the wiring WA1~WA6 of the transmission drive signals COMA1~COMA6 set on the layer 842, and the line width of the wiring WC1~WC6 of the transmission drive signals COMC1~COMC6 set on the layer 843 is smaller than the line width of the wiring WB1~WB6 of the transmission drive signals COMB1~COMB6 set on the layer 844 described later.

[0239] As described above, the drive signals COMC1 to COMC6 drive the corresponding piezoelectric element 60 in a manner that does not eject ink from the nozzle N. Therefore, the amount of current generated by the transmission of the drive signals COMC1 to COMC6 is smaller than the amount of current generated by the transmission of the drive signals COMA1 to COMA6 and COMB1 to COMB6 that drive the corresponding piezoelectric element 60 in a manner that ejects ink from the nozzle N. By making the line width of the wiring WC1 to WC6 that transmits the drive signals COMC1 to COMC6 with a smaller amount of transmission current smaller than the line width of the wiring WA1 to WA6 that transmits the drive signals COMA1 to COMA6, and smaller than the line width of the wiring WB1 to WB6 that transmits the drive signals COMB1 to COMB6, the wiring substrate 810 can be miniaturized.

[0240] Next, a specific example of the structure of layer 844 among the inner layers of wiring board 810 will be described. Figure 19 810 is a diagram showing an example of the structure of the layer 844 of the wiring substrate 810. Figure 19 810 is a perspective view showing an example of the structure of the layer 844 when viewed from above. Figure 19 In FIG. 8 , a portion of the structure other than layer 844 of wiring substrate 810 is shown by a dotted line. Furthermore, among the multiple wiring layers of wiring substrate 810, layer 844 and layer 843 are adjacently disposed. That is, layer 843 is located between layer 842 and layer 844 in the Z direction.

[0241] Wirings WB1 to WB6 are formed on layer 844. One end of wiring WB1 is electrically connected to one end of inductor L1 and one end of capacitor C1 included in drive circuit 52b1 via a via (not shown), etc., while the other end of wiring WB1 is electrically connected to connection portion CN2 via a via (not shown) and terminal TM2. Thus, wiring WB1 transmits drive signal COMB1 output by drive circuit 52b1 to connection portion CN2.

[0242] Wiring WB2 is located on the -X2 side of wiring WB1 and on the -Y2 side of wiring WB1. One end of wiring WB2 is electrically connected to one end of inductor L1 and one end of capacitor C1 of drive circuit 52b2 via a through-hole (not shown), etc. The other end of wiring WB2 is electrically connected to connector CN2 via a through-hole (not shown) and terminal TM2. Thus, wiring WB2 transmits drive signal COMB2 output by drive circuit 52b2 to connector CN2.

[0243] Wiring WB3 is located on the -X2 side of wiring WB2 and on the -Y2 side of wiring WB2. One end of wiring WB3 is electrically connected to one end of inductor L1 and one end of capacitor C1 of drive circuit 52b3 via a through-hole (not shown), etc. The other end of wiring WB3 is electrically connected to connection portion CN2 via a through-hole (not shown) and terminal TM2. Thus, wiring WB3 transmits drive signal COMB3 output by drive circuit 52b3 to connection portion CN2.

[0244] Wiring WB4 is located on the -X2 side of wiring WB3 and on the -Y2 side of wiring WB3. One end of wiring WB4 is electrically connected to one end of inductor L1 and one end of capacitor C1 of drive circuit 52b4 via a through-hole (not shown), etc. The other end of wiring WB4 is electrically connected to connection portion CN2 via a through-hole (not shown) and terminal TM2. Thus, wiring WB4 transmits drive signal COMB4 output by drive circuit 52b4 to connection portion CN2.

[0245] Wiring WB5 is located on the -X2 side of wiring WB4 and on the -Y2 side of wiring WB4. One end of wiring WB5 is electrically connected to one end of inductor L1 and one end of capacitor C1 of drive circuit 52b5 via a through-hole (not shown), etc. The other end of wiring WB5 is electrically connected to connection portion CN2 via a through-hole (not shown) and terminal TM2. Thus, wiring WB5 transmits drive signal COMB5 output by drive circuit 52b5 to connection portion CN2.

[0246] Wiring WB6 is located on the -X2 side of wiring WB5 and on the -Y2 side of wiring WB5. One end of wiring WB6 is electrically connected to one end of inductor L1 and one end of capacitor C1 of drive circuit 52b6 via a through-hole (not shown), etc. The other end of wiring WB6 is electrically connected to connection portion CN2 via a through-hole (not shown) and terminal TM2. Thus, wiring WB6 transmits drive signal COMB6 output by drive circuit 52b6 to connection portion CN2.

[0247] That is, on layer 844, wiring WB1 for transmitting driving signal COMB1, wiring WB2 for transmitting driving signal COMB2, wiring WB3 for transmitting driving signal COMB3, wiring WB4 for transmitting driving signal COMB4, wiring WB5 for transmitting driving signal COMB5, and wiring WB6 for transmitting driving signal COMB6 are arranged along the Y2 direction from the +Y2 side toward the -Y2 side in the order of wiring WB1, wiring WB2, wiring WB3, wiring WB4, wiring WB5, and wiring WB6.

[0248] Here, on layer 844, in addition to the wiring WB1~WB6, there may also be wiring patterns for transmitting various signals and power supply voltages such as data signals DATA, or clock signals SCK1~SCK6 generated by recovering the data signals DATA, printed data signals SI1~SI6, and latch signals LAT1~LAT6, and through-hole wiring for interconnecting the layers of the wiring substrate 810.

[0249] Furthermore, wiring WG3 is formed on layer 844. Specifically, wiring WG3 is formed over substantially the entire surface of layer 842, in an area that does not overlap with the aforementioned wirings WB1 to WB6. At this point, at least a portion of wiring WG2 is also located in the areas between wirings WB1 and WB2, between wirings WB2 and WB3, between wirings WB3 and WB4, between wirings WB4 and WB5, and between wirings WB5 and WB6.

[0250] As described above, the layer 844 within the plurality of wiring layers of the wiring substrate 810 includes wiring WB1, wiring WB2, wiring WB3, wiring WB4, wiring WB5, wiring WB6, and wiring WG3, wherein the wiring WB1 is a wiring for transmitting the driving signal COMB1 supplied to the electrode 602 of the piezoelectric element 60 of the ejection module 23-1 and driving the piezoelectric element 60 in a manner of ejecting ink from the liquid ejection module 20, and the wiring WB2 is a wiring for transmitting the driving signal COMB1. The drive signal COMB2 is supplied to the electrode 602 of the piezoelectric element 60 of the ejection module 23-2 and drives the piezoelectric element 60 in a manner of ejecting ink from the liquid ejection module 20. The wiring WB3 is a wiring for transmitting the drive signal COMB3, which is supplied to the electrode 602 of the piezoelectric element 60 of the ejection module 23-3 and drives the piezoelectric element 60 in a manner of ejecting ink from the liquid ejection module 20. The wiring WB4 is a wiring for transmitting the drive signal COMB3, which is supplied to the electrode 602 of the piezoelectric element 60 of the ejection module 23-3 and drives the piezoelectric element 60 in a manner of ejecting ink from the liquid ejection module 20. B4 is a wiring for transmitting a driving signal COMB4 among the driving signals COM, which is supplied to the electrode 602 of the piezoelectric element 60 of the ejection module 23-4 and drives the piezoelectric element 60 in a manner of ejecting ink from the liquid ejection module 20. The wiring WB5 is a wiring for transmitting a driving signal COMB5 among the driving signals COM, which is supplied to the electrode 602 of the piezoelectric element 60 of the ejection module 23-5 and drives the piezoelectric element 60 in a manner of ejecting ink from the liquid ejection module 20. The wiring WB6 is a wiring for transmitting the driving signal COMB6 among the driving signals COM, which is supplied to the electrode 602 of the piezoelectric element 60 possessed by the ejection module 23-6 and drives the piezoelectric element 60 to eject ink from the liquid ejection module 20. At least a portion of the wiring WG3 is located between the wiring WB1 and the wiring WB2, between the wiring WB2 and the wiring WB3, between the wiring WB3 and the wiring WB4, between the wiring WB4 and the wiring WB5, and between the wiring WB5 and the wiring WB6.

[0251] Next, a specific example of the structure of layer 845 among the inner layers of wiring board 810 will be described. Figure 20 810 is a diagram showing an example of the structure of the layer 845 of the wiring substrate 810. Figure 20 845 is a perspective view showing an example of the structure of the layer 845 when the wiring substrate 810 is viewed from above. Figure 20 In FIG. 8 , a portion of the structure other than the layer 845 provided on the wiring substrate 810 is shown by a dotted line. Furthermore, the layer 843 is located between the layer 842 and the layer 845 in the direction along the Z direction.

[0252] like Figure 20 As shown, wiring WG4 is formed on layer 845 over substantially the entire surface of layer 845. Specifically, wiring WG4 is formed on layer 845 so that at least a portion overlaps with at least a portion of each of drive circuits 52a1 to 52a6, 52b1 to 52b6, and 52c1 to 52c6 when viewed from above the wiring substrate 810. A constant voltage signal, such as ground potential GND, which serves as a reference potential for the drive circuit substrate 800, is supplied to wiring WG4.

[0253] In addition, although Figure 20 The example in FIG. 8 illustrates a case where only wiring WG4 is formed over substantially the entire surface of layer 845, but this is not limiting. Specifically, in addition to wiring WG4, layer 845 may also include wiring patterns for transmitting various signals and power supply voltages, such as data signal DATA, clock signals SCK1 to SCK6 generated by recovering data signal DATA, printed data signals SI1 to SI6, and latch signals LAT1 to LAT6. Furthermore, layer 845 may also include through-hole wiring for electrically connecting the layers of wiring substrate 810. Therefore, the fact that wiring WG4 is formed over substantially the entire surface of layer 845 is not limited to the fact that wiring WG4 is formed over the entire area of ​​layer 845. Specifically, as long as wiring WG4 occupies a majority of layer 845, for example, wiring WG4 occupies at least 50% of the total area of ​​layer 845, it is sufficient.

[0254] Specifically, wiring substrate 810 includes layer 845 as multiple wiring layers. Layer 845 includes wiring WG4 for transmitting constant-potential signals. Furthermore, along the Z direction, wiring WG4 is arranged to overlap with wirings WB1 to WB6 for transmitting drive signals COMB1 to COMB6. Consequently, wiring WG4 functions as a shield, protecting wirings WB1 to WB6 from external noise.

[0255] Here, although the liquid ejection device 1 of this embodiment is described as a structure in which the constant potential signal transmitted by the wiring WG4 is a ground signal, the wiring WG4 may transmit a DC voltage such as a power supply voltage as the constant potential signal.

[0256] In the driver circuit substrate 800 configured as described above, along the Z direction, wiring WA1 is arranged so that at least a portion overlaps with wiring WS, wiring WA2 is arranged so that at least a portion overlaps with wiring WS, wiring WA3 is arranged so that at least a portion overlaps with wiring WS, wiring WA4 is arranged so that at least a portion overlaps with wiring WS, wiring WA5 is arranged so that at least a portion overlaps with wiring WS, and wiring WA6 is arranged so that at least a portion overlaps with wiring WS. Furthermore, along the Z direction, wiring WB1 is arranged so that at least a portion overlaps with wiring WA1, wiring WB2 is arranged so that at least a portion overlaps with wiring WA2, wiring WB3 is arranged so that at least a portion overlaps with wiring WA3, wiring WB4 is arranged so that at least a portion overlaps with wiring WA4, wiring WB5 is arranged so that at least a portion overlaps with wiring WA5, and wiring WB6 is arranged so that at least a portion overlaps with wiring WA6.

[0257] Specifically, along the Z direction, wiring WS is located between wiring WA1 and wiring WB1, between wiring WA2 and wiring WB2, between wiring WA3 and wiring WB3, between wiring WA4 and wiring WB4, between wiring WA5 and wiring WB5, and between wiring WA6 and wiring WB6. This reduces the inductance component generated by the current flowing when driving signals COMA1 to COMA6 and COMB1 to COMB6 are transmitted. Consequently, this inductance component reduces the possibility of distortion in the signal waveforms of driving signals COMA1 to COMA6 and COMB1 to COMB6.

[0258] Furthermore, by providing wiring WB1 so as to at least partially overlap wiring WA1, providing wiring WB2 so as to at least partially overlap wiring WA2, providing wiring WB3 so as to at least partially overlap wiring WA3, providing wiring WB4 so as to at least partially overlap wiring WA4, providing wiring WB5 so as to at least partially overlap wiring WA5, and providing wiring WB6 so as to at least partially overlap wiring WA6, the wiring WB1 provided on layer 844 and at least partially located between wiring WB1 and wiring WA2 is overlapped with wiring WB3. The wiring WG3 between wiring WB2, between wiring WB2 and wiring WB3, between wiring WB3 and wiring WB4, between wiring WB4 and wiring WB5, and between wiring WB5 and wiring WB6 is arranged so as to overlap at least a portion with the inter-wire area BW12 between wiring WA1 and wiring WA2, the inter-wire area BW23 between wiring WA2 and wiring WA3, the inter-wire area BW34 between wiring WA3 and wiring WA4, the inter-wire area BW45 between wiring WA4 and wiring WA5, and the inter-wire area BW56 between wiring WA5 and wiring WA6.

[0259] Moreover, in the direction along the Z direction, the wiring WC1 is arranged in a manner that at least a portion overlaps with the inter-wire area BW12, the wiring WC2 is arranged in a manner that at least a portion overlaps with the inter-wire area BW23, the wiring WC3 is arranged in a manner that at least a portion overlaps with the inter-wire area BW34, the wiring WC4 is arranged in a manner that at least a portion overlaps with the inter-wire area BW45, and the wiring WC5 is arranged in a manner that at least a portion overlaps with the inter-wire area BW56.

[0260] The drive signals COMC1 to COMC6 transmitted via wirings WC1 to WC6 have lower voltage values ​​than the drive signals COMA1 to COMA6. Since these drive signals COMC1 to COMC6 are arranged to overlap with inter-line areas BW12, BW23, BW34, BW45, and BW56, the likelihood of increased size of wiring board 810 is reduced, while also minimizing the likelihood of drive signals COMA1 to COMC6 overlapping with drive signals COMA1 to COMC6.

[0261] In the wiring substrate 810 constructed in the above manner, layer 842 has an area in which wiring WG2 is not configured in a part of the inter-line areas BW12, BW23, BW34, BW45, and BW56, and layer 844 has an area overlapping with wiring WG4 in a part of the inter-line areas BW12, BW23, BW34, BW45, and BW56 when viewed along the Z direction.

[0262] Specifically, the inter-wiring area BW12 includes a wide inter-wiring area wBW12 in which the inter-wiring distance between the wiring WA1 and the wiring WB2 is greater than the sum of the line width of the wiring WC1 and the minimum diameter of the through-hole wiring, and a narrow inter-wiring area nBW12 in which the inter-wiring distance between the wiring WA1 and the wiring WB2 is less than the sum of the line width of the wiring WC1 and the minimum diameter of the through-hole wiring, and is greater than the line width of the through-hole wiring, and includes an area in the narrow inter-wiring area nBW12 between the imaginary line VL connecting the terminal TM2 of the output drive signal COMA1 and the terminal TM2 of the output drive signal COMA2, where the wiring WG2 is not located in the inter-wiring area BW12, and the wide inter-wiring area wBW12, and the wiring WG4 overlaps with the narrow inter-wiring area nBW12 between the imaginary line VL and the wide inter-wiring area wBW12 when viewed along the Z direction.

[0263] Similarly, the inter-wiring area BW23 includes a wide inter-wiring area wBW23 in which the inter-wiring distance between wiring WA2 and wiring WB3 is greater than the sum of the line width of wiring WC2 and the minimum diameter of the through-hole wiring, and a narrow inter-wiring area nBW23 in which the inter-wiring distance between wiring WA2 and wiring WB3 is less than the sum of the line width of wiring WC2 and the minimum diameter of the through-hole wiring and is greater than the line width of the through-hole wiring, and includes an area in the narrow inter-wiring area nBW23 between the imaginary line VL connecting the terminal TM2 of the output drive signal COMA2 and the terminal TM2 of the output drive signal COMA3 and the wide inter-wiring area wBW23, where wiring WG2 is not located in the inter-wiring area BW23, and the wiring WG4 overlaps with the narrow inter-wiring area nBW23 between the imaginary line VL and the wide inter-wiring area wBW23 when viewed along the Z direction.

[0264] Similarly, the inter-wire area BW34 includes a wide inter-wire area wBW34 in which the inter-wire distance between the wiring WA3 and the wiring WB4 is greater than the sum of the line width of the wiring WC3 and the minimum diameter of the through-hole wiring, and a narrow inter-wire area nBW34 in which the inter-wire distance between the wiring WA3 and the wiring WB4 is less than the sum of the line width of the wiring WC3 and the minimum diameter of the through-hole wiring and is greater than the line width of the through-hole wiring, and includes an area in the narrow inter-wire area nBW34 between the imaginary line VL connecting the terminal TM2 of the output drive signal COMA3 and the terminal TM2 of the output drive signal COMA4 and the wide inter-wire area wBW34, where the wiring WG2 is not located in the inter-wire area BW34, and the wiring WG4 overlaps with the narrow inter-wire area nBW34 between the imaginary line VL and the wide inter-wire area wBW34 when viewed along the Z direction.

[0265] Similarly, the inter-wiring area BW45 includes a wide inter-wiring area wBW45 in which the inter-wiring distance between the wiring WA4 and the wiring WB5 is greater than the sum of the line width of the wiring WC4 and the minimum diameter of the through-hole wiring, and a narrow inter-wiring area nBW45 in which the inter-wiring distance between the wiring WA4 and the wiring WB5 is less than the sum of the line width of the wiring WC4 and the minimum diameter of the through-hole wiring and is greater than the line width of the through-hole wiring, and includes an area in the narrow inter-wiring area nBW45 between the imaginary line VL connecting the terminal TM2 of the output drive signal COMA4 and the terminal TM2 of the output drive signal COMA5 and the wide inter-wiring area wBW45, where the wiring WG2 is not located in the inter-wiring area BW45, and the wiring WG4 overlaps with the narrow inter-wiring area nBW45 between the imaginary line VL and the wide inter-wiring area wBW45 when viewed along the Z direction.

[0266] Similarly, the inter-wiring area BW56 includes a wide inter-wiring area wBW56 in which the inter-wiring distance between wiring WA5 and wiring WB6 is greater than the sum of the line width of wiring WC5 and the minimum diameter of the through-hole wiring, and a narrow inter-wiring area nBW56 in which the inter-wiring distance between wiring WA5 and wiring WB6 is less than the sum of the line width of wiring WC5 and the minimum diameter of the through-hole wiring and is greater than the line width of the through-hole wiring, and includes an area in the narrow inter-wiring area nBW56 between the imaginary line VL connecting the terminal TM2 of the output drive signal COMA5 and the terminal TM2 of the output drive signal COMA6 and the wide inter-wiring area wBW56, where wiring WG2 is not located in the inter-wiring area BW56, and the wiring WG4 overlaps with the narrow inter-wiring area nBW56 between the imaginary line VL and the wide inter-wiring area wBW56 when viewed along the Z direction.

[0267] Here, the line width of wirings WC1 to WC6 refers to the length of wirings WC1 to WC6 in a direction intersecting, preferably orthogonal to, the direction from one end of inductor L1 toward terminal TM2 of each of drive circuits 52c1 to 52c6. Furthermore, the minimum diameter of a through-hole wiring refers to the diameter of the smallest through-hole wiring formed on wiring substrate 810. That is, the wide inter-wiring area wBW12, WBW23, WBW34, WBW45, and WBW56, which is larger than the sum of the line width of the wiring WC1 to WC5 and the minimum diameter of the through-hole wiring, refers to the area where the through-hole wiring can be set in each of the inter-wiring areas BW12, BW23, BW34, BW45, and BW56, and the narrow inter-wiring area nBW12, nBW23, nBW34, nBW45, and nBW56, which is smaller than the sum of the line width of the wiring WC1 to WC5 and the minimum diameter of the through-hole wiring and larger than the line width of the through-hole wiring, refers to the area equivalent to the area where the through-hole wiring cannot be set in each of the inter-wiring areas BW12, BW23, BW34, BW45, and BW56. That is, the through-hole wirings included in the wiring substrate 810 are located in the wide wiring area wBW12 , WBW23 , WBW34 , WBW45 , and WBW56 , but not in the narrow wiring area nBW12 , nBW23 , nBW34 , nBW45 , and nBW56 .

[0268] use Figures 21 to 23Here, the following relationships are all the same: that is, in the inter-line area BW12, the wiring WG2 is not located in the narrow inter-wiring area nBW12 between the imaginary line VL and the wide inter-wiring area wBW12; in the inter-line area BW23, the wiring WG2 is not located in the narrow inter-wiring area nBW23 between the imaginary line VL and the wide inter-wiring area wBW23; in the inter-line area BW34, the wiring WG2 is not located in the narrow inter-wiring area nBW34 between the imaginary line VL and the wide inter-wiring area wBW34; in the inter-line area BW45, the wiring WG2 is not located in the narrow inter-wiring area nBW45 between the imaginary line VL and the wide inter-wiring area wBW45; and in the inter-line area BW56, the wiring WG2 is not located in the narrow inter-wiring area nBW56 between the imaginary line VL and the wide inter-wiring area wBW56. Moreover, the following relationships are also the same relationships, that is, the relationship in which the wiring WG4 overlaps with the narrow inter-wiring area nBW12 between the imaginary line VL and the wide inter-wiring area wBW12 in the inter-wire area BW12, the relationship in which the wiring WG4 overlaps with the narrow inter-wiring area nBW23 between the imaginary line VL and the wide inter-wiring area wBW23 in the inter-wire area BW23, the relationship in which the wiring WG4 overlaps with the narrow inter-wiring area nBW34 between the imaginary line VL and the wide inter-wiring area wBW34 in the inter-wire area BW34, the relationship in which the wiring WG4 overlaps with the narrow inter-wiring area nBW45 between the imaginary line VL and the wide inter-wiring area wBW45 in the inter-wire area BW45, and the relationship in which the wiring WG4 overlaps with the narrow inter-wiring area nBW56 between the imaginary line VL and the wide inter-wiring area wBW56 in the inter-wire area BW56.

[0269] Therefore, the following description will only describe the relationship in which the wiring WG2 is not located in the narrow inter-wiring area nBW34 between the virtual line VL and the wide inter-wiring area wBW34 in the inter-line area BW34 and the relationship in which the wiring WG4 overlaps the narrow inter-wiring area nBW34.

[0270] Figure 21 To place the wiring substrate 810 along Figures 15 to 20 The cross-sectional view of the wiring substrate 810 when cut along the line Cc shown, Figure 22 To place the wiring substrate 810 along Figures 15 to 20 The cross-sectional view of the wiring substrate 810 when cut along the Dd line shown, Figure 23 To place the wiring substrate 810 along Figures 15 to 20 1 is a cross-sectional view of the wiring substrate 810 when cut along the line Ee shown.

[0271] Here, the Cc line is a line segment formed by cutting the wiring substrate 810 along the Y2 direction at the position where the line-to-line area BW34 becomes the narrow wiring area nBW34, the Dd line is a line segment formed by cutting the wiring substrate 810 along the Y2 direction at the position where the line-to-line area BW34 becomes the wide wiring area wBW34, and the Ee line is a line segment formed by cutting the wiring substrate 810 along the Y2 direction at the position where the line-to-line area BW34 becomes the narrow wiring area nBW34, which is located on the connection portion CN2 side compared to the Dd line.

[0272] like Figure 21 As shown, in a cross section of wiring substrate 810 cut along line segment Cc, wire WG2 is located in narrow inter-wiring area nBW34 of layer 842, wire WC3 is located in an area of ​​layer 843 that overlaps with narrow inter-wiring area nBW34 when viewed along the Z direction, and wire WG3 is located in an area of ​​layer 844 that overlaps with narrow inter-wiring area nBW34 when viewed along the Z direction. That is, in a cross section of wiring substrate 810 cut along line segment Cc, wire WC3 is provided so that at least a portion overlaps with wires WG2 and WG3 when viewed along the Z direction.

[0273] like Figure 22 As shown, in a cross section of wiring substrate 810 cut along line segment Dd, wire WG2 is located in wide inter-wiring area wBW34 of layer 842, wire WC3 is located in an area of ​​layer 843 that overlaps with wide inter-wiring area wBW34 when viewed in the Z direction, and wire WG3 is located in an area of ​​layer 844 that overlaps with wide inter-wiring area wBW34 when viewed in the Z direction. That is, in a cross section of wiring substrate 810 cut along line segment Dd, wire WC3 is provided so that at least a portion overlaps with wires WG2 and WG3 when viewed in the Z direction.

[0274] like Figure 23As shown, in a cross section of wiring substrate 810 cut along line segment Ee, wiring WG2 is not located in the narrow inter-wiring area nBW34 of layer 842, wiring WC3 is located in the area of ​​layer 843 that overlaps with the narrow inter-wiring area nBW34 when viewed in the Z direction, and wiring WG3 is not located in the area of ​​layer 844 that overlaps with the narrow inter-wiring area nBW34 when viewed in the Z direction. That is, in a cross section of wiring substrate 810 cut along line segment Ee, wiring WC3 does not overlap with wiring WG2 or wiring WG3 when viewed in the Z direction. In this case, preferably, no wiring pattern for transmission other than wiring WA3 and wiring WA4 is formed in the narrow inter-wiring area nBW34 of layer 842, and no wiring pattern other than wiring WB3 and wiring WB4 is formed in the area of ​​layer 844 that overlaps with the narrow inter-wiring area nBW34.

[0275] Moreover, if Figures 15 to 20 As shown, in the inter-wire area BW34, the wide inter-wiring area wBW34 is not located closer to the connection portion CN2 than the line segment Ee. That is, the wiring WG2 is not located in the narrow inter-wiring area nBW34 closer to the connection portion CN2 than the wide inter-wiring area wBW34 closest to the connection portion CN2, and the wiring WG3 is not located in an area overlapping with the narrow inter-wiring area nBW34 closer to the connection portion CN2 than the wide inter-wiring area wBW34 closest to the connection portion CN2.

[0276] Here, as described above, the wide inter-wiring area wBW34 is an area where through-hole wiring can be provided, and the narrow inter-wiring area nBW34 is an area where through-hole wiring cannot be provided. Therefore, the fact that wiring WG3 is not located in an area overlapping with the narrow inter-wiring area nBW34 that is closer to the connection portion CN2 than the wide inter-wiring area wBW34 closest to the connection portion CN2 means that, in the case where through-hole wiring cannot be provided between the connection portion CN2 and the wide inter-wiring area wBW34, no wiring pattern other than wiring WA3 and wiring WA4 is provided in the area of ​​layer 842 that is closer to the connection portion CN2 than the wide inter-wiring area wBW34, and no wiring pattern other than wiring WB3 and wiring WB4 is provided in the area of ​​layer 844 that overlaps with the area of ​​layer 842 that is closer to the connection portion CN2 than the wide inter-wiring area wBW34.

[0277] Similarly, wiring WG2 is not located in the narrow inter-wiring area nBW12 that is closer to the connection portion CN2 than the wide inter-wiring area wBW12 that is closest to the connection portion CN2, and wiring WG3 is not located in an area overlapping with the narrow inter-wiring area nBW12 that is closer to the connection portion CN2 than the wide inter-wiring area wBW12 that is closest to the connection portion CN2. Wiring WG2 is not located in the narrow inter-wiring area nBW23 that is closer to the connection portion CN2 than the wide inter-wiring area wBW23 that is closest to the connection portion CN2, and wiring WG3 is not located in an area overlapping with the narrow inter-wiring area nBW23 that is closer to the connection portion CN2 than the wide inter-wiring area wBW23 that is closest to the connection portion CN2. Wiring WG2 is not located in the narrow inter-wiring region nBW45 that is closer to the connection portion CN2 than the wide inter-wiring region wBW45 that is closest to the connection portion CN2. Wiring WG3 is not located in an area that overlaps with the narrow inter-wiring region nBW45 that is closer to the connection portion CN2 than the wide inter-wiring region wBW45 that is closest to the connection portion CN2. Wiring WG2 is not located in the narrow inter-wiring region nBW56 that is closer to the connection portion CN2 than the wide inter-wiring region wBW56 that is closest to the connection portion CN2. Wiring WG3 is not located in an area that overlaps with the narrow inter-wiring region nBW56 that is closer to the connection portion CN2 than the wide inter-wiring region wBW56 that is closest to the connection portion CN2.

[0278] In the liquid ejection device 1 constructed as described above, the liquid ejection module 20 is an example of an ejection head, the piezoelectric element 60 included in the ejection module 23-3 of the liquid ejection module 20 is an example of a first piezoelectric element, the electrode 602 of the piezoelectric element 60 is an example of a first electrode, and the electrode 603 of the piezoelectric element 60 is an example of a second electrode. Furthermore, the piezoelectric element 60 included in the ejection module 23-4 of the liquid ejection module 20 is an example of a second piezoelectric element, the electrode 602 of the piezoelectric element 60 is an example of a third electrode, and the electrode 603 of the piezoelectric element 60 is an example of a fourth electrode. Furthermore, the drive signals COM and VOUT are examples of drive signals, and the drive signal COMA3 in the drive signal COM is an example of a first drive signal, the drive signal COMA4 is an example of a second drive signal, the drive signal COMC3 is an example of a third drive signal, the drive signal COMB3 is an example of a fourth drive signal, and the drive signal COMB4 is an example of a fifth drive signal.

[0279] Furthermore, layer 842 is an example of a first wiring layer, layer 843 is an example of a second wiring layer, layer 841 is an example of a third wiring layer, layer 844 is an example of a fourth wiring layer, and layer 845 is an example of a sixth wiring layer. Wiring WA3 is an example of a first wiring line, wiring WA4 is an example of a second wiring line, wiring WG2 is an example of a third wiring line, wiring WC3 is an example of a fourth wiring line, wiring WS is an example of a fifth wiring line, wiring WG1 is an example of a sixth wiring line, wiring WB3 is an example of a seventh wiring line, wiring WB4 is an example of an eighth wiring line, wiring WG3 is an example of a ninth wiring line, and wiring WG4 is an example of an eleventh wiring line. Furthermore, inter-wire area BW34 is an example of an inter-wire area, among terminals TM2, the terminal TM2 supplied with drive signal COMA3 is an example of a first terminal, and among terminals TM2, the terminal TM2 supplied with drive signal COMA4 is an example of a second terminal. Furthermore, the Z direction is an example of a first direction.

[0280] 7. Effects

[0281] In the liquid ejection device 1 and wiring substrate 810 configured as described above, inter-wiring area BW34 includes a wide inter-wiring area wBW34, in which the inter-wiring distance between wiring WA3 and wiring WB4 is greater than the sum of the line width of wiring WC3 and the minimum diameter of the through-hole wiring, and a narrow inter-wiring area nBW34, in which the inter-wiring distance between wiring WA3 and wiring WB4 is less than the sum of the line width of wiring WC3 and the minimum diameter of the through-hole wiring and greater than the line width of the through-hole wiring. Furthermore, the inter-wiring area BW34 includes an area in which wiring WG2 is not located within the narrow inter-wiring area nBW34, between the imaginary line VL connecting terminal TM2 for outputting drive signal COMA3 and terminal TM2 for outputting drive signal COMA4, and the wide inter-wiring area wBW34. Consequently, wiring WG2 functions as an antenna in inter-wiring area BW34, thereby reducing the possibility of noise being superimposed on wiring WG2. As a result, the possibility that noise superimposed on the wiring WG2 will affect the wiring WC3, which is arranged to overlap the inter-line area BW34, and thus reduce the waveform accuracy of the drive signal COMC transmitted via the wiring WC3 is reduced. In other words, the accuracy of the drive signal COMC supplied to the discharge module 23-3 is improved.

[0282] Furthermore, because wiring WG4 overlaps with the narrow inter-wiring area nBW34 between the imaginary line VL and the wide inter-wiring area wBW34 when viewed along the Z direction, it acts as a shield, reducing the possibility of noise being superimposed on wiring WC3. This reduces the possibility of degradation in the waveform accuracy of the drive signal COMC transmitted via wiring WC3. This further improves the accuracy of the drive signal COMC supplied to the ejection module 23-3.

[0283] 8. Modifications

[0284] In the liquid ejection device 1 described above, the wiring substrate 810 may also include a wiring layer located between layer 843 and layer 844, in which a wiring pattern for transmitting the reference voltage signal VBS is provided over substantially the entire surface. Specifically, the wiring substrate 810 may include a wiring layer, among the plurality of wiring layers, in which a wiring pattern for transmitting the reference voltage signal VBS supplied to the electrode 603 of the piezoelectric element 60 included in each of the ejection modules 23-1 to 23-6 is provided over substantially the entire surface, and the wiring layer is located between layer 843 and layer 844 along the Z direction. This reduces the resistance of the feedback path in which the drive signals COMA, COMB, and COMC are fed back after being supplied to the piezoelectric element 60, thereby reducing the possibility of fluctuations in the voltage value of the reference voltage signal VBS.

[0285] Here, the wiring layer located between layer 843 and layer 844 and in which the wiring pattern for transmitting the reference voltage signal VBS is set on substantially the entire surface is an example of the fifth wiring layer, and the wiring pattern for transmitting the reference voltage signal VBS set on substantially the entire surface of the wiring layer is an example of the tenth wiring.

[0286] Although the present embodiment and its modifications have been described above, the present invention is not limited to these embodiments and can be implemented in various forms without departing from the spirit and scope of the present invention. For example, the above-described embodiments can be appropriately combined.

[0287] The present invention includes structures that are substantially the same as the structures described in the embodiments (for example, structures having the same functions, methods, and results, or structures having the same purposes and effects). In addition, the present invention includes structures that replace non-essential parts of the structures described in the embodiments. In addition, the present invention includes structures that have the same effects as the structures described in the embodiments, or structures that can achieve the same purposes. In addition, the present invention includes structures that add known technologies to the structures described in the embodiments.

[0288] The following can be derived from the above-mentioned embodiments.

[0289] One embodiment of a liquid ejection device comprises: an ejection head, which includes a first piezoelectric element having a first electrode and a second electrode and a second piezoelectric element having a third electrode and a fourth electrode, and ejects liquid by driving the first piezoelectric element and the second piezoelectric element; a wiring substrate, which has a plurality of wiring layers and through-hole wiring, wherein the plurality of wiring layers are used to transmit driving signals for driving the first piezoelectric element and the second piezoelectric element and are arranged along a first direction, the through-hole wiring electrically connects the layers of the plurality of wiring layers, and a first wiring layer among the plurality of wiring layers includes: a first wiring for transmitting a driving signal in the driving signal a first drive signal transmission, the first drive signal being a signal supplied to the first electrode and driving the first piezoelectric element in a manner of ejecting liquid from the ejection head; a second wiring for transmitting a second drive signal among the drive signals, the second drive signal being a signal supplied to the third electrode and driving the second piezoelectric element in a manner of ejecting liquid from the ejection head; a third wiring, at least a portion of which is located in an inter-wiring area between the first wiring and the second wiring, the second wiring layer among the plurality of wiring layers comprising: a fourth wiring for transmitting the third drive signal among the drive signals, the A third driving signal is a signal supplied to the first electrode and drives the first piezoelectric element in a manner that does not eject liquid from the ejection head; a fifth wiring is for transmitting a reference voltage signal, wherein the reference voltage signal is a signal supplied to the second electrode and the fourth electrode and has a constant voltage value, and the wiring substrate includes: a first terminal that outputs the first driving signal; a second terminal that outputs the second driving signal, and among the plurality of wiring layers, the first wiring layer and the second wiring layer are arranged adjacent to each other, and in the direction along the first direction, the fourth wiring overlaps the inter-wiring area with at least a portion thereof. The wiring inter-area is arranged in a manner, the wiring inter-area includes a wide wiring inter-area and a narrow wiring inter-area, wherein the wide wiring inter-area is an area where the wiring inter-area distance between the first wiring and the second wiring is greater than the sum of the line width of the fourth wiring and the minimum diameter of the through-hole wiring, and the narrow wiring inter-area is an area where the wiring inter-area distance is less than the sum of the line width of the fourth wiring and the minimum diameter of the through-hole wiring and is greater than the line width of the through-hole wiring, and the third wiring is not located in the wiring inter-area of ​​the first wiring layer, in the narrow wiring inter-area between the imaginary line connecting the first terminal and the second terminal and the wide wiring inter-area.

[0290] According to the liquid ejection device, the possibility of deformation in the signal waveforms of the first drive signal, the second drive signal and the third drive signal due to the influence of inductance is reduced by arranging the fourth wiring for transmitting the third drive signal with a smaller current value in a manner that does not overlap with the first wiring for transmitting the first drive signal with a larger current value and the second wiring for transmitting the second drive signal, and in a manner that overlaps with the inter-wiring area in at least a portion along the first direction.

[0291] Furthermore, by preventing the third wiring from being located in the narrow inter-wiring area between the imaginary line connecting the first and second terminals and the wide inter-wiring area within the inter-wiring area where the fourth wiring is located, the third wiring acts as an antenna. This reduces the likelihood of noise being superimposed on the fourth wiring that is arranged overlapping in the first direction. Consequently, the likelihood of distortion in the signal waveform of the third drive signal transmitted via the fourth wiring is reduced.

[0292] In one embodiment of the liquid ejection device, the through-hole wiring may be located in the wide-inter-wiring region and not located in the narrow-inter-wiring region.

[0293] In one embodiment of the liquid ejection device, the line width of the fourth wiring may be smaller than the line width of the first wiring, and the line width of the fourth wiring may be smaller than the line width of the second wiring.

[0294] In one embodiment of the liquid ejection device, the first wiring may be provided so as to at least partially overlap with the fifth wiring, and the second wiring may be provided so as to at least partially overlap with the fifth wiring in a direction along the first direction.

[0295] According to this liquid ejection device, the first wiring that transmits the first drive signal to the electrode 602 of the first piezoelectric element and the fifth wiring that transmits the reference voltage signal to the electrode 603 of the first piezoelectric element are arranged so as to oppose each other along the first direction. This allows the inductance component generated by the current flowing with the supply of the first drive signal to the first piezoelectric element to be canceled. Furthermore, the second wiring that transmits the second drive signal to the electrode 602 of the second piezoelectric element and the fifth wiring that transmits the reference voltage signal to the electrode 603 of the second piezoelectric element to be arranged so as to oppose each other along the first direction. This allows the inductance component generated by the current flowing with the supply of the first drive signal to the first piezoelectric element to be canceled. This reduces the possibility of distortion in the signal waveforms of the first and second drive signals.

[0296] In one embodiment of the liquid ejection device, the third wiring may transmit a signal having a constant potential.

[0297] In one embodiment of the liquid ejection device, the third wiring may transmit a signal that is constant at a ground potential.

[0298] In one embodiment of the liquid ejection device, it can also be set that the third wiring layer among the multiple wiring layers includes a sixth wiring for transmitting signals with a constant potential, and in the direction along the first direction, the first wiring layer is located between the second wiring layer and the third wiring layer, and in the direction along the first direction, the sixth wiring is arranged in a manner that at least a portion overlaps with the first wiring.

[0299] In one embodiment of the liquid ejection device, the fourth wiring layer among the plurality of wiring layers may include: a seventh wiring for transmitting a fourth driving signal among the driving signals, the fourth driving signal being a signal supplied to the first electrode and driving the first piezoelectric element in a manner of ejecting liquid from the ejection head; an eighth wiring for transmitting a fifth driving signal among the driving signals, the fifth driving signal being a signal supplied to the third electrode and driving the second piezoelectric element in a manner of ejecting liquid from the ejection head; and a ninth wiring being arranged in a manner that at least a portion overlaps with the inter-wiring area in a direction along the first direction, the second wiring layer being located between the first wiring layer and the fourth wiring layer in a direction along the first direction, the seventh wiring being arranged in a manner that at least a portion overlaps with the first wiring in a direction along the first direction, and the eighth wiring being arranged in a manner that at least a portion overlaps with the second wiring in a direction along the first direction.

[0300] In one aspect of the liquid ejection device, the ninth wiring and the narrow inter-wiring area between the virtual line and the wide inter-wiring area may not overlap in the direction along the first direction.

[0301] In one embodiment of the liquid ejection device, it can also be set that the fifth wiring layer among the multiple wiring layers includes a tenth wiring for transmitting the reference voltage signal, and the reference voltage signal is a signal supplied to the second electrode and the fourth electrode and has a constant voltage value. In the direction along the first direction, the fifth wiring layer is located between the second wiring layer and the fourth wiring layer.

[0302] In one embodiment of the liquid ejection device, the sixth wiring layer among the multiple wiring layers may include an eleventh wiring for transmitting a constant potential signal, and the fourth wiring layer may be located between the second wiring layer and the sixth wiring layer in the direction along the first direction.

[0303] One method of a wiring substrate is to transmit a drive signal wiring substrate for driving a first piezoelectric element and a second piezoelectric element to a nozzle head, wherein the nozzle head includes the first piezoelectric element having a first electrode and a second electrode and the second piezoelectric element having a third electrode and a fourth electrode, and liquid is ejected by driving the first piezoelectric element and the second piezoelectric element. The wiring substrate comprises: a plurality of wiring layers, wherein the plurality of wiring layers are arranged along a first direction; through-hole wiring, which electrically connects the layers of the plurality of wiring layers; a first terminal, which outputs the first drive signal; a second terminal, which outputs the second drive signal, and the like. The first wiring layer among the plurality of wiring layers includes: a first wiring for transmitting a first driving signal among the driving signals, the first driving signal being a signal supplied to the first electrode and driving the first piezoelectric element in a manner of ejecting liquid from the ejection head; a second wiring for transmitting a second driving signal among the driving signals, the second driving signal being a signal supplied to the third electrode and driving the second piezoelectric element in a manner of ejecting liquid from the ejection head; a third wiring, at least a portion of which is located in an inter-wiring area between the first wiring and the second wiring, and the plurality of wiring layers. The second wiring layer includes: a fourth wiring for transmitting a third driving signal among the driving signals, wherein the third driving signal is supplied to the first electrode and drives the first piezoelectric element in a manner that does not eject liquid from the ejection head; and a fifth wiring for transmitting a reference voltage signal, wherein the reference voltage signal is supplied to the second electrode and the fourth electrode and has a constant voltage value. Among the plurality of wiring layers, the first wiring layer and the second wiring layer are arranged adjacent to each other, and in the direction along the first direction, the fourth wiring is arranged so that at least a portion overlaps with the inter-wiring area. The inter-wiring area includes a wide inter-wiring area and a narrow inter-wiring area, wherein the wide inter-wiring area is an area where the inter-wiring distance between the first wiring and the second wiring is greater than the sum of the line width of the fourth wiring and the minimum diameter of the through-hole wiring, and the narrow inter-wiring area is an area where the inter-wiring distance is less than the sum of the line width of the fourth wiring and the minimum diameter of the through-hole wiring and is greater than the line width of the through-hole wiring, and the third wiring is not located in the narrow inter-wiring area between the imaginary line connecting the first terminal and the second terminal and the wide inter-wiring area in the inter-wiring area of ​​the first wiring layer.

[0304] According to the wiring substrate, the fourth wiring for transmitting the third drive signal with a smaller current value is arranged so as not to overlap with the first wiring for transmitting the first drive signal with a larger current value and the second wiring for transmitting the second drive signal, and is arranged so as to overlap with the inter-wiring area in at least a portion along the first direction, thereby reducing the possibility of deformation in the signal waveforms of the first drive signal, the second drive signal and the third drive signal due to the influence of inductance.

[0305] Furthermore, by preventing the third wiring from being located in the narrow inter-wiring area between the imaginary line connecting the first and second terminals and the wide inter-wiring area in the inter-wiring area along the first direction, the third wiring acts as an antenna, thereby reducing the possibility of noise being superimposed on the fourth wiring line, which is arranged overlapping in the first direction. As a result, the possibility of distortion in the signal waveform of the third drive signal transmitted via the fourth wiring is reduced.

[0306] Explanation of symbols

[0307] 1…Liquid ejection device; 2…Control unit; 3…Liquid container; 4…Conveying unit; 5…Ejection unit; 10…Head driving module; 20…Liquid ejection module; 23…Ejection module; 30…Connecting component; 31…Casing; 33…Assembly substrate; 34…Flow channel structure; 35…Head substrate; 37…Distribution channel; 39…Fixed plate; 41…Conveying motor; 42…Conveying roller; 50…Drive signal output circuit; 52…Drive circuit; 53…Reference voltage output circuit; 60…Piezoelectric element; 100…Control circuit; 101…Integrated circuit; 120…Conversion circuit; 200…Drive signal selection circuit; 201…Integrated circuit; 210…Selection control circuit; 212…Shift register; 214…Latch Circuit; 216…decoder; 220…recovery circuit; 230…selection circuit; 232a, 232b, 232c…inverter; 234a, 234b, 234c…transmission gate; 311…opening; 313…substrate insertion portion; 315…holding member; 330…connection portion; 341…introduction portion; 343…through hole; 351…opening; 352, 353, 355…cutout; 371…opening; 373…introduction portion; 388…wiring member; 391…opening; 500…integrated circuit; 510…modulation circuit; 512; 513…adder; 514…comparator; 515…inverter; 516…integrating attenuator; 517…attenuator; 520…gate driver 521, 522…gate driver; 550…amplifier circuit; 560…demodulator circuit; 570, 572…feedback circuit; 590…power supply circuit; 600…ejector; 601…piezoelectric element; 602, 603…electrode; 610…vibration plate; 611…lead electrode; 620…flexible substrate; 621…sealing film; 622…fixed substrate; 623…nozzle plate; 623a…liquid ejection surface; 630…connecting plate; 641…protective substrate; 642…flow path forming substrate; 643…through hole; 644…protective space; 660…housing; 661…introduction channel; 662…connection port; 665…recess; 710…heat sink; 711…bottom portion; 712, 713…side portions 714…opening; 715, 716, 717…protrusion; 718…heat sink; 720…heat conducting component assembly; 730, 740, 750, 760…heat conducting component; 770…cooling fan; 780…screw; 800…drive circuit board; 810…wiring board; 811, 812, 813, 814…edge; 820…through hole; 831, 832…surface; 840…insulating layer; 841-845…layer; C1-C5, C7…capacitor; CB1, CB2…pressure chamber; CN1, CN2…connector; D1…diode; FC…wiring component; L1…inductor; M1, M2…transistor; MN1, MN2…manifold; N1, N2…nozzle; P…dielectric;R1-R6…resistors; RA1, RA2…supply channels; RB1, RB2…supply channels; RK1, RK2…pressure chamber channels; RR1, RR2…nozzle channels; RX1, RX2…connector channels; Su1, Su2…flow channel plates; WA1-WA6, WB1-WB6, WC1-WC6, WG1-WG4, WH, WS…wiring.

Claims

1. A liquid ejection device, characterized in that: have: an ejection head including a first piezoelectric element having a first electrode and a second electrode, and a second piezoelectric element having a third electrode and a fourth electrode, and ejecting liquid by driving the first piezoelectric element and the second piezoelectric element; A wiring substrate having a plurality of wiring layers and through-hole wiring, wherein the plurality of wiring layers are arranged along a first direction for transmitting drive signals for driving the first piezoelectric element and the second piezoelectric element, and the through-hole wiring electrically connects layers of the plurality of wiring layers. A first wiring layer among the plurality of wiring layers comprises: a first wiring for transmitting a first drive signal among the drive signals, the first drive signal being a signal supplied to the first electrode and driving the first piezoelectric element so as to eject liquid from the ejection head; a second wiring for transmitting a second drive signal among the drive signals, the second drive signal being a signal supplied to the third electrode and driving the second piezoelectric element so as to eject liquid from the ejection head; a third wiring, at least a portion of which is located in an inter-wiring area between the first wiring and the second wiring, The second wiring layer among the plurality of wiring layers comprises: a fourth wiring for transmitting a third drive signal among the drive signals, the third drive signal being a signal supplied to the first electrode and driving the first piezoelectric element in a manner that does not eject liquid from the ejection head; a fifth wiring for transmitting a reference voltage signal, wherein the reference voltage signal is a signal supplied to the second electrode and the fourth electrode and has a constant voltage value; The wiring substrate includes: a first terminal for outputting the first driving signal; a second terminal which outputs the second driving signal, Among the plurality of wiring layers, the first wiring layer and the second wiring layer are provided adjacent to each other, The fourth wiring is provided so that at least a portion overlaps the inter-wiring area in a direction along the first direction. The inter-wiring area includes a wide inter-wiring area and a narrow inter-wiring area, wherein the wide inter-wiring area is an area where the inter-wiring distance between the first wiring and the second wiring is greater than the sum of the line width of the fourth wiring and the minimum diameter of the through-hole wiring, and the narrow inter-wiring area is an area where the inter-wiring distance is less than the sum of the line width of the fourth wiring and the minimum diameter of the through-hole wiring and is greater than the line width of the through-hole wiring. The third wiring is not located in the narrow inter-wiring area between an imaginary line connecting the first terminal and the second terminal and the wide inter-wiring area in the inter-wiring area of ​​the first wiring layer.

2. The liquid ejection device according to claim 1, wherein The through-hole wiring is located in the wide inter-wiring area and is not located in the narrow inter-wiring area.

3. The liquid ejection device according to claim 1 or 2, wherein: The line width of the fourth wiring is smaller than the line width of the first wiring, The line width of the fourth wiring is smaller than the line width of the second wiring.

4. The liquid ejection device according to claim 1 or 2, wherein: In a direction along the first direction, the first wiring is provided so that at least a portion thereof overlaps with the fifth wiring, and the second wiring is provided so that at least a portion thereof overlaps with the fifth wiring.

5. The liquid ejecting device according to claim 1, wherein The third wiring transmits a signal at a constant potential.

6. The liquid ejecting device according to claim 4, wherein: The third wiring transmits a signal that is constant at a ground potential.

7. The liquid ejecting device according to claim 1, wherein The third wiring layer among the plurality of wiring layers includes a sixth wiring for transmitting a signal at a constant potential. The first wiring layer is located between the second wiring layer and the third wiring layer in the direction along the first direction, The sixth wiring is provided so that at least a portion overlaps with the first wiring in a direction along the first direction.

8. The liquid ejecting device according to claim 1, wherein A fourth wiring layer among the plurality of wiring layers includes: a seventh wiring for transmitting a fourth driving signal among the driving signals, the fourth driving signal being a signal supplied to the first electrode and driving the first piezoelectric element so as to eject liquid from the ejection head; an eighth wiring line for transmitting a fifth driving signal among the driving signals, the fifth driving signal being a signal supplied to the third electrode and driving the second piezoelectric element so as to eject liquid from the ejection head; a ninth wiring line provided in a direction along the first direction so that at least a portion thereof overlaps with the inter-wiring area; The second wiring layer is located between the first wiring layer and the fourth wiring layer in the direction along the first direction, The seventh wiring is provided so as to at least partially overlap with the first wiring in a direction along the first direction. The eighth wiring is provided so that at least a portion overlaps with the second wiring in a direction along the first direction.

9. The liquid ejecting device according to claim 8, wherein The ninth wiring and the imaginary line do not overlap the narrow inter-wiring area between the wide inter-wiring area in the direction along the first direction.

10. The liquid ejection device according to claim 8 or 9, wherein: The fifth wiring layer among the plurality of wiring layers includes a tenth wiring for transmitting the reference voltage signal, the reference voltage signal being a signal having a constant voltage value and supplied to the second electrode and the fourth electrode. The fifth wiring layer is located between the second wiring layer and the fourth wiring layer in a direction along the first direction.

11. The liquid ejecting device according to claim 8, wherein A sixth wiring layer among the plurality of wiring layers includes an eleventh wiring for transmitting a signal at a constant potential, The fourth wiring layer is located between the second wiring layer and the sixth wiring layer in a direction along the first direction.

12. A wiring substrate, characterized in that: The device transmits a driving signal for driving a first piezoelectric element and a second piezoelectric element to a nozzle head. The nozzle head includes the first piezoelectric element having a first electrode and a second electrode and the second piezoelectric element having a third electrode and a fourth electrode, and ejects liquid by driving the first piezoelectric element and the second piezoelectric element. The wiring substrate comprises: a plurality of wiring layers, the plurality of wiring layers being arranged along a first direction; Through-hole wiring for electrically connecting the plurality of wiring layers; a first terminal outputting a first driving signal; a second terminal which outputs a second driving signal, A first wiring layer among the plurality of wiring layers comprises: a first wiring for transmitting a first drive signal among the drive signals, the first drive signal being a signal supplied to the first electrode and driving the first piezoelectric element so as to eject liquid from the ejection head; a second wiring for transmitting a second drive signal among the drive signals, the second drive signal being a signal supplied to the third electrode and driving the second piezoelectric element so as to eject liquid from the ejection head; a third wiring, at least a portion of which is located in an inter-wiring area between the first wiring and the second wiring, The second wiring layer among the plurality of wiring layers comprises: a fourth wiring for transmitting a third drive signal among the drive signals, the third drive signal being a signal supplied to the first electrode and driving the first piezoelectric element in a manner that does not eject liquid from the ejection head; a fifth wiring for transmitting a reference voltage signal, wherein the reference voltage signal is a signal supplied to the second electrode and the fourth electrode and has a constant voltage value; Among the plurality of wiring layers, the first wiring layer and the second wiring layer are provided adjacent to each other, The fourth wiring is provided so that at least a portion overlaps the inter-wiring area in a direction along the first direction. The inter-wiring area includes a wide inter-wiring area and a narrow inter-wiring area, wherein the wide inter-wiring area is an area where the inter-wiring distance between the first wiring and the second wiring is greater than the sum of the line width of the fourth wiring and the minimum diameter of the through-hole wiring, and the narrow inter-wiring area is an area where the inter-wiring distance is less than the sum of the line width of the fourth wiring and the minimum diameter of the through-hole wiring and is greater than the line width of the through-hole wiring. The third wiring is not located in the narrow inter-wiring area between an imaginary line connecting the first terminal and the second terminal and the wide inter-wiring area in the inter-wiring area of ​​the first wiring layer.

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