A method for calibrating and manufacturing probe card adapter plates based on MEMS fabrication technology

Abstract

This application discloses a method for manufacturing probe card adapter boards based on MEMS processing technology. The adapter board is made of a ceramic substrate that has undergone correction and compensation treatment followed by rewiring. The correction and compensation treatment involves forming several position-corrected pads on the bonding surface of the ceramic substrate after sintering using a rewiring process. These pads are then electrically connected to several electrodes within the ceramic substrate. This method changes the position of the PADs through a compensation layer, ensuring that the position of the exposed PADs on the flip-chip bonding surface of the adapter board meets production requirements. The flip-chip bonding surface can be reprocessed, and this method offers faster turnaround time, stability, and simplicity.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a method for correcting and manufacturing probe card adapters based on MEMS fabrication processes. Background Technology

[0002] The semiconductor industry is highly developed today. Before packaging, a large number of chips need to be tested. This process requires probe cards, which mainly consist of three parts: a PCB, an adapter board, and several probes. In high-end probe cards, the adapter board is often the primary component. The adapter board is made from multiple green ceramic wafers through processes such as drilling, printing, stacking, cutting, lamination, and sintering. The ceramic wafer surface has some metal pads (solder pads). One side of the adapter board connects to several probes and is called the C4 side (Controlled Collapse Chip Connection), while the other side connects to the PCB and is called the BGA side. The C4 side of the adapter board often requires the fabrication of metal traces, pads, or insulating layers.

[0003] However, ceramic materials inevitably shrink during the firing process, which affects the quality of the C4 surface of the adapter plate and the subsequent processing of the C4 surface.

[0004] Therefore, how to improve the position accuracy of the PAD on the C4 side of the adapter board so that the PAD on the C4 side meets the processing requirements of the C4 side is an urgent problem to be solved. Summary of the Invention

[0005] To address the issue of PAD positional deviations after ceramic substrate firing in existing technologies, this application aims to provide a method for correcting and manufacturing probe card adapter boards based on MEMS processing technology.

[0006] To achieve the above objectives, this application adopts the following technical solution: a method for manufacturing a probe card adapter board based on MEMS processing technology, wherein the adapter board is made of a ceramic substrate after calibration and compensation treatment. The calibration and compensation treatment is as follows: after the ceramic substrate is sintered, a plurality of solder pads after position calibration are formed on the bonding surface of the ceramic substrate by a redistribution process. The plurality of solder pads are electrically connected to a plurality of electrodes in the ceramic substrate.

[0007] In the above technical solution, a further preferred embodiment includes the following steps:

[0008] S1. After the ceramic substrate is sintered, the bonding surface of the ceramic substrate is polished.

[0009] S2. Measuring the electrodes on the ceramic substrate, the measurement including measuring the position of the electrodes;

[0010] S3. Provide a target template, the target template including the target position information of the plurality of solder pads, and design and manufacture a calibration mask based on the measurement results and the target template;

[0011] S4. A compensation layer is formed on the bonding surface of the ceramic substrate using the correction mask, wherein the compensation layer has a plurality of pads that are electrically connected to the electrodes in the ceramic substrate.

[0012] In the above technical solution, a further preferred embodiment is that step S3 includes: fabricating a first mask based on the measurement results in step S2; fabricating a second mask based on the target template and the measurement results; and fabricating a third mask and a fourth mask based on the target template.

[0013] In the above technical solution, a further preferred embodiment is that step S4 further includes:

[0014] S41. Spin-coat a layer of first photoresist onto the bonding surface of the ceramic substrate, and use the first mask to perform photolithography to expose the electrodes on the surface of the ceramic substrate, and then solidify to form the first photoresist layer.

[0015] S42. A seed layer is formed on the surface of the first photoresist layer;

[0016] S43. Using the second mask, a patterned second photoresist layer is formed on the seed layer;

[0017] S44. Electroplating metal, and then removing the second photoresist layer;

[0018] S45. Spin-coat the third photoresist and use the third mask to perform patterning to form the third photoresist layer;

[0019] S46. A seed layer is formed on the surface of the third photoresist layer;

[0020] S47. Use the fourth photomask to fabricate the fourth photoresist layer;

[0021] S48. Electroplating metal, and then removing the fourth photoresist layer;

[0022] S49. Spin-coat the fourth photoresist and cure it. After polishing and thinning, expose each of the solder pads.

[0023] In the above technical solution, it is further preferred that, before step S4, a step S40 of organic cleaning of the ceramic substrate is included.

[0024] In the above technical solution, a further preferred embodiment is that after step S4, step S5 is also included: reprocessing the flip-chip bonding surface of the adapter plate.

[0025] In the above technical solution, it is further preferred that an automatic image testing instrument is used to measure the electrodes on the ceramic substrate in step S2.

[0026] In the above technical solution, it is further preferred that, in step S2, the measurement also includes measuring the size of the electrode.

[0027] Compared with the prior art, this application achieves the following beneficial effects:

[0028] The method of this application changes the position of the solder pads on the adapter plate by using a compensation layer, so that the position of the exposed solder pads on the flip-chip bonding surface of the adapter plate meets the production requirements. The flip-chip bonding surface can be reprocessed, and the method has faster timeliness, stability and simplicity. Attached Figure Description

[0029] Figures 1 to 10 This is a schematic diagram of each step of the correction and compensation process provided in the embodiments of this application.

[0030] The components are: 1. Adapter board; 11. Flip-chip bonding surface; 12. Encapsulation surface; 2. Ceramic substrate; 21. Bonding surface; 22. Electrode; 3. First photoresist layer; 4. Second photoresist layer; 5. Third photoresist layer; 6. Fourth photoresist layer; 7. Fifth photoresist layer; 8. Bonding pad. Detailed Implementation

[0031] To illustrate the technical content, structural features, achieved objectives, and effects of the application in detail, the technical solutions of the embodiments of this application will be described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. In the following description, for illustrative purposes, numerous specific details are set forth to provide a detailed description of various exemplary embodiments or implementations of the invention. However, various exemplary embodiments may also be implemented without these specific details or in one or more equivalent arrangements. Furthermore, the various exemplary embodiments may differ, but are not necessarily exclusive. For example, the specific shape, structure, and characteristics of the exemplary embodiments may be used or implemented in another exemplary embodiment without departing from the inventive concept.

[0032] In the following description, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined with "first," "second," etc., may explicitly or implicitly include one or more of that feature. In the description of this application, unless otherwise stated, "a plurality of" means two or more.

[0033] In this application, unless otherwise expressly specified and limited, the term "connection" shall be interpreted broadly. For example, "connection" may be a fixed connection, a detachable connection, or an integral part; it may be a direct connection or an indirect connection through an intermediate medium.

[0034] This application provides a method for calibrating and manufacturing probe card adapter boards based on MEMS fabrication technology, such as... Figure 10 As shown, a typical probe card has an adapter board 1, which has a flip-chip bonding surface 11 (i.e., C4 surface) and a package surface 12 (i.e., BGA surface), with the package surface 12 and the flip-chip bonding surface 11 arranged vertically opposite each other. The adapter board 1 is made of multiple green ceramic wafers through processes such as drilling, printing, stacking, cutting, lamination, and sintering, and includes a ceramic substrate 2 and several conductive electrodes 22 penetrating the ceramic substrate 2.

[0035] The method for correcting the manufacturing of the probe card adapter board in this application involves performing a correction and compensation process on the sintered ceramic substrate 2 to ensure that several solder pads on the adapter board are located at standard target positions, and then further processing the adapter board. The correction and compensation process on the ceramic substrate 2 is performed after the ceramic substrate 2 has been sintered, by forming the position-corrected solder pads on the bonding surface 21 of the ceramic substrate 2 through a redistribution process.

[0036] Please refer to Figure 1-10 The correction and compensation process includes the following steps:

[0037] S1. After the ceramic substrate 2 is sintered, the bonding surface 21 of the ceramic substrate 2 is subjected to CMP (chemical mechanical) polishing treatment.

[0038] S2, The position measurement of the ceramic substrate 2 is performed using an automatic image testing instrument (VMZ device). This measurement includes the measurement of the size of the electrode 22, the position of multiple electrodes and the relative position of the electrodes, so as to ensure the accuracy of the mask made according to the measurement results, reduce the error of the PAD position after the ceramic substrate 2 is fired, and make the position of the exposed solder pads on the flip-chip bonding surface 11 of the adapter plate 1 meet the production requirements.

[0039] S3, provide a target template, which is usually a design drawing. The target template includes target position information of several solder pads. Based on the measurement results of the above steps and the target template, design and manufacture a correction mask. In this embodiment, the correction mask includes a first mask, a second mask, a third mask and a fourth mask. Specifically, the first mask is manufactured based on the measurement results of step S2, the second mask and the third mask are manufactured based on the target template and the measurement results of step S2, and the fourth mask is manufactured based on the target template.

[0040] S40, organic cleaning is performed on the ceramic substrate 2 to ensure that the surface of the ceramic substrate 2 is free of impurities;

[0041] S4, a compensation layer is formed on the bonding surface 21 of the ceramic substrate 2 using a correction mask, and several solder pads 8 are formed in the compensation layer that are electrically connected to the electrodes 22 in the ceramic substrate 2. The position of these solder pads 8 is consistent with that of the solder pads on the target template.

[0042] S5, a rewiring or encapsulation process is performed on the flip-chip bonding surface 11 of the adapter board 1.

[0043] After the ceramic substrate 2 is corrected and compensated, it forms the flip-chip bonding surface 11 of the adapter plate 1. At the same time, the position accuracy of the solder pads of the adapter plate 1 is improved, so that the flip-chip bonding surface 11 can meet the subsequent processing requirements.

[0044] Step S4 further includes:

[0045] S41, a first photoresist layer with a thickness of a is spin-coated onto the bonding surface 21 of the ceramic substrate 2, and photolithography is performed using a first mask to expose the electrode 22 on the surface of the ceramic substrate, and then cured to form the first photoresist layer 3 (see attached diagram). Figure 1 );

[0046] S42, a seed layer is formed on the surface of the first photoresist layer 3;

[0047] S43, using the second mask, a patterned second photoresist layer 4 with a thickness of α is fabricated on the seed layer (see attached). Figure 2 );

[0048] S44, electroplating metal, then removing the second photoresist layer 4 (see attached). Figure 3 and attached Figure 4 );

[0049] S45, spin-coat the third photoresist, and use the third mask to perform patterning to form the third photoresist layer 5, with a thickness of b (see attached). Figure 5 );

[0050] S46, a seed layer is formed on the surface of the third photoresist layer 5;

[0051] S47, Use the fourth photoresist layer 6 to create the fourth photoresist layer (see attached image). Figure 6 );

[0052] S48, electroplating metal, then removing the fourth photoresist layer 6 (see attached). Figure 7 and attached Figure 8 );

[0053] S49, spin-coating the fifth photoresist and curing it to form the fifth photoresist layer 7. After polishing and thinning, the solder pads 8 are flush with the surface of the polished and thinned fifth photoresist layer 7, exposing each solder pad 8 (see attached diagram). Figure 9 and attached Figure 10 ).

[0054] The polishing processes in steps S1 and S49 are both chemical mechanical polishing techniques, which enable both the ceramic substrate 2 and the adapter plate 1 to obtain a flat surface free of scratches and impurities.

[0055] In this application, the first, third, and fifth photoresists are all made of polyimide material that is insoluble in organic solvents. The first photoresist layer 3, the third photoresist layer 5, the fifth photoresist layer 7, and the bonding pad 8 form a compensation layer disposed on the bonding surface 21 of the ceramic substrate 2. Figure 2-5 As shown, the thickness α of the second photoresist layer 4 is less than the thickness b of the third photoresist layer 5, as... Figure 6-10 As shown, the thickness of the fourth photoresist layer 6 is less than the thickness of the fifth photoresist layer 7 when it is not thinned.

[0056] The second photoresist layer 4 and the fourth photoresist layer 6 dissolve during the organic cleaning process. Excess metal on the surface of the first photoresist layer 3 and the surface of the third photoresist layer 5 is detached into the organic solvent at the same time as the corresponding photoresist layers dissolve.

[0057] In steps S44 and S48, after removing the second photoresist layer 4 and the fourth photoresist layer 6 respectively, wet etching is required on the seed layer on the surface of the first photoresist layer 3 and the seed layer on the surface of the third photoresist layer 5 respectively.

[0058] In summary, the position of the PAD on the ceramic substrate 2 is deviated after firing. The method of this application changes the position of the PAD by setting a compensation layer on the ceramic substrate, so that the position of the PAD exposed on the flip-chip bonding surface 11 of the adapter board 1 meets the production requirements and the flip-chip bonding surface meets the requirements of subsequent processing. Moreover, this method has faster timeliness, stability and simplicity.

[0059] The foregoing has shown and described the basic principles, main features, and advantages of this application. Those skilled in the art should understand that this application is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of this application. Various changes and modifications can be made without departing from the spirit and scope of this application. The scope of protection claimed by this application is defined by the appended claims, specification, and their equivalents.

Claims

1. A method for manufacturing a probe card adapter board based on MEMS processing technology, wherein the adapter board is made of a ceramic substrate that has undergone calibration and compensation treatment. The calibration and compensation treatment involves forming a plurality of position-corrected pads on the bonding surface of the ceramic substrate after sintering using a redistribution process. The plurality of pads are electrically connected to a plurality of electrodes in the ceramic substrate. The calibration and compensation treatment includes the following steps: S1. After the ceramic substrate is sintered, the bonding surface of the ceramic substrate is polished. S2. Measuring the electrodes on the ceramic substrate, the measurement including measuring the position of the electrodes; S3. Provide a target template, the target template including the target position information of the plurality of solder pads, and design and manufacture a calibration mask based on the measurement results and the target template, including: The first mask is made based on the measurement results of step S2; Based on the target template and measurement results, a second mask is created; And to create a third and a fourth mask based on the target template; S4. A compensation layer is formed on the bonding surface of the ceramic substrate using the correction mask, the compensation layer having a plurality of bonding pads electrically connected to the electrodes in the ceramic substrate; characterized in that step S4 further includes: S41. A first photoresist layer is spin-coated onto the bonding surface of the ceramic substrate, and photolithography is performed using the first mask to expose the electrode on the surface of the ceramic substrate. The first photoresist layer is cured to form a permanent insulating support layer. The first photoresist is a polyimide material that is insoluble in organic solvents. S42. A first seed layer is formed on the surface of the first photoresist layer; S43. Using the second mask, a patterned second photoresist layer is fabricated on the first seed layer, wherein the second photoresist layer serves as a sacrificial layer; S44. Electroplating metal, then removing the second photoresist layer, and wet etching to remove the excess first seed layer exposed on the surface of the first photoresist layer; S45. Spin-coat the third photoresist and pattern it using the third mask to form a third photoresist layer as a permanent insulating support layer. The third photoresist is a polyimide material that is insoluble in organic solvents. S46. A seed layer is formed on the surface of the third photoresist layer; S47. Using the fourth mask, a patterned fourth photoresist layer is fabricated as a sacrificial layer; S48. Electroplating metal, then removing the fourth photoresist layer, and wet etching to remove the excess seed layer exposed on the surface of the third photoresist layer. S49. Spin-coat the fifth photoresist and cure it. After polishing and thinning, expose each of the aforementioned solder pads.

2. The method according to claim 1, characterized in that, Before step S4, the ceramic substrate is further subjected to organic cleaning step S40; in step S4, the thickness α of the second photoresist layer is less than the thickness b of the third photoresist layer, and the thickness of the fourth photoresist layer is less than the thickness of the fifth photoresist layer when it is not thinned.

3. The method according to claim 1, characterized in that, After step S4, step S5 is also included: reprocessing the flip-chip bonding surface of the adapter plate.

4. The method according to claim 1, characterized in that, In step S2, an automatic image testing instrument is used to measure the electrodes on the ceramic substrate.

5. The method according to claim 1, characterized in that, In step S2, the measurement also includes measuring the size of the electrode.

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